With Particular Barrier Dimension Patents (Class 257/17)
  • Patent number: 5737353
    Abstract: A multiquantum-well semiconductor laser having a long wavelength, for use in optical communication systems, comprises an active region including a plurality of quantum-well layers each made of InGaAs or InGaAsP, and a plurality of barrier laminates each made of InGaAsP having a bandgap wider than that of the quantum-well layers. Each barrier laminate includes three barrier layers of different compositions of InGaAsP having different bandgaps. Each barrier laminate has a thickness such that the wave functions of carriers in adjacent quantum-well layers do not overlap each other, while carriers supplied to the active region can be effectively injected into the quantum-well layers, thereby obtaining a low threshold current and a high slope efficiency.
    Type: Grant
    Filed: January 16, 1997
    Date of Patent: April 7, 1998
    Assignee: NEC Corporation
    Inventor: Yoshihiro Sasaki
  • Patent number: 5734174
    Abstract: A photo hole burning memory device includes a quantum dot and a quantum well layer cooperating with the quantum dot for storing information and a periodic structure that creates a photonic bandgap, wherein the periodic structure includes a local irregularity that forms a level in the photonic bandgap.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: March 31, 1998
    Assignee: Fujitsu Limited
    Inventor: Naoto Horiguchi
  • Patent number: 5731596
    Abstract: A method of increasing the saturation threshold of a super lattice optical absorber, and a resulting super lattice optical absorber, involves decreasing the electrical resistance of the substrate adjacent the super lattice structure based on a series resistance model.
    Type: Grant
    Filed: November 2, 1995
    Date of Patent: March 24, 1998
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventor: Magnus Jandel
  • Patent number: 5719407
    Abstract: A collective element of quantum boxes includes a plurality of the first quantum boxes (QD.sub.1) arranged within the first surface, between which conduction of electrons is allowed, a plurality of the second quantum boxes (QD.sub.2) arranged within the second surface corresponding to the plural first quantum boxes (QD.sub.1) between which conduction of electrons and holes is not substantially allowed, and a plurality of the third quantum boxes (QD.sub.3) arranged within the third surface corresponding to the plural second quantum boxes (QD.sub.2), between which conduction of holes is allowed.
    Type: Grant
    Filed: September 28, 1995
    Date of Patent: February 17, 1998
    Assignee: Sony Corporation
    Inventor: Ryuichi Ugajin
  • Patent number: 5714766
    Abstract: A memory device and memory incorporating a plurality of the memory devices is described wherein each memory device has spaced apart source and drain regions, a channel, a barrier insulating layer, a nanocrystal or a plurality of nanocrystals, a control barrier layer, and a gate electrode. The nanocrystal which may be a quantum dot, stores one electron or hole or a discrete number of electrons or holes at room temperature to provide threshold voltage shifts in excess of the thermal voltage for each change in an electron or a hole stored. The invention utilizes Coulomb blockade in electrostatically coupling one or more stored electrons or holes to a channel while avoiding in-path Coulomb-blockade controlled conduction for sensing the stored charge.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: February 3, 1998
    Assignee: International Business Machines Corporation
    Inventors: Wei Chen, Theoren Perlee Smith, III, Sandip Tiwari
  • Patent number: 5714765
    Abstract: A method of fabricating a compositional semiconductor device comprising a antum well wire or quantum dot superlattice structure, in particular a device selected from the group comprising lasers, photodiodes, resonant tunneling transistors, resonant tunneling diodes, far infrared detectors, far infrared emitters, high electron mobility transistors, solar cells, optical modulators, optically bistable devices and bipolar transistors, by epitaxial growth of the superlattice structure on a semiconductor substrate, is characterised in that the epitaxial growth is effected on a {311}, {211}, {111} or {110} substrate, and that the devices preferably have length and width dimensions less than 500 .ANG. and especially less than 300 .ANG..
    Type: Grant
    Filed: October 26, 1994
    Date of Patent: February 3, 1998
    Assignee: Max-Planck-Gesellschaft zur Foerderung der Wissenschaften e.V.
    Inventors: Richard Noetzel, Nikolai N. Ledentsov, Lutz Daeweritz, Klaus Ploog
  • Patent number: 5710436
    Abstract: A quantum effect device includes a first layer having a plurality of charge confinement regions, a second layer opposing the first layer and separated from the first layer, the second layer having charges at a high concentration and consisting of a metal layer or a semiconductor layer, and a third layer consisting of an insulating layer or a semiconductor layer having a large band gap between the first layer and the second layer.
    Type: Grant
    Filed: September 26, 1995
    Date of Patent: January 20, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsufumi Tanamoto, Riichi Katoh, Li Zhang, Tadashi Sakai, Shigeki Takahashi, Taketoshi Suzuki
  • Patent number: 5689603
    Abstract: Optically interactive nanostructural element. The element includes a semiconductor substrate including at least one radiation guide region extending into the substrate. The geometry of the substrate material surrounding the radiation guide region is selected so that it acts as a quantum confinement region for electrons in the substrate material and the radiation guide region acts as a classical waveguide for radiation so that the element absorbs or emits light of a wavelength corresponding to the selected geometry. In a preferred embodiment, the optically interactive nanostructural element includes an array of the radiation guide regions spatially disposed over a surface.
    Type: Grant
    Filed: July 7, 1993
    Date of Patent: November 18, 1997
    Inventor: Gerald C. Huth
  • Patent number: 5689357
    Abstract: The nonlinear optical element for extremely high bit rates comprises a plate made of semiconductor material, in which is there is realized a sequence of variously doped layers, which can be passed through, in operation, by one or more light radiations. The element comprises a sequence of structures which exhibit excitonic nonlinearities, and which are placed geometrically close to layers of larger sizes, which act as dilution/recombination tanks for the carriers eliminated by the nonlinear structures. The element allows realization of optical devices, such as memories, directional couplers, switches, etc., in which fast excitonic nonlinearity is very evident and in which carriers are eliminated in time intervals of 1 to 10 ps, so that the devices are able to function at extremely high bit rates. (FIG.
    Type: Grant
    Filed: September 21, 1995
    Date of Patent: November 18, 1997
    Assignee: Cselt- Centro Studi e Laboratori Telecomunicazioni S.p.A.
    Inventor: Domenico Campi
  • Patent number: 5679962
    Abstract: A semiconductor device includes a semi-insulating semiconductor substrate, a semiconductor layer structure including at least an undoped layer of a first semiconductor, an undoped spacer layer of a second semiconductor having an electron affinity smaller than that of the first semiconductor, and an n type electron supply layer of the second semiconductor successively laminated on the substrate, the undoped layer having a flat top surface and a flat rear surface on the flat top surface of the undoped spacer layer, having, at a top surface, a concavo-convex periodic structure, and a flat rear surface, the n-type electron supply layer of the second semiconductor having a flat top surface and a rear surface that buries concavities of the concavo-convex structure of the undoped spacer layer, and a plurality of periodically arranged Schottky electrodes on the flat top surface of the n type electron supply layer, arranged in a direction perpendicular to the concavo-convex periodic structure of the undoped spacer lay
    Type: Grant
    Filed: May 26, 1995
    Date of Patent: October 21, 1997
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hirotaka Kizuki
  • Patent number: 5670789
    Abstract: A semiconductor light-emitting device that enables to realize a satisfactory carrier confinement effect to be capable of stable operation at room temperature. This device includes a QW layer and p- and n-barrier layers placed at each side of the QW layer. The QW layer has an energy level E.sub.va at the top of the valence band and an energy level E.sub.ca at the bottom of the conduction band. The p-barrier layer has an energy level E.sub.vpb at the top of the valence band and an energy level E.sub.cpb at the bottom of the conduction band. The n-barrier layer has an energy level E.sub.vnb at the top of the valence band and an energy level E.sub.cnb at the bottom of the conduction band. The energy levels E.sub.va, E.sub.vpb and E.sub.vnb at the top of the valence band satisfy the relationship of E.sub.va >E.sub.vpb >E.sub.vnb. The energy levels E.sub.ca, E.sub.cpb and E.sub.cnb at the bottom of the conduction band satisfy the relationship of E.sub.va <E.sub.vnb <E.sub.vpb.
    Type: Grant
    Filed: December 8, 1995
    Date of Patent: September 23, 1997
    Assignee: NEC Corporation
    Inventor: Hiroshi Iwata
  • Patent number: 5670790
    Abstract: An electronic device which includes, a couple of first conduction regions which are capable of confining carriers, a second conduction region having a higher energy level than those of the first conduction regions, and a first electrode for impressing a voltage on the first conduction regions, wherein when a voltage is impressed via the first electrode between the couple of first conduction regions, carriers are caused to move due to a tunneling effect from one of the first conduction regions via the second conduction region to the other of the first conduction regions, and when the voltage impressed between the couple of first conduction regions is removed, carriers are confined mainly in the one of the first conduction regions.
    Type: Grant
    Filed: September 19, 1996
    Date of Patent: September 23, 1997
    Assignee: Kabushikik Kaisha Toshiba
    Inventors: Riichi Katoh, Tetsufumi Tanamoto, Shigeki Takahashi
  • Patent number: 5665977
    Abstract: A semiconductor light emitting device comprises a first cladding layer, an active layer and a second cladding layer which are stacked on a semiconductor substrate. At least a part of the first cladding layer and the second cladding layer has a superlattice structure comprising II-VI compound semiconductor. Another semiconductor light emitting device comprises a first cladding layer, a first guide layer, an active layer, a second guide layer and a second cladding layer which are stacked on semiconductor substrate. At least a part of the first cladding layer, the first guide layer, the second cladding layer and the second guide layer has a superlattice structure. Still another semiconductor light emitting device comprises a defect decomposing layer, a defect blocking layer, first cladding layer, an active layer, a second cladding layer which are stacked on a semiconductor substrate. The defect decomposing layer and the defect blocking layer comprise a superlattice structure.
    Type: Grant
    Filed: August 2, 1996
    Date of Patent: September 9, 1997
    Assignee: Sony Corporation
    Inventors: Akira Ishibashi, Satoshi Matsumoto, Masaharu Nagai, Satoshi Ito, Shigetaka Tomiya, Kazushi Nakano, Etsuo Morita
  • Patent number: 5663571
    Abstract: A quantum memory has memory cells, each of the memory cells includes three-stage quantum dots stacked in sequence. A memory cell array is constructed by two-dimensionally arranging the memory cells. The quantum dots are made of heterojunctions of compound semiconductors. Writing and reading to and from a memory cell are executed by bringing a needle electrode close to the memory cell to apply an external electric field while irradiating laser light to an area including the memory cell.
    Type: Grant
    Filed: April 18, 1995
    Date of Patent: September 2, 1997
    Assignee: Sony Corporation
    Inventor: Ryuichi Ugajin
  • Patent number: 5656821
    Abstract: A semiconductor device is provided, including a semiconductor substrate of zinc blend structure, defined by a principal surface substantially coinciding to a {111}A-oriented crystal surface; an etch pit of the shape of a triangular pyramid, formed on the principal surface of the substrate, the etch pit being defined by side walls merging at an apex of said triangular pyramid, each two of the side walls merging at a valley of the triangular pyramid; and an active part formed on the etch pit; wherein the active part includes a quantum well layer having a first bandgap and provided along the side walls of the etch pit, and a pair of barrier layers having a second, larger bandgap and provided so as to sandwich the quantum well layer.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: August 12, 1997
    Assignee: Fujitsu Limited
    Inventor: Yoshiki Sakuma
  • Patent number: 5656831
    Abstract: A semiconductor photo detector has its construction such that on a substrate made of InP are formed light absorption layer having a supperlattice structure made of n- type InGaAsP and InAsP, an intermediate layer made of n- type InGaAs, a multiplication layer made of n- type InP and a layer made of p- type layer. The light having a wavelength 1.65 .mu.m being made incident into the detector from the p- type InP layer is absorbed in the superlattice structure light absorption layer of n- type InGaAs/InAsP and changed into carriers, which flowed out an external circuit. Since the superlattice of InGaAs and InAsP makes a lattice matching to InP, it may be possible to prevent that a dark current is generated by a lattice mismatching. The carriers generated by the absorbed light in the light absorption layer pass from the p type side electrode 11 into an external circuit via the n type InGaAsP intermediate layer 4, n+ type InP multiplication layer 5 and p+ type InP layer 8.
    Type: Grant
    Filed: April 1, 1996
    Date of Patent: August 12, 1997
    Assignee: NEC Corporation
    Inventor: Atsuhiko Kusakabe
  • Patent number: 5654557
    Abstract: A quantum wire structure includes a first layer having a thickness sufficiently smaller than a de Broglie wavelength of an electron wave in a medium, a second layer and a third layer which are disposed on and under the first layer and respectively have a forbidden band width larger than that of the first layer, wherein the first layer has a region with a relatively small curvature and a region with a relatively large curvature in its cross-section, and a width of the region with a relatively small curvature is 50 nm or less.
    Type: Grant
    Filed: May 25, 1994
    Date of Patent: August 5, 1997
    Assignees: Sharp Kabushiki Kaisha, Optoelectronics Technology Research Laboratory
    Inventors: Mototaka Taneya, Hiroaki Kudo, Satoshi Sugahara, Haruhisa Takiguchi
  • Patent number: 5646419
    Abstract: n-type wide bandgap semiconductors grown on a p-type layer to form hole injection pn heterojunctions and methods of fabricating the same. In a preferred embodiment, a p-type gallium nitride substrate is used. A first layer, such as a magnesium zinc sulfide layer Mg.sub.x Zn.sub.1-x S is then deposited. Thereafter, a second layer such as an n-type zinc sulfide layer is deposited. The magnesium zinc sulfide layer forms an electron blocker layer, and preferably is adequately thick to prevent significant tunneling of electrons there through. Thus, the primary charge flow across the heterojunction is by way of holes injected into the n-type zinc sulfide region from the p-type gallium nitride region, resulting in electron-hole recombination in the zinc sulfide region to provide light emission in the wide bandgap zinc sulfide material. Alternate embodiments are disclosed.
    Type: Grant
    Filed: April 7, 1995
    Date of Patent: July 8, 1997
    Assignee: California Institute of Technology
    Inventors: James O. McCaldin, Michael W. C. Wang, Thomas C. McGill
  • Patent number: 5646421
    Abstract: A quantum well intersubband infrared (IR) photodetector has a spectral response tunable by an external voltage. The photodetector consists of multiple doped quantum wells with different well widths and barrier heights. The preferred embodiment is made by repeating the whole structure of the active region of a multiple quantum well intersubband IR photodetector. Differences between repeats or groups of well widths and barrier heights result in differences in the spectral IR response of the different repeats. The device resistance of a given group is designed to be very different from those for all the other groups. As a function of an applied voltage, the repeat with the highest resistance will be turned on to detect IR with the response peak at a wavelength .lambda..sub.1. Subsequently, the next highest resistance repeat will turn on when increasing voltage with its response peaked at .lambda..sub.2, and so on. Since .lambda..sub.1, .lambda..sub.
    Type: Grant
    Filed: October 25, 1996
    Date of Patent: July 8, 1997
    Inventor: Hui Chun Liu
  • Patent number: 5646420
    Abstract: The single electron transistor can be operated at room temperature. The distance between the electrodes 5, 5 can be adjusted by the length of the protein and/or the wideness of the lipid bilayer and the distance between the quantum dot 4 and one of the electrodes 5 can be adjusted in units of 1.5 .ANG. by means of .alpha.-helix confirmation of a G segment of the protein.
    Type: Grant
    Filed: February 5, 1996
    Date of Patent: July 8, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Ichiro Yamashita
  • Patent number: 5627383
    Abstract: Optoelectronic devices such as photodetectors, modulators and lasers with improved optical properties are provided with an atomically smooth transition between the buried conductive layer and quantum-well-diode-containing intrinsic region of a p-i-n structure. The buried conductive layer is grown on an underlying substrate utilizing a surfactant-assisted growth technique. The dopant and dopant concentration are selected, as a function of the thickness of the conductive layer to be formed, so that a surface impurity concentration of from 0.1 to 1 monolayer of dopant atoms is provided. The presence of the impurities promotes atomic ordering at the interface between the conductive layer and the intrinsic region, and subsequently results in sharp barriers between the alternating layers comprising the quantum-well-diodes of the intrinsic layer.
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: May 6, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: John E. Cunningham, Keith W. Goossen, William Y. Jan, Michael D. Williams
  • Patent number: 5608229
    Abstract: A semiconductor device having: an underlie having a semiconductor surface capable of growing thereon single crystal; and a first semiconductor layer, the first semiconductor layer including: a first region of group III-V compound semiconductor epitaxially grown on generally the whole area of the semiconductor surface; and second regions of group III-V compound semiconductor disposed and scattered in the first region, the second region having a different composition ratio of constituent elements from the first region, wherein lattice constants of the first and second regions in no strain state differ from a lattice constant of the semiconductor surface, and a difference between the lattice constant of the second region in no strain state and the lattice constant of the semiconductor surface is greater than a difference between the lattice constant of the first region in no strain state and the lattice constant of the semiconductor surface.
    Type: Grant
    Filed: July 26, 1995
    Date of Patent: March 4, 1997
    Assignee: Fujitsu Limited
    Inventors: Kohki Mukai, Nobuyuki Ohtsuka
  • Patent number: 5606177
    Abstract: A resonant tunneling diode (400) made of a silicon quantum well (406) with silicon oxide tunneling barriers (404, 408). The tunneling barriers have openings (430) of size smaller than the electron wave packet spread to insure crystal alignment through the diode without affecting the tunneling barrier height, and the openings (430) have an irregular (nonperiodic) shape.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: February 25, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Robert M. Wallace, Alan C. Seabaugh
  • Patent number: 5606175
    Abstract: A quantum well device has an active region adapted to pass a tunneling current of charge carriers and comprising layers of material forming alternating potential barriers and potential wells. The structure defines, in use, a first potential well at one end of the active region, said first potential well defining a first quasi-defined energy level, and to further define second and third quasi-defined energy levels. The relative heights and thicknesses of the potential barriers when the device is in use are structured so that the first quasi-defined energy level has a longer lifetime than the second and third quasi-defined energy levels and there is a degree of coupling between the three quasi-defined energy levels which is strongest between the second and third quasi-defined energy levels. The transmission coefficient through the active region shows a resonance peak at each of the energies of the three quasi-defined energy levels.
    Type: Grant
    Filed: November 2, 1995
    Date of Patent: February 25, 1997
    Assignee: The University of Manchester Institute of Science & Technology
    Inventor: William S. Truscott
  • Patent number: 5604356
    Abstract: The present invention provides an ohmic contact device which comprises: a first layer made of a first compound semiconductor having a first energy band gap; a superlattice in contact with the first layer, the superlattice having modulation-periods comprising alternating a first very thin layer made of the first compound semiconductor and a second very thin layer made of a second compound semiconductor having a second energy band gap being smaller than the first energy band gap, thicknesses of the first very thin layers being gradually reduced from an interface of the first layer to an opposite interface and thicknesses of the second very thin layers are gradually increased from the interface of the first layer to the opposite interface; a second layer made of the second compound semiconductor in contact with the superlattice; and a metal contact in contact with the second layer.
    Type: Grant
    Filed: July 5, 1995
    Date of Patent: February 18, 1997
    Assignee: NEC Corporation
    Inventor: Yasushi Shiraishi
  • Patent number: 5600483
    Abstract: A periodic dielectric structure and method of fabricating same, the structure having a three-dimensional photonic bandgap. The structure includes a plurality of layers, at least one layer having a stratum of a first material having a first dielectric constant and a plurality of parallel regions along a first axis lying in the plane of the layer, the regions including a second material having a second dielectric constant; and a plurality of parallel channels formed through the plurality of layers in a second axis orthogonal to the plane of the layers, the channels being adapted to comprise a third material having a third dielectric constant, thereby resulting in the structure having three-dimensional periodicity. In preferred embodiments, the second and third materials include air.
    Type: Grant
    Filed: April 20, 1995
    Date of Patent: February 4, 1997
    Assignee: Massachusetts Institute of Technology
    Inventors: Shanhui Fan, Pierre R. Villeneuve, John D. Joannopoulos, Robert D. Meade
  • Patent number: 5591963
    Abstract: A photoelectric conversion device comprising, on a substrate, a photoelectric conversion element having in lamination, a first electrode layer, a first insulating layer for blocking carriers of first conduction type and second conduction type from passing therethrough, a photoelectric conversion semiconductor layer, a second insulating layer for blocking carriers of first conduction type and second conduction type from passing therethrough, and second electrode layers and a switch element having laminated a gate electrode layer, a third insulating layer, a semiconductor layer, an ohmic contact layer, a pair of first and second main electrode layers, and a wiring layer for electrically connecting first or second electrode layer of photoelectric conversion element to first main electrode layer of the switch element can be provided with high SN ratio and at lower cost without providing the injection blocking layer.
    Type: Grant
    Filed: August 8, 1995
    Date of Patent: January 7, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shinichi Takeda, Hidemasa Mizutani, Noriyuki Kaifu, Isao Kobayashi
  • Patent number: 5574289
    Abstract: Disclosed is a semiconductor optical integrated device and method of fabricating the device, the device having a plurality of quantum well structures, formed on a single substrate, acting as optical waveguides, the plurality of quantum well structures respectively having different lattice mismatches with the substrate and/or different strains (e.g., respectively compressive strain and tensile strain). The method includes selectively depositing the quantum well structures by, e.g., organometallic vapor phase epitaxy on growth regions of the substrate, the growth regions being defined by insulating layer patterning masks, with a width of the growth regions and/or a width of the patterning mask being different for the different quantum well structures.
    Type: Grant
    Filed: March 1, 1993
    Date of Patent: November 12, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Aoki, Hirohisa Sano, Shinji Sakano, Makoto Suzuki, Makoto Takahashi, Kazuhisa Uomi, Tatemi Ido, Atsushi Takai
  • Patent number: 5569933
    Abstract: An optical controlled resonant tunneling oscillator utilizing an oscillation variation characteristic of a resonant tunneling oscillator in accordance with a negative differential resistance, a series resistance and a static capacitance varied with an intensity of light when the light is incident on a resonant tunneling device having a double barrier quantum well structure and a method for fabricating the same are disclosed. The oscillator can modulate the frequency 2 or 3 levels in response to an intensity of an incident light as compared with the method of a conventioal photoelectric system that modulates the frequency in response to ON/OFF of an electric signal, thereby simplifying the system. The oscillator controls the resonant tunneling at the high speed by light, thereby enabling processing a signal of tens to hundreds GHz.
    Type: Grant
    Filed: November 22, 1994
    Date of Patent: October 29, 1996
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hye-Yong Chu, Pyong-Woon Park
  • Patent number: 5563423
    Abstract: An improved multiquantum well superlattice photodetector (10) for detecting long wavelength infrared radiation. Electron transport in a first excited energy state is enhanced in barrier layers (20) of the superlattice (16) by lowering the potential energy barriers of the barrier layers (20) to a predetermined level below the first excited energy state. The tunneling component of the dark current in a multiquantum well photodetector (10) may be substantially eliminated by placing a blocking layer (22) at one end of the superlattice (16). The thickness of the blocking layer (22) is also substantially greater than that of the barrier layers (20) of the superlattice (16) to prevent charge carriers which tunnel through the superlattice (16) from reaching the collector contact. The blocking layer (22) also has a potential energy barrier having a height at a level higher than that of the barrier layers (20) of the superlattice (16).
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: October 8, 1996
    Assignee: Hughes Aircraft Company
    Inventors: Chan-Shin Wu, Robert N. Sato, Cheng P. Wen
  • Patent number: 5561301
    Abstract: An opto-semiconductor device is disclosed which is provided with a quantum well structure comprising a first and a second barrier layer and a well layer sandwiched by the barrier layers. The barrier layers are provided in at least part thereof with a strain layer enabled to generate an internal electric field by a piezoelectric effect. The barrier layers are adapted to sandwich the well layers.
    Type: Grant
    Filed: January 25, 1995
    Date of Patent: October 1, 1996
    Assignee: Fujitsu Limited
    Inventor: Tadao Inoue
  • Patent number: 5552622
    Abstract: The present invention is to provide a compact and high speed tunnel transistor having a high input impedance, yet consuming only a small quantity of power. In a tunnel transistor according to the present invention, a gate electrode is provided via an insulating thin film on a Schottky junction which is a junction between a semiconductor and a metallic layer, a p-n.sup.+ junction between semiconductors, or an n-p.sup.+ junction between semiconductors so that an accumulation layer having a high carrier density is formed bear the surface of a semiconductor by adjusting a gate voltage Vg and thus a tunnel junction is formed between this accumulation layer and a metallic layer or a semiconductor having a high carrier density (n.sup.+ or p.sup.+) by adjusting the gate voltage Vg.
    Type: Grant
    Filed: June 23, 1995
    Date of Patent: September 3, 1996
    Assignees: Mitsuteru Kimura, Ricoh Seiki Company, Ltd.
    Inventor: Mitsuteru Kimura
  • Patent number: 5553090
    Abstract: A semiconductor multiquantum well structure is provided, which includes semiconductor well layers for forming quantum wells and semiconductor barrier layers for forming potential barriers each of which is arranged between adjacent two of the well layers. Each barrier layer is 7 nm or less in thickness. A number of the well layers is selected dependent upon the thickness of each barrier layer so that carriers or electrons and holes are injected into the respective quantum wells substantially uniformly. The number of the well layers is preferably 5 or more, and in the case, each barrier layer preferably ranges from 5 nm to 7 nm in thickness. A semiconductor laser having superior distortion characteristics at a high-frequency band such as 1 GHz can be provided.
    Type: Grant
    Filed: March 11, 1994
    Date of Patent: September 3, 1996
    Assignee: NEC Corporation
    Inventor: Hirohito Yamada
  • Patent number: 5543749
    Abstract: A heterojunction semiconductor device includes an unipolar transistor having, a collector layer, a base layer, a collector side barrier layer provided between the collector layer and base layer, an emitter layer, and an emitter side barrier layer provided between the base layer and the emitter layer. The emitter side barrier layer has a thickness for tunneling a carrier from the emitter and base layer and injecting the carrier into the base layer according to a predetermined voltage applied between the emitter and base layers, the base layer includes a superlattice structure. The superlattice structure includes a plurality thin barrier layers and a thin well layer for forming a mini-band through which the injected carrier can move and a mini-band gap with which the injected carrier collides.
    Type: Grant
    Filed: December 27, 1994
    Date of Patent: August 6, 1996
    Assignee: Fujitsu Limited
    Inventor: Yuji Awano
  • Patent number: 5543628
    Abstract: A controllable infrared filter (22) includes a quantum well filter unit (24) operable to absorb infrared energy at a selected wavelength. The quantum well filter unit (24) has a quantum well layer (26) made of an infrared transparent semiconductor mate rial and a barrier layer (28, 32) of another infrared transparent semiconductor material epitaxially deposited on each side of the quantum well layer (26). There is structure for controllably introducing charge carriers into the quantum well layer (26), which may utilize a source of electrons from other semi conductor layers (36, 38) and an applied voltage, or may utilize a laser (76) that generates charge carriers in the quantum well layer (26). The filter (22) further includes a lens (44, 46) or other optical system for directing infrared radiation through the first barrier layer (28), the quantum well layer (24), and the second barrier layer (32). Fixed band pass optical filters may be used in conjunction with the controllable quantum well filters.
    Type: Grant
    Filed: August 12, 1994
    Date of Patent: August 6, 1996
    Assignee: Hughes Aircraft Company
    Inventors: David H. Chow, Colin G. Whitney
  • Patent number: 5536948
    Abstract: A substrate upon which infrared elements are formed has a crystalline base layer, preferably comprised of silicon; a first strain superlattice layer formed upon the base layer; and a first matched superlattice layer formed upon the strain superlattice layer. The strain superlattice layer and the matched superlattice layer mitigate defect propagation from the base layer to the infrared detector elements. Optionally, a plurality of additional or second strain and matched superlattice layers are formed in an alternating layer configuration upon the first matched superlattice layer so as to achieve enhanced defect filtering.
    Type: Grant
    Filed: August 23, 1994
    Date of Patent: July 16, 1996
    Assignee: Grumman Aerospace Corporation
    Inventor: Myung B. Lee
  • Patent number: 5528051
    Abstract: The semiconductor component, comprises a succession of alternating stacked layers of a III-V semiconductor material with a large forbidden band such as Al.sub.x Ga.sub.1-x As and a III-V semiconductor material with a small forbidden band such as GaAs with p-doping, defining a quantum (9) with sub-bands of HH and LH type in the region of the layer comprising the material with a small forbidden band in the valence band diagram (E.sub.v) of each corresponding heterostructure. According to the invention, the thickness of the material with a small forbidden band is essentially selected in such a manner that only two quantum sub-levels LH.sub.1 and HH.sub.1 appear in the well, and the energy difference between these two sub-levels corresponds to the energy of the photons (6) to be detected, and the composition of the material with the large forbidden band is essentially selected in such a manner that the height adjacent the barrier (.DELTA.E.sub.
    Type: Grant
    Filed: July 22, 1994
    Date of Patent: June 18, 1996
    Assignee: Picogiga Societe Anonyme
    Inventor: Linh T. Nuyen
  • Patent number: 5521398
    Abstract: An optical operator designed to be subjected to write radiation for processing read radiation that it receives, the operator comprising an electro-optical material (Q2), first and second materials (Q1, Q3) distributed on either side of the electro-optical material (Q2), said first and second materials (Q1, Q3) being collection quantum wells. Quantum barrier forming materials (6, 8) are interposed between said two materials (Q1, Q3) and the electro-optical material (Q2), with one of the quantum barrier forming materials (6) constituting a filter such that charges of a certain sign photoexcited by the write radiation in a material (4, Q1) on one side of said filter pass through it in the absence of an external electric field to relax in the collection quantum well (Q3) situated on the other side of the filter (6), while charges of opposite sign are blocked by the filter (6) in the other collection well (Q1).
    Type: Grant
    Filed: December 8, 1994
    Date of Patent: May 28, 1996
    Assignee: France Telecom
    Inventors: Nikolaos Pelekanos, Benoit Deveaud-Pledran, Philippe Gravey, Jean-Michel Gerard
  • Patent number: 5521742
    Abstract: A semiconductor optical modulator includes a light absorbing layer having a multi-quantum well structure including two quantum wells including quantum well layers bounded and separated by barrier layers, the quantum wells having respective, different .DELTA.Ev/.DELTA.Ec ratios where .DELTA.Ec is the discontinuity between the barrier layer and a quantum well layer in the conduction band edge and .DELTA.Ev is the discontinuity between the barrier layer and a quantum well layer in the valence band edge. By this construction, the absorption peak when no electric field is applied significantly shifts toward the longer wavelength side, resulting in a large difference between the absorption peak wavelength when no electric field is applied and the absorption peak wavelength when an electric field is applied, whereby the absorption loss of a semiconductor optical modulator when no electric field is applied is reduced.
    Type: Grant
    Filed: March 14, 1994
    Date of Patent: May 28, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Eitaro Ishimura
  • Patent number: 5521397
    Abstract: Layers each consisting of one of two types of compound semiconductors A and B different from each other in a lattice constant a and an energy band gap Eg (a(A)>a(B), Eg(A)<Eg(B)) are stacked in a [111] direction on a compound semiconductor substrate whose major surface is a surface. When each layer consisting of the compound semiconductor A serves as a well layer and each layer consisting of the compound semiconductor B serves as a barrier layer, the barrier layer is formed to have a thickness larger than the critical film thickness of strain relaxation in that barrier layer and is thereby so strained as to be pulled in a direction parallel to a crystal growth surface. The well layer is so strained as to be compressed in the direction parallel to the crystal growth surface owing to partial relaxation of a strain confined in the barrier layer. This can achieve as large an optical bistable effect as possible while maintaining the light blue-shift absorption characteristic.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: May 28, 1996
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Xiong Zhang
  • Patent number: 5512762
    Abstract: A quantum box array comprising a plurality of quantum boxes is made by providing a plurality of box-shaped quantum well portions on a first barrier layer and a second barrier layer covering the quantum well portions. The quantum box array is designed so that interaction energy between electrons or holes is amply larger than transfer energy between the quantum boxes. A control electrode is provided on the second barrier layer to vary the number of electrons or holes in the quantum box array by changing the potential of the control electrode. In spite of using a relatively small number of electrons or holes, the quantum device can suppress fluctuation in density of electrons or holes, can have three or more states, and reduces the power consumption.
    Type: Grant
    Filed: September 20, 1994
    Date of Patent: April 30, 1996
    Assignee: Sony Corporation
    Inventors: Toshikazu Suzuki, Kazumasa Nomoto, Ryuichi Ugajin
  • Patent number: 5506419
    Abstract: Quantum well infrared photodetectors (QWIPs) according to the invention have a surface that provides pseudo-random reflection of the radiation that is incident thereon, resulting in an increase in the effective number of passes of the radiation through the quantum well region, and hence in increased responsivity of the QWIPs, as compared to corresponding prior art grating QWIPs. A convenient approach to forming the pseudo-random reflecting surface is disclosed.
    Type: Grant
    Filed: November 10, 1994
    Date of Patent: April 9, 1996
    Assignee: AT&T Corp.
    Inventors: Barry F. Levine, Gabby Sarusi
  • Patent number: 5506418
    Abstract: An electromagnetic wave detector formed of semiconductor materials includes at least one quantum well in which there is provided a fine layer of a material with a gap width that is smaller than that of the quantum well layer. For example, in the case of a GaAlAs/GaAs/GaAlAs, there is provision for a fine layer of InAs. In this way, the difference of energy levels between the two permitted levels is increased and detection of short wavelengths may be accomplished.
    Type: Grant
    Filed: March 21, 1995
    Date of Patent: April 9, 1996
    Assignee: Thomson-CSF
    Inventors: Philippe Bois, Emmanuel Rosencher, Borge Vinter, Jean Massies, Gerard Neu, Nicolas Grandjean
  • Patent number: 5500539
    Abstract: A method of depositing high quality diamond films and a light emitting device are described. The deposition is carried out in a reaction chamber. After disposing a substrate to be coated in the chamber, a carbon compound gas including a C--OH bond is introduced together with hydrogen thereinto. Then, deposition of diamond takes place in a magnetic field by inputting microwave energy. The present invention is particularly characterized in that the volume ratio of the carbon compound to hydrogen introduced into the reaction chamber is 0.4 to 2; the pressure in said reaction chamber is 0.01 to 3 Torr; the temperature of the substrate is kept between 200.degree. to 1000.degree. C. during deposition; and the input energy of the microwave is no lower than 2 KW. By this method, uniform and high quality diamond films can be formed.
    Type: Grant
    Filed: October 13, 1994
    Date of Patent: March 19, 1996
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaya Kadono, Shunpei Yamazaki
  • Patent number: 5496415
    Abstract: A solar cell formed from a semiconductor having a relative wide band-gap E.sub.b- characterized by a multi-quantum well system incorporated in the depletion region of the cell in which the quantum wells comprise regions of semiconductor with a smaller band gap separated by small amounts of the wider band-gap semiconductor (E.sub.b) so that the effective band-gap for absorption (E.sub.a) is less than E.sub.b.
    Type: Grant
    Filed: August 24, 1994
    Date of Patent: March 5, 1996
    Assignee: Imperial College of Science, Technology and Medicine
    Inventor: Keith Barnham
  • Patent number: 5488231
    Abstract: A metal/semiconductor junction Schottky diode optical device using a distortion grown layer is described. A plurality of GaAs mirror and AlAs mirror layers are periodically grown on a semi-insulating GaAs substrate. An n+ or p+ semiconductor layer is formed on the GaAs mirror and AlAs mirror layers. A GaAs buffer layer is formed on the semiconductor layer to grow a Schottky metal layer serving as an electrode and a mirror. A multiple quantum well structure having an electro-optical absorption characteristic is positioned between the semiconductor layer and Schottky metal layer, for constructing a diode with the metal layer/multiple quantum well structure. At least a part of the mirror layers and diode are formed with a layer in order to have resonance and non-resonance conditions between the metal layer and mirror layers. The substrate on which the diode is formed has an opposite side formed with an optical non-reflective layer.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: January 30, 1996
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: O-Kyun Kwon, Young-Wan Choi, El-Hang Lee
  • Patent number: 5477060
    Abstract: A semiconductor infrared detector having a transistor structure with a superlattice base. The superlattice base is between a multiple quantum well (MQW) structure and an electron energy high pass filter. The superlattice base restricts electrons to minibands resulting in no overlap in energy between the energies of the photoelectrons and the dark electrons. As a result, more photoelectrons reach the collector, and the emitter to collector photocurrent transfer ratio is increased. The increased transfer ratio results in increased sensitivity of the detector. The superlattice base between the MQW structure and the electron energy high pass filter comprises multiple alternating wells and barriers. The wells are preferably made of GaAs and the barriers are preferably made of Al.sub.x Ga.sub.1-x As, where x is equal to 0.25.
    Type: Grant
    Filed: June 25, 1993
    Date of Patent: December 19, 1995
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventor: Kwong-Kit Choi
  • Patent number: 5459332
    Abstract: A semiconductor photodetector employs a multilayer structure for controlling speed, efficiency and noise. A light-absorbing low band gap semiconductor emitter layer produces photogenerated charge upon absorption of light. A semiconductor collector layer collects the photogenerated charge. A semiconductor barrier layer between the light absorbing layer and the collector layer selectively blocks substantially all but photogenerated charge. A base layer may be optionally employed between the barrier layer and the collector layer for gating the current flow and controlling wavelength sensitivity.
    Type: Grant
    Filed: March 31, 1994
    Date of Patent: October 17, 1995
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventor: Thomas F. Carruthers
  • Patent number: 5459331
    Abstract: A semiconductor device includes a laminated structure including a GaAs layer and an InGaAs layer grown on the GaAs layer and through which operating current flows perpendicular to the InGaAs layer. The InGaAs layer includes a plurality of very thin GaAs layers through which most of the operating current passes by tunneling, located within the InGaAs layer and spaced apart at intervals larger than a critical thickness at which a pseudomorphic state of an InGaAs crystal grown on a GaAs crystal is maintained. Therefore, segregation of In atoms, i.e., unfavorable movement of In atoms, toward the surface of the growing InGaAs crystal, that occurs when the InGaAs layer is grown at a high temperature, and loss of In atoms is suppressed by the very thin GaAs layers. Thus, the InGaAs layer can be grown on the GaAs layer at a high temperature without degrading the surface morphology of the InGaAs layer.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: October 17, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Shigekazu Izumi
  • Patent number: 5453629
    Abstract: A photoelectric conversion device includes a plurality of photoelectric conversion units and a signal output unit. The signal output unit has at least one storage device for storing electrical signals generated by the photoelectric conversion device. A scanning device scans the electrical signals generated by the electric conversion units, and a reading device reads out electrical signals generated by the photoelectric conversion units. Each of the photoelectric conversion units includes a light absorption layer and a multiplication layer. The multiplication layer includes at least one step-back structure which multiplies carriers produced by absorption of light, and in which a forbidden band width changes continuously from a minimum to a maximum width.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: September 26, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Ihachiro Gofuku, Masato Yamanobe, Izumi Tabata, Hiraku Kozuka