With Particular Barrier Dimension Patents (Class 257/17)
  • Patent number: 6559467
    Abstract: A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
    Type: Grant
    Filed: May 17, 2001
    Date of Patent: May 6, 2003
    Assignee: Technologies and Devices International, Inc.
    Inventors: Audrey E. Nikolaev, Yuri V. Melnik, Konstantin V. Vassilevski, Vladimir A. Dmitriev
  • Patent number: 6552412
    Abstract: A semiconductor device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and middle layers (carrier accumulation layers) C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers conducted in the i-layer in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. Then quantum-wave interference layers and carrier accumulation layers are formed in series.
    Type: Grant
    Filed: May 26, 1999
    Date of Patent: April 22, 2003
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6552358
    Abstract: A semiconductor laser having a single transverse mode operation. Optical power higher than that generated by conventional pump lasers is achieved by widening the gain medium without inducing the second transverse mode. This is accomplished by providing a small refractive index difference between active and blocking regions of the laser. The refractive index difference between the laser active region material and the laser blocking region material at the fundamental frequency is less than about 0.029.
    Type: Grant
    Filed: June 8, 2002
    Date of Patent: April 22, 2003
    Assignee: Agere Systems Inc.
    Inventors: Si Hyung Cho, William C. Dautremont-Smith, Sun-Yuan Huang
  • Publication number: 20030062517
    Abstract: The present invention relates to a semiconductor device (1) with one or more current confinement regions (20) and to a method of manufacturing such a device, particularly buried heterostructure light emitting devices such as semiconductor lasers and light emitting diodes. The device comprising a doped semiconductor substrate (2) of a first conduction type, a buried heterojunction active layer (10) above the substrate (2), a current conduction region (4) above the active layer (10), one or more current confinement regions (20) formed over the substrate (2) adjacent the active layer (10), the current conduction region (4) and current confinement region (20) being arranged in use to channel electric current to the active layer (10).
    Type: Application
    Filed: September 18, 2002
    Publication date: April 3, 2003
    Applicant: Agilent Technologies, Inc.
    Inventors: Paul David Ryder, Graham Michael Berry, John Stephen Massa
  • Patent number: 6541788
    Abstract: A method and device for converting light from a first wavelength to a second wavelength. The method comprises the steps of exciting an electron in a quantum dot with an incident infrared photon having the first wavelength, the excited electron having a first energy, tunneling the excited electron through a barrier into a stress induced quantum dot, and recombining the excited electron with a hole in the stress induced quantum dot, therein producing a photon having the second wavelength, typically in the visible range.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: April 1, 2003
    Assignee: The Regents of the University of California
    Inventors: Pierre M. Petroff, Naoto Horiguchi
  • Patent number: 6537847
    Abstract: A method is described for forming a solid state qubit. The method includes forming a dot or an anti-dot. The dot or anti-dot can be formed on a substrate and is delimited by an interface that defines a closed area. The dot or anti-dot includes a superconductive material with Cooper pairs that are in a state of non-zero orbital angular momentum on at least one side of the interface. The method includes removing superconducting material on the inner side of the interface or removing the outer side of the interface by etching. The method can further include forming a dot or an anti-dot by damaging the superconducting material such that the superconductive material becomes non-superconductive in predefined areas. The damaging of superconducting material can be performed by irradiation with particles, such as alpha particles or neutrons. The superconductive material can also be formed by doping a non-superconductive material.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: March 25, 2003
    Assignee: D-Wave Systems, Inc.
    Inventors: Alexandre M. Zagoskin, Geordie Rose, Mohammad H. S. Amin, Marcel Franz, Jeremy P. Hilton
  • Publication number: 20030052317
    Abstract: The quantum circuit device comprises: an asymmetrical coupled quantum dot of a main quantum dot 3a and an operational quantum dot 3b of a smaller size than the main quantum dot 3c; an asymmetrical coupled quantum dot of a main quantum dot 3c arranged at a distance which does not permit to substantially tunnel from the main quantum dot 3a, and an operation quantum dot 3d having a smaller size than the main quantum dot 3c and arranged at a distance which permits tunneling from the operational quantum dot 3b; and a laser device for applying to the asymmetrical coupled quantum dots a laser beam of a wavelength which resonates an inter-level energy the asymmetrical coupled quantum dots. In the sleep state, electron is present at the ground state of the main quantum dot, where no exchange interaction takes place, and in an operation, the electron is transited to an excited state of the operational quantum dot, whereby the operation is made by the exchange interactions between the adjacent operational quantum dots.
    Type: Application
    Filed: March 19, 2002
    Publication date: March 20, 2003
    Applicant: FUJITSU LIMITED
    Inventor: Toshio Ohshima
  • Patent number: 6534782
    Abstract: A method for producing quantum dots. The method includes cleaning an oxide substrate and separately cleaning a metal source. The substrate is then heated and exposed to the source in an oxygen environment. This causes metal oxide quantum dots to form on the surface of the substrate.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: March 18, 2003
    Assignee: Battelle Memorial Institute
    Inventors: Yong Liang, John L. Daschbach, Yali Su, Scott A. Chambers
  • Patent number: 6534784
    Abstract: The electron tunneling device includes first and second non-insulating layers spaced apart such that a given voltage can be provided therebetween. The device also includes an arrangement disposed between the non-insulating layers and configured to serve as a transport of electrons between the non-insulating layers. This arrangement includes a first layer of an amorphous material such that using only the first layer of amorphous material in the arrangement would result in a given value of a parameter in the transport of electrons, with respect to the given voltage. The arrangement further includes a second layer of material, which is configured to cooperate with the first layer of amorphous material such that the transport of electrons includes, at least in part, transport by tunneling, and such that the parameter, with respect to the given voltage, is increased above the given value of the parameter.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: March 18, 2003
    Assignee: The Regents of the University of Colorado
    Inventors: Blake J. Eliasson, Garret Moddel
  • Patent number: 6531703
    Abstract: A method for promoting the passage of elementary particles at or through a potential barrier comprising providing a potential barrier having a geometrical shape for causing de Broglie interference between said elementary particles is disclosed. In another embodiment, the invention provides an elementary particle-emitting surface having a series of indents. The depth of the indents is chosen so that the probability wave of the elementary particle reflected from the bottom of the indent interferes destructively with the probability wave of the elementary particle reflected from the surface. This results in the increase of tunneling through the potential barrier. When the elementary particle is an electron, then electrons tunnel through the potential barrier, thereby leading to a reduction in the effective work function of the surface.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: March 11, 2003
    Assignee: Borealis Technical Limited
    Inventor: Avto Tavkhelidze
  • Publication number: 20030032208
    Abstract: A light-receiving device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and carrier accumulation layers C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an even number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. As a result, when electrons are excited in the carrier accumulation layers C1 to C3, electrons are propagated through the quantum-wave interference layer from the n-layer to the p-layer as a wave, and electric current flows rapidly.
    Type: Application
    Filed: December 16, 1999
    Publication date: February 13, 2003
    Inventor: HIROYUKI KANO
  • Patent number: 6504171
    Abstract: A light emitting device and a method of increasing the light output of the device utilize a chirped multi-well active region to increase the probability of radiative recombination of electrons and holes within the light emitting active layers of the active region by altering the electron and hole distribution profiles within the light emitting active layers of the active region (i.e., across the active region). The chirped multi-well active region produces a higher and more uniform distribution of electrons and holes throughout the active region of the device by substantially offsetting carrier diffusion effects caused by differences in electron and hole mobility by using complementary differences in layer thickness and/or layer composition within the active region.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: January 7, 2003
    Assignee: Lumileds Lighting, U.S., LLC
    Inventors: Patrick N. Grillot, Christopher P. Kocot, Michael R. Krames, Eugene I. Chen, Stephen A. Stockman, Ying-Lan Chang, Robert C. Taber
  • Patent number: 6504172
    Abstract: A solid-state quantum computing structure includes a dot of superconductive material, where the superconductor possesses a dominant order parameter with a non-zero angular momentum and a sub-dominant order parameter that can have any pairing symmetry. Alternately a solid-state quantum computing structure includes an anti-dot, which is a region in a superconductor where the order parameter is suppressed. In either embodiment of the invention, circulating persistent currents are generated via time-reversal symmetry breaking effects in the boundaries between superconducting and insulating materials. These effects cause the ground state for the supercurrent circulating near the qubit to be doubly degenerate, with two supercurrent ground states having distinct magnetic moments. These quantum states of the supercurrents store quantum information, which creates the basis of qubits for quantum computing.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: January 7, 2003
    Assignee: D-Wave Systems, Inc.
    Inventors: Alexandre M. Zagoskin, Geordie Rose, Mohammad H. S. Amin, Marcel Franz, Jeremy P. Hilton
  • Publication number: 20020195609
    Abstract: A semiconductor light emitting device is disclosed in which a semiconductor multilayer structure including a light emitting layer is formed on a substrate and light is output from the opposite surface of the semiconductor multilayer structure from the substrate. The light output surface is formed with a large number of protrusions in the form of cones or pyramids. To increase the light output efficiency, the angle between the side of each protrusion and the light output surface is set to between 30 and 70 degrees.
    Type: Application
    Filed: June 25, 2002
    Publication date: December 26, 2002
    Inventors: Shunji Yoshitake, Hideki Sekiguchi, Atsuko Yamashita, Kazuhiro Takimoto, Koichi Takahashi
  • Patent number: 6498354
    Abstract: A single electron on hole field effect transistor fabricated from a narrow band gap semiconductor. The transistor is such that the valence and conduction bands have sufficiently similar energy levels such that a top region of the valence band at one point (37), e.g. under a gate electrode (34), within the current path of the transistor can be forced to be higher than the bottom region of the conduction band at another point within the transistor, allowing Zener tunelling to occur. The transistor is fabricated from semiconductors with band gaps narrow enough to allow this to occur, for instance InSb and InAISb, CdTe and CDxHg1−xTe.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: December 24, 2002
    Assignee: Qinetiq Limited
    Inventors: John H. Jefferson, Timothy J. Phillips
  • Patent number: 6495843
    Abstract: A method for promoting the passage of elementary particles at or through a potential barrier comprising providing a potential barrier having a geometrical shape for causing de Broglie interference between said elementary particles is disclosed. In another embodiment, the invention provides an elementary particle-emitting surface having a series of indents. The depth of the indents is chosen so that the probability wave of the elementary particle reflected from the bottom of the indent interferes destructively with the probability wave of the elementary particle reflected from the surface. This results in the increase of tunneling through the potential barrier. When the elementary particle is an electron, then electrons tunnel through the potential barrier, thereby leading to a reduction in the effective work function of the surface.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: December 17, 2002
    Assignee: Borealis Technical Limited
    Inventor: Avto Tavkelidze
  • Patent number: 6489041
    Abstract: A practically realizable semiconductor magnetic body having a flat-band structure is disclosed. The semiconductor magnetic body is formed by semiconductor quantum dots arranged on lattice points such that electrons can transfer between neighboring quantum dots and the electron energy band contains a flat-band structure, where each quantum dot is a structure in which electrons are confined inside a region which is surrounded by high energy potential regions, and the flat-band structure is a band structure in which energy dispersion of electrons has hardly any wave number dependency.
    Type: Grant
    Filed: December 8, 2000
    Date of Patent: December 3, 2002
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Hiroyuki Tamura, Kenji Shiraishi, Hideaki Takayanagi
  • Patent number: 6486490
    Abstract: An emission layer is formed in a p-layer, and an electron reflecting layer and a hole reflecting layer are formed sandwiching the emission layer. Each of the electron reflecting layer and the hole reflecting layer is constituted by a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B. Thicknesses of the first and the second layers in the electron reflecting layer are determined by multiplying by an odd number one fourth of a quantum-wave wavelength of electrons in each of the first and the second layers, and each thicknesses of the first and the second layers in the hole reflecting layer are determined by multiplying by an odd number one fourth of a quantum-wave wavelength of holes in each of the first and the second layers. A luminous efficiency of the LED is improved by electron-hole pairs.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: November 26, 2002
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6483125
    Abstract: Single-electron transistors include first and second electrodes and an insulating layer between them on a substrate. The insulating layer has a thickness that defines a spacing between the first and second electrodes. At least one nanoparticle is provided on the insulating layer. Accordingly, a desired spacing between the first and second electrodes may be obtained without the need for high resolution photolithography. An electrically-gated single-electron transistor may be formed, wherein a gate electrode is provided on the at least nanoparticle opposite the insulating layer end. Alternatively, a chemically-gated single-electron transistor may be formed by providing an analyte-specific binding agent on a surface of the at least one nanoparticle. Arrays of single-electron transistors also may be formed on the substrate.
    Type: Grant
    Filed: July 13, 2001
    Date of Patent: November 19, 2002
    Assignee: North Carolina State University
    Inventor: Louis C. Brousseau, III
  • Patent number: 6479842
    Abstract: A field effect transistor having a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B. The second layer B has wider band gap than the first layer W, and the quantum-wave interference layer is formed in a region adjacent to a channel. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of quantum-wave wavelength of carriers in each of the first layer W and the second layer B, which exist around the lowest energy level of the second layer B. The quantum-wave interference layer functions as a carrier reflecting layer, and enable to prevent leakage current from a source to a region except a drain.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: November 12, 2002
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6476412
    Abstract: A semiconductor device is constituted by a quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B. The second layer B has wider band gap than the first layer W. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing around the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. The quantum-wave interference layer functions as a reflecting layer of carriers for higher reflectivity.
    Type: Grant
    Filed: October 25, 2000
    Date of Patent: November 5, 2002
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6465803
    Abstract: By using wafer fusion, various structures for photodetectors and photodetectors integrated with other electronics can be achieved. The use of silicon as a multiplication region and III—V compounds as an absorption region create photodetectors that are highly efficient and tailored to specific applications. Devices responsive to different regions of the optical spectrum, or that have higher efficiencies are created.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: October 15, 2002
    Assignee: The Regents of the University of California
    Inventors: John E. Bowers, Aaron R. Hawkins
  • Patent number: 6452206
    Abstract: A superlattice structure for thermoelectric power generation includes m monolayers of a first barrier material alternating with n monolayers of a second quantum well material with a pair of monolayers defining a superlattice period and each of the materials having a relatively smooth interface therebetween. Each of the quantum well layers have a thickness which is less than the thickness of the barrier layer by an amount which causes substantial confinement of conduction carriers to the quantum well layer and the alternating layers provide a superlattice structure having a figure of merit which increases with increasing temperature.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: September 17, 2002
    Assignee: Massachusetts Institute of Technology
    Inventors: Theodore C. Harman, Mildred S. Dresselhaus, David L. Spears, Michael P. Walsh, Stephen B. Cronin, Xiangzhong Sun, Takaaki Koga
  • Publication number: 20020117660
    Abstract: By positively employing a quantum structure such as a point contact, a quantum fine line, and a quantum dot on a semiconductor material so that an electric potential barrier is generated from a quantum effect of a conductive region, that is, from the constraint energy of one or zero dimension of electrons or holes and the electric potential barrier is controlled, flow and intensity of an electric current are controlled when light or electromagnetic wave is irradiated. A conductive region is formed by a quantum structure in which a difference in the constraint energies of the holes or electrons is formed between two electrodes, and when the light or electromagnetic wave is irradiated to a partial depletion region of the holes or electrons generated in the quantum structure, pairs of the electrons and the holes are generated in the partial depletion region. Thus, the depletion is released and an electric current flows therein.
    Type: Application
    Filed: April 25, 2001
    Publication date: August 29, 2002
    Applicant: Evergreen Korea Corporation
    Inventor: Hoon Kim
  • Patent number: 6441392
    Abstract: A quantic effect device which functions using a Coulomb blockade phenomenon. The device includes two electron reservoirs, two sets of islands that are separated by a dielectric layer, a protective insulating layer and a control electrode.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: August 27, 2002
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Jacques Gautier, François Martin
  • Patent number: 6426515
    Abstract: In a semiconductor light-emitting device including an MQW diffraction grating structure mainly used in a gain-coupled DFB laser, the ratio of the gain coupling coefficient to the index coupling coefficient is increased by making each well layer in MQW-A thicker than that in MQW-B. Each well layer and each barrier layer in the MQW structure are made of different compositions of GaInAsP. This implements a semiconductor light-emitting device with high wavelength stability, which does not induce any mode hop even during modulation with high output power or even when external optical feedback is present.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: July 30, 2002
    Assignee: Fujitsu Limited
    Inventors: Tsutomu Ishikawa, Hirohiko Kobayashi, Tsuyoshi Yamamoto, Hajime Shoji
  • Patent number: 6426514
    Abstract: The present invention is for an improved modulator and detection device that use reversed biased diodes containing not intentionally doped (NID) optically active regions sandwiched between conductive layers of p-doped and n-doped semiconductor layers. A photo-current is generated using the optical non-linearity of multiple quantum structures inside the active region and that can be used in an external circuit to provide feedback to the device itself. This is commonly referred to as the self electro-optic effect device (SEED) where the applied electric field modulates the absorption (excitonic in nature due to the reduced dimensionality of the quantum well) of the active layer by the use of the quantum confined Stark effect. The present invention seeks to improve on known devices by separating the photo-current from the perpendicular biased electric field so as to produce a four electrical port device, by simultaneously applying non-parallel fields.
    Type: Grant
    Filed: June 29, 2000
    Date of Patent: July 30, 2002
    Assignee: Defence Science and Technology Organisation
    Inventor: Peter Branko Atanackovic
  • Patent number: 6426513
    Abstract: A water soluble semiconductor nanocrystal capable of light emission is provided, including a quantum dot having a selected band gap energy, a layer overcoating the quantum dot, the overcoating layer comprised of a material having a band gap energy greater than that of the quantum dot, and an organic outer layer, the organic layer comprising a compound having the formula, SH(CH2)nX, where X is carboxylate or sulfonate. The particle size of the nanocrystal core is in the range of about 12 Å to about 150 Å, with a deviation of less than 10% in the core. The coated nanocrystal exhibits photoluminescence having quantum yields of greater than 10% in wate.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: July 30, 2002
    Assignee: Massachusetts Institute of Technology
    Inventors: Moungi G. Bawendi, Frederick V. Mikulec, Jin-Kyu Lee
  • Patent number: 6420727
    Abstract: A light-emitting device comprising an emission layer which has a single layer structure is formed. The emission layer is sandwiched by a first quantum-wave interference layer constituted by plural periods of a pair of a first layer and a second layer, the second layer having a wider band gap than the first layer, and a second quantum-wave interference layer constituted by plural periods of a pair of a third layer and a fourth layer, the fourth layer having a wider band gap than the third layer. The first quantum-wave interference layer functions as an electron reflection layer, and its thickness is determined by multiplying by an odd number one fourth of quantum-wave wavelength of the injected electrons. The second quantum-wave interference layer functions as an electron transmission layer, and its thickness is determined by multiplying by an odd number one fourth of quantum-wave wavelength of the injected electrons. As a result, luminous efficiency of the device is improved.
    Type: Grant
    Filed: September 27, 2000
    Date of Patent: July 16, 2002
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6420731
    Abstract: An injected current restriction region for restricting an increase in defects by restricting an injected current for light emission is provided inside a ZnSe-based LED. When an end of a light transmitting Au electrode is separated from a cleavage plane, a region near the cleavage plane serves as the injected current restriction region.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: July 16, 2002
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Katayama, Hideki Matsubara, Akihiko Saegusa
  • Patent number: 6417520
    Abstract: A light-emitting diode comprising a quantum-wave reflection layer for electrons, a quantum-wave transmission layer for electrons, and an emission layer formed between the quantum-wave reflection layer and th e quantum-wave transmission layer is used as a photocoupler. Compared with a commercial product having a response velocity of 20 MHz, a response velocity of the light-emitting diode of the present invention is improved to be 100 MHz to 200 MHz. The quantum-wave reflection layer for electrons and the quantum-wave transmission layer for electrons are formed to have thicknesses of one fourth and a half of quantum wave of electrons, respectively.
    Type: Grant
    Filed: August 25, 2000
    Date of Patent: July 9, 2002
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6410934
    Abstract: An electronic fast switch for operation at room temperature utilizing uniform silicon nanoparticles (˜1 nm with about 1 part per thousand exceeding 1 nm) between two conducting electrodes. The silicon nanoparticles, when on an n-type silicon substrate exhibit, at zero bias, a large differential conductance, approaching near full transparency. The conductance is observed after one of the electrode is first biased at a voltage in the range 3 to 5 eV (switching voltage), otherwise the device does not conduct (closed). A practical MOSFET switch of the invention includes the silicon nanoparticles in a body of the MOSFET, with the gate and substrate forming the two conducting electrodes. Electrodes may be realized by metal in other switches of the invention.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: June 25, 2002
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Munir H. Nayfeh, Joel Therrien, Adam D. Smith
  • Publication number: 20020074543
    Abstract: A method for growing strain-engineered, self-assembled, semiconductor quantum dots (QDs) into ordered lattices. The nucleation and positioning of QDs into lattices is achieved using a periodic sub-surface lattice built-up on a substrate, stressor layer, and spacer layer. The unit cell dimensions, orientation and the number of QDs in the basis are tunable. Moreover, a 2D lattice can be replicated at periodic intervals along the growth direction to form a three-dimensional (3D) lattice of QDs.
    Type: Application
    Filed: June 27, 2001
    Publication date: June 20, 2002
    Inventors: Pierre M. Petroff, James S. Speck, Jo Anna Johnson, Hao Lee
  • Publication number: 20020074542
    Abstract: Device designs and techniques for reducing the dark current in quantum-well detectors.
    Type: Application
    Filed: September 26, 2001
    Publication date: June 20, 2002
    Inventors: Sarath D. Gunapala, Sumith V. Bandara, John K. Liu, Sir B. Rafol, David Z. Ting, Jason M. Mumolo
  • Patent number: 6380111
    Abstract: A novel amorphous optical device contributes to economic construction of optical computers. Since economic parallel processing of signals such as image information is made possible, the novel amorphous optical device contributes also to development of optical computers capable of performing ultra-high speed and parallel processing, object recognizing apparatuses in which image optical signals are processed by using image optical signals, motion picture extracting apparatuses used for eyes of robots and object movement monitors and optical surge absorbers. An amorphous optical device which is doped with an element having a negative optical input-output characteristic to incident light, wherein the number of ions and/or atoms of the element is 1×1026 to 2.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: April 30, 2002
    Assignees: Nihon Yamamura Glass Co., Ltd.
    Inventors: Yoshinobu Maeda, Akio Konishi, Hidekazu Hashima, Hajimu Wakabayashi
  • Patent number: 6380551
    Abstract: A stacked material free from a degraded quality of crystal, formed with a precise periodicity, and fabricated without relying on the vapor phase growth method is provided. An optical function device using the stacked material is also provided. A starting stacked material composed of two alternate layers (A), (B) having different refractive indexes is stacked over two periods or more by a substrate bonding method to provide a multi-periodic stacked structure.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: April 30, 2002
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Takao Abe, Hiroji Aga
  • Patent number: 6369405
    Abstract: A method of making semiconductor quantum wires employs a semiconductor wafer (14) as starting material. The wafer (14) is weakly doped p type with a shallow heavily doped p layer therein for current flow uniformity purposes. The wafer (14) is anodised in 20% aqueous hydrofluoric acid to produce a layer (5) microns thick with 70% porosity and good crystallinity. The layer is subsequently etched in concentrated hydrofluoric acid, which provides a slow etch rate. The etch increases porosity to a level in the region of 80% or above. At such a level, pores overlap and isolated quantum wires are expected to form with diameters less than or equal to 3 nm. The etched layer exhibits photoluminescence emission at photon energies well above the silicon bandgap (1.1 eV) and extending into the red region (1.6-2.0 eV) of the visible spectrum.
    Type: Grant
    Filed: April 26, 1994
    Date of Patent: April 9, 2002
    Assignee: The Secretary of State for Defence in Her Britannic Majesty's Government of the United Kingdom of Great Britain and Northern Ireland
    Inventors: Leigh-Trevor Canham, John Michael Keen, Weng Yee Leong
  • Patent number: 6346720
    Abstract: The present invention provides for a high quality Group III-V compound semiconductor, a method of manufacturing the same, and a light emitting element with an excellent emission characteristic which incorporates such a Group III-V compound semiconductor.
    Type: Grant
    Filed: January 24, 1996
    Date of Patent: February 12, 2002
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Yasushi Iyechika, Tomoyuki Takada, Yoshinobu Ono
  • Patent number: 6337508
    Abstract: A transistor having an electron quantum-wave interference layer with plural periods of a pair of a first layer W and a second layer B in a p-layer of a pn junction structure. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of quantum-wave wavelength of carriers in each of the first layer W and the second layer B, the carriers existing around the lowest energy level of the second layer B. The quantum-wave interference layer functions as an electron reflecting layer, and enables to lower a dynamic resistance of the transistor notably. An amplification factor of a bipolar transistor of an npn junction structure, having the electron reflecting layer is improved compared with a transistor without an electrode reflecting layer. Similarly, a transistor having a hole reflecting layer, which has a larger amplification factor, can be obtained.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: January 8, 2002
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6333516
    Abstract: An inverter comprising four quantum dot cells. When the quantum dot cells are arranged in 9 o'clock direction, 12 o'clock direction and 3 o'clock direction, the quantum dot cell is arranged in 6 o'clock direction.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: December 25, 2001
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Riichi Katoh, Tetsufumi Tanamoto, Francis Minoru Saba, Yujiro Naruse, Shigeki Takahashi, Masao Mashita
  • Patent number: 6331716
    Abstract: A variable capacity device having an nin, pip, nn−p, np−p, or nip junction whose middle layer is constituted by a quantum-wave interference layer with plural periods of a first layer W and a second layer B as a unit. The second layer B has a wider band gap than the first layer W. Each thickness of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of a wavelength of a quantum-wave of carriers in each of the first layer W and the second layer B existing around the lowest energy level of the second layer B. A &dgr; layer, for changing energy band suddenly, is formed at interfaces between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. Plurality of quantum-wave interference units are formed sandwiching carrier accumulation layers in series. Then a voltage-variation rate of capacity of the variable capacity device is improved.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: December 18, 2001
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6326311
    Abstract: There is provided a microstructure producing method capable of achieving satisfactory uniformity and reproducibility of the growth position, size and density of a minute particle or thin line and materializing a semiconductor device which can reduce the cost through simple processes without using any special microfabrication technique and has superior characteristics appropriate for mass-production with high yield and high productivity as well as a semiconductor device employing the microstructure. An oxide film 12 having a region 12a of a great film thickness and a region 12b of a small film thickness are formed on the surface of a semiconductor substrate 11. Next, a microstructure that is a thin line 15 made of silicon Si is selectively formed only on the surface of the small-film-thickness region 12b of the oxide film 12.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: December 4, 2001
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tohru Ueda, Yasumori Fukushima, Fumitoshi Yasuo
  • Patent number: 6326639
    Abstract: The present invention relates to a semiconductor hetereostructure radiation detector for wavelengths in the infrared spectral range. The semiconductor heterostructure radiation detector is provided with an active layer composed of a multiplicity of periodically recurring single-layer systems each provided with a potential well structure having at least one quantum well with subbands (quantum well), the so-called excitation zone, which is connected on one side to a tunnel barrier zone, whose potential adjacent to the excitation zone is higher than the band-edge energy of a drift zone adjoining on the other side of the potential-well structure.
    Type: Grant
    Filed: September 17, 1999
    Date of Patent: December 4, 2001
    Assignee: Fraunhofer-Gesellschaft zur Forderung der Angewandten Forschung E.V.
    Inventors: Harald Schneider, Martin Walter
  • Publication number: 20010042859
    Abstract: A semiconductor device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and middle layers (carrier accumulation layers) C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers conducted in the i-layer in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. Then quantum-wave interference layers and carrier accumulation layers are formed in series.
    Type: Application
    Filed: May 26, 1999
    Publication date: November 22, 2001
    Inventor: HIROYUKI KANO
  • Patent number: 6320216
    Abstract: It is made possible to conduct writing and erasing information at high speed with a low gate voltage, to attain high integration with reduced power dissipation and to retain information accurately. A barrier layer, a transition layer, a barrier layer, a transition layer, a barrier layer, a charge accumulation layer and a barrier layer are stacked one after another on a conduction layer to cause transition of charges in the conduction layer to the charge accumulation layer by resonance tunneling. The conduction layer, the transition layers, and the charge accumulation layer are respectively made of Si. The barrier layers are respectively made of SiO2 so that electron affinity is made large and small alternately between those layers. Each capacitance respectively of the barrier layers is made smaller than e2/kBT so that charge transition does not occur according to the Coulomb blockade effect even if a voltage within a predetermined range is applied.
    Type: Grant
    Filed: December 8, 1998
    Date of Patent: November 20, 2001
    Assignee: Sony Corporation
    Inventor: Kazumasa Nomoto
  • Publication number: 20010032977
    Abstract: A stacked material free from a degraded quality of crystal, formed with a precise periodicity, and fabricated without relying on the vapor phase growth method is provided. An optical function device using the stacked material is also provided. A starting stacked material composed of two alternate layers (A), (B) having different refractive indexes is stacked over two periods or more by a substrate bonding method to provide a multi-periodic stacked structure.
    Type: Application
    Filed: April 26, 1999
    Publication date: October 25, 2001
    Inventors: TAKAO ABE, HIROJI AGA
  • Patent number: 6303940
    Abstract: The present invention relates to a heterojunction structure based upon the oxide/high-k dielectric barrier. In exemplary embodiment, a silicon layer has a silicon dioxide layer thereon, and a high-k dielectric material disposed on the oxide layer. Thereafter, a metal layer, serving as the gate metal for the device is disposed on the high-k dielectric. The silicon dioxide layer has a relatively high barrier height, but has a relatively small thickness, and relative to the high-k dielectric, the barrier height differential fosters real space transfer. In this structure, the high barrier height of the silicon dioxide layer results in higher mobility and thereby greater substrate current. By virtue of the relative thick layer of high-k dielectric, leakage current is significantly reduced.
    Type: Grant
    Filed: June 25, 1999
    Date of Patent: October 16, 2001
    Assignee: Agere Systems Guardian Corp.
    Inventors: Isik C. Kizilyalli, Marco Mastrapasqua
  • Publication number: 20010028055
    Abstract: A photodetector capable of normal incidence detection over a broad range of long wavelength light signals to efficiently convert infrared light into electrical signals. It is capable of converting long wavelength light signals into electrical signals with direct normal incidence sensitivity without the assistance of light coupling devices or schemes. In the apparatus, stored charged carriers are ejected by photons from quantum dots, then flow over the other barrier and quantum dot layers with the help of an electric field produced with a voltage applied to the device, producing a detectable photovoltage and photocurrent. The photodetector has multiple layers of materials including at least one quantum dot layer between an emitter layer and a collector layer, with a barrier layer between the quantum dot layer and the emitter layer, and another barrier layer between the quantum dot layer and the collector.
    Type: Application
    Filed: May 8, 2001
    Publication date: October 11, 2001
    Inventors: Simon Fafard, Hui Chun Liu
  • Patent number: 6294795
    Abstract: A light-receiving device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and carrier accumulation layers C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. As a result, when electrons are excited in the carrier accumulation layers C1 to C3, electrons are propagated through the quantum-wave interference layer from the n-layer to the p-layer as a wave, and electric current flows rapidly.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: September 25, 2001
    Assignee: Canare Electric Co., Ltd.
    Inventor: Hiroyuki Kano
  • Patent number: 6281514
    Abstract: A method for promoting the passage of elementary particles at or through a potential barrier comprising providing a potential barrier having a geometrical shape for causing de Broglie interference between said elementary particles is disclosed. In another embodiment, the invention provides an elementary particle-emitting surface having a series of indents. The depth of the indents is chosen so that the probability wave of the elementary particle reflected from the bottom of the indent interferes destructively with the probability wave of the elementary particle reflected from the surface. This results in the increase of tunneling through the potential barrier. When the elementary particle is an electron, then electrons tunnel through the potential barrier, thereby leading to a reduction in the effective work function of the surface.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: August 28, 2001
    Assignee: Borealis Technical Limited
    Inventor: Avto Tavkhelidze