With Particular Barrier Dimension Patents (Class 257/17)
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Patent number: 6897470Abstract: Supermolecular structures and devices made from same. Semiconductor materials and devices are manufactured and provided which use controlled, discrete distribution of and positioning of single impurity atoms or molecules within a host matrix to take advantage of single charge effects. Single-dopant pn junctions and single-dopant bipolar cells are created. Each bipolar cell can function as a bistable device or an oscillator, depending on operating temperature. The cells can be used alone or in an array to make useful devices by adding an insulating substrate and contact electrodes.Type: GrantFiled: October 14, 2003Date of Patent: May 24, 2005Assignees: Semiconductor Research Corporation, North Carolina State UniversityInventors: Daniel Joseph Christian Herr, Victor Vladimirovich Zhirnov
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Patent number: 6894327Abstract: A negative differential resistance device is disclosed which is particularly suited as a replacement for conventional pull-up and load elements such as NDR diodes, passive resistors, and conventional FETs. The NDR device includes a charge trapping layer formed at or extremely near to an interface between a substrate (which can be silicon or SOI) and a gate insulation layer. The NDR device can be shut off during static operations to further reduce power dissipation.Type: GrantFiled: April 19, 2004Date of Patent: May 17, 2005Assignee: Progressant Technologies, Inc.Inventor: King Tsu-Jae
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Patent number: 6891189Abstract: A nitride semiconductor laser device includes a nitride semiconductor substrate, and a layered portion corresponding to a nitride semiconductor film grown on the nitride semiconductor substrate, the layered portion including an n-type layer and a p-type layer and a light emitting layer posed between the n- and p-type layers, of the n- and p-type layers a layer opposite to the nitride semiconductor substrate with the light emitting layer opposed therebetween serving as an upper layer having a stripe of 1.9 ?m to 3.0 ?n in width, the light emitting layer and the upper layer having an interface distant from a bottom of the stripe by 0 ?m to 0.2 ?m.Type: GrantFiled: July 9, 2003Date of Patent: May 10, 2005Assignee: Sharp Kabushiki KaishaInventors: Shigetoshi Ito, Yuhzoh Tsuda
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Patent number: 6891188Abstract: A semiconductor device includes a superlattice that, in turn, includes a plurality of stacked groups of layers. The device may also include regions for causing transport of charge carriers through the superlattice in a parallel direction relative to the stacked groups of layers. Each group of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and an energy band-modifying layer thereon. Moreover, the energy-band modifying layer may include at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. Accordingly, the superlattice may have a higher charge carrier mobility in the parallel direction than would otherwise be present.Type: GrantFiled: November 19, 2003Date of Patent: May 10, 2005Assignee: RJ Mears, LLCInventors: Robert J. Mears, Jean Augustin Chan Sow Fook Yiptong, Marek Hytha, Scott A. Kreps, Ilija Dukovski
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Patent number: 6890809Abstract: A method for fabricating a p-n heterojunction device is provided, the device being preferably comprised of an n-type GaN layer co-doped with silicon and zinc and a p-type AlGaN layer. The device may also include a p-type GaN capping layer. The device can be grown on any of a variety of different base substrates, the base substrate comprised of either a single substrate or a single substrate and an intermediary layer. The device can be grown directly onto the surface of the substrate without the inclusion of a low temperature buffer layer.Type: GrantFiled: August 9, 2002Date of Patent: May 10, 2005Assignee: Technologies and Deviles International, Inc.Inventors: Sergey Karpov, Alexander Usikov, Heikki I. Helava, Denis Tsvetkov, Vladimir A. Dmitriev
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Patent number: 6885023Abstract: An optical device such as a radiation detector or an optically activated memory includes a barrier region located between two active regions. One or more quantum dots are provided such that a change in the charging state of the quantum dot or dots affects the flow of current through the barrier region. The charging states of the quantum dot is changed by an optical device.Type: GrantFiled: July 27, 2001Date of Patent: April 26, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Andrew James Shields, Nalin Kumar Patel
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Patent number: 6885085Abstract: A semiconductor laser device has an n-type AlGaAs first cladding layer 2, a multiple quantum well active layer 3, and a p-type AlGaAs second cladding layer 4 formed in this order and supported by an n-type GaAs substrate 1. The multiple quantum well active layer 3 has two quantum well layers 3a and barrier layers 3b provided on both sides of each quantum well layer 3a. The quantum well layers 3a are each made of In1-v1Gav1As1-w1Pw1, while the barrier layers 3b are each made of In1-v2Gav2As1-w2Pw2. Here, v1 and v2 satisfy v1<v2, while w1 and w2 satisfy w1<w2. The barrier layers have a tensile strain with respect to the GaAs substrate, while the well layers have a compressive strain with respect to the GaAs substrate.Type: GrantFiled: January 27, 2003Date of Patent: April 26, 2005Assignee: Sharp Kabushiki KaishaInventors: Hidenori Kawanishi, Kei Yamamoto, Fumihiro Konushi, Yoshie Fujishiro, Toshihiko Yoshida
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Patent number: 6870235Abstract: A Semiconductor sensor device for the detection of target molecules and molecular interactions, based on Silicon-on-Insulator (SOI) technology.Type: GrantFiled: May 13, 2003Date of Patent: March 22, 2005Assignee: Fujitsu LimitedInventors: Gerhard Abstreiter, Marc Uwe Tornow, Karin Buchholz, Sebastian Markus Luber, Erich Sackmann, Andreas Richard Bausch, Michael Gerold Hellmut Nikolaides, Stefan Rauschenbach
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Patent number: 6858864Abstract: A photonic device includes a silicon semiconductor based superlattice. The superlattice has a plurality of layers that form a plurality of repeating units. At least one of the layers in the repeating unit is an optically active layer with at least one species of rare earth ion.Type: GrantFiled: April 16, 2004Date of Patent: February 22, 2005Assignee: Translucent Photonics, Inc.Inventors: Petar B. Atanackovic, Larry R. Marshall
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Patent number: 6818916Abstract: A light-receiving device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and carrier accumulation layers C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an even number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. As a result, when electrons are excited in the carrier accumulation layers C1 to C3, electrons are propagated through the quantum-wave interference layer from the n-layer to the p-layer as a wave, and electric current flows rapidly.Type: GrantFiled: December 16, 1999Date of Patent: November 16, 2004Assignee: Canare Electric Co., Ltd.Inventor: Hiroyuki Kano
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Patent number: 6815728Abstract: A light-emitting device has a light-emitting layer of nitride semiconductor containing As, P or Sb and accordingly its emission efficiency or emission intensity is enhanced. The light-emitting device includes a substrate, and further includes n-type and p-type nitride semiconductor layers and a light-emitting layer between the n-type and p-type semiconductor layers that are formed on the substrate. Light-emitting layer includes one or a plurality of well layers formed of nitride semiconductor containing N and element X (element X is As, P or Sb). The nitride semiconductor of the well layer has at most 30% in atomic percent represented by expression {NX/(NN+NX)}×100 where NX represents the number of atoms of element X and NN represents the number of atoms of N. The thickness of the well layer ranges from 0.4 nm to 4.8 nm.Type: GrantFiled: April 19, 2002Date of Patent: November 9, 2004Assignee: Sharp Kabushiki KaishaInventors: Yuhzoh Tsuda, Shigetoshi Ito
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Patent number: 6813063Abstract: A waveguide having a periodic structure and the excitation of exciton polariton as one form of interactions between radiation fields and matter systems are applied to light switching to provide an optical switch that is excellent in light intensity extinction ratio and operable at a speed in the terahertz order. The optical switch includes a polariton and photon interacting region (5) made of a grating (3) formed on a top face of a transparent substrate (2) and a semiconductor layer (4) with which the grating (3) is covered. The polariton and photon interacting region (5) is irradiated from a free space with a controllable light (7) having a preestablished wavelength and also from a free space with a control light (6) having a preselected wavelength to control the transmissivity of the controllable light (7) through the polariton and photon interacting region (5).Type: GrantFiled: February 13, 2003Date of Patent: November 2, 2004Assignees: Japan Science and Technology Agency, RikenInventor: Teruya Ishihara
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Patent number: 6812482Abstract: A new class of processes suited to the fabrication of layered material compositions is disclosed. Layered material compositions are typically three-dimensional structures which can be decomposed into a stack of structured layers. The best known examples are the photonic lattices. The present invention combines the characteristic features of photolithography and chemical-mechanical polishing to permit the direct and facile fabrication of, e.g., photonic lattices having photonic bandgaps in the 0.1-20&mgr; spectral range.Type: GrantFiled: August 28, 2001Date of Patent: November 2, 2004Assignee: Sandia CorporationInventors: James G. Fleming, Shawn-Yu Lin
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Patent number: 6803597Abstract: In a semiconductor light-emitting device, an active layer has a multi quantum well structure (MQW) barrier layers and quantum well layers alternately arranged. Each of the cladding layers has a multi quantum barrier structure (MQB) including barrier layers and well layers alternately arranged. The multi quantum barrier (MQB) of each of the cladding layers varies in a graded or stepwise form. Thus, charge carriers are prevented from overflowing from the active layer, preventing cut-off of a guided wave mode, increasing reflectance of electrons entering the energy barriers, and improving temperature characteristics.Type: GrantFiled: December 19, 2002Date of Patent: October 12, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Chikara Watatani, Yoshihiko Hanamaki
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Patent number: 6803598Abstract: Interband tunnel diodes which are compatible with Si-based processes such as, but not limited to, CMOS and SiGe HBT fabrication. Interband tunnel diodes are disclosed (i) with spacer layers surrounding a tunnel barrier; (ii) with a quantum well adjacent to, but not necessarily in contact with, one of the injectors, and (iii) with a first quantum well adjacent to, but not necessarily in contact with, the bottom injector and a second quantum well adjacent to, but not necessarily in contact with, the top injector. Process parameters include temperature process for growth, deposition or conversion of the tunnel diode and subsequent thermal cycling which to improve device benchmarks such as peak current density and the peak-to-valley current ratio.Type: GrantFiled: May 5, 2000Date of Patent: October 12, 2004Assignee: University of DelawareInventors: Paul R. Berger, Phillip E. Thompson, Roger Lake, Karl Hobart, Sean L. Rommel
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Patent number: 6794631Abstract: An avalanche photodiode (APD) includes an absorption layer above the multiplication layer, where the thickness of the multiplication layer is defined through a growth process. The APD can also have a third-terminal, or peripheral ring terminal, for collecting charge carriers generated outside the optically-active region of the device. Undesirable dark current can thus be better managed during the life of the device. The three-terminal design may also be utilized in other photodetectors, including PIN diodes.Type: GrantFiled: June 7, 2002Date of Patent: September 21, 2004Assignee: Corning Lasertron, Inc.Inventor: William R. Clark
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Patent number: 6785311Abstract: An optical semiconductor device comprising: an active region; and a p-doped cladding region disposed on one side of the active region; wherein an electron-reflecting barrier is provided on the p-side of the active region for reflecting both &Ggr;-electrons and X-electrons, the electron-reflecting barrier providing a greater potential barrier to &Ggr;-electrons than the p-doped cladding region.Type: GrantFiled: August 27, 2001Date of Patent: August 31, 2004Assignee: Sharp Kabushiki KaishaInventor: Stephen Peter Najda
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Patent number: 6781159Abstract: An improved nanotip structure and method for forming the nanotip structure and a display system using the improved nanotip structure is described. The described nanotip is formed from a semiconductor having a crystalline structure such as gallium nitride. The crystalline structure preferably forms dislocations oriented in the direction of the nanotips. One method of forming the nanotip structure uses the relatively slow etching rates that occur around the dislocations compared to the faster etch rates that occur in other parts of the semiconductor structure. The slower etching around dislocations enables the formation of relatively high aspect ratio nanotips in the dislocation area.Type: GrantFiled: December 3, 2001Date of Patent: August 24, 2004Assignee: Xerox CorporationInventors: Linda T. Romano, David K. Biegelsen
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Publication number: 20040159831Abstract: A single-electron transistor using nanoparticles is provided. The single-electron transistor includes a first insulating film, a gate electrode patterned in a stripe form on the first insulating film, a second insulating film formed on exposed surfaces of the first insulating film and the gate electrode in such a way that a stepped portion is formed at a boundary between the gate electrode and the first insulating film, first and second electrodes formed on the second insulating film in such a way that a groove is formed at the stepped portion to expose a surface of the second insulating film, the first and second electrodes being separated from each other by the groove, and nanoparticles positioned at the groove and contacting with the first and second electrodes, the nanoparticles being channels for electron transfer.Type: ApplicationFiled: December 1, 2003Publication date: August 19, 2004Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Yoon-ho Khang
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Publication number: 20040159833Abstract: Nanotube films and articles and methods of making the same are disclosed. A conductive article includes an aggregate of nanotube segments in which the nanotube segments contact other nanotube segments to define a plurality of conductive pathways along the article. The nanotube segments may be single walled carbon nanotubes, or multi-walled carbon nanotubes. The various segments may have different lengths and may include segments having a length shorter than the length of the article. The articles so formed may be disposed on substrates, and may form an electrical network of nanotubes within the article itself. Conductive articles may be made on a substrate by forming a nanotube fabric on the substrate, and defining a pattern within the fabric in which the pattern corresponds to the conductive article.Type: ApplicationFiled: February 9, 2004Publication date: August 19, 2004Applicant: Nantero, Inc.Inventors: Thomas Rueckes, Brent M. Segal
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Publication number: 20040159832Abstract: In accordance with an embodiment of the invention, there is a material comprising an amorphous material and a dopant wherein the amorphous material displays magnetic behavior.Type: ApplicationFiled: January 26, 2004Publication date: August 19, 2004Inventor: Jonathan A. Hack
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Patent number: 6777706Abstract: An optical device having a layer comprising an organic material that includes a substantially uniform dispersion of light transmissive nanoparticles.Type: GrantFiled: March 21, 2001Date of Patent: August 17, 2004Assignee: Cambridge Display TechnologiesInventors: Nir Tessler, Peter Ho, Richard Henry Friend
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Patent number: 6774389Abstract: A semiconductor optical device with improved optical gain and enhanced switching characteristics. The semiconductor optical device includes positive and negative electrodes for providing holes and electrons, respectively. The semiconductor optical device also includes an active layer between the positive and negative electrodes. The active layer includes a multiple quantum well structure having p-type quantum well layers and barrier layers. The quantum well layers are doped with an impurity that diffuses less than zinc so that trapping holes are produced and excessive electrons contributing no light emission are quenched by the trapping holes. The impurity can be beryllium, magnesium, or carbon.Type: GrantFiled: November 8, 2002Date of Patent: August 10, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiko Hanamaki
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Publication number: 20040144970Abstract: Nanowires are formed using an approach that facilitates efficient and economical growth thereof. According to an example embodiment of the present invention, a gas including a semiconducting material (e.g., single-crystal germanium) is introduced to a conductive metal particle (e.g., gold) on an insulating substrate to grow a nanowire therefrom. In one implementation, an alloy is formed from the semiconducting material and the conductive metal particle, with the nanowire being grown from the alloy. In another implementation, a co-flow of hydrogen is used with the gas including the semiconducting material to facilitate the growth of the nanowire.Type: ApplicationFiled: October 7, 2003Publication date: July 29, 2004Inventors: Dunwei Wang, Hongjie Dai
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Publication number: 20040144971Abstract: The invention relates to an optoelectronic component with a pulse generating device for generating light pulses. The component includes an absorber device that borders against a silvered edge thereof, and includes an amplifier device that is arranged on the side of the absorber device facing away from the silvered edge. The component further includes an active layer applied on a semiconductor substrate of the component that is associated with the amplifier device. In order that the light pulses have a high contrast or a high extinction ratio, a further active layer is provided on the semiconductor substrate that is associated with the absorber device.Type: ApplicationFiled: December 12, 2003Publication date: July 29, 2004Inventor: Bernhard Stegmuller
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Patent number: 6768754Abstract: A laser system includes a laser diode with a low dimensional nanostructure, such as quantum dots or quantum wires, for emitting light over a wide range of wavelengths. An external cavity is used to generate laser light at a wavelength selected by a wavelength-selective element. The system provides a compact and efficient laser tunable over a wide range of wavelengths.Type: GrantFiled: September 13, 2000Date of Patent: July 27, 2004Assignee: National Research Council of CanadaInventor: Simon Fafard
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Patent number: 6762071Abstract: A method for fabricating an electron tunneling device on a substrate includes forming a first non-insulating layer on the substrate and providing a first amorphous layer. The method further includes the steps of providing a second layer, and forming a second non-insulating layer and providing an antenna structure connected with the first and second non-insulating layers. The second layer of material is configured to cooperate with the first amorphous layer such that the first amorphous layer and the second layer of material together serve as a transport of electrons between and to the first and second non-insulating layers, and the transport of electrons includes, at least in part, transport by means of tunneling.Type: GrantFiled: January 20, 2003Date of Patent: July 13, 2004Assignee: The Regents of the University of ColoradoInventors: Blake J. Eliasson, Garret Moddel
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Patent number: 6759676Abstract: In a multiply-complexed one-dimensional structure having a hierarchical structure in which a linear structure as an element of a one-dimensional structure having a finite curvature is made of a thinner one-dimensional structure having a finite curvature, at least two layers of one-dimensional unit structures are bonded in at least one site. For example, in a multiply-twisted helix having a hierarchical structure in which a linear structure as an element of a spiral structure is made of a thinner spiral structure, at least two layers of the unit spiral structures are bonded in at least one site. Alternatively, in a multiply-looped ring structure having a hierarchical structure in which a linear structure as an element of a ring structure is made of a thinner ring structure, at least two layers of ring unit structures are bonded in at least one site.Type: GrantFiled: February 26, 2002Date of Patent: July 6, 2004Assignee: Sony CorporationInventors: Ryuichi Ugajin, Shintaro Hirata, Masakazu Ukita
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Patent number: 6740928Abstract: The semiconductor device of the present invention includes: particles or interface states for passing charge formed on a p-type silicon substrate via a barrier layer; and particles for holding charge formed above the charge-passing particles via another barrier layer. The charge-holding particles are different from the charge-passing particles in parameters such as the particle diameter, the capacitance, the electron affinity, and the sum of electron affinity and forbidden bandwidth, to attain swift charge injection and release as well as stable charge holding in the charge-holding particles.Type: GrantFiled: January 24, 2003Date of Patent: May 25, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Yoshii, Kiyoshi Morimoto, Kiyoyuki Morita, Haruyuki Sorada
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Patent number: 6734452Abstract: An AlxGa1−xAs/GaAs/AlxGa1−xAs quantum well exhibiting a bound-to-quasibound intersubband absorptive transition is described. The bound-to-quasibound transition exists when the first excited state has the same energy as the “top” (i.e., the upper-most energy barrier) of the quantum well. The energy barrier for thermionic emission is thus equal to the energy required for intersubband absorption. Increasing the energy barrier in this way reduces dark current. The amount of photocurrent generated by the quantum well is maintained at a high level.Type: GrantFiled: April 3, 2001Date of Patent: May 11, 2004Assignee: California Institute of TechnologyInventors: Sarath Gunapala, John K. Liu, Jin S. Park, True-Lon Lin, Mani Sundaram
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Patent number: 6734451Abstract: On a silicon substrate is formed a silicon dioxide film and then hemispherical grains made of silicon, each having an extremely small diameter, are deposited thereon by LPCVD. After annealing the hemispherical grains, the silicon dioxide film is etched using the hemispherical grains as a first dotted mask, thereby forming a second dotted mask composed of the silicon dioxide film. The resulting second dotted mask is used to etch the silicon substrate to a specified depth from the surface thereof, thereby forming an aggregate of semiconductor micro-needles. Since the diameter of each of the semiconductor micro-needles is sufficiently small to cause the quantum size effects as well as has only small size variations, remarkable quantum size effects can be obtained. Therefore, it becomes possible to constitute a semiconductor apparatus with a high information-processing function by using the aggregate of semiconductor micro-needles (quantized region).Type: GrantFiled: October 22, 2002Date of Patent: May 11, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koji Eriguchi, Masafumi Kubota, Masaaki Niwa, Noboru Nomura
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Patent number: 6724024Abstract: An improved MISFET is disclosed which is particularly suited as a replacement for conventional pull-up and load elements such as NDR diodes, passive resistors, and conventional FETs. The MISFET includes a charge trapping layer formed at or extremely near to an interface between a substrate (which can be silicon or SOI) and a gate insulation layer. In this fashion, charge traps can be optimized for extremely rapid trapping and de-trapping of charge because they are extremely close to a channel of hot carriers. The MISFET channel can be shut off during static operations to further reduce power dissipation, and can also be adapted to operate with negative differential resistance.Type: GrantFiled: November 18, 2002Date of Patent: April 20, 2004Assignee: Progressant Technologies, Inc.Inventor: King Tsu-Jae
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Patent number: 6710367Abstract: A quantum-confined Stark effect semiconductor optical modulator, operable to modulate light of a particular wavelength in the range of around 780 to 840 nm. A p-i-n diode having p, intrinsic and n regions, as well as first and second electrical contacts for application of a reverse bias voltage defines the modulator. The particular intrinsic region includes a plurality of semiconductor layers defining a plurality of quantum wells separated by barrier layers having a certain bandgap energy above that of the quantum wells. The quantum wells including at least two ultra-thin barrier layers within the quantum well and being of a material having a certain bandgap energy above that of the quantum wells. The width of each ultra-thin barrier layer is no more than approximately two molecular layers thick.Type: GrantFiled: May 17, 2002Date of Patent: March 23, 2004Assignee: The United States of America as represented by the Secretary of the ArmyInventors: John D. Bruno, Mary S. Tobin
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Publication number: 20040021138Abstract: An optical device such as a radiation detector or an optically activated memory comprises a barrier region (11) located between two active regions (9, 15). One or more quantum dots (21) are provided such that a change in the charging state of the quantum dot or dots (21) affects the flow of current through the barrier region (11). The charging states of the quantum dot is changed by optical means.Type: ApplicationFiled: July 10, 2003Publication date: February 5, 2004Inventors: Andrew James Shields, Nalin Kumar Patel
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Patent number: 6664561Abstract: A light-receiving device of a pin junction structure, constituted by a quantum-wave interference layers Q1 to Q4 with plural periods of a pair of a first layer W and a second layer B and carrier accumulation layers C1 to C3. The second layer B has wider band gap than the first layer W. Each thicknesses of the first layer W and the second layer B is determined by multiplying by an odd number one fourth of wavelength of quantum-wave of carriers in each of the first layer W and the second layer B existing at the level near the lowest energy level of the second layer B. A &dgr; layer, for sharply varying energy band, is formed at an every interface between the first layer W and the second layer B and has a thickness substantially thinner than the first layer W and the second layer B. As a result, when electrons are excited in the carrier accumulation layers C1 to C3, electrons are propagated through the quantum-wave interference layer from the n-layer to the p-layer as a wave, and electric current flows rapidly.Type: GrantFiled: July 27, 2001Date of Patent: December 16, 2003Assignee: Canare Electric Co., Ltd.Inventor: Hiroyuki Kano
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Patent number: 6664559Abstract: Supermolecular structures and devices made from same. Semiconductor materials and devices are manufactured and provided which use controlled, discrete distribution of and positioning of single impurity atoms or molecules within a host matrix to take advantage of single charge effects. Single-dopant pn junctions and single-dopant bipolar cells are created. Each bipolar cell can function as a bistable device or an oscillator, depending on operating temperature. The cells can be used alone or in an array to make useful devices by adding an insulating substrate and contact electrodes.Type: GrantFiled: February 23, 2000Date of Patent: December 16, 2003Assignees: Semiconductor Research Corporation, North Carolina State UniversityInventors: Daniel Joseph Christian Herr, Victor Vladimirovich Zhirnov
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Patent number: 6646285Abstract: The present invention provides a molecular device including a source region and a drain region, a molecular medium extending there between, and an electrically insulating layer between the source region, the drain region and the molecular medium. The molecular medium in the molecular device of present invention is a thin film having alternating monolayers of a metal—metal bonded complex monolayer and an organic monolayer.Type: GrantFiled: April 5, 2002Date of Patent: November 11, 2003Assignee: International Business Machines CorporationInventors: Cherie R Kagan, Chun Lin
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Patent number: 6621097Abstract: Apparatuses and methods for modulating an optical signal that include a superlattice structure. The superlattice structure is designed to convert the indirect bandgap structure of silicon into a direct bandgap structure to achieve more efficient optical absorption. The apparatus can be fabricated based on a structure of a circuit element by using standard fabrication processes for silicon integrated circuits such as metal oxide semiconductor processing.Type: GrantFiled: September 18, 2002Date of Patent: September 16, 2003Assignee: Intel CorporationInventors: Dmitri E. Nikonov, Mario J. Paniccia
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Patent number: 6617607Abstract: A nitride semiconductor laser device includes a nitride semiconductor substrate, and a layered portion corresponding to a nitride semiconductor film grown on the nitride semiconductor substrate, the layered portion including an n-type layer and a p-type layer and a light emitting layer posed between the n- and p-type layers, of the n- and p-type layers a layer opposite to the nitride semiconductor substrate with the light emitting layer opposed therebetween serving as an upper layer having a stripe of 1.9 &mgr;m to 3.0 &mgr;m in width, the light emitting layer and the upper layer having an interface distant from a bottom of the stripe by 0 &mgr;m to 0.2 &mgr;m.Type: GrantFiled: April 26, 2001Date of Patent: September 9, 2003Assignee: Sharp Kabushiki KaishaInventors: Shigetoshi Ito, Yuhzoh Tsuda
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Patent number: 6600169Abstract: Quantum dot active region structures are disclosed. In a preferred embodiment, the distribution in dot size and the sequence of optical transition energy values associated with the quantum confined states of the dots are selected to facilitate forming a continuous optical gain spectrum over an extended wavelength range. In one embodiment, the quantum dots are self-assembled quantum dots with a length-to-width ratio of at least three along the growth plane. In one embodiment, the quantum dots are formed in quantum wells for improved carrier confinement. In other embodiments, the quantum dots are used as the active region in laser devices, including tunable lasers and monolithic multi-wavelength laser arrays.Type: GrantFiled: September 20, 2001Date of Patent: July 29, 2003Inventors: Andreas Stintz, Petros M Varangis, Kevin J Malloy, Luke F Lester, Timothy C Newell, Hua Li
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Patent number: 6597010Abstract: Semiconductor dot devices include a multiple layer semiconductor structure having a substrate, a back gate electrode layer, a quantum well layer, a tunnel barrier layer between the quantum well layer and the back gate, and a barrier layer above the quantum well layer. Multiple electrode gates are formed on the multi-layer semiconductor with the gates spaced from each other by a region beneath which quantum dots may be defined. Appropriate voltages applied to the electrodes allow the development and appropriate positioning of the quantum dots, allowing a large number of quantum dots be formed in a series with appropriate coupling between the dots.Type: GrantFiled: March 8, 2002Date of Patent: July 22, 2003Assignee: Wisconsin Alumni Research FoundationInventors: Mark A. Eriksson, Mark G. Friesen, Robert J. Joynt, Max G. Lagally, Daniel W. van der Weide, Paul Rugheimer, Donald E. Savage
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Patent number: 6597011Abstract: An improved optical modulator and photodetector suitable for high frequency operation and compatible with monolithic microwave integrated circuit technology. Typical implementations use a reversed biased diode containing not intentionally doped (NID) optically active region sandwiched between conductive layers of p-doped and n-doped semiconductor layers, respectively. With monochromatic optical radiation incident upon the device a photocurrent (comprising of an electron-hole pair created for each photon absorbed) can be generated using the optical nonlinearity of the multiple quantum well structure inside the active region. This photocurrent can be used in an external circuit to provide photocurrent feedback to the device itself.Type: GrantFiled: June 29, 2000Date of Patent: July 22, 2003Assignee: Defence Science and Technology OrganizationInventor: Petar Branko Atanackovic
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Publication number: 20030132431Abstract: One aspect of the present invention has an object to provide a semiconductor optical device with an improved optical gain and an enhanced switching characteristics one aspect of the present invention is to provide a semiconductor optical device including a positive and negative electrodes for providing holes and electrons, respectively. The semiconductor optical device also includes an active layer provided between the positive and negative electrodes. The active layer includes a multiple quantum well structure having a plurality of quantum well layers and barrier layers. The quantum well layers are doped with a p-type impurity less diffusible than zinc so that a plurality of trapping holes are produced and a plurality of excessive electrons contributing no light emission are quenched by the trapping holes. The p-type impurity can be beryllium, magnesium, or carbon.Type: ApplicationFiled: November 8, 2002Publication date: July 17, 2003Applicant: Mitsubishi Denki Kabushiki KaishaInventor: Yoshihiko Hanamaki
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Publication number: 20030132432Abstract: The semiconductor device of the present invention includes: particles or interface states for passing charge formed on a p-type silicon substrate via a barrier layer; and particles for holding charge formed above the charge-passing particles via another barrier layer. The charge-holding particles are different from the charge-passing particles in parameters such as the particle diameter, the capacitance, the electron affinity, and the sum of electron affinity and forbidden bandwidth, to attain swift charge injection and release as well as stable charge holding in the charge-holding particles.Type: ApplicationFiled: January 24, 2003Publication date: July 17, 2003Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Shigeo Yoshii, Kiyoshi Morimoto, Kiyoyuki Morita, Haruyuki Sorada
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Patent number: 6593595Abstract: A semiconductor light-emitting device of the present invention includes: a substrate; a light-emitting layer provided above the substrate; and a saturable absorbing layer provided above the substrate, the saturable absorbing layer having characteristics in which saturation of light absorption occurs. The semiconductor light-emitting device has self-pulsation characteristics due to the saturable absorbing layer, and the semiconductor light-emitting device is characterized in that the saturable absorbing layer is doped with carbon.Type: GrantFiled: February 12, 2002Date of Patent: July 15, 2003Assignee: Sharp Kabushiki KaishaInventors: Tomoki Ono, Shigetoshi Ito
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Patent number: 6583436Abstract: A method for growing strain-engineered, self-assembled, semiconductor quantum dots (QDs) into ordered lattices. The nucleation and positioning of QDs into lattices is achieved using a periodic sub-surface lattice built-up on a substrate, stressor layer, and spacer layer. The unit cell dimensions, orientation and the number of QDs in the basis are tunable. Moreover, a 2D lattice can be replicated at periodic intervals along the growth direction to form a three-dimensional (3D) lattice of QDs.Type: GrantFiled: June 27, 2001Date of Patent: June 24, 2003Assignee: The Regents of the University of CaliforniaInventors: Pierre M. Petroff, James S. Speck, Jo Anna Johnson, Hao Lee
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Patent number: 6573527Abstract: A quantum semiconductor device includes intermediate layers of a first semiconductor crystal having a first lattice constant and stacked repeatedly, and a plurality of quantum dots of a second semiconductor crystal having a second lattice constant different from the first lattice constant. The quantum dots are dispersed in each of the intermediate layers and form a strained heteroepitaxial system with respect to the corresponding intermediate layer. Each of the quantum dots has a height substantially identical with a thickness of the corresponding intermediate layer.Type: GrantFiled: November 27, 1996Date of Patent: June 3, 2003Assignee: Fujitsu LimitedInventors: Yoshihiro Sugiyama, Yoshiaki Nakata
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Patent number: 6573528Abstract: This patent is generally directed towards a method and device for providing a diode structure that has a barrier height that may be readily engineered with a series resistance that may be independently varied while simultaneously providing for the complete characterization and discernment of the barrier height in a microwave and millimeter-wave rectifying diode without the need for device fabrication and electrical measurement. The present invention generally relates to microwave and millimeterwave diodes, and more particularly to low barrier structures within these diodes that are capable of rectification of microwave and millimeterwave radiation.Type: GrantFiled: October 12, 2001Date of Patent: June 3, 2003Inventor: Walter David Braddock
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Patent number: 6559470Abstract: An improved negative differential resistance field effect transistor (NDR-FET) is disclosed. The NDR FET includes a charge trapping layer formed at or extremely near to an interface between a substrate (which can be silicon or SOI) and a gate insulation layer. In this fashion, charge traps can be optimized for extremely rapid trapping and de-trapping of charge because they are extremely close to a channel of hot carriers. The NDR-FET is also useable as a replacement for conventional NDR diode and similar devices in memory cells, and enables an entire family of logic circuits that only require a single channel technology (i.e., instead of CMOS) and yet which provide low power.Type: GrantFiled: December 21, 2001Date of Patent: May 6, 2003Assignee: Progressed Technologies, Inc.Inventor: King Tsu-Jae
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Patent number: 6559469Abstract: An integrated circuit includes a layered superlattice material having the formula A1w1+a1A2w2+a2 . . . Ajwj+ajS1x1+s1S2x2+s2 . . . Skxk+skB1y1+b1B2y2+b2 . . . Blyl+blQz−q, where A1, A2 . . . Aj represent A-site elements in a perovskite-like structure, S1, S2 . . . Sk represent superlattice generator elements, B1, B2 . . . B1 represent B-site elements in a perovskite-like structure, Q represents an anion, the superscripts indicate the valences of the respective elements, the subscripts indicate the number of atoms of the element in the unit cell, and at least w1 and y1 are non-zero. Some of these materials are extremely low fatigue ferroelectrics and are applied in ferroelectric FETs in non-volatile memories. Others are high dielectric constant materials that do not degrade or break down over long periods of use and are applied as the gate insulator in volatile memories.Type: GrantFiled: October 11, 2000Date of Patent: May 6, 2003Assignee: Symetrix CorporationInventors: Carlos A. Paz de Araujo, Larry D. McMillan, Vikram Joshi, Narayan Solayappan, Joseph D. Cuchiaro