Sensors Not Overlaid By Electrode (e.g., Photodiodes) Patents (Class 257/233)
-
Patent number: 7718459Abstract: The exemplary embodiments provide an imager with dual conversion gain charge storage and thus, improved dynamic range. A dual conversion gain element (e.g., Schottky diode) is coupled between a floating diffusion region and a respective capacitor. The dual conversion gain element switches in the capacitance of the capacitor, in response to charge stored at the floating diffusion region, to change the conversion gain of the floating diffusion region from a first conversion gain to a second conversion gain. In an additional aspect, the exemplary embodiments provide an ohmic contact between the gate of a source follower transistor and the floating diffusion region which assists in the readout of the dual conversion gain output signal of a pixel.Type: GrantFiled: April 15, 2005Date of Patent: May 18, 2010Assignee: Aptina Imaging CorporationInventors: Inna Patrick, Sungkwon C. Hong, Jeffrey A. McKee
-
Patent number: 7714369Abstract: A semiconductor chip that has a photodiode formed on it, a semiconductor device including the semiconductor chip, and manufacturing methods thereof. A second semiconductor region 11 is formed in light-receiving region R of first semiconductor region 10. First bumps 12 are formed outside light-receiving region R. Second bump 13 is formed in a ring-shape around light-receiving region R between region R and first bumps 12. Semiconductor chip T is assembled on assembly substrate S, and resin layer 30 is formed between chip T and substrate S in the region outside of said light-receiving region R.Type: GrantFiled: September 28, 2006Date of Patent: May 11, 2010Assignee: Texas Instruments IncorporatedInventors: Yoichi Okumura, Ryoichi Kojima
-
Patent number: 7705381Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.Type: GrantFiled: June 23, 2008Date of Patent: April 27, 2010Assignee: Canon Kabushiki KaishaInventors: Mahito Shinohara, Shunsuke Inoue
-
Patent number: 7705378Abstract: A CMOS image sensor and fabricating method thereof can enhance the quality of the image sensor by preventing unnecessary diffused reflection of light by providing an opaque filter layer next to a microlens. The CMOS image sensor includes a photodiode, an insulating interlayer, a metal line, a device protecting layer, a microlens on the device protecting layer and overlapped with the photodiode, and an opaque layer pattern on the device protecting layer next to the microlens.Type: GrantFiled: December 29, 2005Date of Patent: April 27, 2010Assignee: Dongbu Electronics Co., Ltd.Inventor: Chang Eun Lee
-
Patent number: 7705373Abstract: A MOS-type solid-state image pickup device includes a photoelectric conversion unit having a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type forming a pn-junction with the first semiconductor region, a third semiconductor region of the first conductivity type disposed at a light incident side of the second semiconductor region, and a transfer MOS transistor having the second semiconductor region, a fourth semiconductor region of the second conductivity type, and a gate electrode disposed on an insulating film on the first semiconductor region between the photoelectric conversion unit and the fourth semiconductor region to transfer a charge carrier from the second semiconductor region to the fourth semiconductor region. The photoelectric conversion unit and the transfer MOS transistor are disposed on a substrate.Type: GrantFiled: July 5, 2007Date of Patent: April 27, 2010Assignee: Canon Kabushiki KaishaInventors: Toru Koizumi, Shigetoshi Sugawa, Isamu Ueno, Tesunobu Kochi, Katsuhito Sakurai, Hiroki Hiyama
-
Patent number: 7705375Abstract: A solid state imaging device includes: a plurality of photoelectric conversion portions formed in a substrate in a matrix arrangement to convert light incident on light receiving portions into electricity; a plurality of vertical transfer registers for reading charges out of the photoelectric conversion portions and transferring the charges in the column direction; and a plurality of shunt interconnections formed above the vertical transfer electrodes in one-to-one correspondence with the columns of the photoelectric conversion portions to supply drive pulses to the corresponding vertical transfer electrodes. Each of the vertical transfer registers includes a vertical transfer channel formed in the substrate in one-to-one correspondence with a column of the photoelectric conversion portions and a plurality of vertical transfer electrodes formed above the vertical transfer channel.Type: GrantFiled: October 23, 2006Date of Patent: April 27, 2010Assignee: Panasonic CorporationInventors: Kenichi Nishijima, Toshihiro Kuriyama
-
Patent number: 7704780Abstract: A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable though the cover dielectric layer, and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.Type: GrantFiled: November 18, 2008Date of Patent: April 27, 2010Assignee: Aptina Imaging CorporationInventors: Chintamani Palsule, John H. Stanback, Thomas E. Dungan, Mark D. Crook
-
Patent number: 7701023Abstract: A TFA (thin film on ASIC) image sensor with stability-optimized photodiode for converting electromagnetic radiation into an intensity-dependent photocurrent. The TFA includes an intermetal dielectric layer, pixel back electrodes, vias, metal contacts, a transparent conductive oxide (TCO) layer, and an intrinsic absorption layer with a thickness between 300 nm and 600 nm. The pixel back electrodes are disposed over the intermetal dielectric layer, which is disposed over the ASIC. The vias connect to the pixel back electrodes and the metal contacts, which are formed in the intermetal dielectric layer. The TCO is disposed above the intrinsic absorption layer, which is disposed above the pixel back electrodes.Type: GrantFiled: October 19, 2007Date of Patent: April 20, 2010Assignee: STMicroelectronics N.V.Inventors: Peter Rieve, Marcus Walder, Konstantin Seibel, Jens Prima, Arash Mirhamed
-
Patent number: 7687832Abstract: A method of fabricating a pixel cell having a shutter gate structure. First and second charge barriers are respectively created between a photodiode and a first charge storage region and between the first storage region and a floating diffusion region. A global shutter gate is formed to control the charge barrier and transfer charges from the photodiode to the first charge storage region by effectively lowering the first charge barrier. A transfer transistor acts to transfer charges from the first storage region to the floating diffusion region by reducing the second charge barrier.Type: GrantFiled: September 7, 2006Date of Patent: March 30, 2010Assignee: Aptina Imaging CorporationInventors: Inna Patrick, Sungkwon C. Hong
-
Patent number: 7683388Abstract: An image pickup device is characterized by including a plurality of pixels having a plurality of photoelectric conversion units, convex interlayer lenses with respect to incident light, the convex interlayer lenses being arranged correspondingly to a photoelectric conversion devices and color filters being arranged for each color on the interlayer lenses correspondingly to the photoelectric conversion devices, wherein the color filter is formed to match the shape of the interlayer lens and the top surface thereof is substantially flat. This configuration reduces the amount of light which is incident on the gaps between adjacent microlenses and passes through the color filters at the boundary of pixels, decreasing color mixture of camera image.Type: GrantFiled: February 23, 2006Date of Patent: March 23, 2010Assignee: Canon Kabushiki KaishaInventor: Shigeki Mori
-
Patent number: 7675093Abstract: Apparatus, systems and methods are described to assist in reducing dark current in an active pixel sensor. A potential barrier arrangement is configured to block the flow of charge carriers generated outside a photosensitive region. In various embodiments, a potential well-potential barrier arrangement is formed to direct charge carriers away from the photosensitive region during an integration time.Type: GrantFiled: November 28, 2006Date of Patent: March 9, 2010Assignee: Micron Technology, Inc.Inventors: Chen Xu, Gennadiy Agranov, Igor Karasev
-
Patent number: 7675094Abstract: An active pixel using a transfer gate that has a polysilicon gate doped with P+ is disclosed. The pixel includes a photosensitive element formed in a semiconductor substrate and an n-type floating node formed in the semiconductor substrate. An n-channel transfer transistor having a transfer gate is formed between the floating node and the photosensitive element. The transfer gate is doped with a p-type dopant.Type: GrantFiled: December 22, 2004Date of Patent: March 9, 2010Assignee: OmniVision Technologies, Inc.Inventor: Howard E. Rhodes
-
Patent number: 7671385Abstract: An image sensor contains a semiconductor substrate, a plurality of pixels defined on the semiconductor substrate, a photo conductive layer and a transparent conductive layer formed on the pixel electrodes of the pixels in order, and a shield device positioned between any two adjacent pixel electrodes. The shield device has a shield electrode and an isolation structure surrounding the shield electrode so that the shield electrode is isolated from the pixel electrodes and the photo conductive layer by the isolation structure.Type: GrantFiled: March 15, 2007Date of Patent: March 2, 2010Assignee: Powerchip Semiconductor Corp.Inventors: Hsin-Heng Wang, Chiu-Tsung Huang, Shih-Siang Lin
-
Patent number: 7671402Abstract: A solid-state imaging device includes: a substrate; a photoelectric transducer that is provided within the substrate and generates light-generated charge in accordance with incident light; a floating diffusion that retains the light-generated charge generated from the photoelectric transducer; a transfer and retention unit that is provided between the photoelectric transducer and the floating diffusion for a purpose of controlling a transfer of the light-generated charge and has a charge-retaining region that can retain the light-generated charge generated from the photoelectric transducer; a reset unit that initializes a potential of the floating diffusion; an amplifying transistor that generates an output based on a potential of the floating diffusion; a selection transistor that selectively outputs an output of the amplifying transistor; and an excessive charge-discharging unit that discharges excessive electric charge generated from the photoelectric transducer.Type: GrantFiled: February 7, 2008Date of Patent: March 2, 2010Assignee: Seiko Epson CorporationInventor: Kazunobu Kuwazawa
-
Patent number: 7667755Abstract: A variable sensitivity imaging device comprises: a substrate; a photosensitive layer which is stacked above the substrate, and which is interposed between a pixel electrode layer and an opposing electrode layer; a signal reading section, formed on the substrate, that reads a signal corresponding to photo-charges which are generated by incidence of light into the photosensitive layer; and a pulse voltage applying section that applies a variable pulse-width pulse voltage between the pixel electrode layer and the opposing electrode layer.Type: GrantFiled: September 28, 2006Date of Patent: February 23, 2010Assignee: Fujifilm CorporationInventor: Takeshi Misawa
-
Patent number: 7663202Abstract: Nanowire-based photodiodes are disclosed. The photodiodes include a first optical waveguide having a tapered first end, a second optical waveguide having a tapered second end, and at least one nanowire comprising at least one semiconductor material connecting the first and second ends in a bridging configuration. Methods of making the photodiodes are also disclosed.Type: GrantFiled: June 26, 2007Date of Patent: February 16, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventors: Shih-Yuan Wang, Michael Renne Ty Tan, Alexandre M. Bratkovski, R. Stanley Williams, Nobuhiko Kobayashi
-
Patent number: 7663682Abstract: A variable sensitivity imaging device comprises: a substrate; a photosensitive layer which is stacked above the substrate, and which is interposed between a pixel electrode layer and an opposing electrode layer; a signal reading section, formed on said substrate, that reads a signal corresponding to photo-charges which are generated by incidence of light into the photosensitive layer; and a voltage applying section that applies a voltage for making a sensitivity variable between the pixel electrode layer and the opposing electrode layer.Type: GrantFiled: September 27, 2006Date of Patent: February 16, 2010Assignee: Fujifilm CorporationInventor: Takeshi Misawa
-
Publication number: 20100032710Abstract: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer and/or p+ deep diffused layer. Consequently, the present invention delivers high device performances, such as low crosstalk, low radiation damage, high speed, low leakage dark current, and high speed, using a thin active layer.Type: ApplicationFiled: July 8, 2009Publication date: February 11, 2010Inventors: Peter Steven Bui, Narayan Dass Taneja
-
Patent number: 7655965Abstract: A semiconductor light receiving device includes a plurality of photodiode units, each of which is configured to convert a received light into an electric signal; and a separating unit configured to electrically separates the plurality of photodiode units from each other. The impurity concentration of a surface portion of the separating unit is equal to or lower than a first concentration. The first concentration is a concentration at which the light receiving sensitivity of the separating unit to light is substantially equal to the light receiving sensitivity of each of the plurality of photodiode units of the light. A wavelength of the light is equal to or longer than that of blue-violet light.Type: GrantFiled: March 31, 2006Date of Patent: February 2, 2010Assignee: NEC Electronics CorporationInventor: Nobuyuki Nagashima
-
Patent number: 7649220Abstract: A photodetector and method for making the same is disclosed. The photodetector includes a substrate having first, second, and third photodiodes and first and second pigment filter layers. The first, second, and third photodiodes generate first, second, and third photodiode output signals, respectively, each photodiode output signal being indicative of a light intensity incident on that photodiode and a dark current that is independent of the light intensity. The first and second pigment filter layers overlie the first and second photodiodes while a layer having both the first and second pigment filter layers overlie the third photodiode. An output circuit combines the first and third photodiode output signals to provide a first corrected output signal and combines the second and third photodiode output signals to provide a second corrected output signal.Type: GrantFiled: March 29, 2007Date of Patent: January 19, 2010Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.Inventors: Farn Hin Chen, Gim Eng Chew, Boon Keat Tan
-
Patent number: 7638853Abstract: A solid state imaging device includes: an imaging region formed in an upper part of a substrate made of silicon to have a photoelectric conversion portion, a charge accumulation region of the photoelectric conversion portion being of a first conductivity type; a device isolation region formed in at least a part of the substrate to surround the photoelectric conversion portion; and a MOS transistor formed on a part of the imaging region electrically isolated from the photoelectric conversion region by the device isolation region. The width of the device isolation region is smaller in its lower part than in its upper part, and the solid state imaging device further includes a dark current suppression region surrounding the device isolation region and being of a second conductivity type opposite to the first conductivity type.Type: GrantFiled: July 17, 2007Date of Patent: December 29, 2009Assignee: Panasonic CorporationInventors: Mitsuyoshi Mori, Takumi Yamaguchi, Toru Okino
-
Patent number: 7619266Abstract: An image sensor device having a pixel cell with a pinned photodiode, which utilizes the fixed charge of an high K dielectric layer over the n-type region for the pinning effect without implanting a p-type layer over the n-type region, and methods of forming such a device.Type: GrantFiled: January 9, 2006Date of Patent: November 17, 2009Assignee: Aptina Imaging CorporationInventor: Chandra Mouli
-
Patent number: 7619267Abstract: A solid-state imaging device comprising a plurality of pixels arrayed on a plane, wherein each of the pixels includes a semiconductor substrate and a plurality of photoelectric conversion devices, the plurality of photoelectric conversion devices include at least one on-substrate photoelectric conversion device stacked in an upper portion of the semiconductor substrate and at least one in-substrate photoelectric conversion device provided within the semiconductor substrate in a lower portion of the on-substrate photoelectric conversion device, and the plurality of photoelectric conversion devices have a different photoelectric conversion sensitivity from each other.Type: GrantFiled: January 22, 2007Date of Patent: November 17, 2009Assignee: FUJIFILM CorporationInventor: Yasushi Araki
-
Patent number: 7615808Abstract: A structure for implementation of back-illuminated CMOS or CCD imagers. An epitaxial silicon layer is connected with a passivation layer, acting as a junction anode. The epitaxial silicon layer converts light passing through the passivation layer and collected by the imaging structure to photoelectrons. A semiconductor well is also provided, located opposite the passivation layer with respect to the epitaxial silicon layer, acting as a junction cathode. Prior to detection, light does not pass through a dielectric separating interconnection metal layers.Type: GrantFiled: September 13, 2005Date of Patent: November 10, 2009Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Thomas J. Cunningham
-
Patent number: 7608192Abstract: An image sensor and a method for fabricating the same are provided. The image sensor includes a first conductive type substrate including a trench formed in a predetermined portion of the first conductive type substrate, a second conductive type impurity region for use in a photodiode, formed below a bottom surface of the trench in the first conductive type substrate, and a first conductive type epitaxial layer for use in the photodiode, buried in the trench.Type: GrantFiled: April 19, 2006Date of Patent: October 27, 2009Inventors: Hee Jeen Kim, Han Seob Cha
-
Patent number: 7608872Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.Type: GrantFiled: December 13, 2005Date of Patent: October 27, 2009Inventor: Sang-Young Kim
-
Solid image pick-up element with a single layer electrode structure and method of producing the same
Patent number: 7608871Abstract: A solid image pick-up element comprises: a photoelectric converting portion; a charge transmitting portion comprising a charge transmitting electrode that transmits a charge generated by the photoelectric converting portion; and a peripheral circuit portion connected to the charge transmitting portion, wherein a surface level of a field oxide film provided at the peripheral circuit portion and the charge transmitting portion to surround an effective image pick-up region of the photoelectric converting portion is to a degree the same as a surface level of the photoelectric converting portion.Type: GrantFiled: June 30, 2005Date of Patent: October 27, 2009Assignee: Fujifilm CorporationInventors: Tsutomu Aita, Hideki Kooriyama, Maki Saito -
Patent number: 7605013Abstract: An apparatus comprising at least one multilayer wafer which includes a device layer adjacent to a barrier layer, and the device layer includes at least two photoconductive regions separated by an etched channel extending through the device layer. In some instances the apparatus may be an accelerometer having two photodiodes formed on a silicon-on-insulator (SOI) wafer with the photodiodes defined by one or more etched channels extending through the device layer of the SOI wafer. Also disclosed are methods for forming such an apparatus.Type: GrantFiled: March 13, 2008Date of Patent: October 20, 2009Assignee: Northrop Grumman CorporationInventor: Henry C. Abbink
-
Publication number: 20090250734Abstract: A pixel including a substrate of a first conductivity type and having a surface, a photodetector of a second conductivity type that is opposite the first conductivity type, a floating diffusion region of the second conductivity type, a transfer region between the photodetector and the floating diffusion, a gate positioned above the transfer region and partially overlapping the photodetector, and a pinning layer of the first conductivity type extending at least across the photodetector from the gate.Type: ApplicationFiled: June 9, 2009Publication date: October 8, 2009Inventors: CHINTAMANI P. PALSULE, Changhoon Choi, Fredrick P. LaMaster, John H. Stanback, Thomas E. Dungan, Thomas Joy, Homayoon Haddad
-
Patent number: 7592654Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.Type: GrantFiled: November 15, 2007Date of Patent: September 22, 2009Assignee: Aptina Imaging CorporationInventors: Sandeep R. Bahl, Fredrick P. LaMaster, David W. Bigelow
-
Patent number: 7585707Abstract: A pixel cell having a substrate with a isolation channel formed of higher carbon concentrate such as SiC or carbonated silicon. The channel comprising SiC or carbonated silicon is provided over the substrate of the pixel cell to reduce the dark current leakage.Type: GrantFiled: August 8, 2005Date of Patent: September 8, 2009Assignee: Micron Technology, Inc.Inventor: Chandra Mouli
-
Patent number: 7583306Abstract: A solid state imaging device, including: a plurality of storage wells which stores an optically generated charge that is generated at a photoelectric conversion region corresponding to an incident light, the plurality of storage wells being inside a substrate; wherein a plurality of the photoelectric conversion regions is arrayed on the substrate in a two dimensional matrix; a plurality of amplifiers each installed per every pair of the photoelectric conversion regions that are adjacent in one direction of the two dimensional matrix, outputting a pixel signal that corresponds to the optically generated charge retained in a floating diffusion region; a plurality of transfer controlling elements, a pair of which is installed in every pair of the photoelectric conversion regions, changing a potential barrier of an optically generated charge transfer route, the transfer route being between each of the storage wells in the pair of the photoelectric conversion regions and the corresponding floating diffusion regionType: GrantFiled: July 7, 2005Date of Patent: September 1, 2009Assignee: Seiko Epson CorporationInventor: Kazunobu Kuwazawa
-
Patent number: 7579668Abstract: A method for photo-detecting and an apparatus for the same are provided. The apparatus for photo-detecting includes a first P-N diode and a second P-N diode. The first P-N diode, has a first P-N junction which has a first thickness, by which a first electrical signal is generated when irradiated by light, and the second P-N diode has a second P-N junction which has a second thickness, by which a second electrical signal is generated when irradiated by light. The second thickness is larger than the first thickness and an operation of the first electrical signal and the second electrical signal is proceeded for obtaining a third electrical signal.Type: GrantFiled: October 19, 2007Date of Patent: August 25, 2009Assignee: National Taiwan UniversityInventors: Chee-Wee Liu, Chun-Hung Lai, Meng-kun Chen, Wei-Shuo Ho
-
Patent number: 7576369Abstract: This invention comprises photodiodes, optionally organized in the form of an array, including p+ deep diffused regions or p+ and n+ deep diffused regions. More specifically, the invention permits one to fabricate thin 4 inch and 6 inch wafer using the physical support provided by a n+ deep diffused layer and/or p+ deep diffused layer. Consequently, the present invention delivers high device performances, such as low crosstalk, low radiation damage, high speed, low leakage dark current, and high speed, using a thin active layer.Type: GrantFiled: October 25, 2005Date of Patent: August 18, 2009Assignee: UDT Sensors, Inc.Inventors: Peter Steven Bui, Narayan Dass Taneja
-
Patent number: 7575941Abstract: A method of manufacturing of a photodiode is provided. The photodiode is formed on a substrate of a first conductive type. First, an isolation structure is formed in the substrate to define a photosensitive area in the substrate. Thereafter, trenches are formed in the substrate. Next, a doped layer of a second conductive type is formed on the substrate. The doped layer covers at least the inner wall of the trenches and a top portion of the substrate. The method of fabricating the photodiode can reduce overall processing time and cost and improve production efficiency.Type: GrantFiled: July 30, 2004Date of Patent: August 18, 2009Assignee: Powerchip Semiconductor Corp.Inventors: Ko-Hsing Chang, Su-Yuan Chang
-
Publication number: 20090200580Abstract: What is disclosed is an apparatus comprising a transfer gate formed on a substrate and a photodiode formed in the substrate next to the transfer gate. The photodiode comprises a shallow N-type collector formed in the substrate, a deep N-type collector formed in the substrate, wherein a lateral side of the deep N-type collector extends at least under the transfer gate, and a connecting N-type collector formed in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector. Also disclosed is a process comprising forming a deep N-type collector in the substrate, forming a shallow N-type collector formed in the substrate, and forming a connecting N-type collector in the substrate between the deep N-type collector and the shallow N-type collector, wherein the connecting implant connects the deep N-type collector and the shallow N-type collector.Type: ApplicationFiled: February 8, 2008Publication date: August 13, 2009Applicant: OMNIVISION TECHNOLOGIES, INC.Inventors: Howard E. Rhodes, Hidetoshi Nozaki, Sohei Manabe
-
Publication number: 20090189197Abstract: A solid-state imaging device includes: an imaging region including a plurality of light-receiving parts; a first transfer section provided on the imaging region and transferring, in a first direction, signals generated by the light-receiving parts; a second transfer section provided at a first side of the imaging region and transferring, in a second direction intersecting the first direction, the signals transferred from the first transfer section; an output circuit for outputting the signals; and bonding pads provided at the first side of the imaging region with the second transfer section sandwiched between the imaging region and the bonding pads. The bonding pads are arranged in a plurality of rows each extending in the second direction. Each of the bonding pads in one of the rows at least partially overlaps one of the bonding pads in another one of the rows when viewed in the first direction.Type: ApplicationFiled: September 4, 2008Publication date: July 30, 2009Inventors: Ikuya Shibata, Wataru Kamisaka, Kozo Orihara
-
Patent number: 7563636Abstract: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.Type: GrantFiled: July 14, 2008Date of Patent: July 21, 2009Assignee: International Business Machines CorporationInventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan, Mark D. Jaffe, Jeffrey B. Johnson, Alain Loiseau
-
Patent number: 7557397Abstract: A pixel including a substrate of a first conductivity type and having a surface, a photodetector of a second conductivity type that is opposite the first conductivity type, a floating diffusion region of the second conductivity type, a transfer region between the photodetector and the floating diffusion, a gate positioned above the transfer region and partially overlapping the photodetector, and a pinning layer of the first conductivity type extending at least across the photodetector from the gate.Type: GrantFiled: February 16, 2007Date of Patent: July 7, 2009Assignee: Aptina Imaging CorporationInventors: Chintamani P. Palsule, Changhoon Choi, Fredrick P. LaMaster, John H. Stanback, Thomas E. Dungan, Thomas Joy, Homayoon Haddad
-
Patent number: 7553734Abstract: Methods for fabricating an avalanche photodiode (APD), wherein the APD provides both high optical coupling efficiency and low dark count rate. The APD is formed such that it provides an active region of sufficient width to enable high optical coupling efficiency and a low dark count rate. Some APDs fabricated using these methods have a device area with an active region and an edge region, wherein the size of the active region is substantially matched to the mode-field diameter of an optical beam, and wherein the size of the edge region is substantially minimized and further wherein the device region maintains a substantially uniform gain and breakdown voltage.Type: GrantFiled: October 17, 2005Date of Patent: June 30, 2009Assignee: Princeton Lightwave, Inc.Inventors: Rafael Ben-Michael, Mark Allen Itzler
-
Patent number: 7550792Abstract: A solid-state imaging device, includes: a substrate where a region of a first conductivity type is formed on at least a portion of a surface thereof; a region of a second conductivity type formed on at least a portion of a surface of the region of the first conductivity type; a multilayer wiring layer formed on the substrate; and a layer of the second conductivity type formed directly above the region of the second conductivity type in the multilayer wiring layer, connected to the region of the second conductivity type. A concentration of impurities in the layer of the second conductivity type is lower with decreasing proximity to the region of the second conductivity type.Type: GrantFiled: July 16, 2007Date of Patent: June 23, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Masaaki Ogawa, Takashi Doi, Toshihiko Kitamura
-
Patent number: 7528420Abstract: Image sensing devices and methods for fabricating the same are provided. An exemplary image sensing device includes a first substrate having a first side and a second side opposing each other. A plurality of image sensing elements is formed in the first substrate at the first side. A conductive via is formed through the first substrate, having a first surface exposed by the first substrate at the first side and a second surface exposed by the first substrate at the second side. A conductive pad overlies the conductive via at the first side and is electrically connecting the image sensing elements. A conductive layer overlies the conductive via at the second side and electrically connects with the conductive pad. A conductive bump is formed over a portion of the conductive layer. A second substrate is bonded with the first substrate at the first side.Type: GrantFiled: May 23, 2007Date of Patent: May 5, 2009Assignee: Visera Technologies Company LimitedInventors: Jui-Peng Weng, Tzu-Han Lin, Pai-Chun Peter Zung
-
Patent number: 7528427Abstract: A pixel sensor cell structure and method of manufacture. Disclosed is a pixel sensor cell comprising an asymmetric transfer gate for providing a pinning layer having an edge spaced a further distance from the gate channel region than an edge of a charge collection well. Potential barrier interference to charge transfer caused by the pinning layer is reduced.Type: GrantFiled: January 30, 2007Date of Patent: May 5, 2009Assignee: International Business Machines CorporationInventors: Jeffrey Gambino, Mark Jaffe
-
Patent number: 7521737Abstract: A method of fabricating light-sensing devices including photodiodes monolithically integrated with CMOS devices. Several types of photodiode devices (PIN, HIP) are expitaxially grown in one single step on active areas implanted in a common semiconductor substrate, the active areas having defined polarities. The expitaxially grown layers for the photodiode devices may be either undoped or in-situ doped with profiles suitable for their respective operation. With appropriate choice of substrate materials, device layers and heterojunction engineering and process architecture, it is possible to fabricate silicon-based and germanium-based multi-spectral sensors that can deliver pixel density and cost of fabrication comparable to the state of the art CCDs and CMOS image sensors. The method can be implemented with epitaxially deposited films on the following substrates: Silicon Bulk, Thick-Film and Thin-Film Silicon-On-Insulator (SOI), Germanium Bulk, Thick-Film and Thin-Film Geranium-On-Insulator (GeOI).Type: GrantFiled: March 2, 2005Date of Patent: April 21, 2009Assignee: Quantum Semiconductor LLCInventor: Carlos J. R. P. Augusto
-
Patent number: 7521315Abstract: An image sensor capable of overcoming a decrease in photo sensitivity resulted from using a single crystal silicon substrate, and a method for fabricating the same are provided. An image sensor includes a single crystal silicon substrate, an amorphous silicon layer formed inside the substrate, a photodiode formed in the amorphous silicon layer, and a transfer gate formed over the substrate adjacent to the photodiode and transferring photoelectrons received from the photodiode.Type: GrantFiled: December 28, 2005Date of Patent: April 21, 2009Assignee: MagnaChip Semiconductor, Ltd.Inventors: Myoung-Shik Kim, Hyung-Jun Kim
-
Patent number: 7521738Abstract: An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N? region formed within a P-type region. The N? region is formed from an implant of arsenic and an implant of phosphorus. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.Type: GrantFiled: March 18, 2008Date of Patent: April 21, 2009Assignee: OmniVision Technologies, Inc.Inventor: Howard E. Rhodes
-
Patent number: 7518168Abstract: An MOS type solid-state image pickup device including pixels each of which comprises a photodiode PD, a detection portion N and a transfer transistor QT for transferring the charges accumulated in the photodiode PD to the detection portion N, wherein the gate voltage of the transfer transistor QT when the charges are accumulated in the photodiode PD is set to a negative.Type: GrantFiled: July 11, 2007Date of Patent: April 14, 2009Assignee: Sony CorporationInventors: Keiji Mabuchi, Takahisa Ueno
-
Patent number: 7518143Abstract: A solid-state imaging device, a line sensor and an optical sensor for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio, and a method of operating a solid-state imaging device for enhancing a wide dynamic range while keeping high sensitivity with a high S/N ratio are provided. The solid-state imaging device comprises an integrated array of a plurality of pixels, each of which comprises a photodiode PD for receiving light and generating photoelectric charges, a transfer transistor Tr1 for transferring the photoelectric charges, and a storage capacitor element C connected to the photodiode PD at least through the transfer transistor Tr1 for accumulating, at least through the transfer transistor Tr1, the photoelectric charge overflowing from the photodiode PD during accumulating operation.Type: GrantFiled: February 25, 2005Date of Patent: April 14, 2009Assignee: National University Corporation Tohoku UniversityInventor: Shigetoshi Sugawa
-
Patent number: 7514729Abstract: A solid-state imaging device includes an N-type semiconductor substrate, an N-type impurity region provided in the surficial portion of the N-type semiconductor substrate, a photo-electric conversion unit formed in the N-type impurity region, a charge accumulation unit formed in the N-type impurity region so as to contact with the photo-electric conversion unit, and temporarily accumulating charge generated in the photo-electric conversion unit, a charge hold region (barrier unit) formed in the N-type impurity region so as to contact with the charge accumulation unit, and allowing the charge accumulation unit to accumulate the charge, and a charge accumulating electrode provided to the charge accumulation unit. The charge accumulation unit and the charge hold region are formed to be N?-type.Type: GrantFiled: September 12, 2006Date of Patent: April 7, 2009Assignee: NEC Electronics CorporationInventors: Hiroyoshi Kudou, Satoshi Uchiya, Junichi Yamamoto, Fumiaki Futamura
-
Patent number: RE41340Abstract: A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight. A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that share buffer transistors. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of a shared buffer transistor.Type: GrantFiled: September 21, 2006Date of Patent: May 18, 2010Assignee: Micron Technology, Inc.Inventors: Vladimir Berezin, Alexander Krymski, Eric R. Fossum