Sensors Not Overlaid By Electrode (e.g., Photodiodes) Patents (Class 257/233)
  • Patent number: 7514732
    Abstract: A solid-state image pickup apparatus with little or no difference in the dark currents between adjacent photoelectric conversion elements and providing a high sensitivity and a low dark current even in a high-speed readout operation. A well 302 is formed on a wafer 301, and semiconductor layers 101a, 101b are formed in the well to constitute photodiodes. A well contact 306 is formed between the semiconductor layers 101a, 101b. Element isolation regions 303b, 303a are provided between the well contact and the semiconductor layers, and channel stop layers 307b, 307a are provided under the element isolation regions 303b, 303a. A conductive layer 304 is provided on the element isolation region 303b, and a side wall 308 is provided on a side face of the conductive layer 304. A distance a between an end of the element isolation region 303b and the conductive layer 304, a width b of the side wall 308 and a device isolation width c satisfy a relation c>a?b.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: April 7, 2009
    Assignee: Canon Kabushiki Kaisha
    Inventors: Akira Okita, Masanori Ogura, Seiichiro Sakai, Takanori Watanabe
  • Publication number: 20090085070
    Abstract: Disclosed herein is a solid-state image pickup device including, a plurality of light receiving units, a transfer channel, a first transfer electrode, a second transfer electrode, first wiring, and second wiring.
    Type: Application
    Filed: August 25, 2008
    Publication date: April 2, 2009
    Applicant: Sony Corporation
    Inventor: Takeshi Takeda
  • Patent number: 7511324
    Abstract: A pixel area, which is composed of a plurality of unit pixels each including a photoelectric conversion unit and a signal scanning circuit, is formed on a semiconductor substrate. An optical black pixel region, in which a plurality of optical black pixels for setting a dark-time level are formed, is formed in the pixel area. A barrier layer, which has an impurity concentration that is higher than an impurity concentration of the semiconductor substrate and has a conductivity type that is identical to a conductivity type of the semiconductor substrate, is formed in the optical black pixel region of the semiconductor substrate.
    Type: Grant
    Filed: June 14, 2007
    Date of Patent: March 31, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Unagami, Kenichi Arakawa
  • Patent number: 7492027
    Abstract: Isolation methods and devices for isolating regions of a semiconductor device are disclosed. The isolation methods and structures include forming an isolating trench among pixels or other active areas of a semiconductor device. The trench extends through the substrate to the base layer, wherein a liner may be deposited on the side walls of the trench. A conductive material is deposited into the trench to block electrons from passing through.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: February 17, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7492048
    Abstract: Structures and method for forming the same. The semiconductor structure comprises a photo diode that includes a first semiconductor region and a second semiconductor region. The first and second semiconductor regions are doped with a first and second doping polarities, respectively, and the first and second doping polarities are opposite. The semiconductor structure also comprises a transfer gate that comprises (i) a first extension region, (ii) a second extension region, and (iii) a floating diffusion region. The first and second extension regions are in direct physical contact with the photo diode and the floating diffusion region, respectively. The semiconductor structure further comprises a charge pushing region. The charge pushing region overlaps the first semiconductor region and does not overlap the floating diffusion region. The charge pushing region comprises a transparent and electrically conducting material.
    Type: Grant
    Filed: January 10, 2006
    Date of Patent: February 17, 2009
    Assignee: International Business Machines Corporation
    Inventors: James William Adkisson, Jeffrey Peter Gambino, Mark David Jaffe, Jeffrey Bowman Johnson, Jerome Brett Lasky, Richard John Rassel
  • Publication number: 20090039397
    Abstract: An avalanche photodiode is deposited and integrated directly on top of CMOS readout circuitry. The anode of the avalanche photodiode may be independently biased at high voltage so that the avalanche photodiode may be operated in an avalanche multiplication mode. The avalanche photodiode has a multi-layered structure which is not pixilated; and photo-carrier generation and carrier multiplication may take place in the same layer or in different layers. A constant-gate-bias transistor isolates the high-voltage avalanche photodiode from the low-voltage the CMOS readout circuitry.
    Type: Application
    Filed: August 9, 2007
    Publication date: February 12, 2009
    Applicant: MICROMEDIA TECHNOLOGY CORP.
    Inventor: Calvin Yi-Ping Chao
  • Patent number: 7488617
    Abstract: A CMOS image sensor and a manufacturing method thereof are disclosed. The gates of the transistors are formed in an active region of a unit pixel, and at the same time, a passivation layer is formed on an edge portion of the active region of a photodiode to have the same laminate structure as the gates of the transistors. Impurities for a diffusion region of the photodiode are ion-implanted into the active region for the photodiode, after the laminate structure is formed. The passivation layer prevents the edge portion from being damaged by ion implantation at the boundary or interface between the photodiode diffusion region and an isolation layer, which reduces dark current and/or leakage current of the CMOS image sensor.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: February 10, 2009
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Chang Hun Han
  • Patent number: 7489014
    Abstract: A photodiode includes a semiconductor having front and backside surfaces and first and second active layers of opposite conductivity, separated by an intrinsic layer. A plurality of isolation trenches filled with conductive material extend into the first active layer, dividing the photodiode into a plurality of cells and forming a central trench region in electrical communication with the first active layer beneath each of the cells. Sidewall active diffusion regions extend the trench depth along each sidewall and are formed by doping at least a portion of the sidewalls with a dopant of first conductivity. A first contact electrically communicates with the first active layer beneath each of the cells via the central trench region. A plurality of second contacts each electrically communicate with the second active layer of one of the plurality of cells. The first and second contacts are formed on the front surface of the photodiode.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: February 10, 2009
    Assignee: ICEMOS Technology, Ltd.
    Inventors: Robin Wilson, Conor Brogan, Hugh J. Griffin, Cormac MacNamara
  • Patent number: 7488997
    Abstract: A solid-state imaging device including a plurality of unit pixels, each of which includes: a storage well for storing electric charge generated by a photoelectric transducer using incident light; a transferring unit, which is formed on a top surface of a substrate, for transferring the electric charge to a floating diffusion region; and an amplifier for outputting a pixel signal that is amplified based on the electric charge transferred to the floating diffusion region, wherein: the transferring unit is a transfer control element having: a transfer gate that is provided on the substrate surface through an insulation film so that part of the transfer gate overlaps the storage well when the substrate is viewed from a direction orthogonal to the substrate surface; and an electric charge-retaining region for retaining the electric charge that is provided within the substrate and under the transfer gate; and further a diffusion layer that serves as a transfer path between the floating diffusion region and the elec
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: February 10, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Kazunobu Kuwazawa
  • Patent number: 7488618
    Abstract: Microlenses for directing radiation toward a sensor of an imaging device include a plurality of mutually adhered layers of cured optically transmissive material. Systems include at least one microprocessor and a substrate including an array of microlenses formed thereon in electrical communication with the at least one microprocessor. At least one microlens in the array includes a plurality of mutually adhered layers of cured optically transmissive material.
    Type: Grant
    Filed: January 20, 2006
    Date of Patent: February 10, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Alan G. Wood, Warren M. Farnworth, Charles M. Watkins, Peter A. Benson
  • Patent number: 7485904
    Abstract: An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag, and improves blue response in imaging devices.
    Type: Grant
    Filed: November 1, 2006
    Date of Patent: February 3, 2009
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7473945
    Abstract: Disclosed is an optical semiconductor integrated circuit device has an opening portion in an insulating layer, which is formed in a light receiving region of a photodiode stepwise. Thus, a step of the opening portion is reduced, leading to an improvement of a step coverage of a light shadowing film formed on the insulating film so as to cover the insulating film. By the improvement of the step coverage of the opening portion, the light shadowing film located on a plane of the light shadowing film of the photodiode is not broken. A problem that a conventional light shadowing film is broken is solved in the photodiode for a blue laser beam.
    Type: Grant
    Filed: March 23, 2005
    Date of Patent: January 6, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tsuyoshi Takahashi, Katsuya Okabe, Akira Hatsugai
  • Publication number: 20090001428
    Abstract: An imager device that has mitigated dark current leakage and punch-through protection. The transistor associated with the photoconversion device is formed with a single (i.e. one-sided) active area extension region on one side of the transistor gate opposite the photoconversion device, while other transistors can have normal symmetrical (i.e, two-sided) active area extension regions (e.g., lightly doped drains) with resulting high performance and short gate lengths. The asymmetrical active area extension region of the transistor associated with the photodiode can serve to reduce dark current at the photoconversion device. The punch-through problem normally cured by a lightly doped drain is fixed at the transistor associated with the photoconversion device by adding a Vt adjustment implant and/or increasing its gate length.
    Type: Application
    Filed: June 26, 2008
    Publication date: January 1, 2009
    Inventor: Howard E. Rhodes
  • Publication number: 20080315263
    Abstract: An imager pixel and imaging device and system including an imager pixel for discharging a floating diffusion region are described. The imager pixel includes a photoconversion regions floating diffusion region, and a reset diode. A reset diode is coupled to the floating diffusion region and, when activated, discharges accumulated and collected charge from the photoconversion and the floating diffusion regions. Following successive accumulation, transfer and collection processes, the reset diode again discharges residual accumulated and collected charge from the photoconversion and the floating diffusion regions.
    Type: Application
    Filed: June 20, 2007
    Publication date: December 25, 2008
    Applicant: MICRON TECHNOLOGY, INC.
    Inventor: Robert R. Rhodehouse
  • Publication number: 20080296629
    Abstract: A solid-state imaging device includes a semiconductor substrate; a first conductive region of the semiconductor substrate; a first conductive region on an upper surface side of the first conductive region of the semiconductor substrate; a second conductive region below the first conductive region on the upper surface side of the first conductive region of the semiconductor substrate. The solid-state imaging device further includes a photoelectric conversion region including the first conductive region located on the upper surface side of the first conductive region of the semiconductor substrate and the second conductive region and a transfer transistor transferring charges accumulated in the photoelectric conversion region to a readout region; and a pixel including the photoelectric conversion region and the transfer transistor. The first conductive region, which is included in the photoelectric conversion region, extends to the lower side of a sidewall of a gate electrode of the transfer transistor.
    Type: Application
    Filed: April 25, 2008
    Publication date: December 4, 2008
    Applicant: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 7459733
    Abstract: A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable through the cover dielectric layer; and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: December 2, 2008
    Assignee: Aptina Imaging Corporation
    Inventors: Chintamani Palsule, John H. Stanback, Thomas E. Dungan, Mark D. Crook
  • Patent number: 7459360
    Abstract: A method of forming a pixel sensor cell structure. The method of forming the pixel cell comprises forming a doped layer adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: December 2, 2008
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Andres Bryant, John Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe, Jerome B. Lasky, Richard A. Phelps
  • Patent number: 7456449
    Abstract: A semiconductor apparatus has a substrate to which is attached a thin semiconductor film including at least one semiconductor device. An interconnecting line links the semiconductor film with electrical circuitry on the substrate. The interconnecting line includes a pad located on the substrate, between the thin semiconductor film and the electrical circuitry. The pad, which is wider than other parts of the interconnecting line, can be used as a probe pad for testing the apparatus, and in particular for testing the electrical circuitry on the substrate before the thin semiconductor film is attached.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: November 25, 2008
    Assignee: Oki Data Corporation
    Inventors: Hiroyuki Fujiwara, Takahito Suzuki, Susumu Chihara, Mitsuhiko Ogihara, Ichimatsu Abiko, Masaaki Sakuta
  • Patent number: 7449732
    Abstract: The substrate with electrodes is formed of a transparent material onto which is deposited a film (1) of a transparent conductive material of thickness e1 and of refractive index n1, said film being structured to form a set of electrodes (1a) whose contours (8) delimit insulating spaces (3), wherein the insulating spaces (3) are filled with a transparent dielectric material of thickness e2 and of refractive index n2 so that the respective thicknesses of the conductive material and the dielectric material are inversely proportional to the values of the refractive indices of said materials and said dielectric material forms neither depressions nor beads at the contour (8) of the electrodes. A hardcoating layer (7) may be disposed between the substrate (5) and the electrodes and a protective film (9) added. The substrate with electrodes is obtained by UV irradiation through a single mask.
    Type: Grant
    Filed: March 5, 2004
    Date of Patent: November 11, 2008
    Assignee: Asulab S.A.
    Inventors: Joachim Grupp, Gian-Carlo Poli, Pierre-Yves Baroni, Estelle Wagner, Patrik Hoffmann
  • Publication number: 20080272400
    Abstract: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
    Type: Application
    Filed: July 14, 2008
    Publication date: November 6, 2008
    Inventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan, Mark D. Jaffe, Jeffrey B. Johnson, Alain Loiseau
  • Publication number: 20080272399
    Abstract: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
    Type: Application
    Filed: July 14, 2008
    Publication date: November 6, 2008
    Inventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan, Mark D. Jaffe, Jeffrey B. Johnson, Alain Loiseau
  • Patent number: 7446353
    Abstract: A solid-state imaging apparatus includes a photoelectric conversion section generating a charge by photoelectric conversion; and a charge transfer section having first and second transfer electrodes arranged in parallel with each other in an output direction of a charge generated by the photoelectric conversion section and repeatedly transferring the charge between a semiconductor region underneath the first transfer electrode and a semiconductor region underneath the second transfer electrode obliquely to an array direction of the first and second transfer electrodes to output the charge.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: November 4, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Eiji Matsuyama
  • Publication number: 20080265288
    Abstract: An image sensor includes at least first and second photo-sensitive regions; a color filter array having at least two different colors that selectively absorb specific bands of wavelengths, and the two colors respectively span portions of predetermined photo-sensitive regions; and wherein the two photo sensitive regions are doped so that electrons that are released at two different depths in the substrate are collected in two separate regions of the photo sensitive regions so that, when wavelengths of light pass through the color filter array, light is absorbed by the photo sensitive regions which photo sensitive regions consequently releases electrons at two different depths of the photo sensitive regions and are stored in first and second separate regions; at least two charge-coupled devices adjacent the first photo sensitive regions; and a first transfer gate associated with the first photo sensitive region that selectively passes charge at first and second levels which, when at the first level, causes the
    Type: Application
    Filed: July 7, 2008
    Publication date: October 30, 2008
    Inventors: Joseph R. Summa, Herbert J. Erhardt
  • Patent number: 7442975
    Abstract: A CMOS image sensor and a method for fabricating the same prevent a lifting effect of microlenses. Also, a diffused reflection of microlenses is prevented. The CMOS image sensor includes photodiodes, an interlayer insulating layer, metal lines formed in the interlayer insulating layer to electrically connect the respective photodiodes with each other, an oxide layer, a passivation layer to protect the CMOS image sensor from external sources, and microlenses formed to pass through the passivation layer at portions corresponding to the photodiodes.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: October 28, 2008
    Assignee: Dongbu Electronics, Co., Ltd.
    Inventor: Chang Eun Lee
  • Patent number: 7439561
    Abstract: The present invention is a pixel sensor cell and method of making the same. The pixel sensor cell approximately doubles the available signal for a given quanta of light. The device of the present invention utilizes the holes produced by impinging photons in a pixel sensor cell circuit. A pixel sensor cell having reduced complexity includes an n-type collection well region formed beneath a surface of a substrate for collecting electrons generated by electromagnetic radiation impinging on the pixel sensor cell and a p-type collection well region formed beneath the surface of the substrate for collecting holes generated by the impinging photons. A circuit structure having a first input is coupled to the n-type collection well region and a second input is coupled to the p-type collection well region, wherein an output signal of the pixel sensor cell is the magnitude of the difference of a signal of the first input and a signal of the second input.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: October 21, 2008
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Andres Bryant, John J. Ellis-Monaghan, Mark D. Jaffe, Jeffrey B. Johnson, Alain Loiseau
  • Patent number: 7436038
    Abstract: A MOS or CMOS sensor for high performance imaging in broad spectral ranges including portions of the infrared spectral band. These broad spectral ranges may also include portions or all of the visible spectrum, therefore the sensor has both daylight and night vision capabilities. The sensor includes a continuous multi-layer photodiode structure on a many pixel MOS or CMOS readout array where the photodiode structure is chosen to include responses in the near infrared spectral ranges. A preferred embodiment incorporates a microcrystalline copper indium diselenide/cadmium sulfide photodiode structure on a CMOS readout array. An alternate preferred embodiment incorporates a microcrystalline silicon germanium photodiode structure on a CMOS readout array. Each of these embodiments provides night vision with image performance that greatly surpasses the GEN III night vision technology in terms of enhanced sensitivity, pixel size and pixel count.
    Type: Grant
    Filed: February 23, 2004
    Date of Patent: October 14, 2008
    Assignee: e-Phocus, Inc
    Inventors: Michael G. Engelmann, Calvin Chao, Tzu-Chiang Hsieh, Peter Martin, Milam Pender
  • Patent number: 7432576
    Abstract: A new grid metal design for image sensors is disclosed which is comprised of a semiconductor image sensor chip having a pixel region covering most of the chip and a logic circuit region on the chip periphery. The pixel region contains, an array of image pixels where for each image pixel the majority of its area is occupied by a light sensing element and the other image pixel circuit elements are arranged in the periphery of the image pixel without overlapping the image-sensing element. A number of metal levels are of the first type, at which functional metal patterns exist both for the chip peripheral logic circuits and for the pixel circuit elements. A number of metal levels are of the second type, at which functional metal patterns exist only for the chip peripheral logic circuits and dummy metal patterns cover the pixel region except for the light sensing elements.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: October 7, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Dun-Nian Yaung, Shou-Gwo Wuu, Chien-Hsien Tseng
  • Patent number: 7432536
    Abstract: A method is disclosed for attaching a bonding pad to the ohmic contact of a diode while reducing the complexity of the photolithography steps. The method includes the steps of forming a blanket passivation layer over the epitaxial layers and ohmic contacts of a diode, depositing a photoresist layer over the blanket passivation layer, opening a via through the photoresist above the ohmic contacts and on the blanket passivation layer, removing the portion of the blanket passivation layer defined by the via to expose the surface of the ohmic contact, depositing a metal layer on the remaining photoresist, and on the exposed portion of the ohmic contact defined by the via, and removing the remaining photoresist to thereby concurrently remove any metal on the photoresist and to thereby establish a metal bond pad on the ohmic contact in the via.
    Type: Grant
    Filed: November 24, 2004
    Date of Patent: October 7, 2008
    Assignee: Cree, Inc.
    Inventor: David Beardsley Slater, Jr.
  • Patent number: 7432543
    Abstract: An active pixel using a pinned photodiode with a pinning layer formed from indium is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N? region formed within a P-type region. A pinning layer formed from indium is then formed at the surface of the N? region. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: October 7, 2008
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes
  • Publication number: 20080237653
    Abstract: A CMOS image sensor includes a pinned photodiode and a transfer gate that are formed using a thick mask that is self-aligned to at least one edge of the polysilicon gate structure to facilitate both the formation of a deep implant and to provide proper alignment between the photodiode implant and the gate. In one embodiment a drain side implant is formed concurrently with the deep n-type implant of the photodiode. After the deep implant, the mask is removed and a shallow p+ implant is formed to complete the photodiode. In another embodiment, the polysilicon is etched to define only a drain side edge, a shallow drain side implant is performed, and then a thick mask is provided and used to complete the gate structure, and is retained during the subsequent high energy implant. Alternatively, the high energy implant is performed prior to the shallow drain side implant.
    Type: Application
    Filed: March 26, 2007
    Publication date: October 2, 2008
    Applicant: Tower Semiconductor Ltd.
    Inventors: Clifford Ian Drowley, David Cohen, Assaf Lahav, Shai Kfir, Naor Inbar, Anatoly Sergienko, Vladimir Korobov
  • Publication number: 20080217661
    Abstract: A two dimensional time delay integration CMOS image sensor having a plurality of pinned photodiodes, each pinned photodiode collects a charge when light strikes the pinned photodiode, a plurality of electrodes separating the plurality of pinned photodiodes, the plurality of electrodes are configured for two dimensional charge transport between two adjacent pinned photodiodes, and a plurality of readout nodes connected to the plurality of pinned photodiodes via address lines.
    Type: Application
    Filed: March 8, 2007
    Publication date: September 11, 2008
    Applicant: Teledyne Licensing, LLC
    Inventor: Stefan Lauxtermann
  • Patent number: 7423305
    Abstract: A solid-state image sensing device includes a plurality of pixels. Each pixel has a photodiode, a first transistor, and a second transistor. The photodiode is constituted by a first-conductivity-type semiconductor region and a second-conductivity-type semiconductor region. The first and second conductivity types are opposite to each other. The first transistor has a first-conductivity-type drain region formed in the second-conductivity-type semiconductor region to transfer signal charge to the drain region. The second transistor has a source region and a drain region which are formed in the second-conductivity-type semiconductor region and which have the first conductivity type. At least one second-conductivity-type potential barrier is provided under the drain region of the first transistor and the source region and/or the drain region of the second transistor.
    Type: Grant
    Filed: December 27, 2005
    Date of Patent: September 9, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mahito Shinohara, Shunsuke Inoue
  • Patent number: 7422924
    Abstract: The invention provides a photodiode with an increased charge collection area, laterally spaced from an adjacent isolation region. Dopant ions of a first conductivity type with a first impurity concentration form a region surrounding at least part of the isolation region. These dopant ions are further surrounded by dopant ions of the first conductivity type with a second impurity concentration. The resulting isolation region structure increases the capacitance of the photodiode by allowing the photodiode to possess a greater charge collection region while suppressing the generation of dark current.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: September 9, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7423302
    Abstract: A pixel image sensor has a high shutter rejection ratio that prevents substrate charge leakage to a floating diffusion storage node of the pixel image sensor and prevents generation of photoelectrons within the floating diffusion storage node and storage node control transistor switches of the pixel image sensor. The pixel image sensor that prevents substrate charge leakage of photoelectrons from pixel image sensor adjacent to the pixel image sensor. The pixel image sensor is fabricated on a substrate with an isolation barrier and a carrier conduction well. The isolation barrier formed underneath the floating diffusion storage node allows effective isolation by draining away the stray carriers and preventing them from reaching the floating diffusion storage node. The carrier conduction well in combination with the deep N-well isolation barrier separates the pinned photodiode region from the deep N-well isolation barrier that is underneath the floating diffusion storage node.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: September 9, 2008
    Assignee: Digital Imaging Systems GmbH
    Inventors: Taner Dosluoglu, Guang Yang
  • Publication number: 20080210985
    Abstract: A solid-state imaging device, includes: a substrate where a region of a first conductivity type is formed on at least a portion of a surface thereof; a region of a second conductivity type formed on at least a portion of a surface of the region of the first conductivity type; a multilayer wiring layer formed on the substrate; and a layer of the second conductivity type formed directly above the region of the second conductivity type in the multilayer wiring layer, connected to the region of the second conductivity type. A concentration of impurities in the layer of the second conductivity type is lower with decreasing proximity to the region of the second conductivity type.
    Type: Application
    Filed: July 16, 2007
    Publication date: September 4, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Masaaki Ogawa, Takashi Doi, Toshihiko Kitamura
  • Patent number: 7420236
    Abstract: A photoelectric conversion device is provided which is capable of improving the light condensation efficiency without substantially decreasing the sensitivity. The photoelectric conversion device has a first pattern provided above an element isolation region formed between adjacent two photoelectric conversion elements, a second pattern provided above the element isolation region and above the first pattern, and microlenses provided above the photoelectric conversion elements with the first and the second patterns provided therebetween. The photoelectric conversion device further has convex-shaped interlayer lenses in optical paths between the photoelectric conversion elements and the microlenses, the peak of each convex shape projecting in the direction from the electro-optical element to the microlens.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: September 2, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventor: Sakae Hashimoto
  • Patent number: 7420231
    Abstract: A proper incident state can be obtained in each pixel in accordance with a distance between an optical system and a sensor photoreceptive portion, and improved photoreceptive efficiency and even sensitivity of pixels can be attempted. Since a main light beam a launches on pixels in a screen peripheral part at an angle of incidence ?, a microlens (260), color filter (250), wires (220, 230 and 240), photodiode (110) and so on are disposed along the direction of incidence in accordance with the angle of incidence ? in a positional relationship. The angle of incidence ? here is determined in consideration of a distance from the microlens (260) to the surface of the silicon substrate (100) and a position in depth of the photoelectric converting portion of the photodiode (110) from the surface of the silicon substrate (100). The photoelectric converting portion (n-type region) of the photodiode (110) tilts in a pixel in the screen peripheral part in accordance with the angle of incidence ?.
    Type: Grant
    Filed: September 18, 2003
    Date of Patent: September 2, 2008
    Assignee: Sony Corporation
    Inventor: Yasushi Maruyama
  • Patent number: 7417272
    Abstract: Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one semiconductor channel region, at least one gate for controlling the channel region, and first and second leads respectively coupled to a source region on one side of the at least one channel region and a drain region on an opposite side of the at least one channel region. The transistor structure has at least two threshold voltages associated with the at least one channel region, and an I-V characteristic of the transistor structure is determined at least in part by the threshold voltages.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: August 26, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7414276
    Abstract: A solid-state image pickup device includes a semiconductor substrate, a photosensitive pixel which converts incident light on the semiconductor substrate into a signal charge, and a charge detection section which converts the converted signal charge into an output signal. The device further includes a charge transfer section which is disposed between the photosensitive pixel and the charge detection section and which temporarily stores the signal charge and which transfers the stored signal charge to the charge detection section by application of sequential pulses.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: August 19, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Makoto Monoi
  • Patent number: 7411229
    Abstract: A semiconductor device includes a transfer channel for transferring charge generated by photoelectric conversion, an insulating film formed on the transfer channel, and a transfer electrode for applying a transfer voltage to the transfer channel via the insulating film. The insulating film has a first thickness and a second thickness that is thinner than the first thickness. The insulating film has the first thickness below both ends of the transfer electrode in a width direction of the transfer channel that is orthogonal to a charge transfer direction through the transfer channel, and the insulating film has the second thickness on a part including a center of the transfer channel in the width direction.
    Type: Grant
    Filed: April 20, 2006
    Date of Patent: August 12, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Hiroshi Tanaka
  • Patent number: 7411276
    Abstract: A photosensitive device having at least an insulator layer including a plurality of photoreceiving regions disposed on a substrate. A plurality of conductive patterns is disposed on the insulator layer without covering the photoreceiving regions. A flattened dielectric layer is disposed on the conductive patterns and the insulator layer, wherein a surface of the dielectric layer is higher than a surface of the conductive patterns in a range between 2000 ? to 4000 ?.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: August 12, 2008
    Assignee: Powerchip Semiconductor Corp.
    Inventors: Ming-Jeng Huang, Chen-Chiu Hsue
  • Patent number: 7408210
    Abstract: An object of the present invention is to simultaneously realize the enlargement of a dynamic range and the downsizing of a pixel. An additional capacitor CS is composed by using: a first capacitor formed of a first diffusion layer, a second diffusion layer and a P well by layering the P well, the first diffusion layer, a first dielectric film, a first polysilicon layer, a second dielectric film and a second polysilicon layer; a second capacitor formed of the second diffusion layer, the first polysilicon layer and the first dielectric film; and a third capacitor formed of the first polysilicon layers, a second polysilicon layer, and a second dielectric film. Thereby, the additional capacitor CS for accumulating carriers overflown from a photodiode PD can secure a required capacitance value while making its size as small as possible.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: August 5, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanori Ogura, Toru Koizumi, Akira Okita, Tetsuya Itano, Shin Kikuchi
  • Publication number: 20080173905
    Abstract: A solid state imaging device comprises: a photoelectric converting portion provided on a semiconductor substrate; a charge transfer path, formed in an adjacent position to the photoelectric converting portion, that receives a signal charge generated in the photoelectric converting portion and transfers the signal charge in a predetermined direction; and a gate electrode that transfers the signal charge from the photoelectric converting portion to the charge transfer path, wherein the gate electrode comprises polysilicon having a different conductive type from that of a semiconductor region forming a charge storing portion of the charge transfer path.
    Type: Application
    Filed: December 7, 2007
    Publication date: July 24, 2008
    Inventors: Masanori NAGASE, Jiro Matsuda, Tsuneo Sasamoto, Toshiaki Hayakawa
  • Publication number: 20080173904
    Abstract: A CMOS image sensor with a bonding pad comprises a semiconductor substrate having a pixel region and a circuit region; a passivation layer having an opening over the semiconductor substrate; and a bonding pad in circuit region, the bonding pad without extending to an upper surface of the passivation layer.
    Type: Application
    Filed: January 22, 2007
    Publication date: July 24, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Ming-Chyi Liu, Shih-Chi Fu, Yuan-Hung Liu, Wei-Chih Chen, Chi-Hsin Lo
  • Patent number: 7400022
    Abstract: A photoreceiver cell with separation of color components of light incident to its surface, formed in a silicon substrate of the conductivity of the first type with an ohmic contact and comprising: the first, second and third regions, which have mutual positioning and configuration, which provide formation of the first and the second channels for diffusion of the secondary charge carriers generated in the substrate regions located under the first and the second potential barriers to the first and the third p-n junctions respectively; in this case, the length of the channels does not exceed the diffusion length of the secondary charge carriers. A technical result of the present invention is an increase in spatial resolution of the projected image and its dynamic range. Another technical result of the present invention is a decrease in the photo-cell area. A photoreceiver cell with color separation may find broad application in multielement photoreceivers for video cameras and digital cameras.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: July 15, 2008
    Assignee: Unique IC's
    Inventors: Yuriy Ivanovitch Tishin, Victor Alexandrovitch Gergel, Vladimir Alexandrovitch Zimoglyad, Igor Valerievitch Vanushin, Andrey Vladimirovitch Lependin
  • Patent number: 7397076
    Abstract: Disclosed are a CMOS image sensor and a fabrication method thereof, which is adequate to reduce dark current. The CMOS image sensor comprises a device isolation region and an active region, which are formed on a semiconductor substrate; a photocharge generating portion formed on the active region for absorbing light externally and generating and accumulating charges; a transistor portion including at least one transistor for processing the charges accumulated in the photocharge generating portion; and a control terminal for preventing dark current from being introduced into the photocharge generating portion, and ejecting the dark current after temporally storing the dark current. The control terminal is operated to store the dark current for an integration time when a photodiode as the photocharge generating portion receives light, and eject the stored dark current by being grounded when the reset transistor is turned on.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: July 8, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Hoon Jang
  • Patent number: 7397086
    Abstract: A thin-film transistor, such as a top-gate thin-film transistor, is provided herein. The thin-film transistor has a performance-enhancing layer, such as a performance-enhancing bottom layer, comprising a polymer other than a polyimide. In specific embodiments, the polymer is selected from the group consisting of polysiloxane, polysilsesquioxane, and mixtures thereof. In other embodiments, it is a self-assembling polymeric monolayer of a silane agent and an organophosphonic acid. The performance-enhancing layer directly contacts the substrate. The layer improves the carrier mobility and current on/off ratio of the thin film transistor.
    Type: Grant
    Filed: December 23, 2005
    Date of Patent: July 8, 2008
    Assignee: Xerox Corporation
    Inventors: Yiliang Wu, Beng S. Ong, Paul F. Smith
  • Publication number: 20080150071
    Abstract: In a photodiode formed by a region of a first type inside a region of a second type, of a semiconductor substrate, the region of the first type includes a first zone including a dopant of the first type having a first concentration and a first depth. The region of the first type also has a second zone adjacent to the first zone in the dopant of the first type has a second concentration higher than the first concentration and a second depth smaller than the first depth. A method for making such a diode is also disclosed.
    Type: Application
    Filed: December 24, 2007
    Publication date: June 26, 2008
    Applicant: STMICROELECTRONICS S.A.
    Inventor: FRANCOIS ROY
  • Publication number: 20080135884
    Abstract: A solid-state imaging device is provided and includes a photoelectric conversion unit and a charge transfer unit including charge transfer electrodes for transferring charges generated in the photoelectric conversion unit. Each of the charge transfer electrodes includes a first electrode of a first layer conductive film and a second electrode of a second layer conductive film, which are alternately arranged. The upper edge of the first electrode is protected by a canopy-shaped upper insulating film to ensure a distance between the first and second electrodes. In addition, the first and second electrodes are insulated from each other by an inter-electrode insulating film of a side wall insulating film formed by CVD so as to cover the side wall of the first electrode.
    Type: Application
    Filed: November 14, 2007
    Publication date: June 12, 2008
    Inventor: Hideki KORIYAMA
  • Patent number: 7382009
    Abstract: To provide an amplification type solid state image pickup device enabling lower noise, higher gain, and higher sensitivity than any conventional amplification type solid state image pickup device.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: June 3, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mahito Shinohara