Sensors Not Overlaid By Electrode (e.g., Photodiodes) Patents (Class 257/233)
  • Patent number: 7382003
    Abstract: A solid-state image pick-up unit comprises: a semiconductor substrate comprising an area in which a photoelectric converting portion is formed; and an electric charge transfer portion that transfers an electric charge formed by the photoelectric converting portion, wherein the electric charge transfer portion comprises: an electric charge transfer electrode including a first layer electrode and a second layer electrode; and a gate oxide film, the gate oxide film comprises a second gate oxide film formed under the second layer electrode, the second gate oxide film comprising an ONO film which comprises a SiO film, a SiN film and a SiO film in this order, and the second gate oxide film is continuously formed to cover whole of a region between the first layer electrode and the second layer electrode and a region under the second layer electrode.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: June 3, 2008
    Assignee: Fujifilm Corporation
    Inventor: Ryoichi Homma
  • Patent number: 7382002
    Abstract: An apparatus comprising at least one multilayer wafer includes a device layer adjacent to a barrier layer, and the device layer includes at least two photoconductive regions separated by an etched channel extending through the device layer. In some instances the apparatus may be an accelerometer having two photodiodes formed on a silicon-on-insulator (SOI) wafer with the photodiodes defined by one or more etched channels extending through the device layer of the SOI wafer. Also disclosed are methods for forming such an apparatus.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: June 3, 2008
    Assignee: Litton Systems, Inc.
    Inventor: Henry C. Abbink
  • Patent number: 7378691
    Abstract: A solid-state image sensor capable of suppressing blooming and increase of a dark current also when an n-type impurity concentration in a transfer channel region is increased is obtained. In this solid-state image sensor, gate electrodes of a prescribed pixel and another pixel adjacent to the prescribed pixel are provided at a first space, and a larger quantity of second conductivity type impurity is introduced into a region of a first conductivity type transfer channel region, located on the main surface of a substrate, corresponding to the first space as compared with a second conductivity type impurity contained in the remaining region of the transfer channel region other than the region corresponding to the first space.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: May 27, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Tatsurou Geshi, Mamoru Arimoto
  • Publication number: 20080099793
    Abstract: Various embodiments of the present invention are directed to a photodiode module including a structure configured to selectively couple light to a dielectric-surface mode of a photonic crystal of the photodiode module. In one embodiment of the present invention, a photodiode module includes a semiconductor structure having a p-region and an n-region. The photodiode module further includes a photonic crystal having a surface positioned adjacent to the semiconductor structure. A diffraction grating of the photodiode module may be positioned and configured to selectively couple light incident on the diffraction grating to a dielectric-surface mode associated with the surface of the photonic crystal. In another embodiment of the present invention, a photodiode apparatus includes multiple, stacked photodiode modules, each of which is configured to selectively absorb light at a selected wavelength or range of wavelengths.
    Type: Application
    Filed: January 17, 2007
    Publication date: May 1, 2008
    Inventors: David Fattal, Jason Blackstock, Duncan Stewart
  • Publication number: 20080087922
    Abstract: An image sensor comprises a substrate of a first conductivity type. First and second pixels are arrayed over the substrate. A potential barrier is formed in a region of the substrate corresponding to the first pixel but not in a region of the substrate corresponding to the second pixel. The second pixel is responsive to a color having a wavelength longer than the color to which the first pixel is responsive. The potential barrier is doped with dopants by a high energy ion implantation dopants or by an ion implantation or diffusion during epitaxial growth of the P-type epitaxial layer.
    Type: Application
    Filed: March 29, 2007
    Publication date: April 17, 2008
    Inventor: Jaroslav Hynecek
  • Patent number: 7355268
    Abstract: An optical device having a high reflector tunable stress coating includes a micro-electromechanical system (MEMS) platform, a mirror disposed on the MEMS platform, and a multiple layer coating disposed on the mirror. The multiple layer coating includes a layer of silver (Ag), a layer of silicon dioxide (SiO2) deposited on the layer of Ag, a layer of intrinsic silicon (Si) deposited on the layer of SiO2, and a layer of silicon oxynitride (SiOxNy) deposited on the layer of Si. The concentration of nitrogen is increased and/or decreased to tune the stress (e.g., tensile, none, compressive).
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: April 8, 2008
    Assignee: Intel Corporation
    Inventor: Michael Goldstein
  • Patent number: 7355227
    Abstract: A matrix of detection pixels and a photoelectric detector that includes a matrix of detection pixels and a reading circuit of loads detected by the detection pixels of the matrix. A detection pixel includes a photosensitive semi-conductor area with a first face covered with a first electrode and a second face located opposite the first face and covered with a second electrode. The first electrode includes a metal pattern that can collect the electrical loads generated by the detection pixel. The matrix can be applied, for example, to the creation of sensors used in scanners and photographic apparatuses or digital cameras or biosensors.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: April 8, 2008
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Cyril Guedj, Norbert Moussy
  • Patent number: 7355222
    Abstract: The invention relates to an imaging device having a pixel cell with a transparent conductive material interconnect line for focusing incident light onto a photosensor and providing an electrical connection to pixel circuitry, and the method of making the same.
    Type: Grant
    Filed: May 19, 2005
    Date of Patent: April 8, 2008
    Assignee: Micron Technology, Inc.
    Inventor: David Wells
  • Patent number: 7355228
    Abstract: An active pixel using a photodiode with multiple species of N type dopants is disclosed. The pixel comprises a photodiode formed in a semiconductor substrate. The photodiode is an N? region formed within a P-type region. The N? region is formed from an implant of arsenic and an implant of phosphorus. Further, the pixel includes a transfer transistor formed between the photodiode and a floating node and selectively operative to transfer a signal from the photodiode to the floating node. Finally, the pixel includes an amplification transistor controlled by the floating node.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: April 8, 2008
    Assignee: OmniVision Technologies, Inc.
    Inventor: Howard E. Rhodes
  • Patent number: 7352028
    Abstract: A solid-state imaging device includes: a substrate; a photoelectric transducer that is provided within the substrate and generates light-generated charge in accordance with incident light; a floating diffusion that retains the light-generated charge generated from the photoelectric transducer; a transfer and retention unit that is provided between the photoelectric transducer and the floating diffusion for a purpose of controlling a transfer of the light-generated charge and has a charge-retaining region that can retain the light-generated charge generated from the photoelectric transducer; a reset unit that initializes a potential of the floating diffusion; an amplifying transistor that generates an output based on a potential of the floating diffusion; a selection transistor that selectively outputs an output of the amplifying transistor; and an excessive charge-discharging unit that discharges excessive electric charge generated from the photoelectric transducer.
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: April 1, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Kazunobu Kuwazawa
  • Patent number: 7352020
    Abstract: The present invention aims to provide a solid-state imaging apparatus that realizes less leakage current, high image quality and low noise during the driving operation, and manufacturing method for the same. A MOS type imaging apparatus 1 includes an imaging region 10 and a driving region 20 both formed on a p-type silicon substrate (hereinafter called an “Si substrate”) 31. The imaging region 10 includes six pixels 11 to 16 disposed in a shape of a matrix having 2 rows and 3 columns. The driving region 20 includes a timing generation circuit 21, a vertical shift resistor 22, a horizontal shift resistor 23, a pixel selection circuit 24, and so on. All transistors included in the pixels 11 to 16 in the imaging region and the circuits 21 to 24 in the driving circuit region 20 are of n-channel MOS type.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: April 1, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Takumi Yamaguchi
  • Patent number: 7329557
    Abstract: A solid-state imaging device includes: a plurality of N-type photodiode regions formed inside a P-type well; a gate electrode having one edge being positioned adjacent to each of the photodiode regions; a N-type drain region positioned adjacent to the other edge of the gate electrode; an element-isolating portion having a STI structure, and a gate oxide film having a thickness of not more than 10 nm. One edge of the gate electrode overlaps the photodiode region.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: February 12, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ken Mimuro, Mikiya Uchida, Mototaka Ochi
  • Publication number: 20080029787
    Abstract: A photoelectric conversion apparatus includes a plurality of photoelectric conversion elements configured to convert incident light to electric carriers, an amplifier MOS transistor shared by the plurality of photoelectric conversion elements, a plurality of floating diffusions connected to the gate electrode of the amplifier MOS transistor, and a plurality of transfer MOS transistors arranged corresponding to the respective photoelectric conversion elements, each of the transfer MOS transistors transferring electric carriers from corresponding one of the photoelectric conversion elements to corresponding one of the floating diffusions. In such a photoelectric conversion apparatus, at least two of the floating diffusions are electrically connected to each other with a wiring line included in the same wiring layer as the gate electrode of the amplifier MOS transistor.
    Type: Application
    Filed: July 11, 2007
    Publication date: February 7, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Takanori Watanabe, Masaaki Iwane, Yukihiro Kuroda, Masahiro Kobayashi
  • Patent number: 7323731
    Abstract: A photoelectric conversion device comprising a semiconductor substrate of a first conduction type, and a photoelectric conversion element having an impurity region of the first conduction type and a plurality of impurity regions of a second conduction type opposite to the first conduction type. The plurality of second-conduction-type impurity regions include at least a first impurity region, a second impurity region provided between the first impurity region and a surface of the substrate, and a third impurity region provided between the second impurity region and the surface of the substrate. A concentration C1 corresponding to a peak of the impurity concentration in the first impurity region, a concentration C2 corresponding to a peak of the impurity concentration in the second impurity region and a concentration C3 corresponding to a peak of the impurity concentration in the third impurity region satisfy the following relationship: C2<C3<C1.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: January 29, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroshi Yuzurihara, Ryuichi Mishima, Takanori Watanabe, Takeshi Ichikawa, Seiichi Tamura
  • Publication number: 20080017893
    Abstract: An image sensor including a P-type doped layer of a semiconductor material including first and second opposite surfaces; and at least one photodiode formed in the layer on the side of the first surface and intended to be lit through the second surface. The dopant concentration in the layer increases from the first surface to the second surface.
    Type: Application
    Filed: June 29, 2007
    Publication date: January 24, 2008
    Applicant: STMicroelectronics S.A.
    Inventors: Yvon Cazaux, Francois Roy
  • Patent number: 7321141
    Abstract: A semiconductor substrate is provided on which a plurality of shallow trench isolations (STI) defining a plurality of active areas are formed. The active areas comprise a photo sensing region, and a plurality of photodiodes are formed in each photo sensing region. Then a local oxidation of silicon isolation (LOCOS) layer is formed by performing a LOCOS process. Thereafter a plurality of gates are respectively formed in each active area, where the gates partially overlap the LOCOS layer. Finally doped regions are formed in the semiconductor substrate where the gate does not cover the LOCOS layer.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: January 22, 2008
    Assignee: United Microelectronics Corp.
    Inventor: Jhy-Jyi Sze
  • Publication number: 20080001181
    Abstract: Metal-Semiconductor-Metal (“MSM”) photodetectors and methods to fabricate thereof are described. The MSM photodetector includes a thin heavily doped (“delta doped”) regions deposited at an interface between metal contacts and a semiconductor layer to reduce a dark current of the MSM photodetector. Band engineering at the metal-semiconductor interfaces using complementarily delta doped semiconductor regions to fix two different interface workfunctions. Delta doping the grounded contact interface with p+ and the reverse biased interface with n+ enhances the Schottky barrier faced by both electrons and holes at the point of injection from source contact into the channel and at the point of collection from the channel into the drain contact.
    Type: Application
    Filed: June 28, 2006
    Publication date: January 3, 2008
    Inventors: Titash Rakshit, Miriam Reshotko
  • Publication number: 20070296844
    Abstract: The solid-state imaging device in the present invention is a solid-state imaging device that includes plural pixel cells arranged on a semi-conductor substrate, and a driving unit installed on the semi-conductor substrate in order to drive each pixel cell, wherein each pixel cell includes: a photodiode which converts incident light into a signal charge; a transfer transistor which transfers the signal charge of the photodiode to a floating diffusion unit; the floating diffusion unit accumulates the transferred signal charge; and a control implantation layer which is positioned under a gate of the transfer transistor, and becomes a charge transfer path when the charge is transferred from the photodiode to the control implementation layer, wherein an impurity concentration of the control implantation layer is denser toward the bottom of the substrate than toward the surface of the semi-conductor substrate.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 27, 2007
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Syouzi TANAKA
  • Patent number: 7309884
    Abstract: A semiconductor light receiving device is disclosed which is capable of receiving a first wavelength band light beam and a second wavelength band light beam having a shorter wavelength than that of the first wavelength band light beam. The device has a light absorbing layer of a first conductivity type formed on a semiconductor surface region of the semiconductor substrate the light absorbing layer absorbs the first and second wavelength band light beams. A cap layer of the first conductivity type is formed on the light absorbing layer. In the cap layer, a region of a second conductivity type is formed which transmits the second wavelength band light beam. A light collecting layer is formed on the semiconductor surface region and adjacently to the cap layer and the light absorbing layer. The light collecting layer has a convex shape with curvature to collect the second wavelength band light beam.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: December 18, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hajime Suhara
  • Patent number: 7307327
    Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.
    Type: Grant
    Filed: August 4, 2005
    Date of Patent: December 11, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sandeep R. Bahl, Frederick P. LaMaster, David W. Bigelow
  • Patent number: 7307297
    Abstract: In an organic photodiode, in a gap between a transparent anode formed on a glass substrate, and a reflection cathode formed oppositely thereto, a plurality of light receiving parts as layers of light absorbing composition, and partition walls for insulating between transparent anode and reflection cathode and insulating between adjacent light receiving parts are formed. Partition walls are formed by applying an ink solution to transparent anode and an insulating layer covering its periphery, dissolving the insulating layer by an organic solvent contained in the ink solution, and forming a plurality of dissolved holes contacting with transparent anode. The plurality of light receiving parts are formed by filling the plurality of dissolved holes with the light absorbing composition contained in the ink solution.
    Type: Grant
    Filed: August 30, 2005
    Date of Patent: December 11, 2007
    Assignees: Japan Science and Technology Agency, National University Corporation Toyama University, Brother Kogyo Kabushiki Kaisha
    Inventors: Hiroyuki Okada, Shigeki Naka, Hiroyoshi Onnagawa, Takeshi Miyabayashi, Toyokazu Inoue
  • Publication number: 20070278534
    Abstract: The present invention is directed to novel front side illuminated, back side contact photodiodes and arrays thereof In one embodiment, the photodiode has a substrate with at least a first and a second side and a plurality of electrical contacts physically confined to the second side. The electrical contacts are in electrical communication with the first side through a doped region of a first type and a doped region of a second type, each of the regions substantially extending from the first side through to the second side. In another embodiment, the photodiode comprises a wafer with at least a first and a second side; and a plurality of electrical contacts physically confined to the second side, where the electrical contacts are in electrical communication with the first side through a diffusion of a p+ region through the wafer and a diffusion of an n+ region through the wafer.
    Type: Application
    Filed: June 5, 2006
    Publication date: December 6, 2007
    Inventors: Peter Steven Bui, Narayan Dass Taneja
  • Publication number: 20070278535
    Abstract: A CCD type solid-state imaging device includes: a photoelectric conversion element (n layer 2, p layer 3) formed in a semiconductor substrate 1; a charge transfer channel 5 that transfers electric charges generated in the photoelectric conversion element; a charge read region 6 that reads out the electric charges accumulated in the photoelectric conversion element into the charge transfer channel 5; and a charge read electrode 8 formed above the charge read region 6 with a gate insulating film 10 disposed therebetween. The charge read electrode 8 controls the reading out of the electric charges into the charge transfer channel 5. A gap is formed between the photoelectric conversion element and the charge read electrode 8 in plan view.
    Type: Application
    Filed: May 25, 2007
    Publication date: December 6, 2007
    Inventors: Taketo Watanabe, Masanori Nagase
  • Patent number: 7301188
    Abstract: An image sensor includes a substrate with an epitaxial layer deposited thereon, a plurality of photodiodes buried in the epitaxial layer, and a plurality of field oxide films interposed between the photodiodes for insulating the photodiodes. Each of the field oxide films includes a trench formed on the epitaxial layer, a first oxide layer deposited on an inside of the trench, a reflective layer deposited on the first oxide film for reflecting incident light to a side of the photodiode, and a second oxide layer formed on the reflective layer.
    Type: Grant
    Filed: June 8, 2005
    Date of Patent: November 27, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hwa-Yong Kang
  • Patent number: 7242043
    Abstract: Disclosed is an imaging device including a photodiode and floating diffusion region formed to be spaced from each other on a surface layer of a pixel region of a silicon (semiconductor) substrate, and a transfer gate having one of a concave and convex portions toward the floating diffusion region, the transfer gate being formed above the silicon substrate between the photodiode and the floating diffusion region by interposing a gate insulating film therebetween.
    Type: Grant
    Filed: June 15, 2004
    Date of Patent: July 10, 2007
    Assignee: Fujitsu Limited
    Inventor: Narumi Ohkawa
  • Publication number: 20070152291
    Abstract: Disclosed is a CMOS image sensor including a gate electrode of a finger type transfer transistor for controlling the saturation state of a floating diffusion region according to the luminance level (i.e. low luminance or high luminance). The CMOS image sensor includes first and second photodiode regions for generating electrons in response to incident light, and a transfer transistor positioned between the first and second photodiodes for receiving the generated electrons transferred from the first and/or second photodiode.
    Type: Application
    Filed: December 18, 2006
    Publication date: July 5, 2007
    Inventor: Keun Hyuk Lim
  • Patent number: 7238977
    Abstract: A pixel cell has controlled photosensor anti-blooming leakage by having dual pinned voltage regions, one of which is used to set the anti-blooming characteristics of the photosensor. Additional exemplary embodiments also employ an anti-blooming transistor in conjunction with the dual pinned photosensor. Other exemplary embodiments provide a pixel with two pinned voltage regions and two anti-blooming transistors. Methods of fabricating the exemplary pixel cells are also disclosed.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: July 3, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sungkwon C. Hong, Alex Krymski
  • Patent number: 7238562
    Abstract: A method for fabricating a CMOS image sensor is disclosed, to decrease a dark current, which includes the steps of forming a photodiode area in a semiconductor substrate; forming a plurality of gates including a first gate on the semiconductor substrate, wherein the first gate has one side aligned to the edge of the photodiode area; sequentially forming a first insulating layer and a second insulating layer on an entire surface of the semiconductor substrate; forming a first photoresist, wherein the firs photoresist is patterned so as to expose the upper side of the first gate and the other side of the gate being opposite to one side of the gate; forming a spacer at the other side of the first gate by dry-etching the second insulating layer in state of using the first photoresist as a mask, and forming a silicide blocking layer above the photodiode area; and removing the first photoresist.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: July 3, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: James Jang
  • Publication number: 20070145422
    Abstract: A CMOS image sensor and method of manufacturing same is provided. The CMOS image sensor can include: photodiodes formed on a semiconductor substrate for generating a charge according to an amount of incident light; a first planarization layer formed on the semiconductor substrate; a plurality of color filter layers formed on the first planarization layer, an upper surface of each of the color filter layers being curved; and a plurality of microlenses formed on the plurality of color filter layers.
    Type: Application
    Filed: December 15, 2006
    Publication date: June 28, 2007
    Inventor: Dong Bin Park
  • Patent number: 7235826
    Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: February 3, 2005
    Date of Patent: June 26, 2007
    Assignee: Sony Corporation
    Inventors: Takayuki Ezaki, Teruo Hirayama
  • Patent number: 7227208
    Abstract: The invention is to suppress a leak current in a photodiode and an unevenness in the leak currents. In a photoelectric converting device including a channel stop area of a higher concentration than in an element isolating insulation film formed between a photodiode, having an n-type semiconductor area formed in a p-type semiconductor, and an adjacent element, and in a p-type semiconductor layer formed under the element isolating insulation film, and a wiring layer formed in a part on the element isolating insulation film, the wiring layers on the element isolating insulation film adjacent to the photodiodes are unified in an effective area and a potential, and a p-type dark current reducing area of a higher concentration than in the channel stop area is provided in at least a part of an area opposed to the wiring layer across the element isolating insulation film.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: June 5, 2007
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masanori Ogura, Fumihiro Inui, Toru Koizumi, Seiichiro Sakai
  • Patent number: 7217967
    Abstract: A CMOS image sensor and a manufacturing method thereof are disclosed. The gates of the transistors are formed in an active region of a unit pixel, and at the same time, a passivation layer is formed on an edge portion of the active region of a photodiode to have the same laminate structure as the gates of the transistors. Impurities for a diffusion region of the photodiode are ion-implanted into the active region for the photodiode, after the laminate structure is formed. The passivation layer prevents the edge portion from being damaged by ion implantation at the boundary or interface between the photodiode diffusion region and an isolation layer, which reduces dark current and/or leakage current of the CMOS image sensor.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: May 15, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Chang Hun Han
  • Patent number: 7217953
    Abstract: A passive mechanism suppresses injection, into any active guard regions interposed between the edge of a photodiode array chip and the outer photodiode pixels or into the outer pixels themselves, of minority carrier current generated in the physically disrupted region at the edge of the semiconductor die created by cleaving, sawing or otherwise separating the chip from the remainder of the wafer on which the die was fabricated. A thin metallic layer covers all or part of the edge region, thereby creating a Schottky barrier. This barrier generates a depletion region in the adjacent semiconductor material. The depletion region inherently creates an energy band distribution which preferentially accelerates minority carriers generated or near the metal-semiconductor interface towards the metal, thereby suppressing collection of these carriers by any active regions of the guard structure or by the photodiode pixels.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: May 15, 2007
    Assignee: Digirad Corporation
    Inventor: Lars S. Carlson
  • Patent number: 7217968
    Abstract: A novel image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate, a gate comprising a dielectric layer and gate conductor formed on the dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. Part of the gate conductor bottom is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region.
    Type: Grant
    Filed: December 15, 2004
    Date of Patent: May 15, 2007
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, John Ellis-Monaghan, Mark D. Jaffe, Jerome B. Lasky
  • Patent number: 7214976
    Abstract: A solid-state imaging apparatus includes a plurality of photosensitive cells, and a driving unit provided for driving the plurality of photosensitive cells. Each photosensitive cell includes a photodiode formed to be exposed on a surface of a semiconductor substrate for the purpose of accumulating signal charge obtained by subjecting incident light to photoelectric conversion, a transfer transistor for transferring signal charge accumulated by the photodiode, a floating diffusion layer for temporarily accumulating signal charge transferred by the transfer transistor, and an amplifier transistor for amplifying signal charge temporarily accumulated in the floating diffusion layer. A source/drain diffusion layer provided in the amplifier transistor is covered with a salicide layer, and the floating diffusion layer is formed to be exposed on a surface of the semiconductor substrate.
    Type: Grant
    Filed: March 25, 2004
    Date of Patent: May 8, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mikiya Uchida, Yoshiyuki Matsunaga, Makoto Inagaki
  • Patent number: 7208783
    Abstract: A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable though the cover dielectric layer; and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: April 24, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chintamani Palsule, John H. Stanback, Thomas E. Dungan, Mark D. Crook
  • Patent number: 7205591
    Abstract: A pixel sensor cell structure and method of manufacture. The pixel cell comprises a doped layer formed adjacent to a first side of a transfer gate structure for coupling a collection well region and a channel region. Potential barrier interference to charge transfer caused by a pinning layer is reduced.
    Type: Grant
    Filed: April 6, 2005
    Date of Patent: April 17, 2007
    Assignee: International Business Machines Corporation
    Inventors: James W. Adkisson, Andres Bryant, John Ellis-Monaghan, Jeffrey P. Gambino, Mark D. Jaffe, Jerome B Lasky, Richard A. Phelps
  • Patent number: 7199410
    Abstract: An active pixel is described comprising a semiconductor substrate and a radiation sensitive source of carriers in the substrate, such as for instance, a photodiode. A non-carrier storing, carrier collecting region in the substrate is provided for attracting carriers from the source as they are generated. At least one doped or inverted region of a first conductivity is provided in or on the substrate for storing the carriers before read-out. At least one non-carrier storing, planar current flow, carrier transport pathway is provided from or through the carrier collecting region to the at least one doped or inverted region to transfer the carriers without intermediate storage to the read-out electronics.
    Type: Grant
    Filed: December 13, 2000
    Date of Patent: April 3, 2007
    Assignee: Cypress Semiconductor Corporation (Belgium) BVBA
    Inventor: Bart Dierickx
  • Patent number: 7195723
    Abstract: A colloidal solution and/or nanocomposite having enhanced energy transfer between thermal, electron, phonons, and photons energy states. The composition comprises a synergistic blend of electrides and alkalides within a medium that effectively alters the mean free path. The composition is optionally further enhanced through externally generated fields and made into energy conversion devices.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: March 27, 2007
    Inventor: Michael H. Gurin
  • Patent number: 7193258
    Abstract: In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, a resetting transistor is formed. In a pixel part, in a first active region, a photodiode and a transferring transistor are formed. In a second active region, an amplifying transistor is formed. The first and second active regions are respectively the same in shape in image pixel parts. The resetting transistor and the amplifying transistor are shared by the pixel parts.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: March 20, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kunihiko Hara, Hiroshi Kubo, Yasuyuki Endo, Masatoshi Kimura
  • Patent number: 7186611
    Abstract: A high-density Germanium (Ge)-on-Insulator (GOI) photodiode array and corresponding fabrication method are provided. The method includes: forming an array of pixel driver nMOST devices, each device having a gate connected to a row line in a first orientation, a first source/drain (S/D) region, and a second S/D region connected to Vdd; forming a P-I-N Ge diode for each pixel as follows: forming a n+ region; forming an intrinsic Ge region overlying the n+ region; forming a p+ junction in the intrinsic Ge; and, isolating the P-I-N Ge diodes; and, forming an Indium Tin oxide (ITO) column in a second orientation, about orthogonal to the first orientation, overlying the P-I-N Ge diodes.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: March 6, 2007
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Sheng Teng Hsu, Jong-Jan Lee, Jer-Shen Maa, Douglas J. Tweet
  • Patent number: 7180151
    Abstract: An image sensing device includes a gate dielectric layer formed on a substrate and a transfer gate formed on the gate dielectric layer. A masking layer is formed on the transfer gate, the masking layer having a width smaller than a width of the transfer gate, such that a portion of the transfer gate protrudes laterally from under the masking layer. A photodiode is formed in the substrate to be self-aligned with the masking layer and to extending laterally under the transfer gate, that is, to overlap the transfer gate. Because of the overlap of the photodiode with the transfer gate, offset between the photodiode and the transfer gate is eliminated, such that an image lag phenomenon is eliminated.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: February 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Young Hoon Park
  • Patent number: 7176507
    Abstract: A solid state image sensing device comprises a first semiconductor region of first conductivity type, a second semiconductor region of second conductivity type provided in the first semiconductor region, a third semiconductor region of second conductivity type provided in the first semiconductor region with a space from the second semiconductor region, a gate electrode provided on the first semiconductor region between the second semiconductor region and the third semiconductor region, a gate insulator layer interposed between the first semiconductor region and the gate electrode, and a fourth semiconductor region of second conductivity type provided below the second semiconductor region in the first semiconductor region.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: February 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hisanori Ihara
  • Patent number: 7173295
    Abstract: An improved photoconductive semiconductor switch comprises multiple-line optical triggering of multiple, high-current parallel filaments between the switch electrodes. The switch can also have a multi-gap, interdigitated electrode for the generation of additional parallel filaments. Multi-line triggering can increase the switch lifetime at high currents by increasing the number of current filaments and reducing the current density at the contact electrodes in a controlled manner. Furthermore, the improved switch can mitigate the degradation of switching conditions with increased number of firings of the switch.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: February 6, 2007
    Assignee: Sandia Corporation
    Inventors: Alan Mar, Fred J. Zutavern, Guillermo Loubriel
  • Patent number: 7161196
    Abstract: A photoelectric converter has a first semiconductor region having a first conductivity type, a pixel region for accumulating generated carriers, a second semiconductor region having a second conductivity type disposed within the first semiconductor region and inside the pixel region, an electrode region having the second conductivity type disposed on the second semiconductor region, and an oxide film disposed around the electrode region. A first aluminum wiring contacts the electrode region via a contact hole disposed in an intermediate insulating film for transforming a signal according to a quantity of the generated carriers accumulated in the pixel region. A second aluminum wiring encircles an outer periphery of the pixel region and is held at a predetermined constant potential. A transparent conductive film is disposed on the oxide film and inside the second semiconductor region and contacts the second aluminum wiring.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: January 9, 2007
    Assignee: Seiko Instruments Inc.
    Inventor: Satoshi Machida
  • Patent number: 7157759
    Abstract: A solid-state imaging device comprises: photoelectric converting regions, wherein each of the photoelectric converting regions includes first photoelectric converting regions and second photoelectric converting regions arranged in row and column directions; and microlenses each of which being formed above and covering each of the first photoelectric converting regions, wherein each of the second photoelectric converting regions is placed between ones of the microlenses covering adjacent ones of the first photoelectric converting regions, a length in a first direction with respect to an opening center of each of the second photoelectric converting regions is longer than a length in a second direction with respect to the same, and among directions of incidence in a plan view of light entering the second photoelectric converting regions, the microlenses blocks the light along the first direction by a highest degree and blocks the light along the second direction by a lowest degree, respectively.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: January 2, 2007
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Hirokazu Kobayashi
  • Patent number: 7154137
    Abstract: In a photodiode used in a pixel of an image sensor, the area of interface between an N-type region and a P-type region is increased, such as through the use of an interstitial P+-type region or an interstitial P-type region. By increasing the interface area, greater well capacity can be attained. Further, this also enhances depletion of the photodiode. By changing the shape of the N-type layer, an increase in the area of the interface between the P-type region and N-type layer can be attained. While the types of shapes used for the N-type layer are many, the present invention is directed towards a photodiode with an increased interface area between the P-type and N-type regions.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: December 26, 2006
    Assignee: OmniVision Technologies, Inc.
    Inventor: Hidetoshi Nozaki
  • Patent number: 7154549
    Abstract: Provided is a CCD image sensor wherein driving power and power consumption are reduced without increasing unusable regions. Photodiodes are arranged in a honeycomb form. Each vertical charge-transfer channel is made in such a manner that invasion portions, which invade spaces between the respective photoelectric transducers in photoelectric transducer columns positioned at both sides thereof, and non-invasion portions are alternately and continuously arranged, and the channel extends in the vertical direction to meander between the photodiodes arranged in the honeycomb form. Transfer electrodes extending in the horizontal direction to pass between the photodiodes are formed on the semiconductor substrate as monolayer electrodes. By making the transfer electrodes as the monolayer electrodes in this way, multi-layered poly-silicon electrode structure becomes unnecessary.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: December 26, 2006
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Makoto Shizukuishi
  • Patent number: 7148525
    Abstract: An imager device that has an isolation structure such that pinned photodiode characteristics are maintained without increasing doping levels. The invention provides an isolation structure to maintain pinned photodiode characteristics without increasing doping levels around the photodiode. By creating a substrate region surrounding the charge-collection region of the photodiode, the photodiode may be electrically isolated from the bulk substrate. This region fixes the depletion region so that it does not migrate toward the surface of the substrate or the STI region. By doing so, the region prevents charge from being depleted from the substrate and the accumulation region, reducing dark current.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: December 12, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Chandra Mouli
  • Patent number: 7145190
    Abstract: A photo sensor with pinned photodiode structure integrated with a trench isolation structure. The photo sensor includes a substrate of a first conductivity type, at least one trench in the substrate, at least one doped region of the first conductivity type, and at least one doped region of a second conductivity type. Each doped region of the first conductivity type is beneath a corresponding trench. Each doped region of the second conductivity type is sandwiched between the corresponding doped region and the substrate of the first conductivity type. No edge of any doped region of the first or second conductivity type extends to the trench corners. A method of fabricating the photo sensor is also provided.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: December 5, 2006
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Dun-Nian Yaung, Sou-Kuo Wu, Ho-Ching Chien, Chien-Hsien Tseng, Jeng-Shyan Lin