Light Responsive Or Combined With Light Responsive Device Patents (Class 257/257)
  • Patent number: 8853747
    Abstract: A package is made of a transparent substrate having an interferometric modulator and a back plate. A non-hermetic seal joins the back plate to the substrate to form a package, and a desiccant resides inside the package. A method of packaging an interferometric modulator includes providing a transparent substrate and manufacturing an interferometric modulator array on a backside of the substrate. A back plate includes a curved portion relative to the substrate. The curved portion is substantially throughout the back plate. The back plate is sealed to the backside of the substrate with a back seal in ambient conditions, thereby forming a package.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: October 7, 2014
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Lauren Palmateer, Brian J. Gally, William J. Cummings, Manish Kothari, Clarence Chui
  • Patent number: 8835197
    Abstract: The present invention provides an active matrix organic light-emitting diode and a manufacturing method thereof. The active matrix organic light-emitting diode includes an organic light-emitting diode body and a thin-film transistor electrically connected to the organic light-emitting diode body. The thin-film transistor is formed on a substrate and includes semiconductor layer formed on the substrate, a gate insulation layer formed on the semiconductor layer, a gate terminal formed on the gate insulation layer, a protection layer formed on the gate terminal, and a source terminal and a drain terminal formed on the protection layer. The light-emitting diode body includes an anode formed on the protection layer and electrically connected to the thin-film transistor, an organic light emission layer formed on the anode, and a cathode formed on the organic light emission layer. The organic light-emitting diode body is arranged to be positioned above the thin-film transistor in an alternate manner.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: September 16, 2014
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventor: Yuanchun Wu
  • Patent number: 8823127
    Abstract: A multijunction photovoltaic (PV) cell includes a bottom flexible substrate and a bottom metal layer located on the bottom flexible substrate. The multijunction photovoltaic cell also includes a semiconductor layer located on the bottom metal layer and a stack having a plurality of junctions located on the semiconductor layer, each of the plurality of junctions having a respective bandgap. The pluralities of junctions are ordered from the junction having the smallest bandgap being located on the substrate to the junction having the largest bandgap being located on top of the stack.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: September 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Norma Sosa Cortes, Keith E. Fogel, Devendra Sadana, Davood Shahrjerdi
  • Patent number: 8816357
    Abstract: An optical printer head has an array of lenses that project light emitted by an array of LEDs onto a charged photosensitive drum to form a latent image on the drum surface. A resin film adhered to the exposed surfaces of the lenses prevents chemical reaction between nitric acid, formed as a consequence of ozone produced during electric charging of the photosensitive drum, and alkali components on the surfaces of the lenses thereby preventing clouding of the lens surfaces and dimming of the projected light. The resin film has a thickness of 10 to 100 microns and may be formed of polyvinyl chloride, polyethylene terephthalate or polymethyl meta acrylate.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: August 26, 2014
    Assignee: Seiko I Infotech Inc.
    Inventors: Kazuya Utsugi, Toshikazu Suzuki
  • Patent number: 8809834
    Abstract: Apparatuses capable of and techniques for detecting long wavelength radiation are provided.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: August 19, 2014
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Patent number: 8802481
    Abstract: Apparatuses capable of and techniques for detecting the visible light spectrum are provided.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: August 12, 2014
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Patent number: 8797633
    Abstract: The present invention is directed to a display device assembly which comprises a display device and a luminance enhancement structure. The luminance enhancement structure is directly laminated onto an ITO layer with an adhesive. The assembly of the present invention provides improved performance of the luminance enhancement structure.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: August 5, 2014
    Assignee: SiPix Imaging, Inc.
    Inventors: Robert A. Sprague, Bryan Hans Chan, Craig Lin
  • Patent number: 8766330
    Abstract: Devices incorporating a single to a few-layer MoS2 channels in combination with optimized substrate, dielectric, contact and electrode materials and configurations thereof, exhibit light emission, photoelectric effect, and superconductivity, respectively.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: July 1, 2014
    Assignee: Georgetown University
    Inventors: Makarand Paranjape, Paola Barbara, Amy Liu, Marcio Fontana
  • Patent number: 8766306
    Abstract: A light emitting device and a method for manufacturing the light emitting device are disclosed. In one example, the light emitting device includes a transparent substrate, partially transparent an anode layer or layer assembly arranged on said substrate, a light emitting layer arranged on said anode layer, and a transparent cathode layer arranged on said light emitting layer, wherein said anode layer or layer assembly includes a first surface facing said transparent substrate and a second surface facing said light emitting layer and is positioned opposite to said first surface, said first surface includes a transparent conductive material, said second surface includes first and second domains, said first domains are conductive and non-transparent, said second domains are transparent and electrically isolating, and said first domains are in direct contact with said light emitting layer and are arranged to allow electrical contact between said first surface and said light emitting layer.
    Type: Grant
    Filed: June 15, 2011
    Date of Patent: July 1, 2014
    Assignee: Koninklijke Philips N.V.
    Inventors: Herbert Lifka, Sören Hartmann, Herbert Friedrich Boerner, Christoph Rickers
  • Patent number: 8691633
    Abstract: A semiconductor device is provided that includes a substrate, a static random access memory (SRAM) unit cell formed in the substrate, a first metal layer formed over the substrate the first metal layer providing local interconnection to the SRAM unit cell, a second metal layer formed over the first metal layer, the second metal layer including: a bit line and a complementary bit line each having a first thickness and a Vcc line disposed between the bit line and the complementary bit line, and a third metal layer formed over the second metal layer, the third metal layer including a word line having a second thickness greater than the first thickness.
    Type: Grant
    Filed: February 22, 2013
    Date of Patent: April 8, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jhon Jhy Liaw
  • Patent number: 8680586
    Abstract: A semiconductor light emitting device including: a substrate made of GaAs; and a semiconductor layer formed on the substrate, in which part of the substrate on a side opposite to the semiconductor layer is removed by etching so that the semiconductor light emitting device has a thickness of not more than 60 ?m.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: March 25, 2014
    Assignee: ROHM Co., Ltd.
    Inventors: Tadahiro Hosomi, Kentaro Mineshita
  • Patent number: 8674515
    Abstract: A structure of connecting at least two integrated circuits in a 3D arrangement by a metal-filled through silicon via which simultaneously connects a connection pad in a first integrated circuit and a connection pad in a second integrated circuit.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: March 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Mukta G. Farooq, Subramanian S. Iyer, Steven J. Koester, Huilong Zhu
  • Patent number: 8659110
    Abstract: A single-junction photovoltaic cell includes a doped layer comprising a dopant diffused into a semiconductor substrate; a patterned conducting layer formed on the doped layer; a semiconductor layer comprising the semiconductor substrate located on the doped layer on a surface of the doped layer opposite the patterned conducting layer; and an ohmic contact layer formed on the semiconductor layer.
    Type: Grant
    Filed: February 28, 2013
    Date of Patent: February 25, 2014
    Assignee: International Business Machines Corporation
    Inventors: Stephen W. Bedell, Keith E. Fogel, Devendra Sadana, Davood Shahrjerdi, Norma E. Sosa Cortes, Brent A. Wacaser
  • Patent number: 8648397
    Abstract: A switching element (a semiconductor device) (18) having a top gate electrode (21) and a bottom gate electrode (23) is provided with a silicon layer (a semiconductor layer) (SL) that is arranged between the top gate electrode (21) and the bottom gate electrode (a light-shielding film) (23) and that has a source region (24), a drain region (28), a channel region (26), and low-concentration impurity regions (25, 27). Furthermore, the bottom gate electrode (23) is arranged so as to overlap the channel region (26), a part of the low-concentration impurity region (25), which is adjacent to the source region (24), and a part of the low-concentration impurity region (27), which is adjacent to the drain region (28). The bottom gate electrode (23) is controlled so as to have a prescribed potential.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: February 11, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Seiji Kaneko, Hidehito Kitakado
  • Patent number: 8614756
    Abstract: An apparatus for acquiring an i-bit digital code by a first stage AD conversion and a j-bit digital code by a second stage AD conversion includes a comparing unit which compares a reference signal and an analog signal in the first stage AD conversion; and an amplifying unit for outputting an amplified residual signal acquired by amplifying a difference between the analog signal and an analog signal corresponding to the i-bit digital code. The comparing unit compares the amplified residual signal and the reference signal in the second stage AD conversion.
    Type: Grant
    Filed: March 15, 2012
    Date of Patent: December 24, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventor: Daisuke Yoshida
  • Patent number: 8610048
    Abstract: A method for producing a photosensitive integrated circuit including producing circuit control transistors, producing, above the control transistors, and between at least one upper electrode and at least one lower electrode, at least one photodiode, by amorphous silicon layers into which photons from incident electromagnetic radiation are absorbed, producing at least one passivation layer, between the lower electrode and the control transistors, and producing, between the control transistors and the external surface of the integrated circuit, a reflective layer capable of reflecting photons not absorbed by the amorphous silicon layers.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: December 17, 2013
    Assignee: STMicroelectronics S.A.
    Inventors: Jerome Alieu, Simon Guillaumet, Christophe Legendre, Hughes Leininger, Jean-Pierre Oddou, Marc Vincent
  • Patent number: 8598567
    Abstract: Photoconductive optoelectronic devices, such as photodetectors and photovoltaics, are provided. The devices are sensitized to a particular wavelength (or range of wavelengths) of electromagnetic radiation such that the devices provide increased performance efficiency (e.g., external quantum efficiency) at the wavelength. The devices include a photoconductive semiconductor layer spanning an electrode gap between two electrodes to provide a photoconductive electrical conduit. Abutting the semiconductor layer is a plurality of plasmonic nanoparticles. The improved efficiency of the devices results from wavelength-dependent plasmonic enhancement of device photosensitivity by the plasmonic nanoparticles.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: December 3, 2013
    Assignee: University of Washington through its Center for Commercialization
    Inventors: Ludan Huang, Lih Y. Lin
  • Patent number: 8587038
    Abstract: According to one embodiment, an electric component includes: a first insulating layer formed on a first wire; a second wire and a functional element formed on the first insulating layer; a second insulating layer formed on the first insulating layer; and a connection wire that connects the second wire and the first wire. In the connection wire, a first via, a second via, and an inter-via wire are integrally formed of the same material. The first via is formed in the second insulating layer. The second via is formed in the first and second insulating layers.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: November 19, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akihiro Kojima
  • Patent number: 8569766
    Abstract: Disclosed is an organic light-emitting display device including a transparent substrate which includes a display portion and a pad portion formed in a region around the display portion, a first semiconductor layer formed on the display portion, a second semiconductor layer formed on the pad portion, and a transparent electrode formed on each of the first the second semiconductor layers, where the first and second semiconductor layers include the same material.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: October 29, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sun Park, Chun-Gi You, June-Woo Lee
  • Patent number: 8569758
    Abstract: The present invention relates to a touching-type electronic paper and method for manufacturing the same. The touching-type electronic paper includes a TFT substrate and a transparent electrode substrate which are disposed as a cell. The transparent electrode substrate includes a common electrode, microcapsule electronic ink and light guiding poles as light transmitting passages, all of which are formed on a first substrate. The TFT substrate comprises displaying electrodes, first TFTs for driving the displaying electrodes, second TFTs for detecting lights transmitting through the light guiding poles and for producing level signals, and third TFTs for reading the level signals and sending the level signals to a back-end processing system, all of which are formed on a second substrate. The light guiding poles are opposite to the second TFTs respectively.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: October 29, 2013
    Assignee: Boe Technology Group Co., Ltd.
    Inventors: Zenghui Sun, Wenjie Hu, Zhuo Zhang, Gang Wang, Xibin Shao
  • Patent number: 8563978
    Abstract: A display device includes a substrate, a first conductive film pattern including a gate electrode and a first capacitor electrode on the substrate, a gate insulating layer pattern on the first conductive film pattern, a polycrystalline silicon film pattern including an active layer and a second capacitor electrode on the gate insulating layer pattern, an interlayer insulating layer on the polycrystalline silicon film pattern, a plurality of first contact holes through the gate insulating layer pattern and the interlayer insulating layer to expose a portion of the first conductive film pattern, a plurality of second contact holes through the interlayer insulating layer to expose a portion of the polycrystalline silicon film pattern, and a second conductive film pattern including a source electrode, a drain electrode, and a pixel electrode on the interlayer insulating layer.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: October 22, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Min-Chul Shin, Jong-Moo Huh, Bong-Ju Kim, Yun-Gyu Lee
  • Patent number: 8552475
    Abstract: One or more embodiments relate to a memory device, comprising: a memory element; and a FinFET select device including a fin, a gate line supported by the fin, and a contact element coupled between a surface of the fin and the memory element, the contact element being in direct contact with a top surface of the fin.
    Type: Grant
    Filed: November 16, 2011
    Date of Patent: October 8, 2013
    Assignee: Infineon Technologies AG
    Inventors: Ronald Kakoschke, Klaus Schruefer
  • Patent number: 8552470
    Abstract: A photovoltaic cell is provided as a composite unit together with elements of an integrated circuit on a common substrate. In a described embodiment, connections are established between a multiple photovoltaic cell portion and a circuitry portion of an integrated structure to enable self-powering of the circuitry portion by the multiple photovoltaic cell portion.
    Type: Grant
    Filed: August 29, 2011
    Date of Patent: October 8, 2013
    Assignee: Texas Instruments Incorporated
    Inventors: Yuanning Chen, Thomas Patrick Conroy, Jeffrey DeBord, Nagarajan Sridhar
  • Patent number: 8525165
    Abstract: To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: September 3, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kengo Akimoto
  • Patent number: 8525019
    Abstract: A method for forming a reduced conductive area in transparent conductive. The method includes providing a transparent, electrically conductive, chemically reducible material. A reducing atmosphere is provided and concentrated electromagnetic energy from an energy source is directed toward a portion of the transparent, electrically conductive, chemically reducible material to form a reduced conductive area. The reduced conductive area has greater electrical conductivity than the transparent, electrically conductive, chemically reducible material. A thin film article and photovoltaic module are also disclosed.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: September 3, 2013
    Assignee: Primestar Solar, Inc.
    Inventors: Jonathan Mack Frey, Scott Daniel Feldman-Peabody
  • Patent number: 8513587
    Abstract: An image sensor the image sensor comprising an absorption layer disposed on a silicon substrate, the absorption layer having at least one of SiGe or Ge, and an antireflection layer disposed directly thereon.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: August 20, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Jui Wang, Hsiao-Hui Tseng, Wei-Cheng Hsu, Dun-Nian Yaung, Jen-Cheng Liu
  • Patent number: 8497527
    Abstract: A device comprising a two-dimensional electron gas that includes an active region located in a portion of the electron gas is disclosed. The active region comprises an electron concentration less than an electron concentration of a set of non-active regions of the electron gas. The device includes a controlling terminal located on a first side of the active region. The device can comprise, for example, a field effect transistor (FET) in which the gate is located and used to control the carrier injection into the active region and define the boundary condition for the electric field distribution within the active region. The device can be used to generate, amplify, filter, and/or detect electromagnetic radiation of radio frequency (RF) and/or terahertz (THz) frequencies.
    Type: Grant
    Filed: March 12, 2009
    Date of Patent: July 30, 2013
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Alexei Koudymov, Michael Shur, Remigijus Gaska
  • Patent number: 8487350
    Abstract: An image sensor pixel includes a semiconductor layer, a photosensitive region to accumulate photo-generated charge, a floating node, a trench, and an entrenched transfer gate. The photosensitive region and the trench are disposed within the semiconductor layer. The trench extends into the semiconductor layer between the photosensitive region and the floating node and the entrenched transfer gate is disposed within the trench to control transfer of the photo-generated charge from the photosensitive region to the floating node.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: July 16, 2013
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hidetoshi Nozaki, Tiejun Dai
  • Patent number: 8482001
    Abstract: An object of the present invention is to provide a semiconductor device having a novel structure in which in a data storing time, stored data can be stored even when power is not supplied, and there is no limitation on the number of writing. A semiconductor device includes a first transistor including a first source electrode and a first drain electrode; a first channel formation region for which an oxide semiconductor material is used and to which the first source electrode and the first drain electrode are electrically connected; a first gate insulating layer over the first channel formation region; and a first gate electrode over the first gate insulating layer. One of the first source electrode and the first drain electrode of the first transistor and one electrode of a capacitor are electrically connected to each other.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: July 9, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Patent number: 8455886
    Abstract: A light emitting device is constituted by flip-chip mounting a GaN-based LED chip. The GaN-based LED chip includes a light-transmissive substrate and a GaN-based semiconductor layer formed on the light-transmissive substrate, wherein the GaN-based semiconductor layer has a laminate structure containing an n-type layer, a light emitting layer and a p-type layer in this order from the light-transmissive substrate side, wherein a positive electrode is formed on the p-type layer, the electrode containing a light-transmissive electrode of an oxide semiconductor and a positive contact electrode electrically connected to the light-transmissive electrode, and the area of the positive contact electrode is half or less of the area of the upper surface of the p-type layer.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: June 4, 2013
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Takahide Joichi, Hiroaki Okagawa, Shin Hiraoka, Toshihiko Shima, Hirokazu Taniguchi
  • Publication number: 20130105824
    Abstract: Devices incorporating a single to a few-layer MoS2 channels in combination with optimized substrate, dielectric, contact and electrode materials and configurations thereof, exhibit light emission, photoelectric effect, and superconductivity, respectively.
    Type: Application
    Filed: October 26, 2012
    Publication date: May 2, 2013
    Inventors: Makarand Paranjape, Paola Barbara, Amy Liu, Marcio Fontana
  • Patent number: 8426883
    Abstract: Provided are a light emitting device, a method for fabricating the light emitting device, a light emitting device package, and a lighting unit. The light emitting device includes a conductive support substrate, a protection layer on the conductive support substrate, the protection layer having an inclined top surface, a light emitting structure layer including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer between the first conductive type semiconductor layer and the second conductive type semiconductor layer on the conductive support substrate and the protection layer, and an electrode on the light emitting structure layer. A portion of the protection layer is disposed between the conductive support substrate and the light emitting structure layer.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: April 23, 2013
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kyung Wook Park, Myung Hoon Jung
  • Patent number: 8415195
    Abstract: In manufacturing of a solar cell module in which a solar cell having a surface electrode to which a tab lead is connected is sealed with a resin, the step of connecting the tab lead and the step of sealing the solar cell with the resin are performed simultaneously at a relatively low temperature that is used for the resin sealing step. To perform these steps simultaneously, the solar cell having the surface electrode to which the tab lead is connected with an adhesive is resin-sealed using a vacuum laminator to manufacture the solar cell module. The vacuum laminator used includes a first chamber and a second chamber partitioned by a flexible sheet. The internal pressures of these chambers can be controlled independently, and a heating stage for heating is provided in the second chamber.
    Type: Grant
    Filed: May 14, 2010
    Date of Patent: April 9, 2013
    Assignee: Sony Chemical & Information Device Corporation
    Inventors: Hideaki Okumiya, Satoshi Yamamoto, Masao Saito
  • Patent number: 8361898
    Abstract: A bonding pad structure for an optoelectronic device. The bonding pad structure includes a carrier substrate having a bonding pad region and an optoelectronic device region. An insulating layer is disposed on the carrier substrate, having an opening corresponding to the bonding pad region. A bonding pad is embedded in the insulating layer under the opening to expose the top surface thereof. A device substrate is disposed on the insulating layer corresponding to the optoelectronic device region. A cap layer covers the device substrate and the insulating layer excluding the opening. A conductive buffer layer is disposed in the opening to directly contact the bonding pad. The invention also discloses a method for fabricating the same.
    Type: Grant
    Filed: January 28, 2010
    Date of Patent: January 29, 2013
    Assignee: VisEra Technologies Company Limited
    Inventors: Kai-Chih Wang, Fang-Chang Liu
  • Patent number: 8357983
    Abstract: A Hall effect element includes a Hall plate having geometric features selected to result in a highest ratio of a sensitivity divided by a plate resistance. The resulting shape is a so-called “wide-cross” shape.
    Type: Grant
    Filed: August 4, 2011
    Date of Patent: January 22, 2013
    Assignee: Allegro Microsystems, Inc.
    Inventor: Yigong Wang
  • Patent number: 8350266
    Abstract: A display substrate is provided that can prevent the opening of an upper conduction layer. The display substrate comprises a semiconductor layer pattern formed on a substrate, a data interconnection pattern formed on the semiconductor layer pattern, a protection layer formed on the substrate and the data interconnection pattern, contact holes formed on the substrate to expose at least a portion of an upper surface of the semiconductor pattern and at least a portion of an upper surface of the data interconnection pattern, and contact electrodes formed in the contact holes to be in contact with the exposed upper surfaces of the data interconnection pattern and the semiconductor layer pattern.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventor: Byeong-Jae Ahn
  • Patent number: 8350302
    Abstract: An organic light emitting display apparatus is disclosed. The organic light emitting display apparatus includes: a substrate, a seal facing the substrate, bonded to the substrate, a display area disposed on the substrate configured to produce an image, a pad area disposed on the substrate, present on at least one side of the display area, an insulating layer directly extending from the display area, formed on the pad area, a first adhesive layer surrounding the display area, which bonds the substrate to the seal, and comprising an organic material, and a second adhesive layer insulated from the pad area by the insulating layer, disposed outside the first adhesive layer, which bonds the substrate to the seal.
    Type: Grant
    Filed: November 1, 2010
    Date of Patent: January 8, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sun-Young Lee, Jong-Hyuk Lee, Yoon-Hyeung Cho, Min-Ho Oh, Byoung-Duk Lee, So-Young Lee
  • Patent number: 8338865
    Abstract: By increasing an interval between electrodes which drives liquid crystals, a gradient of an electric field applied between the electrodes can be controlled and an optimal electric field can be applied between the electrodes. The invention includes a first electrode formed over a substrate, an insulating film formed over the substrate and the first electrode, a thin film transistor including a semiconductor film in which a source, a channel region, and a drain are formed over the insulating film, a second electrode located over the semiconductor film and the first electrode and including first opening patterns, and liquid crystals provided over the second electrode.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 8338856
    Abstract: A backside illuminated (“BSI”) complementary metal-oxide semiconductor (“CMOS”) image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident on a backside of the BSI CMOS image sensor to collect an image charge. The stress adjusting layer is disposed on a backside of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 25, 2012
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hsin-Chih Tai, Howard E. Rhodes, Wei Zheng, Vincent Venezia, Yin Qian, Duli Mao
  • Patent number: 8310006
    Abstract: Devices, structures, and related methods for IGBTs and the like which include a self-aligned series resistance at the source-body junction to avoid latchup. The series resistance is achieved by using a charged dielectric, and/or by using a dielectric which provides a source of dopant atoms of the same conductivity type as the source region, at a sidewall adjacent to the source region.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: November 13, 2012
    Assignee: MaxPower Semiconductor, Inc.
    Inventors: Richard A. Blanchard, Mohamed N. Darwish, Jun Zeng
  • Patent number: 8288780
    Abstract: An organic light emitting display device. The organic light emitting display device includes a substrate having a pixel region in which pixels are formed and a non-pixel region in which a light sensor is formed, an insulating film formed on the substrate, a first electrode formed on the insulating film and formed of a reflective material reflecting light, the first electrode being formed on the entire surface of the insulating film except for a region between the pixels and a region over the light sensor, a pixel defining film exposing a region of the first electrode and formed on the insulating film, an organic light emitting layer formed on the exposed region of the first electrode, and a second electrode formed on the organic light emitting layer. The first electrode is formed to have a greater area than that of the organic light emitting layer.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: October 16, 2012
    Assignee: Samsung Display Co., Ltd.
    Inventors: Nam-Choul Yang, Byoung-Deog Choi, Ki-Ju Im, Do-Youb Kim
  • Patent number: 8283677
    Abstract: A nitride semiconductor light-emitting device includes a substrate (101) made of silicon, a mask film (102) made of silicon oxide, formed on a principal surface of the substrate (101), and having at least one opening (102a), a seed layer (104) made of GaN selectively formed on the substrate (101) in the opening (102a), an LEG layer (105) formed on a side surface of the seed layer (104), and an n-type GaN layer (106), an active layer (107), and a p-type GaN layer (108) which are formed on the LEG layer (105). The LEG layer (105) is formed by crystal growth using an organic nitrogen material as a nitrogen source.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: October 9, 2012
    Assignee: Panasonic Corporation
    Inventors: Toshiyuki Takizawa, Tetsuzo Ueda, Manabu Usuda
  • Patent number: 8241950
    Abstract: The method of the preferred embodiments includes the steps of providing a base having a frame portion and a center portion; building a preliminary structure coupled to the base; removing a portion of the preliminary structure to define a series of devices and a plurality of bridges; removing the center portion of the base such that the frame portion defines an open region, wherein the plurality of bridges suspend the series of devices in the open region defined by the frame; and encapsulating the series of devices. The method is preferably designed for the manufacture of semiconductor devices, and more specifically for the manufacture of encapsulated implantable electrodes. The method, however, may be alternatively used in any suitable environment and for any suitable reason.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: August 14, 2012
    Assignee: Neuronexus Technologies, Inc.
    Inventors: David S. Pellinen, Jamille Farraye Hetke, Daryl R. Kipke, Kc Kong, Rio J. Vetter, Mayurachat Gulari
  • Patent number: 8243770
    Abstract: Emissive quantum photonic imagers comprised of a spatial array of digitally addressable multicolor pixels. Each pixel is a vertical stack of multiple semiconductor laser diodes, each of which can generate laser light of a different color. Within each multicolor pixel, the light generated from the stack of diodes is emitted perpendicular to the plane of the imager device via a plurality of vertical waveguides that are coupled to the optical confinement regions of each of the multiple laser diodes comprising the imager device. Each of the laser diodes comprising a single pixel is individually addressable, enabling each pixel to simultaneously emit any combination of the colors associated with the laser diodes at any required on/off duty cycle for each color. Each individual multicolor pixel can simultaneously emit the required colors and brightness values by controlling the on/off duty cycles of their respective laser diodes.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: August 14, 2012
    Assignee: Ostendo Technologies, Inc.
    Inventors: Hussein S. El-Ghoroury, Robert G. W. Brown, Dale A. McNeill, Huibert DenBoer, Andrew J. Lanzone
  • Patent number: 8232123
    Abstract: An organic light emitting device and a manufacturing method thereof, including a first signal line and a second signal line intersecting each other on an insulating substrate, a switching thin film transistor connected to the first signal line and the second signal line, a driving thin film transistor connected to the switching thin film transistor, and a light emitting diode (“LD”) connected to the driving thin film transistor. The driving thin film transistor includes a driving control electrode and a driving semiconductor overlapping the driving control electrode, crystallized silicon having a doped region and a non-doped region, a driving gate insulating layer disposed between the driving control electrode and the driving semiconductor, and a driving input electrode and a driving output electrode opposite to each other on the driving semiconductor, wherein the interface between the driving gate insulating layer and the driving semiconductor includes nitrogen gas.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: July 31, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu-Sik Cho, Byoung-Seong Jeong, Joon-Hoo Choi, Jong-Moo Huh
  • Patent number: 8227793
    Abstract: Apparatuses capable of and techniques for detecting the visible light spectrum are provided.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: July 24, 2012
    Assignee: University of Seoul Industry Cooperation Foundation
    Inventor: Doyeol Ahn
  • Patent number: 8217460
    Abstract: A semiconductor device has an SOI (Silicon On Insulator) structure and comprising a P-channel FET and an N-channel FET which are formed on an insulating film. The semiconductor device includes: at least two of first, second, third and fourth PN-junction elements. The first PN-junction element is formed from a P-type semiconductor layer and an N-type semiconductor layer having the same impurity concentrations as those of source/drain regions of the P-channel FET and the N-channel FET, respectively. The second PN-junction element is formed from a P-type semiconductor layer and an N-type semiconductor layer having the same impurity concentrations as those of the source/drain region and a channel region in the P-channel FET, respectively. The third PN-junction element is formed from a P-type semiconductor layer and an N-type semiconductor layer having the same impurity concentrations as those of a channel region and the source/drain region in the N-channel FET, respectively.
    Type: Grant
    Filed: May 27, 2010
    Date of Patent: July 10, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Hiroshi Furuta
  • Patent number: 8211758
    Abstract: It is an object to provide an SGT production method capable of obtaining a structure for reducing a resistance of a gate, a desired gate length, desired source and drain configurations and a desired diameter of a pillar-shaped semiconductor.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: July 3, 2012
    Assignee: Unisantis Electronics Singapore PTE Ltd.
    Inventors: Fujio Masuoka, Shintaro Arai, Hiroki Nakamura, Tomohiko Kudo
  • Patent number: 8203163
    Abstract: Provided is a light emitting device package and a method of fabricating the same. The light emitting device package comprises a package body having a cavity, a seed layer on a surface of the package body, a conductive layer on the seed layer, a mirror layer on the conductive layer, and a light emitting device in the cavity.
    Type: Grant
    Filed: September 5, 2008
    Date of Patent: June 19, 2012
    Assignee: LG Innotek Co., Ltd.
    Inventors: Bum Chul Cho, Geun Ho Kim, Sung Jin Son, Jin Soo Park
  • Patent number: 8173991
    Abstract: An optoelectronic semiconductor chip is specified, which has an active zone (20) containing a multi quantum well structure provided for generating electromagnetic radiation, which comprises a plurality of successive quantum well layers (210, 220, 230). The multi quantum well structure comprises at least one first quantum well layer (210), which is n-conductively doped and which is arranged between two n-conductively doped barrier layers (250) adjoining the first quantum well layer. It comprises a second quantum well layer (220), which is undoped and is arranged between two barrier layers (250, 260) adjoining the second quantum well layer, of which one is n-conductively doped and the other is undoped. In addition, the multi quantum well structure comprises at least one third quantum well layer (230), which is undoped and which is arranged between two undoped barrier layers (260) adjoining the third quantum well layer.
    Type: Grant
    Filed: September 12, 2008
    Date of Patent: May 8, 2012
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Peter Stauss, Matthias Peter, Alexander Walter