Abstract: There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and is also provided a method of fabricating the same. The shape of a spacer for keeping a substrate interval constant is made such that it is a columnar shape, a radius R of curvature is 2 ?m or less, a height H is 0.5 ?m to 10 ?m, a diameter is 20 ?m or less, and an angle ? is 65° to 115°. By doing so, it is possible to prevent the lowering of an opening rate and the lowering of light leakage due to orientation disturbance.

Abstract: The invention relates to a thin film transistor substrate for use in a liquid crystal display device and a method of fabricating the same, and an object is to provide a thin film transistor substrate which can ensure high reliability even though a low resistance metal is used in a material for a gate electrode and a predetermined wiring and a method of fabricating the same. A TFT substrate has a gate electrode in a multilayer structure configured of an AlN film as a nitrogen containing layer, an Al film as a main wiring layer and an upper wiring layer formed of an MoN film and an Mo film. On the gate electrode whose side surface inclines gently, a gate insulating film of excellent film quality is formed.

Abstract: To suppress a decrease in photosensitivity of a photoelectric conversion element provided in a semiconductor device by reducing the parasitic resistance of an amplifier circuit. In addition, the amplifier circuit which amplifies the output current of the photoelectric conversion element is operated stably. A semiconductor device includes a photoelectric conversion element, a current mirror circuit having at least two thin film transistors, a high-potential power supply electrically connected to each of the thin film transistors, and a low-potential power supply electrically connected to each of the thin film transistors. When a reference thin film transistor is an n-type, the reference thin film transistor is placed closer to the low-potential power supply than an output thin film transistor is. When a reference thin film transistor is a p-type, the reference thin film transistor is placed closer to the high-potential power supply than an output thin film transistor is.

Abstract: A pixel is formed in a semiconductor substrate of a first doping type, a first layer of the second doping type covering the substrate, a second layer of the first doping type covering the first layer. A MOS-type transistor is formed in the second layer and has a drain area and a source area of the second doping type. The pixel includes a first area of the second doping type, more heavily doped than the first layer, crossing the second layer and extending into the first layer and connected to the drain area. The pixel further includes a second area of the first doping type, more heavily doped than the second layer and bordering the source area.

Abstract: A display device, comprising an insulating substrate; a data conductor formed on the insulating substrate and comprising a conductive film; a thin film transistor having at least one source electrode electrically connected with the conductive film, and a drain electrode formed along a circumference of the source electrode and spaced therefrom; and a pixel electrode which is electrically connected with the conductive film.

Abstract: Provided is a method of fabricating a semiconductive oxide thin-film transistor (TFT) substrate. The method includes forming gate wiring on an insulation substrate; and forming a structure in which a semiconductive oxide film pattern and data wiring are stacked on the gate wiring, wherein the semiconductive oxide film pattern is selectively patterned to have channel regions of first thickness and source/drain regions of greater second thickness and where image data is coupled to the source regions by data wiring formed on the source regions. According to a 4-mask embodiment, the data wiring and semiconductive oxide film pattern are defined by a shared etch mask.

Abstract: To achieve high performance of a semiconductor integrated circuit depending on not only a microfabrication technique but also another way. In addition, to achieve low power consumption of a semiconductor integrated circuit. A semiconductor device is provided in which crystal faces and/or crystal axes of single-crystalline semiconductor layers of a first conductive MISFET and a second conductive MISFET are different. The crystal faces and/or crystal axes are arranged so that mobility of carriers flowing in channel length directions in the respective MISFETs is increased. Such a structure can increase mobility of carriers flowing through channels of the MISFETs and high speed operation of a semiconductor integrated circuit can be achieved. Further, low voltage driving becomes possible, and low power consumption can be realized.

Abstract: A display includes a thin film transistor, a repair structure for repairing a defect in a signal line coupled to the thin film transistor, the repair structure including a first repair metal layer and a second repair metal layer. The transistor includes a gate electrode, a source electrode, and a drain electrode. A dielectric layer is disposed above the thin film transistor and the repair structure, the dielectric layer defining a repair opening to expose the second repair metal layer, the dielectric layer also defining a contact window that exposes at least one of the source and drain electrodes. A floating electrode is electrically connected to the second repair metal layer through the repair opening, the floating electrode being electrically floated.

Abstract: A method for fabricating a liquid crystal display device is disclosed. The method includes forming a first conductive layer on an insulating substrate, forming a first insulating layer, a second conductive layer, and a third conductive layer on the first conductive layer, patterning the second conductive layer and the third conductive layer, such that the third conductive layer is located on a partial region of the second conductive layer, forming a second insulating layer on the patterned third conductive layer, forming a first contact hole to expose the first conductive layer by patterning the first and second insulating layers, and a second contact hole to expose the third conductive layer by patterning the second insulating layer, and forming a fourth conductive layer to connect the first and third conductive layers with each other by way of the first and second contact holes.

Abstract: A liquid crystal display (LCD) device includes a gate line and a data line crossing each other to define a pixel region on a first substrate, a thin film transistor connected to the gate line and the data line, a first protrusion and a second protrusion formed on the first substrate, a pixel electrode connected to the thin film transistor in the pixel region, a first patterned spacer and a second patterned spacer formed on a second substrate facing the first substrate, wherein the first patterned spacer corresponds to the first protrusion, and the second patterned spacer corresponds to the second protrusion.

Abstract: A display device includes an insulating substrate including a display region, at least one pad disposed in a non-display region on the insulating substrate which applies a voltage to the display region, a connecting part which is electrically connects at least two pads or at least two portions of the pad; and a power supply unit which applies the voltage to the pad.

Abstract: A semiconductor light-receiving device and its manufacturing method are provided which are capable of suppressing dark current and deterioration. Semiconductor crystals were sequentially grown over an n-type InP substrate, including an n-type InP buffer layer, an undoped GaInAs light absorption layer, an undoped InP diffusion buffer layer, and a p-type InP window layer. Next, a first mesa was formed by removing a part from the p-type InP window layer to the n-type InP buffer layer with a Br-based etchant having low etching selectivity, so as to form a sloped “normal” mesa structure. Next, a second mesa having a smaller diameter than the first mesa was formed by dry etching, by precisely removing a part from the p-type InP window layer to a certain mid position of the undoped InP diffusion buffer layer.

Abstract: A photoelectric conversion device comprises a photoelectric conversion unit, a floating diffusion region, a transfer transistor, and an output unit. A control electrode of the transfer transistor includes a first portion which extends along a channel width direction and overlaps a first boundary side when seen through from a direction perpendicular to a light receiving surface of the photoelectric conversion unit, and a second portion which extends along a channel length direction from one end of the first portion and overlaps a second boundary side when seen through from the direction perpendicular to the light receiving surface, and the control electrode of the transfer transistor has an L shape when viewed from the direction perpendicular to the light receiving surface.

Abstract: It is an object to provide a photoelectric conversion device which detects light ranging from weak light to strong light. The present invention relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer, an amplifier circuit including a thin film transistor and a bias switching means, where a bias which is connected to the photodiode and the amplifier circuit is switched by the bias switching means when intensity of incident light exceeds predetermined intensity, and accordingly, light which is less than the predetermined intensity is detected by the photodiode and light which is more than the predetermined intensity is detected by the thin film transistor of the amplifier circuit. By the present invention, light ranging from weak light to strong light can be detected.

Abstract: Methods and structures for monolithically integrating monocrystalline silicon and monocrystalline non-silicon materials and devices are provided. In one structure, a monolithically integrated semiconductor device structure comprises a silicon substrate and a first monocrystalline semiconductor layer disposed over the silicon substrate, wherein the first monocrystalline semiconductor layer has a lattice constant different from a lattice constant of relaxed silicon. The structure further includes an insulating layer disposed over the first monocrystalline semiconductor layer in a first region and a monocrystalline silicon layer disposed over the insulating layer in the first region. The structure includes at least one silicon-based photodetector comprising an active region including at least a portion of the monocrystalline silicon layer.

Abstract: An electronic circuit includes a primary wide bandgap bipolar power switching device configured to supply a load current in response to a control signal applied to a control terminal thereof, and a driver device configured to generate the control signal. At least one of the primary switching device or the driver device may include an optically triggered switching device. A discrete wide bandgap semiconductor device includes a primary bipolar device stage configured to switch between a conducting state and a nonconducting state upon application of a control current, and a bipolar driver stage configured to generate the control current and to supply the control current to the primary bipolar device stage. At least one of the primary bipolar device stage and the bipolar driver stage may include an optically triggered wide bandgap switching device.

Abstract: A mask containing apertures therein which is used for fabricating a channel of a thin film transistor (TFT), wherein the pixel charging time for a TFT in a high-resolution liquid crystal display (LCD) device is reduced by minimizing the length of the channel in the TFT when the active region is made of amorphous silicon. The length of the channel can be minimized by exposing light through the apertures in an exposure mask when forming the channel.

Abstract: Diodes having p-type and n-type regions in contact, having at least one of either the p-type region or n-type region including a conjugated organic material doped with an immobile dopant, conjugated organic materials for incorporation into such diodes, and methods of manufacturing such diodes and materials are provided.

Abstract: A single plate system color solid-state image pick-up device of a microlens loading type, the device comprising: a semiconductor substrate; a plurality of light receiving portions formed in a two-dimensional array in a surface portion of the semiconductor substrate; color filters each of which is for any of red, green and blue colors; and microlenses, wherein each of the color filters and each of the microlenses are laminated above on each of the light receiving portions, wherein first ones of the microlenses, corresponding to ones of the light receiving portions on which ones for the red color of the color filters are laminated, have smaller light receiving areas than those of second ones of the microlenses, corresponding to ones of the light receiving portions on which ones for the green color of the color filters are laminated.

Abstract: A CCD solid state imaging module comprises a CCD area sensor, a substrate bias voltage setting device formed on said CCD area sensor for outputting a voltage, and a substrate bias voltage outputting device formed on a chip other than said CCD area sensor for outputting a substrate bias voltage of said CCD area sensor by selecting one voltage level from a plurality of voltages based on the voltage output by said substrate bias voltage setting device. A solid state imaging module suitable for a CCD area sensor having multiple driving modes can be provided.

Abstract: A method of fabricating a pixel structure of a thin film transistor liquid crystal display is provided. A transparent conductive layer and a first metallic layer are sequentially formed over a substrate. The first metallic layer and the transparent conductive layer are patterned to form a gate pattern and a pixel electrode pattern. A gate insulating layer and a semiconductor layer are sequentially formed over the substrate. A patterning process is performed to remove the first metallic layer in the pixel electrode pattern while remaining the gate insulating layer and the semiconductor layer over the gate pattern. A second metallic layer is formed over the substrate. The second metallic layer is patterned to form a source/drain pattern over the semiconductor layer. A passivation layer is formed over the substrate and then the passivation layer is patterned to expose the transparent conductive layer in the pixel electrode pattern.

Abstract: An electro-optical device includes first and second substrates that are bonded to each other, the first substrate having an extended portion extended from the second substrate on a first side thereof in plan view, a plurality of pixel units that are disposed in a pixel region on the first substrate and individually have pixel electrodes, a data line driving circuit that is disposed along the first side in a peripheral region around the pixel region so as to supply an image signal to the pixel units, a plurality of external circuit connecting terminals that are arranged along the first side in a region of the peripheral region on the extended portion, an image signal line that is relayed around the data line driving circuit from the plurality of external circuit connecting terminals and has a first wiring line portion wired in a direction along the first side between the data line driving circuit and the pixel region, and a sealant that bonds the first and second substrates to each other in a sealing region ar

Abstract: An imager pixel has a photosensitive JFET structure having a channel region located above a buried charge accumulation region. The channel region has a resistance characteristic that changes depending on the level of accumulated charge in the accumulation region. During an integration period, incident light causes electrons to be accumulated inside the buried accumulation region. The resistance characteristic of the channel region changes in response to a field created by the charges accumulated in the accumulation region. Thus, when a voltage is applied to one side of the channel, the current read out from the other side is characteristic of the amount of stored charges.

Abstract: There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and is also provided a method of fabricating the same. The shape of a spacer for keeping a substrate interval constant is made such that it is a columnar shape, a radius R of curvature is 2 ?m or less, a height H is 0.5 ?m to 10 ?m, a diameter is 20 ?m or less, and an angle ? is 65° to 115°. By doing so, it is possible to prevent the lowering of an opening rate and the lowering of light leakage due to orientation disturbance.

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Abstract: A photodiode and method of forming a photodiode has a substrate. An absorption layer is formed on the substrate to absorb lightwaves of a desired frequency range. A multiplication structure is formed on the absorption layer. The multiplication layer uses a low dark current avalanching material. The absorption layer and the multiplication layer are formed into at least one mesa having in an inverted “T” configuration to reduce junction area between the absorption layer and the multiplication layer. A dielectric layer is formed over the at least one mesa. At least one contact is formed on the dielectric layer and coupled to the at least one mesa.

Abstract: CMOS and CCD imaging devices comprising different in-pixel capacitors and peripheral capacitors and methods of formation are disclosed. The capacitors used in periphery circuits have different requirements from the capacitors used in the pixel itself. Dual stack capacitors comprising two dielectric layers may be provided to achieve low leakage and high capacitance. A single masking step may be provided such that one region has a dual dielectric capacitor and a second region has a single dielectric capacitor. A different dielectric may also be provided in one region compared to another region wherein the inter-electrode insulator comprises a single dielectric in both regions.

Abstract: A method of manufacturing a local recess channel transistor in a semiconductor device. A hard mask layer is formed on a semiconductor substrate that exposes a portion of the substrate. The exposed portion of the substrate is etched using the hard mask layer as an etch mask to form a recess trench. A trench spacer is formed on the substrate along a portion of sidewalls of the recess trench. The substrate along a lower portion of the recess trench is exposed after the trench spacer is formed. The exposed portion of the substrate along the lower portion of the recess trench is doped with a channel impurity to form a local channel impurity doped region surrounding the lower portion of the recess trench. A portion of the local channel impurity doped region surrounding the lower portion of the recess trench is doped with a Vth adjusting impurity to form a Vth adjusting impurity doped region inside the local channel impurity doped region. The width of the lower portion of the recess trench is expanded.

Abstract: To realize a high-performance liquid crystal display device or light-emitting element using a plastic film. A CPU is formed over a first glass substrate and then, separated from the first substrate. A pixel portion having a light-emitting element is formed over a second glass substrate, and then, separated from the second substrate. The both are bonded to each other. Therefore, high integration can be achieved. Further, in this case, the separated layer including the CPU serves also as a sealing layer of the light-emitting element.

Abstract: Effective sensitivity of a photodetector of an image sensor is controlled by partitioning signal charge from incident photons, thus producing a manageable yield and a consequently higher, photon shot noise limited, signal to noise ratio than in the prior art, when imaging high flux rates of energetic photons or particles, such as produced by x-ray generators. The invention may be applied, for example, to an image sensor with a photosensitive layer coupled to a charge collection/readout structure, e.g. photoconductor or scintillator on CMOS array, or to an intrinsically sensitive charge collection/readout structure, e.g. deep active layer CMOS.

Abstract: A display device according to the present invention comprises an insulating substrate; a switching thin film transistor formed on the insulating substrate for receiving a data voltage has a first semiconductor layer comprising amorphous silicon; a driving thin film transistor formed on the insulating substrate, having a control terminal connected with an output terminal of the switching thin film transistor and includes a second semiconductor layer comprising poly silicon; a light sensor formed on the insulating substrate and comprises a third semiconductor layer and a sensor input terminal and a sensor output terminal electrically connected with the third semiconductor layer; an insulating layer formed on the light sensor; a first electrode formed on the insulating layer and electrically connected with an output terminal of the driving thin film transistor; an organic layer formed on the first electrode and comprises a light emitting layer; a second electrode formed on the organic layer; and a controller whi

Abstract: A photosensor includes a plurality of photosensitive regions including a first photosensitive region connected to a first voltage reference, and at least one additional photosensitive region. A signal collector is connected to the first photosensitive region. At least one switching device is for switching the at least one additional photosensitive region between the first voltage reference and a second voltage reference that is less than the first voltage reference, and for reversibly connecting the at least one additional photosensitive region to the signal collector so that the photosensor is variably responsive to different light levels.

Abstract: An organic EL display unit is manufactured in an efficient manner. A light emission device (1000) is manufactured by bonding together a driving circuit substrate (100) formed with driving circuit constituted by thin film transistors 11, and a light emission substrate (300) comprising a successively laminated transparent electrode layer 31, bank layer 32 made from insulating material, positive hole injection layer 33, organic EL layer 34 and cathode layer 36.

Abstract: A display substrate includes a plurality of pixel parts, each including a first and second gate lines, a source line, first, second, and third transistors, and a pumping capacitor. A display device includes a display panel, a gate driving part, a source driving part, and an output selecting part. Each pixel part of a display panel includes a transmissive part, a reflective part, and an adjusting part. The adjusting part adjusts the transmission voltage charged in the reflective part to a reflection voltage based on a control voltage. Thus, transmission voltage applied to the transmissive part is adjusted to reflection voltage to be applied to the reflective part. Therefore, optical reflectivity and optical transmissivity versus voltage are matched with each other, while embodying a single cell-gap and applying a single voltage.

Abstract: An amorphous-silicon thin film transistor and a shift register shift having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an LI-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift register having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.

Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.

Abstract: The illuminating device includes a lens formed of a resin mold and having a portion for receiving an LED which is formed on one surface thereof, the LED received in the receiving portion, and a wiring member deposited on the receiving-portion-forming surface of the lens, and light irradiated from the LED is incident to the lens. In the method of fabricating the illuminating device, a transfer film having a conductive portion is set in a lens molding cavity and a wiring member including a conductive portion is deposited on one surface of the lens while the lens is injected and molded.

Abstract: A surface plasmon polaritron activated semiconductor device uses a surface plasmon wire that functions as an optical waveguide for fast communication of a signal and functions as a energy translator using a wire tip for translating the optical signal passing through the waveguide into plasmon-polaritron energy at a connection of the semiconductor device, such as a transistor, to activate the transistor for improved speed of communications and switching for preferred use in digital systems.

Abstract: Provided is a plasma display panel (PDP), which minimizes an elevation in reflection brightness caused by reflection of external light and improves in contrast and discharge efficiency. The PDP includes a front substrate transmitting visible rays; a rear substrate disposed substantially parallel to the front substrate; barrier ribs interposed between the front and rear substrates and defining a plurality of discharge cells along with the front and rear substrates, the barrier ribs formed of a dielectric material; two or more kinds of discharge electrodes disposed on at least one of the front substrate, the rear substrate, and the barrier ribs; a dielectric layer disposed on a rear surface of the front substrate; phosphor layers disposed in the discharge cells; and a discharge gas filled in the discharge cells.

Abstract: Subjected to obtain a crystalline TFT which simultaneously prevents increase of OFF current and deterioration of ON current. A gate electrode of a crystalline TFT is comprised of a first gate electrode and a second gate electrode formed in contact with the first gate electrode and a gate insulating film. LDD region is formed by using the first gate electrode as a mask, and a source region and a drain region are formed by using the second gate electrode as a mask. By removing a portion of the second gate electrode, a structure in which a region where LDD region and the second gate electrode overlap with a gate insulating film interposed therebetween, and a region where LDD region and the second gate electrode do not overlap, is obtained.

Abstract: An array substrate for an LCD device includes a first TFT including a first semiconductor layer, a first gate electrode, wherein the first gate electrode is directly over the first semiconductor layer; a first protrusion extending from the first gate electrode along an edge of the first semiconductor layer; a second TFT including a second semiconductor layer, a second gate electrode, wherein the second gate electrode is directly over the second semiconductor layer; a second protrusion extending from the second gate electrode along an edge of the second semiconductor layer; a third TFT connected to crossed data and gate lines including a third semiconductor layer, a third gate electrode, wherein the third gate electrode is directly over the third semiconductor layer; a third protrusion extending from the third gate electrode along an edge of the third semiconductor layer; and a pixel electrode.

Abstract: A semiconductor radiation detector comprises a bulk layer of semiconductor material, and on a first surface of the bulk layer in the following order: a modified internal gate layer of semiconductor of second conductivity type, a barrier layer of semiconductor of first conductivity type and pixel dopings of semiconductor of the second conductivity type. The pixel dopings are adapted to be coupled to at least one pixel voltage in order to create pixels corresponding to pixel dopings. The device comprises a first conductivity type first contact. Said pixel voltage is defined as a potential difference between the pixel doping and the first contact. The bulk layer is of the first conductivity type. On a second surface of the bulk layer opposite to the first surface, there is nonconductive back side layer that would transport secondary charges outside the active area of the device or function as the radiation entry window.

Abstract: An element structure is provided in which film formation irregularities and deterioration of an organic compound layer formed on an electrode are prevented in an active matrix light emitting device. After forming an insulating film so as to cover edge portions of a conductor which becomes a light emitting element electrode, polishing is performed using a CMP (chemical mechanical polishing) method in the present invention, thus forming a structure in which surfaces of a first electrode and a leveled insulating layer are coplanar. The film formation irregularities in the organic compound layer formed on the electrode can thus be prevented, and electric field concentration from the edge portions of the electrode can be prevented.

Abstract: An imager pixel has a photosensitive JFET structure having a channel region located above a buried charge accumulation region. The channel region has a resistance characteristic that changes depending on the level of accumulated charge in the accumulation region. During an integration period, incident light causes electrons to be accumulated inside the buried accumulation region. The resistance characteristic of the channel region changes in response to a field created by the charges accumulated in the accumulation region. Thus, when a voltage is applied to one side of the channel, the current read out from the other side is characteristic of the amount of stored charges.

Abstract: The invention, in various exemplary embodiments, incorporates a photonic crystal filter into an image sensor. The photonic crystal filter comprises a substrate and a plurality of pillars forming a photonic crystal structure over the substrate. The pillars are spaced apart from each other. Each pillar has a height and a horizontal cross sectional shape. A material with a different dielectric constant than the pillars is provided within the spacing between the pillars. The photonic crystal filter is configured to selectively permit particular wavelengths of electromagnetic radiation to pass through.

Abstract: A new grid metal design for image sensors is disclosed which is comprised of a semiconductor image sensor chip having a pixel region covering most of the chip and a logic circuit region on the chip periphery. The pixel region contains, an array of image pixels where for each image pixel the majority of its area is occupied by a light sensing element and the other image pixel circuit elements are arranged in the periphery of the image pixel without overlapping the image-sensing element. A number of metal levels are of the first type, at which functional metal patterns exist both for the chip peripheral logic circuits and for the pixel circuit elements. A number of metal levels are of the second type, at which functional metal patterns exist only for the chip peripheral logic circuits and dummy metal patterns cover the pixel region except for the light sensing elements.

Abstract: The invention relates to a semiconductor structure, especially for use in a semiconductor detector. The semiconductor structure includes a weakly doped semiconductor substrate (HK) of a first or second doping type, a highly doped drain region (D) of a second doping type, located on a first surface of the semiconductor substrate (HK), a highly doped source region (S) of the second doping type, located on the first surface of the semiconductor substrate (HK), a duct (K) extending between the source region (S) and the drain region (D), a doped inner gate region (IG) of the first doping type, which is at least partially located below the duct (K), and a blow-out contact (CL) for removing charge carriers from the inner gate region (IG). According to the invention, the inner gate region (IG) extends in the semiconductor substrate (HK) at least partially up to the blow-out contact (CL) and the blow-out contact (CL) is located on the drain end relative to the source region (S).

Abstract: A surface light source control device has a plane light source control circuit for setting a current amount to a plurality of diode arrays. The light source control circuit comprises a constant current circuit for holding currents respectively flowing in the plurality of diode arrays constant at the same current value; and a power supply voltage control loop for selecting a notable diode array with a minimum reference voltage, among reference voltages appearing at each terminal of the plurality of diode arrays, appeared thereon to select the minimum reference voltage by a voltage selection circuit and adjusting a common power supply voltage so that the reference voltage becomes a prescribed value.

Abstract: An improved transistor array for a display or sensor device is described. The display or sensor device includes a plurality of pixels. Each pixel includes a width and a length. Each pixel is addressed by a transistor. The transistor addressing each pixel has a channel with a channel width. Each channel width is greater than the width or length of the pixel being addressed. By fabricating transistors with extremely long channel widths, lower mobility semiconductor materials can easily be used to fabricate the display device.

Abstract: A transfer transistor of a CMOS image sensor is described, including a substrate of a first type, a gate dielectric layer on the substrate, a gate on the gate dielectric layer, a first doped region of the first type, a buried channel region of the first or second type, a second doped region of the first type, and source/drain regions of the second type. The first doped region is in the substrate directly under the gate dielectric layer under the gate, the buried channel region is in the substrate under the first doped region, and the second doped region is in the substrate under the buried channel region. The source/drain regions are in the substrate beside the gate.