Abstract: A device manufacturing method, including: a first process for providing the plural elements on the original substrate via a separation layer in a condition where terminal sections are exposed to a surface on an opposite side to the separation layer; a second process for adhering the surface where the terminal sections of the elements to be transferred on the original substrate are exposed, via conductive adhesive, to a surface of the final substrate on a side where conductive sections for conducting with the terminal sections of the elements are provided; a third process for producing exfoliation in the separation layer between the original substrate and the final substrate; and a fourth process for separating the original substrate from which the transfer of elements has been completed, from the final substrate.

Abstract: The present invention provides a highly controllable device for exposure from the back side and an exposure method, and also provides a method of manufacturing a semiconductor device using the same. The present invention involves exposure with the use of the back side exposure device of which a reflecting means is disposed on the front side of a substrate, apart from a photosensitive thin film surface by a distance X (X=0.1 ?m to 1000 ?m), and formation of a photosensitive thin film pattern in a self alignment manner, with good controllability, at a position a distance Y away from the end of a pattern. The invention fabricates a TFT using that method.

Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that may include nitrogen atoms and/or silicon atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystalline structure.

Abstract: Some embodiments provide a microdisplay integrated circuit (IC), a substantially transparent protective cover coupled to the microdisplay IC, and a base coupled to the microdisplay IC. Thermal expansion characteristics of the base may be substantially similar to thermal expansion characteristics of the protective cover. According to some embodiments, at least one set of imaging elements is fabricated on an upper surface of a semiconductor substrate, and a base is affixed to a lower surface of the semiconductor substrate to generate substantially negligible mechanical stress between the semiconductor substrate and the base.

Abstract: A back electrode 6 is formed in the back of a Si single crystal substrate 2 of a compound semiconductor in which an n-type 3C-SiC single crystal buffer layer 3 having a thickness of 0.05-2 ?m, a carrier concentration of 1016-1021/cm3, a hexagonal InwGaxAl1-w-xN single crystal buffer layer 4 (0?w<1, 0?x<1, w+x<1) having a thickness of 0.01-0.5 ?m, and an n-type hexagonal InyGazAl1-y-zN single crystal layer 5 (0?y<1, 0<z?1, y+z?1) having a thickness of 0.1-5 ?m and a carrier concentration of 1011-1016/cm3 are stacked in order on an n-type Si single crystal substrate top 2 having a crystal-plane orientation {111}, a carrier concentration of 1016-1021/cm3, and a surface electrode 7 is formed on a surface of a hexagonal InyGazAl1-y-zN single crystal layer 5, so as to provide a compound semiconductor device which causes little energy loss and allows an high efficiency and a high breakdown voltage.

Abstract: A device is disclosed for sensing radiation, having a gate region and a substrate, wherein one of the gate region and the substrate is configured as an input for radiation. A channel region, connecting a source region and a drain region of the transistor device is provided. The device is configured to produce an electrical signal, which is proportional to the input radiation, at a first location of the channel region.

Abstract: The thin film transistor has a non-transparent structure besides and insulated with the gate. Hence, the light transmitted from the substrate is blocked and the light current induced in the thin film transistor is negligible. The method uses a mask with a slit pattern to form a non-uniform photoresist. Hence, the mask could be used to pattern two conductor layers for forming source/drain/channel.

Abstract: An image sensor for an image processing apparatus having a color filter array with open window cells alternating with single color filter cells includes a lens array containing a plurality of microlenses, a color filter array having a plurality of open window cells and color filter cells, each corresponding to one microlens. The image sensor also includes a protection layer, and a pixel sensor array having a first photosensor sensing a first light passed through each color filter cell, a second photosensor formed under the first photosensor, sensing a second light passed through each color filter cell, a third photosensor sensing a third light passed through each open window cell, and a fourth photosensor formed under the third photosensor, sensing a fourth light passed through each open window cell.

Abstract: Each pixel of a display includes a first thin film transistor whose source is connected to a first power supply terminal, a second thin film transistor which is different in conduction type from the first thin film transistor and whose source and drain are connected to the drain of the first thin film transistor and the first power supply terminal, respectively, an output control switch, and a display element connected in series with the output control switch between a second power supply terminal and the drain of the first thin film transistor.

Abstract: A surface-emitting type device includes a substrate including a first face, a second face that is tilted with respect to the first face and has a plane index different from a plane index of the first face, and a third face that is tilted with respect to the second face and has a plane index equal to the plane index of the first face, an emission section formed above the first face, and a rectification section formed above each of the second face and the third face, wherein the emission section includes a first semiconductor layer of a first conductivity type, an active layer formed above the first semiconductor layer, and a second semiconductor layer of a second conductivity type formed above the active layer, the rectification section includes a first semiconductor layer of the second conductivity type formed above the second face, and a second semiconductor layer of the first conductivity type formed continuously with the first semiconductor layer above the third face, at least a portion of the first semico

Abstract: A semiconductor structure, having a doped well region being formed in a substrate layer and a transistor having a terminal provided within said doped well region. The semiconductor structure also includes an oxide layer formed over the substrate layer, the doped well region, a poly silicon region, and the terminal of the transistor. The oxide layer including a step region being located where a height of the oxide layer transitions from a height associated with the doped well region to a height associated with the terminal of the transistor.

Abstract: To provide an optical element including a surface-emitting type semiconductor laser and an photodetector element, having a desired plurality of dielectric layers, and its manufacturing method.

Abstract: By increasing an interval between electrodes which drives liquid crystals, a gradient of an electric field applied between the electrodes can be controlled and an optimal electric field can be applied between the electrodes. The invention includes a first electrode formed over a substrate, an insulating film formed over the substrate and the first electrode, a thin film transistor including a semiconductor film in which a source, a channel region, and a drain are formed over the insulating film, a second electrode located over the semiconductor film and the first electrode and including first opening patterns, and liquid crystals provided over the second electrode.

Abstract: In some embodiments, an integrated circuit package includes a substrate and a heat spreader coupled to the substrate by fasteners. Thermal interface material thermally couples the die to the heat spreader. The heat spreader is provided over the die and is attached to the substrate with fasteners rather than a sealant-adhesive. Some examples of suitable fasteners may include rivets, barbed connectors, and gripping clips.

Abstract: The invention provides a display device and an electronic device, each of which has one of a structure in which a substrate provided with a light emitting element which performs bottom light emission and a substrate provided with a light emitting element which performs top light emission are attached, and a structure in which two substrates, each of which is provided with a light emitting element which performs bottom light emission are attached. By attaching two substrates, each of which is provided with a light emitting element, displays are provided on the front and back of the display device, thus a high added value can be realized. One of the two substrates, each of which is provided with a light emitting element also functions as a sealing substrate for another substrate, thus a compact, thin, and lightweight display device can be obtained.

Abstract: The present invention provides a TFT array panel and a manufacturing method of the same, which has signal lines including a lower layer of an Al containing metal and an upper layer of a molybdenum alloy (Mo-alloy) comprising molybdenum (Mo) and at least one of niobium (Nb), vanadium (V), and titanium (Ti). Accordingly, undercut, overhang, and mouse bites which may arise in an etching process, are prevented, and TFT array panels that have signal lines having low resistivity and good contact characteristics are provided.

Abstract: In an X-Y address type solid state image pickup device represented by a CMOS image sensor, a back side light reception type pixel structure is adopted in which a wiring layer is provided on one side of a silicon layer including photo-diodes formed therein. and visible light is taken in from the other side of the silicon layer, namely, from the side (back side) opposite to the wiring layer. wiring can be made without taking a light-receiving surface into account, and the degree of freedom in wiring for the pixels is enhanced.

Abstract: The present invention discloses the semiconductor device having the substrate that reflects the laser beam on a surface; that absorbs the laser beam therein; or that partially reflects the laser beam on the surface and partially absorbs the laser beam in the laser annealing. Moreover, the substrate has a poly-crystalline semiconductor film having a large grain size. The present invention suppresses the effect due to the reflected light from a rear surface of the substrate and therefore the uniform laser annealing can be performed.

Abstract: A microcrystalline germanium image sensor array. The array includes a number of pixel circuits fabricated in or on a substrate. Each pixel circuit comprises a charge collecting electrode for collecting electrical charges and a readout means for reading out the charges collected by the charge collecting electrode. A photodiode layer of charge generating material located above the pixel circuits convert electromagnetic radiation into electrical charges. This photodiode layer includes microcrystalline germanium and defines at least an n-layer, and i-layer and a p-layer. The sensor array also includes and a surface electrode in the form of a grid or thin transparent layer located above the layer of charge generating material. The sensor is especially useful for imaging in visible and near infrared spectral regions of the electromagnetic spectrum and provides imaging with starlight illumination.

Abstract: CMOS and CCD imaging devices comprising different in-pixel capacitors and peripheral capacitors and methods of formation are disclosed. The capacitors used in periphery circuits have different requirements from the capacitors used in the pixel itself. Dual stack capacitors comprising two dielectric layers may be provided to achieve low leakage and high capacitance. A single masking step may be provided such that one region has a dual dielectric capacitor and a second region has a single dielectric capacitor. A different dielectric may also be provided in one region compared to another region wherein the inter-electrode insulator comprises a single dielectric in both regions.

Abstract: A solid-state imaging device is disclosed. In the solid-state imaging device, plural unit areas, each having a photoelectric conversion region converting incident light into electric signals are provided adjacently, in which each photoelectric conversion region is provided being deviated from the central position of each unit area to a boundary position between the plural unit areas, a high refractive index material layer is arranged over the deviated photoelectric conversion region, and a low refractive index material layer is provided over the photoelectric conversion regions at the inverse side of the deviated direction being adjacent to the high refractive index material layer, and optical paths of the incident light are changed by the high refractive index material layer and the low refractive index material layer, and the incident light enters the photoelectric conversion region.

Abstract: A novel NPBL and ANPL light emitting semiconductor device and a method for fabricating the same are provided. In the present invention, plural nano-particles are applied in the active layer of the light emitting semiconductor device, so that the leakage current thereof is reduced. In addition, the provided light emitting semiconductor device fabricated via a planar technology process is microscopically planar, but not planar at micro- and nano-scale. Hence the parasitic wave guiding effect, which suppresses the light extraction efficiency of the light emitting semiconductor device, is destroyed thereby.

Abstract: Subjected to obtain a crystalline TFT which simultaneously prevents increase of OFF current and deterioration of ON current. A gate electrode of a crystalline TFT is comprised of a first gate electrode and a second gate electrode formed in contact with the first gate electrode and a gate insulating film. LDD region is formed by using the first gate electrode as a mask, and a source region and a drain region are formed by using the second gate electrode as a mask. By removing a portion of the second gate electrode, a structure in which a region where LDD region and the second gate electrode overlap with a gate insulating film interposed therebetween, and a region where LDD region and the second gate electrode do not overlap, is obtained.

Abstract: A solid-state image pickup device includes: a plurality of light receiving portions arranged in a matrix, and a vertical transfer register which is four-phase driven by first, second, third and fourth transfer electrodes of a three-layer structure. The vertical transfer register is provided for each of columns of the light receiving portions. The first and third transfer electrodes of the first layer are alternately arranged in a charge transfer direction, and the adjacent two of the first and third transfer electrodes extend in parallel to each other between the light receiving portions. With this solid-state image pickup device, the accumulated charge capacity of each transfer region composed of the adjacent transfer electrodes for two-phases is equalized and the area of the light receiving portion is increased irrespective of variations in processed dimension between the transfer electrodes.

Abstract: A thin film transistor (TFT) liquid crystal display (LCD) panel, its array substrate, and its manufacturing method. Color filters are integrated on the TFT array, and color filter stacks are formed on the thin film transistors to replace a black matrix, thereby reducing manufacturing time and costs. The color filter stacks can be placed at the border of the display area of the panel to reduce light leakage. The border of the display area has a liquid crystal injection hole. To allow the size of the liquid crystal injection hole to be increased, and to reduce the light leakage at the hole, color filter blocks and overlapping metal layers can be used at the border of the display area. The color filter stacks and other dielectric layers need to be away from the welding points of repair structures to prevent dielectric layer bursts during a repair process. Storage capacitors can use the feature described above so that the color filters are positioned away from the overlapping portions.

Abstract: An integrated circuit carrier includes a wafer having a receiving zone. The receiving zone is demarcated by a bore in the wafer. A plurality of island-defining portions is arranged about the receiving zone. Each island-defining portion has an electrical terminal electrically connected to an electrical contact of said at least one receiving zone. A rigidity-reducing arrangement connects each island-defining portion to each of its neighboring island-defining portions.

Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.

Abstract: Electromagnetic energy is detected with high efficiency in the spectral range having wavelengths of about 1–2 microns by coupling an absorber layer having high quantum efficiency in the spectral range having wavelengths of about 1–2 microns to an intrinsic semiconducting blocking region of an impurity band semiconducting device included in a solid state photon detector.

Abstract: A thin film transistor array panel is provided, which includes: a gate line formed on an insulating substrate; a gate insulating layer on the gate line; a semiconductor layer on the gate insulating layer; a data line formed on the gate insulating layer; a drain electrode formed at least in part on the semiconductor layer; a first passivation layer formed on the data line and the drain electrode; a color filter formed on the data line and the drain electrode; a second passivation layer formed on the color filter; and a pixel electrode formed on the color filter, connected to the drain electrode, overlapping the second passivation layer, and enclosed by the second passivation layer.

Abstract: A pixel sensor cell for use in a CMOS imager exhibiting improved storage capacitance. The source follower transistor is formed with a large gate that has an area from about 0.3 ?m2 to about 10 ?m2. The large size of the source follower gate enables the photocharge collector area to be kept small, thereby permitting use of the pixel cell in dense arrays, and maintaining low leakage levels. Methods for forming the source follower transistor and pixel cell are also disclosed.

Abstract: A semiconductor photosensor comprises: a semiconductor substrate; a first photodiode formed on the semiconductor substrate; a second photodiode formed on the semiconductor substrate; a first amplifier circuit configured to amplify photocurrent from the first photodiode, the first amplifier circuit being formed on the semiconductor substrate; a second amplifier circuit configured to amplify photocurrent from the second photodiode, the second amplifier circuit being formed on the semiconductor substrate and having an amplifying characteristic substantially identical to that of the first photodiode; an infrared transmissive filter configured to attenuate visible light components relative to infrared light components in incident light, the infrared transmissive filter being provided on the second photodiode; and a subtraction circuit configured to output a difference between an output of the first amplifier circuit and an output of the second amplifier circuit, the subtraction circuit being formed on the semicond

Abstract: A solid-state imaging device of a three-transistor pixel configuration having no selection transistor has a problem of a non-selection hot carrier white point, which is specific to this apparatus. A bias current during a non-reading period of pixels is made to flow to a pixel associated with an immediately previous selection pixel, for example, the immediately previous selection pixel itself. As a result, dark current only for one line occurs in each pixel, and the dark current for one line itself can be reduced markedly. Consequently, defective pixels due to non-selection hot carrier white points can be virtually eliminated.

Abstract: There is provided a high quality liquid crystal panel having a thickness with high accuracy, which is designed, without using a particulate spacer, within a free range in accordance with characteristics of a used liquid crystal and a driving method, and is also provided a method of fabricating the same. The shape of a spacer for keeping a substrate interval constant is made such that it is a columnar shape, a radius R of curvature is 2 ?m or less, a height H is 0.5 ?m to 10 ?m, a diameter is 20 ?m or less, and an angle ? is 65° to 115°. By doing so, it is possible to prevent the lowering of an opening rate and the lowering of light leakage due to orientation disturbance.

Abstract: Embodiments of the invention provide an image sensor having an improved dynamic range. A pixel cell comprises at least one transistor structure. The transistor structure comprises at least one semiconductor channel region, at least one gate for controlling the channel region, and first and second leads respectively coupled to a source region on one side of the at least one channel region and a drain region on an opposite side of the at least one channel region. The transistor structure has at least two threshold voltages associated with the at least one channel region, and an I-V characteristic of the transistor structure is determined at least in part by the threshold voltages.

Abstract: A semiconductor device includes a gate electrode having a straight portion, a dummy electrode located at a point on the extension of the straight portion, a stopper insulating film, a sidewall insulating film, an interlayer insulating film, and a linear contact portion extending, when viewed from above, parallel to the straight portion. The longer side of the rectangle defined by the linear contact portion is, when viewed from above, located beyond the sidewall insulating film and within the top region of the gate electrode and the dummy electrode. A gap G between the gate electrode and the dummy electrode appearing, when viewed from above, in the linear contact portion is filled with the sidewall insulating film such that the semiconductor substrate is not exposed.

Abstract: An electro-optical device includes a pair of substrates including a first substrate and a second substrate, an electro-optical material sandwiched between the pair of substrates, a shading film having a predetermined pattern which is at least partially embedded in the first substrate at the surface facing the electro-optical material, display electrodes which are placed on the second substrate at the surface facing the electro-optical material, and lines connected to the display electrodes directly or through switching elements. In accordance with the electro-optical device having such a shading film, it is possible to reduce or prevent coating defects in an alignment layer, nonuniform rubbing treatment to the alignment layer, and cracking of a counter electrode due to the steps in the upper layers resulting from the formation of the shading film.

Abstract: Phase-changeable memory devices and method of fabricating phase-changeable memory devices are provided that include a phase-changeable material pattern of a phase-changeable material that includes nitrogen atoms. First and second electrodes are electrically connected to the phase-changeable material pattern and provide an electrical signal thereto. The phase-changeable material pattern may have a polycrystalline structure.

Abstract: An active pixel includes a a photosensitive element formed in a semiconductor substrate. A transfer transistor is formed between the photosensitive element and a floating diffusion and selectively operative to transfer a signal from the photosensitive element to the floating diffusion. The floating diffusion is formed from an n-type implant with a dosage in the range of 5e13 to 5e14 ions/cm2. Finally, an amplification transistor is controlled by the floating diffusion.

Abstract: A method of forming a microelectronic structure and its associated structures is described. In one embodiment, a substrate is provided with a sacrificial layer disposed on a hard mask layer, and a metal layer disposed in a trench of the substrate and on the sacrificial layer. The metal layer is then removed at a first removal rate wherein a dishing is induced on a top surface of the metal layer until the sacrificial layer is exposed, and simultaneously removing the metal layer and the sacrificial layer at a second removal rate without substantially removing the hard mask.

Abstract: The invention relates to an avalanche radiation detector comprising a semiconductor substrate (HK) with a front side (VS) and a back side (RS), an avalanche region (AB) which is arranged in the semiconductor substrate (HK) on the front side (VS) of the semiconductor substrate (HK) and a control electrode (R) for adjusting the electric field strength in the avalanche region (AB). It is proposed that the control electrode (R) is also arranged on the front side of the semiconductor substrate (HK).

Abstract: A semiconductor device has a nonvolatile memory employing a split-gate type memory cell structure, using a nitride film as a charge storage layer. An n-type semiconductor region is formed in a main surface of a semiconductor substrate, and then, a memory gate electrode of a memory cell of a split gate type and a charge storage layer are formed over the semiconductor region. Subsequently, side walls are formed on side surfaces of the memory gate electrode, and a photoresist pattern is formed over the main surface of the semiconductor substrate. The photoresist pattern serves as an etching mask, and a part of the main surface of the semiconductor substrate is removed by etching to form a dent. In the region of the dent, the n-type semiconductor region is removed. Then, a p-type semiconductor region for forming a channel of an nMIS transistor for selecting a memory cell is formed.

Abstract: In a trench-gated MOSFET including an epitaxial layer over a substrate of like conductivity and trenches containing thick bottom oxide, sidewall gate oxide, and conductive gates, body regions of the complementary conductivity are shallower than the gates, and clamp regions are deeper and more heavily doped than the body regions but shallower than the trenches. Zener junctions clamp a drain-source voltage lower than the FPI breakdown of body junctions near the trenches, but the zener junctions, being shallower than the trenches, avoid undue degradation of the maximum drain-source voltage. The epitaxial layer may have a dopant concentration that increases step-wise or continuously with depth. Chained implants of the body and clamp regions permits accurate control of dopant concentrations and of junction depth and position. Alternative fabrication processes permit implantation of the body and clamp regions before gate bus formation or through the gate bus after gate bus formation.

Abstract: To provide an organic EL device which, with simple configuration, exhibits a high brightness, a high light-emitting efficiency and a long life span in organic light-emitting layers for all colors, and has excellent conservation stability to heat. An organic EL device of the present invention has a laminate comprising an anode and a cathode with an organic light-emitting layer interposed therebetween. The organic light-emitting layer is made of a high-molecular-weight light-emitting material. Further, the cathode comprises a first layer made of fluoride or oxide of an alkali metallic material, fluoride or oxide of an alkali earth metallic material, or complex or compound of an organic material, and a second layer made of a magnesium alloy. Here, the first layer and the second layer are sequentially deposited on the organic light-emitting layer.

Abstract: This invention provides a photodetector for weak light and a weak light detection system including the photodetector for weak light the photodetector for weak light is comprised of a substrate on which an integrating read circuit including a PIN photodiode or an APD and an FET is mounted, wherein the entire assembly is mounted while separating the substrate from a ground potential without grounding the substrate, such a photodetector for weak light can reduce noise and ensure a high enough sensitivity enough to be able to discriminate the number of photons.

Abstract: A gate length L of a second TFT (21) is set longer than the gate length L of a peripheral TFT. This arrangement makes it possible to accurately control even a small current, using the second TFT (21).

Abstract: An electronic circuit formed on an insulating substrate and having thin-film transistors (TFTs) comprising semiconductor layers. The thickness of the semiconductor layers is less than 1500 ?, e.g., between 100 and 750 ?. A first layer consisting mainly of titanium and nitrogen is formed on the semiconductor layer. A second layer consisting aluminum is formed on top of the first layer. The first and second layers are patterned into conductive interconnects. The bottom surface of the second layer is substantially totally in intimate contact with the first layer. The interconnects have good contacts with the semiconductor layer.

Abstract: CMOS and CCD imaging devices comprising different in-pixel capacitors and peripheral capacitors and methods of formation are disclosed. The capacitors used in periphery circuits have different requirements from the capacitors used in the pixel itself. Dual stack capacitors comprising two dielectric layers may be provided to achieve low leakage and high capacitance. A single masking step may be provided such that one region has a dual dielectric capacitor and a second region has a single dielectric capacitor. A different dielectric may also be provided in one region compared to another region wherein the inter-electrode insulator comprises a single dielectric in both regions.

Abstract: The memory cell transistor has a first cell site gate insulator, a first lower conductive layer on the first cell site gate insulator, a first inter-electrode dielectric on the first lower conductive layer, and a first upper conductive layer on the first inter-electrode dielectric. A select transistor has a second cell site gate insulator having a same thickness as the first cell site gate insulator, a second lower conductive layer on the second cell site gate insulator, a second inter-electrode dielectric on the second lower conductive layer, and a second upper conductive layer on the second inter-electrode dielectric. The peripheral transistor has a first peripheral site gate insulator having a thickness thinner than the first cell site gate insulator.

Abstract: A method to protect a low-K IMD layer underlying a fuse link during a fuse blowing process including a guarded fuse and method for forming the same including forming a fuse portion comprising two metal fuse interconnect structures and a guard ring comprising a metal interconnect structure surrounding the fuse portion in an uppermost IMD layer comprising a dielectric constant of less than about 3.2; forming a protective metal portion electrically isolated in the uppermost IMD layer to cover at least a portion of an area extending between the fuse portions; forming at least one overlying dielectric insulating layer over the uppermost layer to include extended portions of the fuse portion and the guard ring; and, forming a metal fuse link portion to electrically interconnect the fuse portion wherein the fuse portion overlies at least a portion of the protective metal portion.

Abstract: A photodetector is formed in a CMOS circuit using a junction field-effect transistor (JFET). The JFET/CMOS photodetector can be used to create an active pixel sensor for a CMOS digital imager, performing both photodetection and electrical signal amplification, allowing higher fill factors than with conventional APS imagers. A standard CMOS fabrication process is augmented with a small number of steps to integrate the JFET within the pixel, allowing the use of conventional CMOS fabrication plants.