Employing Resonant Tunneling Patents (Class 257/25)
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Patent number: 5636093Abstract: A magnetic multilayer device (1) comprising two layers (3, 5) of magnetic material which are separated by an interposed layered structure comprising a resonant-tunneling double-barrier structure (RTDBS) (7). In such a device (1), exchange coupling between the magnetic layers (3, 5) can be modified by subjection of the RTDBS (7) to an electric field. In this way, the configuration of the magnetisations (M.sub.1, M.sub.2) in the magnetic layers (3, 5), and thus the net magnetic flux generated by the device (1), can be electrically adjusted. The device (1) can be applied inter alia in a magnetic recording head.Type: GrantFiled: September 28, 1995Date of Patent: June 3, 1997Assignee: U.S. Philips CorporationInventors: Martinus A. M. Gijs, Hendrik Van Houten
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Patent number: 5606177Abstract: A resonant tunneling diode (400) made of a silicon quantum well (406) with silicon oxide tunneling barriers (404, 408). The tunneling barriers have openings (430) of size smaller than the electron wave packet spread to insure crystal alignment through the diode without affecting the tunneling barrier height, and the openings (430) have an irregular (nonperiodic) shape.Type: GrantFiled: December 6, 1994Date of Patent: February 25, 1997Assignee: Texas Instruments IncorporatedInventors: Robert M. Wallace, Alan C. Seabaugh
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Patent number: 5606178Abstract: Base contacts are made to one or both barrier layers of a resonant tunneling bipolar transistor, rather than to the quantum well. This is made possible with the use of a type II rather than a type I energy band alignment in the active region.Type: GrantFiled: June 7, 1995Date of Patent: February 25, 1997Assignee: Hughes ElectronicsInventors: Joel N. Schulman, David H. Chow
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Patent number: 5606175Abstract: A quantum well device has an active region adapted to pass a tunneling current of charge carriers and comprising layers of material forming alternating potential barriers and potential wells. The structure defines, in use, a first potential well at one end of the active region, said first potential well defining a first quasi-defined energy level, and to further define second and third quasi-defined energy levels. The relative heights and thicknesses of the potential barriers when the device is in use are structured so that the first quasi-defined energy level has a longer lifetime than the second and third quasi-defined energy levels and there is a degree of coupling between the three quasi-defined energy levels which is strongest between the second and third quasi-defined energy levels. The transmission coefficient through the active region shows a resonance peak at each of the energies of the three quasi-defined energy levels.Type: GrantFiled: November 2, 1995Date of Patent: February 25, 1997Assignee: The University of Manchester Institute of Science & TechnologyInventor: William S. Truscott
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Patent number: 5604356Abstract: The present invention provides an ohmic contact device which comprises: a first layer made of a first compound semiconductor having a first energy band gap; a superlattice in contact with the first layer, the superlattice having modulation-periods comprising alternating a first very thin layer made of the first compound semiconductor and a second very thin layer made of a second compound semiconductor having a second energy band gap being smaller than the first energy band gap, thicknesses of the first very thin layers being gradually reduced from an interface of the first layer to an opposite interface and thicknesses of the second very thin layers are gradually increased from the interface of the first layer to the opposite interface; a second layer made of the second compound semiconductor in contact with the superlattice; and a metal contact in contact with the second layer.Type: GrantFiled: July 5, 1995Date of Patent: February 18, 1997Assignee: NEC CorporationInventor: Yasushi Shiraishi
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Patent number: 5604357Abstract: A semiconductor device comprising a substrate having thereon a capacitance part and an electrode, the capacitance part having two storage regions for conductive carriers, the storage regions having therebetween a first barrier region of a multi-tunneling structure, a second barrier region being provided among the storage region, semiconductor substrate and electrode, the first barrier region comprising two tunneling barriers and a low barrier region interposed therebetween, so that when the conductive carriers are moved between the storage regions to store memory by use of polarization characteristic, high voltage makes higher probability of conductive carrier shift and low voltage lower probability of the carrier shift in synergistic manner, whereby the semiconductor device having merits of writing, erasing and reading characteristic in DRAMs and flash EEPROMs memories.Type: GrantFiled: July 11, 1995Date of Patent: February 18, 1997Assignee: Matsushita Electric Industrial Co., Ltd.Inventor: Takashi Hori
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Patent number: 5589696Abstract: A tunnel transistor comprises a semiconductor film (27) between a gate isolating film (17) and parts of first (13) and second (15) semiconductor layers which are formed in a substrate (11) to serve as source and drain regions with a spacer region left therebetween and covered with the semiconductor film. The gate isolating film is over the part of the first semiconductor layer and is made of either an insulating material or a semiconductor material, each of which materials should have a wider forbidden bandwidth than a semiconductor material of the semiconductor film, such as silicon dioxide, silicon nitride, or aluminium nitride, or gallium phosphide for silicon, or AlGaAs fox gallium arsenide. A source electrode is formed on an uncovered area of the first semiconductor layer. The semiconductor film forms a tunnel junction with the first semiconductor layer and an ohmic junction with the second semiconductor layer, which junction may be either a homojunction or a heterojunction.Type: GrantFiled: October 14, 1992Date of Patent: December 31, 1996Assignee: NEC CorporationInventor: Toshio Baba
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Patent number: 5569933Abstract: An optical controlled resonant tunneling oscillator utilizing an oscillation variation characteristic of a resonant tunneling oscillator in accordance with a negative differential resistance, a series resistance and a static capacitance varied with an intensity of light when the light is incident on a resonant tunneling device having a double barrier quantum well structure and a method for fabricating the same are disclosed. The oscillator can modulate the frequency 2 or 3 levels in response to an intensity of an incident light as compared with the method of a conventioal photoelectric system that modulates the frequency in response to ON/OFF of an electric signal, thereby simplifying the system. The oscillator controls the resonant tunneling at the high speed by light, thereby enabling processing a signal of tens to hundreds GHz.Type: GrantFiled: November 22, 1994Date of Patent: October 29, 1996Assignee: Electronics and Telecommunications Research InstituteInventors: Hye-Yong Chu, Pyong-Woon Park
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Patent number: 5569934Abstract: An optical device includes an asymmetric dual quantum well (ADQW) structure which is comprised of a plurality (at least two) of different semiconductor quantum well layers coupled to each other. In the ADQW structure, the width of a deeper quantum well layer having a narrower band gap is made narrower than that of a less deeper quantum well layer having a wider band gap such that the shift of an exciton wavelength is scarcely caused due to the quantum confined Stark effect by the application of an electric field in a predetermined range. As a result, only a refractive index of the ADQW structure is changed, but an absorption factor is scarcely changed for a given range of wavelength by the application of the electric field. Further, there is provided a member for applying an electric field to the asymmetric dual quantum well structure.Type: GrantFiled: September 28, 1995Date of Patent: October 29, 1996Assignee: Canon Kabushiki KaishaInventors: Kazuhito Fujii, Takeo Ono
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Patent number: 5561306Abstract: A hetero-bipolar transistor includes a collector layer of a first conductivity type, a base layer of a second conductivity type provided on the collector layer, a first emitter structure of the first conductivity type provided on the base layer, and a second emitter structure of the first conductivity type and provided on the base layer, wherein the first and second emitter structures are doped with respect to the base layer, with a sufficiently high impurity concentration level such that a Zener breakdown occurs at the p-n junction formed between the base layer and the first or second emitters upon application of a reverse bias voltage.Type: GrantFiled: August 25, 1994Date of Patent: October 1, 1996Assignee: Fujitsu LimitedInventors: Kenichi Imamura, Motomu Takatsu, Toshihiko Mori
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Patent number: 5554860Abstract: This is a method of generating noise comprising the step of switching a plurality of resonant tunneling diodes each located in the emitter or base of a multi finger transistor such that each of the resonant tunneling diodes switches at a different input voltage. Other devices and methods are also disclosed.Type: GrantFiled: April 17, 1995Date of Patent: September 10, 1996Assignee: Texas Instruments IncorporatedInventor: Alan C. Seabaugh
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Patent number: 5548129Abstract: Quantum well structures are fabricated by use of a process employing a Focused Ion Beam (FIB) scanning in the surface of a semiconductor substrate. The quantum well structures thus fabricated include Resonant Tunneling Transistors (RRTs) and one dimensional quantum wire devices, fabricated in conventional Metal Semiconductor Field Effect Transistors (MESFETs) or in High Electron Mobility Transistors (HEMTs). The RRT comprises a pair of implant barriers in the semiconductor substrate, whereby charge carriers are capable of tunneling through the implant barriers into the quantum well during the state of resonance. The one dimensional quantum wire device comprises a multiplicity of implant barriers disposed in the semiconductor substrate substantially parallel to the travelling direction of the charge carriers. The intersection of the implant barriers and the two dimensional gas (2DEG) inside the HEMT enclose truly one dimensional quantum wells which enable electrons to travel therethrough with high mobility.Type: GrantFiled: August 1, 1995Date of Patent: August 20, 1996Assignee: Hughes Aircraft CompanyInventor: Randall L. Kubena
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Patent number: 5534714Abstract: This is an integrated device which comprises an integrated transistor and resonant tunneling diode where the transistor comprises a substrate 10, a buffer layer 12 over the substrate 10, and a channel layer 14 over the buffer layer 12; and the resonant tunneling diode (RTD) comprises a first contact layer 18, a first tunnel barrier layer 20 over the first contact layer 18, a quantum well 22 over the first tunnel barrier layer 20, a second tunnel barrier layer 24 over the quantum well 22, and a second contact layer 26 over the second tunnel barrier layer 24. Other devices and methods are also disclosed.Type: GrantFiled: November 23, 1994Date of Patent: July 9, 1996Assignee: Texas Instruments IncorporatedInventors: Edward A. Beam, III, Alan C. Seabaugh
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Patent number: 5528051Abstract: The semiconductor component, comprises a succession of alternating stacked layers of a III-V semiconductor material with a large forbidden band such as Al.sub.x Ga.sub.1-x As and a III-V semiconductor material with a small forbidden band such as GaAs with p-doping, defining a quantum (9) with sub-bands of HH and LH type in the region of the layer comprising the material with a small forbidden band in the valence band diagram (E.sub.v) of each corresponding heterostructure. According to the invention, the thickness of the material with a small forbidden band is essentially selected in such a manner that only two quantum sub-levels LH.sub.1 and HH.sub.1 appear in the well, and the energy difference between these two sub-levels corresponds to the energy of the photons (6) to be detected, and the composition of the material with the large forbidden band is essentially selected in such a manner that the height adjacent the barrier (.DELTA.E.sub.Type: GrantFiled: July 22, 1994Date of Patent: June 18, 1996Assignee: Picogiga Societe AnonymeInventor: Linh T. Nuyen
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Patent number: 5521398Abstract: An optical operator designed to be subjected to write radiation for processing read radiation that it receives, the operator comprising an electro-optical material (Q2), first and second materials (Q1, Q3) distributed on either side of the electro-optical material (Q2), said first and second materials (Q1, Q3) being collection quantum wells. Quantum barrier forming materials (6, 8) are interposed between said two materials (Q1, Q3) and the electro-optical material (Q2), with one of the quantum barrier forming materials (6) constituting a filter such that charges of a certain sign photoexcited by the write radiation in a material (4, Q1) on one side of said filter pass through it in the absence of an external electric field to relax in the collection quantum well (Q3) situated on the other side of the filter (6), while charges of opposite sign are blocked by the filter (6) in the other collection well (Q1).Type: GrantFiled: December 8, 1994Date of Patent: May 28, 1996Assignee: France TelecomInventors: Nikolaos Pelekanos, Benoit Deveaud-Pledran, Philippe Gravey, Jean-Michel Gerard
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Patent number: 5514876Abstract: A transistor according to the invention for simultaneously providing at least two current-voltage characteristics includes a base, a collector, and an emitter. At least one of the base, collector, and emitter includes a first layer grown using molecular beam epitaxy (MBE). The first layer includes a first strip having a first doping characteristic created using focused ion beam processing. A second strip has a second doping characteristic created by focused ion beam processing. A middle section of undoped material is located between the first and second strips. A resonant tunneling junction is grown on the first layer using MBE and includes a plurality of layers.Type: GrantFiled: April 15, 1994Date of Patent: May 7, 1996Assignee: TRW Inc.Inventors: Neal J. Schneier, John J. Berenz
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Patent number: 5512764Abstract: This is a vertical field-effect resonant tunneling transistor device comprising: a semi-conducting substrate 46; a drain region 48 above the semi-conducting substrate; a multiple-barrier multi-well resonant tunneling diode 52, 54, 56, 58, 60 above the drain layer; a two dimensional electron gas heterostructure 64 above the multiple-barrier multi-well resonant tunneling diode; a source region 72 extending through the two dimensional electron gas and above the multiple-barrier multi-well resonant tunneling diode; ohmic contacts 70 on the source region, wherein the source region provides an ohmic connection to the two dimensional electron gas; and gate s! 68, 74 besides the source region.Type: GrantFiled: January 3, 1995Date of Patent: April 30, 1996Assignee: Texas Instruments IncorporatedInventors: Alan C. Seabaugh, Chad H. Mikkelson, Gary Frazier
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Patent number: 5504347Abstract: A resonant tunneling transistor (400) with lateral carrier transport through tunneling barriers (404, 408) grown as a refilling of trenches etched partially into a transverse quantum well (410) and defining a quantum wire or quantum dot (406). The fabrication methods include use of angled deposition to create overhangs at the top of openings which define sublithographic separations for tunneling barrier locations.Type: GrantFiled: October 17, 1994Date of Patent: April 2, 1996Assignee: Texas Instruments IncorporatedInventors: Dejan Jovanovic, John N. Randall
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Patent number: 5489786Abstract: A current-controlled resonant tunneling diode (RTD) having an InAs quantum well, AlGaSb barriers and InAs cladding layers is disclosed. The RTD of this invention displays an S-shaped negative differential resistance in its I-V relationship. As a result, the RTD displays the bistability necessary to greatly enhance the speed of operation of many key electronic components by eliminating the need for large load resistances in the circuit design.Type: GrantFiled: October 14, 1994Date of Patent: February 6, 1996Assignee: Hughes Aircraft CompanyInventors: David H. Chow, Joel N. Schulman
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Patent number: 5489539Abstract: Quantum well structures are fabricated by use of a process employing a Focused Ion Beam (FIB) scanning in the surface of a semiconductor substrate. The quantum well structures thus fabricated include Resonant Tunneling Transistors (RRTs) and one dimensional quantum wire devices, fabricated in conventional Metal Semiconductor Field Effect Transistors (MESFETs) or in High Electron Mobility Transistors (HEMTs). The RRT comprises a pair of implant barriers in the semiconductor substrate, whereby charge carriers are capable of tunneling through the implant barriers into the quantum well during the state of resonance. The one dimensional quantum wire device comprises a multiplicity of implant barriers disposed in the semiconductor substrate substantially parallel to the travelling direction of the charge carriers. The intersection of the implant barriers and the two dimensional gas (2DEG) inside the HEMT enclose truly one dimensional quantum wells which enable electrons to travel therethrough with high mobility.Type: GrantFiled: January 10, 1994Date of Patent: February 6, 1996Assignee: Hughes Aircraft CompanyInventor: Randall L. Kubena
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Patent number: 5489785Abstract: A band-to-band resonant tunneling transistor including GaSb and InAs resonant tunneling layers separated by a thin barrier layer and a second InAs layer separated from the GaSb layer by another thin barrier layer. A terminal on the InAs resonant tunneling layer and a terminal on the second InAs layer. Leakage current reduction layers are positioned on the second InAs layer with a bias terminal positioned thereon. The InAs resonant tunneling layer has a plurality of quantized states which are misaligned with the ground state of the GaSb layer in a quiescent state, each of the quantized states of the InAs resonant tunneling layer are movable into alignment with the ground state of the GaSb layer to provide current flow through the transistor with the application of a specific potential to the terminal on the second InAs layer.Type: GrantFiled: March 11, 1994Date of Patent: February 6, 1996Assignee: MotorolaInventors: Saied N. Tehrani, Jun Shen, Herbert Goronkin, Xiaodong T. Zhu
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Patent number: 5486706Abstract: By etching, a first groove and a second groove are formed in a silicon substrate. Surfaces of the side walls of these grooves have a surface orientation of (111). The first and second grooves sandwich a silicon thin plate therebetween, which is formed as a part of the silicon substrate. The silicon thin plate is sufficiently thin so as to act as a quantum well. Further, a pair of silicon oxide films acting as tunneling barriers are formed on the surfaces of the side walls of the silicon thin plate, thus forming a double barrier structure. In addition, a pair of polysilicon electrodes are formed and sandwich the double barrier structure. As a result, the structure of a resonance tunneling diode, which utilizes the resonance tunneling effect, is provided. Adding a third electrode to the above structure provides a hot electron transistor.Type: GrantFiled: May 26, 1994Date of Patent: January 23, 1996Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Koichiro Yuki, Yoshihiko Hirai, Kiyoshi Morimoto, Masaaki Niwa, Juro Yasui, Kenji Okada, Masaharu Udagawa
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Patent number: 5466949Abstract: A resonant tunneling diode (400) made of a germanium quantum well (406) with silicon oxide tunneling barriers (404, 408). The silicon oxide tunneling barriers (404, 408) plus germanium quantum well (406) may be fabricated by oxygen segregation from germanium oxides to silicon oxides.Type: GrantFiled: August 4, 1994Date of Patent: November 14, 1995Assignee: Texas Instruments IncorporatedInventor: Yasutoshi Okuno
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Patent number: 5459334Abstract: A quantum wire embedded in another material or a quantum wire which is free standing. Specifically, the quantum wire structure is fabricated such that a quantum well semiconductor material, for example Gallium Arsenide (GaAS), is embedded in a quantum barrier semiconductor material, for example Aluminum Arsenide (AlAs). Preferably, the entire quantum wire structure is engineered to form multiple subbands and is limited to a low dimensional quantum structure. The dimensions of the quantum wire structure are preferably around 150.times.250 .ANG.. This structure has a negative absolute conductance at a predetermined voltage and temperature. As a result of the resonant behavior of the density of states, the rates of electron scattering in the passive region (acoustic phonon and ionized impurity scattering as well as absorption of optical phonons) decrease dramatically as the electron kinetic energy increases.Type: GrantFiled: September 20, 1994Date of Patent: October 17, 1995Assignee: The United States of America as represented by the Secretary of the ArmyInventors: Mitra Dutta, Michael A. Stroscio, Vladimir V. Mitin, Rimvydas Mickevicius
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Patent number: 5459331Abstract: A semiconductor device includes a laminated structure including a GaAs layer and an InGaAs layer grown on the GaAs layer and through which operating current flows perpendicular to the InGaAs layer. The InGaAs layer includes a plurality of very thin GaAs layers through which most of the operating current passes by tunneling, located within the InGaAs layer and spaced apart at intervals larger than a critical thickness at which a pseudomorphic state of an InGaAs crystal grown on a GaAs crystal is maintained. Therefore, segregation of In atoms, i.e., unfavorable movement of In atoms, toward the surface of the growing InGaAs crystal, that occurs when the InGaAs layer is grown at a high temperature, and loss of In atoms is suppressed by the very thin GaAs layers. Thus, the InGaAs layer can be grown on the GaAs layer at a high temperature without degrading the surface morphology of the InGaAs layer.Type: GrantFiled: February 3, 1994Date of Patent: October 17, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Shigekazu Izumi
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Patent number: 5449922Abstract: A bipolar heterojunction diode has an anode (11, 41), a blocking layer (12, 42) and a junction region (13, 14, 43). a heterojunction (32, 58) in the junction region (13, 14, 43) is utilized to create a misalignment between the band gap of the anode (11, 41) and a band gap of the heterojunction (13, 14, 43). The misalignment prevents a depletion region from extending into the heterojunction (13, 14, 43).Type: GrantFiled: May 3, 1994Date of Patent: September 12, 1995Assignee: Motorola, Inc.Inventors: Jun Shen, Herbert Goronkin, Saied N. Tehrani
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Patent number: 5447873Abstract: A quantum dot logic unit (8) is provided which comprises a row of quantum dots (14, 16, and 18), with each quantum dot separated by vertical heterojunction tunneling barriers (20, 22, 24, and 26). Electric potentials placed on inputs (32, 34, and 36) are operable to modulate quantum states within the quantum dots, thus controlling electron tunneling through the tunneling barriers.Type: GrantFiled: March 16, 1994Date of Patent: September 5, 1995Assignee: Texas Instruments IncorporatedInventors: John N. Randall, Gary A. Frazier
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Patent number: 5446293Abstract: Disclosed is an operation principle and an epitaxial structure of resonant tunneling opto-electronic device. According to the present invention, the photo-generated holes stored in front of the double barrier quantum well structure by light illumination. As a result, a large potential drop occurs in the double barrier quantum well structure. And a peak signal of the opto-electronic resonant tunneling device is generated at a relatively lower voltage illumination to one generated before introducing the light into the device. An amount of photocurrent is 10.sup.3 times and over as compared to the conventional p-i-n diode because a resonant tunneling current is optically controlled by light illumination. So that, it is possible to drive peripheral circuit without use of additional amplifiers for amplifying an output signal from the opto-electronic device.Type: GrantFiled: November 9, 1994Date of Patent: August 29, 1995Assignee: Electronics and Telecommunications Research InstituteInventors: Hye-Yong Chu, Pyong-Woon Park, Seon-Gyu Han, Young-Wan Choi, Gyung-Ock Kim
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Patent number: 5444267Abstract: A quantum device including a plate-like conductor part having a necking portion made by forming a first mask layer having a first strip portion on a conductor substrate; forming a second mask layer having a second strip portion on the conductor substrate; etching a region of the conductor substrate which is not covered with the first and second mask layers, by using the first and second mask layers as an etching mask, to form a plurality of first recess portions on a surface of the conductor substrate; selectively covering side faces of the plurality of first recess portions, and side faces of the first and second mask layers with a side wall film; selectively removing only the second mask layer; etching another region of the conductor substrate which is not covered with the first mask layer and the side wall film, by using the first mask layer and the side wall film as an etching mask, to form a plurality of second recess portions on the surface of the conductor substrate; selectively removing part of anotheType: GrantFiled: October 28, 1994Date of Patent: August 22, 1995Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kenji Okada, Kiyoshi Morimoto, Masaharu Udagawa, Koichiro Yuki, Masaaki Niwa, Yoshihiko Hirai, Juro Yasui
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Patent number: 5440148Abstract: A quantum operational device includes a plurality of quantum boxes arranged in a plurality of stages isolated by a distance which permits tunnelling of electrons or holes through the distance, uses as bit information the presence or absence of an electron or a hole in each of the quantum boxes, and prohibits tunnelling of an electron or a hole from a quantum box in a stage to another quantum box in an adjacent stage when an electron or a hole exists in the quantum box in the adjacent stage. The device only needs quite low power, performs operation at a high speed, and can be fabricated by a simple manufacturing process.Type: GrantFiled: April 18, 1994Date of Patent: August 8, 1995Assignee: Sony CorporationInventor: Kazumasa Nomoto
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Patent number: 5436469Abstract: A room temperature high speed transistor that does not suffer deleterious effects from plasmon scattering. The transistor of the present invention comprises a semiconducting base region having a type of majority carriers and sub-band ordering associated with the majority carriers. The transistor further comprises a semiconducting collector region contacting the base region at a collector-base heterojunction, the semiconducting collector region having the same type of majority carriers as the semiconducting base region and having a sub-band ordering different than that of the base region. The transistor further comprises a semiconducting emitter region contacting the base region at an emitter-base heterojunction, the semiconducting emitter region having the same type of majority carriers as the semiconducting base region. In active operation of the transistor of the present invention, carriers are injected from a main sub-band in the emitter region into a satellite sub-band the base region.Type: GrantFiled: June 15, 1994Date of Patent: July 25, 1995Inventor: Nicolas J. Moll
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Patent number: 5428224Abstract: A field effect transistor with improved operation speed and reduced noise includes a drain electrode disposed on a channel layer with a contact layer interposed therebetween, a source electrode, and a gate electrode disposed between the drain and source electrodes. A resonant tunneling diode is disposed between the source electrode and the channel region for supplying hot electrons to the channel layer beneath the gate electrode.Type: GrantFiled: October 28, 1993Date of Patent: June 27, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kazuo Hayashi, Takuji Sonoda
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Patent number: 5422496Abstract: An interband single-electron tunnel/transistor utilizes an interband single-electron tunneling phenomenon between a valence band and a conduction band through a p-n junction. The transistor includes the combination of microcapacities as fundamental constituent elements each formed by joining a p-type semiconductor material doped with an impurity in the degree of concentration with which a Fermi level overlaps a valence band and an n-type semiconductor material doped with an impurity in the degree of concentration with which the Fermi level overlaps a conduction band. The microcapacity includes a p-n junction having a junction area with which interband electron tunneling is inhibited due to Coulomb blockade.Type: GrantFiled: September 8, 1993Date of Patent: June 6, 1995Assignee: Hitachi, Ltd.Inventors: Shiroo Kamohara, Toru Toyabe, Kozo Katayama, Shuichi Yamamoto, Sigeo Ihara
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Patent number: 5414274Abstract: A quantum multifunction transistor including a plurality of conduction layers of semiconductor material with a tunnel barrier layer sandwiched therebetween. The conduction layers each being very thin to form discrete energy levels, and the material being chosen so that discrete energy levels therein are not aligned across the tunnel barrier layer in an equilibrium state. A gate coupled to a portion of one of the conduction layers for aligning, in response to a voltage applied thereto, discrete energy levels in the conduction layers across the tunnel barrier layer, whereby majority carrier current flows through the transistor. Application of a higher voltage to the gate results in minority carrier current flow through the transistor.Type: GrantFiled: July 26, 1993Date of Patent: May 9, 1995Assignee: Motorola, Inc.Inventors: Herbert Goronkin, Saied N. Tehrani, Jun Shen, Xiaodong T. Zhu
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Patent number: 5408106Abstract: A lateral resonant tunneling transistor is provided comprising heterojunction barriers (24) and a quantized region (33). Current between source contact (26) and drain contact (28) can be switched "ON" or "OFF" by placing an appropriate voltage on gate contacts (30) and (32). The potential on gate contacts (30) and (32) selectively modulate the quantum states within quantized region (33) so as to allow electrons to tunnel through heterojunction barrier (24) and quantized region (33).Type: GrantFiled: May 2, 1994Date of Patent: April 18, 1995Assignee: Texas Instruments IncorporatedInventor: Alan C. Seabaugh
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Patent number: 5399879Abstract: An optical switching device is comprised of an asymmetrical double barrier resonant tunnelling diode (RTD) connected in series with load resistance apparatus to a power source, apparatus for illuminating the RTD with an infrared incident light beam, apparatus for applying signal power to the RTD, and apparatus for varying the power within the RTD.Type: GrantFiled: February 5, 1993Date of Patent: March 21, 1995Assignee: National Research Council of CanadaInventor: Hui C. Liu
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Patent number: 5389798Abstract: A high-speed semiconductor device includes an emitter layer serving as an injection source of hot electrons and a collector barrier layer disposed between a base layer and a collector layer. The potential profile of the collector barrier layer gradually varies from a region in the vicinity of the boundary between the base layer and the collector barrier layer whereby reflection of electrons at the collector barrier layer is significantly reduced. Therefore, current density in the ON state of the device is increased without damaging the high speed characteristics of the device, and current density in the OFF state of the device is decreased, resulting in a high-performance and high-speed semiconductor device.Type: GrantFiled: October 1, 1992Date of Patent: February 14, 1995Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Seiji Ochi, Hirotaka Kizuki
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Patent number: 5389804Abstract: A resonant-tunneling heterojunction bipolar transistor (RHBT) device having a superlattice structure and a PN junction. The RHBT includes an emitter layer; a base layer; a collector layer operatively facing the base layer to form a PN junction at the face between the base layer and the collector layer; and a superlattice structure including at least one quantum well defining a sub-band of energy at which carriers resonant-tunnel therethrough, formed at least in the emitter layer and operatively facing to the base layer.The RHBT has a differential negative resistance characteristics for realizing a variety of logic circuits and includes an electron resonance and a positive hole resonance, for which the generation condition is changeable in response to a mole fraction of material of the emitter layer.Type: GrantFiled: November 8, 1993Date of Patent: February 14, 1995Assignee: Fujitsu LimitedInventors: Naoki Yokoyama, Kenichi Imamura
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Patent number: 5386126Abstract: A solid state, electronic, optical transition device includes a multiple-layer structure of semiconductor material which supports substantially ballistic electron/hole transport at energies above/below the conduction/valance band edge. The multiple layer structure of semiconductor material includes a Fabry-Perot filter element for admitting electrons/holes at a first quasibound energy level above/below the conduction/valance band edge, and for depleting electrons/holes at a second quasibound energy level which is lower/higher than the first energy level. Such an arrangement allows common semiconductor material to be used to produce emitters and detectors and other devices which can operate at any of selected frequencies over a wide range of frequencies.Type: GrantFiled: January 29, 1993Date of Patent: January 31, 1995Inventors: Gregory H. Henderson, Lawrence C. West, Thomas K. Gaylord, Charles W. Roberts, Elias N. Glytsis, Moses T. Asom
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Patent number: 5350931Abstract: One or more double barrier resonant tunneling filters are provided for electron propagation mode control in nanostructure quantum wire electron waveguides and in quantum interference devices in the waveguide.Type: GrantFiled: May 19, 1993Date of Patent: September 27, 1994Assignee: The United States of America as represented by the Secretary of the ArmyInventors: James F. Harvey, Robert A. Lux
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Patent number: 5349202Abstract: A tunneling transistor comprising an emitter layer, a barrier layer having a conduction band higher in energy than a conduction band of said emitter layer and a valence band lower in energy than a valence band of said emitter layer, and further having a thickness with which electrons can substantially tunnel the barrier layer, a collector layer having a conduction band lower in energy than the valence band of said emitter layer and a conductivity type opposite to said emitter layer, and further having a thickness with which quantum levels are substantially formed, a gate layer having a conduction band higher in energy than the conduction band of said layer and a valence band of said emitter layer, and further having a thickness with which the probability of electron tunneling is substantially greatly reduced, said layers been laminated in this order, and electrodes which form ohmic junctions on said emitter layer and said collector layer and an electrode which forms a Schottky junction on said gate layer.Type: GrantFiled: November 25, 1992Date of Patent: September 20, 1994Assignee: NEC CorporationInventor: Tetsuya Uemura
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Patent number: 5347140Abstract: A resonant electron transfer device includes a plurality of units each of which has of at least one one-dimensional quantum wire having a quantum well elongated in a direction, a zero-dimensional quantum dot having a base quantization level higher than that of the one-dimensional quantum wire an electrode for controlling respective internal levels of the quantum wire and dot wherein the quantum wire and dot forming one unit is connected via a potential barrier capable of exhibiting a tunnel effect therebetween.Type: GrantFiled: August 27, 1992Date of Patent: September 13, 1994Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yoshihiko Hirai, Kiyoshi Morimoto, Yasuaki Terui, Atsuo Wada, Kenji Okada, Juro Yasui, Masaaki Niwa
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Patent number: 5336904Abstract: A field effect transistor according to the present invention uses a silicon monocrystalline substrate. At least two independent thin amorphous silicon layers are formed in a position for preventing movement of majority carriers in a channel region in the surface of the silicon substrate. Each amorphous silicon layer is between monocrystalline silicon layers. A gate electrode is formed on the surface of the channel region through a gate insulating layer. Thin potential barriers and a potential well are formed in the channel region by at least two amorphous silicon layers. Sharp potential barriers are formed by forming thin amorphous silicon layers, and a field effect transistor utilizing the resonant-tunneling effect with high tunneling efficiency is implemented.Type: GrantFiled: April 2, 1992Date of Patent: August 9, 1994Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Shigeru Kusunoki
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Patent number: 5326985Abstract: A semiconductor structure that provides both N-type and P-type doping from a single dopant source is provided. A first doping region (13) comprising a first material composition includes holes and electrons in a doping energy level (E.sub.D)- A first undoped spacer region (12) comprising the first material composition covers the doping region (13). An undoped channel (11,14) comprising a second material composition covers the first spacer region (12) and a second undoped spacer region (12) comprising the first material composition covers the undoped channel (11,14). The first material composition has a wider bandgap than the second material composition and the doping energy level (E.sub.D) is selected to provide electrons to the undoped channel (11,14) when the second material composition has a conduction band minimum less than the doping energy level (E.sub.Type: GrantFiled: September 28, 1992Date of Patent: July 5, 1994Assignee: Motorola, Inc.Inventors: Herbert Goronkin, Jun Shen, Saied N. Tehrani
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Patent number: 5311020Abstract: A monolithically-integrated semiconductor/ superconductor infrared detector and readout circuit providing sensitive, low-noise detection of infrared radiation for high-performance focal plane array applications. The infrared detector and readout circuit includes a semiconductor infrared detector and a semiconductor/superconductor transimpedance readout amplifier fabricated directly on the infrared detector using thin-film, integrated-circuit processing techniques. A superconducting analog-to-digital (A/D) converter digitizes the detector signals in the cryogenically cooled environment of the detector before coupling the signals to the much warmer and electromagnetically noisier environment of the back-end signal processing electronics, thus reducing noise contamination.Type: GrantFiled: November 4, 1992Date of Patent: May 10, 1994Assignee: TRW Inc.Inventors: Arnold H. Silver, Hugo W. Chan, Bruce J. Dalrymple, Szutsun S. Ou, Eugene L. Dines, Susanne L. Thomasson
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Patent number: 5298763Abstract: A semiconductor structure that provides intrinsic doping from native defects is provided. A quantum well including a narrow bandgap material (11, 14) having a low concentration of native defects is sandwiched between two wide bandgap spacer layers (12, 20, 17, 15). The spacer layers (12, 20, 17, 15) have a low concentration of native defects. At least one doping region (13, 16) having a high concentration of native defects positioned adjacent to one of the undoped spacer layers (12, 17).Type: GrantFiled: November 2, 1992Date of Patent: March 29, 1994Assignee: Motorola, Inc.Inventors: Jun Shen, Saied Tehrani, Herbert Goronkin
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Patent number: 5296721Abstract: A double barrier tunnel diode (10) has a quantum well (12), a pair of electron injection layers (16) on either side of the quantum well (12), and a barrier layer (14) between each of the electron injection layers (16) and the quantum well (12), in a strained biaxial epitaxial relationship with the quantum well (12). The material of the quantum well (12) is chosen such that the biaxial strain is sufficient to reduce the energy of heavy holes in the quantum well (12) to less than the energy of the conduction band minimum energy of the electron injection layers (16). Preferably the quantum well (12) is made of gallium antimonide with from about 1 to about 40 atomic percent arsenic alloyed therein, the electron injection layers (16) are made of indium arsenide, and the barrier layers (14) are made of aluminum antimonide.Type: GrantFiled: July 31, 1992Date of Patent: March 22, 1994Assignee: Hughes Aircraft CompanyInventors: Joel N. Schulman, David H. Chow
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Patent number: 5294809Abstract: A resonant tunneling diode having a quantum well sandwiched between first and second tunnel barrier layers and the quantum well and tunnel barrier layers sandwiched between an injection layer and a collector layer. The improvement includes a relatively thin layer of semiconductor material sandwiched between either the first tunnel barrier layer and the injection layer or the first tunnel barrier layer and the quantum well. The thin semiconductor layer has a valence band with an energy level lower than the valence band of the first tunnel barrier layer so as to prevent minority carriers from travelling toward the injection layer.Type: GrantFiled: May 24, 1993Date of Patent: March 15, 1994Assignee: Motorola, Inc.Inventors: Herbert Goronkin, Saied N. Tehrani, Jun Shen, Xiaodong T. Zhu
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Patent number: 5285081Abstract: A field effect transistor has a quantum well structure covered with an n-type cap layer, and control gate electrodes are provided on the cap layer on both sides of a gate electrode between source and drain electrodes, wherein the gate electrode and the control gate electrodes are biased in such a manner as to produce quasi one-dimensional electron gas under electron resonance for allowing current to flow between the source and drain electrodes, and the quasi one-dimensional electron gas is much narrower than the gate electrode patterned through a lithographic process so that the field effect transistor is free from controllable limits of the lithographic process.Type: GrantFiled: December 8, 1992Date of Patent: February 8, 1994Assignee: NEC CorporationInventor: Yuji Ando
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Patent number: H1570Abstract: A quantum interference device in the form of a variable lateral confinement resonant tunneling transistor having a quantum waveguide structure including a primary current transmission path defined by a region between source and drain electrodes and where there is a resonance region therebetween in which quantum interference of tunneling wave functions establish a resonance tunneling condition that extends beyond the primary current path. Upon the application of a voltage across the drain and source electrodes, a tunneling current can be made to flow. A gate electrode formed on the quantum well structure remote from the primary current transmission path includes a variable depletion region thereunder or an electrostatic pinch off region, the size of which is a function of the magnitude of the bias voltage applied thereto.Type: GrantFiled: March 31, 1993Date of Patent: August 6, 1996Assignee: The United States of America as represented by the Secretary of the ArmyInventors: Robert A. Lux, James F. Harvey