With Means To Concentrate Stress Patents (Class 257/418)
  • Patent number: 7304358
    Abstract: A MOS transistor with a deformable gate formed in a semiconductor substrate, including source and drain areas separated by a channel area extending in a first direction from the source to the drain and in a second direction perpendicular to the first one, a conductive gate beam placed at least above the channel area extending in the second direction between bearing points placed on the substrate on each side of the channel area, and such that the surface of the channel area is hollow and has a shape similar to that of the gate beam when said beam is in maximum deflection towards the channel area.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: December 4, 2007
    Assignees: STMicroelectronics S.A., Commissariat a l'Energie Atomique
    Inventors: Pascal Ancey, Nicolas Abele, Fabrice Casset
  • Patent number: 7300815
    Abstract: Described is a process to pattern adhesion and top contact layers in such a way that at least some portion of the top contact layers overlaps the adhesion layer, while another portion of the top contact layer overlaps with the bottom contacts, but does not overlap with the adhesion layer. The overlap between the top contact layer and the adhesion layer helps to hold the top contact layer onto the sacrificial layer. Because there is no overlap between the adhesion layer and the bottom contact, the removal of adhesion layer is no longer necessary, leading to better contacts and simplifying the fabrication process.
    Type: Grant
    Filed: April 25, 2005
    Date of Patent: November 27, 2007
    Assignee: Schneider Electric Industries SAS
    Inventors: Gordon Tam, Jun Shen
  • Patent number: 7279760
    Abstract: The present invention relates to a nanotube device (100, 600), comprising a nanotube with a longitudinal and a lateral extension, a structure for supporting at least a first part of the nanotube, and first means for exerting a force upon the nanotube in a first direction defined by its lateral extension. At least a second part of the nanotube protrudes beyond the support of said structure, so that when said force exceeds a certain level, the second part of the nanotube will flex in the direction of its lateral extension, and thereby close a first electrical circuit. Suitably, the first means for exerting said force upon the nanotube is an electrical means, the force being created by applying a voltage to the means.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: October 9, 2007
    Assignee: Chalmers Intellectual Property Rights AB
    Inventors: Susanne Viefers, Tomas Nord, Jari Kinaret
  • Patent number: 7270868
    Abstract: A component having a surface micromechanical structure containing both movable elements and immovable elements, and a method of manufacturing same are described. The surface micromechanical structure of the component is produced in a functional layer, which is connected to a substrate via at least one electrically non-conductive first insulation layer and at least one first sacrificial layer. The movable elements of the surface micromechanical structure are exposed by removing the first sacrificial layer. The first insulation layer is made of a material which is not substantially attacked by the process of removing the first sacrificial layer. Thus the removal of the sacrificial layer may be limited in a design-controlled manner. At the same time, a reliable electrical insulation of the surface micromechanical structure with respect to the substrate of the component and a reliable mechanical fastening of the immovable elements of the surface micromechanical structure to the substrate are ensured.
    Type: Grant
    Filed: July 14, 2003
    Date of Patent: September 18, 2007
    Assignee: Robert Bosch GmbH
    Inventors: Thorsten Pannek, Udo Bischof, Silvia Kronmueller, Jens Frey, Ulf Wilhelm
  • Patent number: 7253488
    Abstract: A piezo-TFT cantilever microelectromechanical system (MEMS) and associated fabrication processes are provided. The method comprises: providing a substrate, such as glass for example; forming thin-films overlying the substrate; forming a thin-film cantilever beam; and simultaneously forming a TFT within the cantilever beam. The TFT is can be formed least partially overlying a cantilever beam top surface, at least partially overlying a cantilever beam bottom surface, or embedded within the cantilever beam. In one example, forming thin-films on the substrate includes: selectively forming a first layer with a first stress level; selectively forming a first active Si region overlying the first layer; and selectively forming a second layer overlying the first layer with a second stress level. The thin-film cantilever beam is formed from the first and second layers, while the TFT source/drain (S/D) and channel regions are formed from the first active Si region.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: August 7, 2007
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Changqing Zhan, Michael Barrett Wolfson, John W. Hartzell
  • Patent number: 7183620
    Abstract: A differential pressure sensor has a semiconductor wafer having a top and bottom surface. The top surface of the wafer has a central active area containing piezoresistive elements. These elements are passivated and covered with a layer of silicon dioxide. Each element has a contact terminal associated therewith. The semiconductor wafer has an outer peripheral silicon frame surrounding the active area. The semiconductor wafer is bonded to a glass cover member via an anodic or electrostatic bond by bonding the outer peripheral frame to the periphery of the glass wafer. An inner silicon dioxide frame forms a compression bond with the glass wafer when the glass wafer is bonded to the silicon frame. This compression bond prevents deleterious fluids from entering the active area or destroying the silicon. The above described apparatus is mounted on a header such that through holes in the glass wafer are aligned with the header terminals.
    Type: Grant
    Filed: June 21, 2005
    Date of Patent: February 27, 2007
    Assignee: Kulite Semiconductor Products, Inc.
    Inventors: Anthony D. Kurtz, Alexander A. Ned
  • Patent number: 7176540
    Abstract: A method for producing micromechanical structures, in which a functional layer is deposited onto a sacrificial layer, and the sacrificial layer is removed again for the production of at least one mechanical functional element, which is characterized by a surface barrier layer, with which the functional layer begins on the sacrificial layer, and which has a different state from the remaining functional layer, is also removed at least to a considerable part, or, on the functional layer, one layer or a plurality of layers having at least approximately the same properties with respect to stress in the layer or layers such as the surface barrier layer is (are) applied. Additionally, a micromechanical structure having a functional layer in which the functional layer is constructed in such a way that the stresses are neutralized or no stress gradient appears.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: February 13, 2007
    Assignee: Robert Bosch GmbH
    Inventors: Wilhelm Frey, Christoph Duenn
  • Patent number: 7176541
    Abstract: A pressure sensor chip includes a diaphragm and pads. A flexible printed circuit board (FPC) includes a resin sheet having a through-hole and wiring patterns that are formed within the resin sheet and sealed. The resin sheet is press-fitted to the pressure sensor chip such that the diaphragm is bared at the through-hole. The wiring patterns are connected to the pads, and junctions between the wiring patterns and the pads are sealed with the resin sheet.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: February 13, 2007
    Assignee: Denso Corporation
    Inventors: Hiroaki Tanaka, Inao Toyoda, Ichiharu Kondo, Makoto Totani
  • Patent number: 7138693
    Abstract: A method for processing microelectromechanical devices is disclosed herein. The method prevents the diffusion and interaction between sacrificial layers and structure layers of the microelectromechanical devices by providing selected barrier layers between consecutive sacrificial and structure layers.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: November 21, 2006
    Assignee: Reflectivity, Inc.
    Inventors: Satyadev Patel, Jonathan Doan, Andrew Huibers
  • Patent number: 7135749
    Abstract: A pressure sensor includes a silicon-on-insulator (SOI) substrate, a glass substrate bonded to the SOI substrate by anode bonding, a silicon island formed on a part of a silicon layer of the SOI substrate and surrounded by a groove extending to an insulating layer of the SOI substrate, a through hole formed in the glass substrate, and an output electrode that is made of a conductive material, is disposed inside the through hole, and is electrically connected to an electrode formed on the glass substrate via the silicon island.
    Type: Grant
    Filed: January 3, 2005
    Date of Patent: November 14, 2006
    Assignee: Alps Electric Co., Ltd.
    Inventors: Shigefumi Sakai, Munemitsu Abe
  • Patent number: 7122396
    Abstract: The present invention provides a semiconductor acceleration sensor wherein a semiconductor element is prevented from being damaged even when at least part of a weight is disposed in an internal space of a semiconductor sensor element and the mass of a weight is accordingly increased. An inner peripheral surface of a support portion 9 is constituted by four trapezoidal inclined surfaces 13 of a substantially identical shape which are annularly combined so as to define an outer peripheral surface of a frust-pyramidal space. A weight 3 is so constructed as to have an abutting portion including a linear portion 3d which abuts against the inclined surfaces 13 constituting the inner peripheral surface of the support portion 9 when the weight 3 makes a maximum displacement in a direction where a diaphragm portion 11 is located. The abutting portion 3d has a circular outline shape as seen from a side where a weight fixing portion 7 is located.
    Type: Grant
    Filed: October 3, 2003
    Date of Patent: October 17, 2006
    Assignee: Hokuriku Electric Industry Co., Ltd.
    Inventors: Yoshiyuki Nakamizo, Tsutomu Sawai, Masato Ando
  • Patent number: 7109561
    Abstract: The present invention relates to a method of manufacturing a semiconductor substrate including the back grind step, the dicing step, the pick up step, and the die bonding step of the wafer; and to a semiconductor substrate jig used in such method. The object of the present invention is to mitigate the effect and to prevent damage caused by the lack of strength in thinned semiconductor substrates. A jig with an outer frame 21, and a rubber film 22 arranged within the outer frame 21 and having increasing and decreasing body size while deforming its shape by supplying air therein are provided. As the volume of the rubber film 22 increases, the wafer-fixing jig 20 deforms the rubber film and allows the tapes 2 and 6 arranged between the wafer 1 and the rubber film 22A to be pushed toward the wafer 1 gradually from the center outward. The attachment step, the back grind step, the tape reapplication step, the pick up step and the die bonding step are conducted using such wafer-fixing jig.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: September 19, 2006
    Assignee: Fujitsu Limited
    Inventors: Kazuo Teshirogi, Yuzo Shimobeppu, Kazuhiro Yoshimoto, Mitsuhisa Watanabe, Yoshiaki Shinjo, Eiji Yoshida, Noboru Hayasaka
  • Patent number: 7084517
    Abstract: A semiconductor device connecting structure is provided for connecting a semiconductor IC to a substrate. A bonding layer is placed between the substrate and the semiconductor IC to accomplish adhesion therebetween. Sufficient heat and pressure are applied to the bonding layer to create spaces therein which deform during relative movement between the semiconductor IC and substrate thereby maintaining consistent electrical contact between the semiconductor contact bumps and electrodes on the substrate.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: August 1, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Kenji Uchiyama
  • Patent number: 7075162
    Abstract: A valve structure includes an elastomeric block formed with first and second microfabricated recesses separated by a membrane portion of the elastomeric block. The valve is actuated by positioning a compliant electrode on a first side of the first recess proximate to and in physical communication with the membrane. Where the valve is to be electrostatically actuated, a second electrode is positioned on a second side of the first recess opposite the first side. Application of a potential difference across the electrodes causes the compliant electrode and the membrane to be attracted into the flow channel. Where the valve is to be electrostrictively actuated, a second electrode is positioned on the same side of the recess as the compliant electrode. Application of a potential difference across the electrodes causes the electrodes to be attracted such that elastomer membrane portion material between them is compressed and bows into the flow channel.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: July 11, 2006
    Assignee: Fluidigm Corporation
    Inventor: Marc Unger
  • Patent number: 7056759
    Abstract: A microelectromechanical system is made by establishing a flexure protection layer over a portion of at least one flexure which is located on a substrate. The flexure protection layer is deposited such that a portion of the flexure is left exposed. Contact is established between a flexure-engaging element and the exposed portion of the flexure. The remaining flexure protection layer is removed after the flexure-engaging element is patterned and etched.
    Type: Grant
    Filed: April 27, 2004
    Date of Patent: June 6, 2006
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: James R. Przybyla, Arthur R. Piehl
  • Patent number: 7057247
    Abstract: There is disclosed a combined absolute differential pressure transducer which consists of two sensors made from the same wafer silicon and selected to be adjacent to each other on the wafer. Since the same pressure is applied to the boss side of both sensors and a second pressure is applied to the opposite side of the differential sensor, deflection and the stress of the second sensor is determined by the pressure difference across the deflecting portion of the sensor. To obtain the same stresses in the thin section of each sensor, the overall active area of each sensor is different. For the same thickness read, the absolute value of P2?P1 where P2 is the pressure applied to the front side of the two sensors and P1 is the pressure applied to the differential sensor through the metal tube is less than P2 to obtain the same stress in each sensor a great active area in the differential sensor is required.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: June 6, 2006
    Inventors: Anthony D. Kurtz, Alexander A. Ned
  • Patent number: 7053456
    Abstract: An electronic component includes a semiconductor substrate having a first surface and a second surface opposite to the first surface, a cavity that penetrates from the first surface to the second surface of the semiconductor substrate, and an electrical mechanical element that has a movable portion formed above the first surface of the semiconductor substrate so that the movable portion is arranged above the cavity. The electronic component further includes an electric conduction plug, which penetrates from the first surface to the second surface of the semiconductor substrate, and which is electrically connected to the electrical mechanical element.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: May 30, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mie Matsuo
  • Patent number: 7038285
    Abstract: A magnetic sensor includes a thin deformable membrane made of a conductive material forming a first plate of a capacitor which conducts an electric current therethrough. A second capacitor plate of the capacitor includes a doped region of a semiconductor substrate. A layer of a gaseous dielectric separates the two plates. The membrane deforms due to the effect of the Lorentz force generated by a magnetic field lying in the plane of the membrane and perpendicular to the lines of current being conducted therethrough. In addition, a process for fabricating this magnetic sensor is also provided as well as a device for measuring a magnetic field using the magnetic sensor.
    Type: Grant
    Filed: December 6, 2000
    Date of Patent: May 2, 2006
    Assignee: STMicroelectronics SA
    Inventors: Hervé Jaouen, Thomas Skotnicki, Malgorzata Jurczak
  • Patent number: 7034370
    Abstract: In one embodiment of the invention, a MEMS structure includes a first electrode, a second electrode, and a mobile element. The first electrode is coupled to a first voltage source. The second electrode is coupled to a second voltage source. The mobile element includes a third electrode coupled to a third voltage source. A steady voltage difference between the first electrode and the third electrode is used to tune the natural frequency of the structure to a scanning frequency of an application. An oscillating voltage difference between the second electrode and the third electrode at the scanning frequency of the application is used to oscillate the mobile element. In one embodiment, the mobile unit is a mirror.
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: April 25, 2006
    Assignee: Advanced Nano Systems, Inc.
    Inventor: Ting-Tung Kuo
  • Patent number: 7002439
    Abstract: A micro electromechanical switchable capacitor is disclosed, comprising a substrate, a bottom electrode, a dielectric layer deposited on at least part of said bottom electrode, a conductive floating electrode deposited on at least part of said dielectric layer, an armature positioned proximate to the floating electrode and a first actuation area in order to stabilize the down state position of the armature. The device may furthermore comprise a second actuation area. The present invention provides shunt switches and series switches with actuation in zones attached to the floating electrode area or with relay actuation.
    Type: Grant
    Filed: September 15, 2003
    Date of Patent: February 21, 2006
    Assignee: Interuniversitair Microelektronica Centrum (IMEC)
    Inventors: Xavier Rottenberg, Henri Jansen, Hendrikus Tilmans, Walter De Raedt
  • Patent number: 6967362
    Abstract: A flexible wireless MEMS microphone includes a substrate of a flexible polymeric material, a flexible MEMS transducer structure formed on the substrate by PECVD, an antenna printed on the substrate for communicating with an outside source, a wire and interface circuit embedded in the substrate to electrically connect the flexible MEMS transducer and the antenna, a flexible battery layer electrically connected to the substrate for supplying power to the MEMS transducer, and a flexible bluetooth module layer electrically connected to the battery layer. The flexible MEMS transducer includes a flexible substrate, a membrane layer deposited on the substrate, a lower electrode layer formed on the membrane layer, an active layer formed by depositing a piezopolymer on the lower electrode layer, an upper electrode layer formed on the active layer, and a first and a second connecting pad electrically connected to the lower and upper electrode layers, respectively.
    Type: Grant
    Filed: September 25, 2003
    Date of Patent: November 22, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yun-woo Nam, Suk-han Lee
  • Patent number: 6960814
    Abstract: Reflecting layers in first, second and third regions are separated from a reflecting layer in the surrounding region by a separating groove. The first region is folded in a valley shape from a substrate at a groove, the first region and the second region are folded in a valley shape at a groove, the third region is folded in a valley shape from the substrate at a groove, and the second region and the third region are folded in a mountain shape by a line.
    Type: Grant
    Filed: February 11, 2003
    Date of Patent: November 1, 2005
    Assignee: ATR Advanced Telecommunications Research Institute International
    Inventors: Kazuyoshi Kubota, Pablo O. Vaccaro, Tahito Aida
  • Patent number: 6956268
    Abstract: The present invention relates to micro electro-mechanical systems (MEMS) and production methods thereof, and more particularly to vertically integrated MEMS systems. Manufacturing of MEMS and vertically integrated MEMS is facilitated by forming, preferably on a wafer level, plural MEMS on a MEMS layer selectively bonded to a substrate, and removing the MEMS layer intact.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: October 18, 2005
    Assignee: Reveo, Inc.
    Inventor: Sadeg M. Faris
  • Patent number: 6952042
    Abstract: A microelectromechanical device and method of fabricating the same, including a layer of patterned and deposited metal or mechanical-quality, doped polysilicon inserted between the appropriate device element layers, which provides a conductive layer to prevent the microelectromechanical device's output from drifting. The conductive layer may encapsulate of the device's sensing or active elements, or may selectively cover only certain of the device's elements. Further, coupling the metal or mechanical-quality, doped polysilicon to the same voltage source as the device's substrate contact may place the conductive layer at the voltage of the substrate, which may function as a Faraday shield, attracting undesired, migrating ions from interfering with the output of the device.
    Type: Grant
    Filed: June 17, 2002
    Date of Patent: October 4, 2005
    Assignee: Honeywell International, Inc.
    Inventors: Thomas G. Stratton, Gary R. Gardner, Curtis H. Rahn
  • Patent number: 6943391
    Abstract: Tensile or compressive stress may be added in one or more selected locations to the biaxial residual stress existing in the channel of a semiconductor device, such as a MOSFET. The periphery of the active area containing the channel is modified by following layout procedures that result in forming outward protrusions of or inward depressions in the periphery of the active area and its surrounding shallow trench isolation during generally otherwise conventional fabrication of the device.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: September 13, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Min-Hwa Chi, Wai-Yi Lien
  • Patent number: 6936902
    Abstract: A sensor has a foundation wafer having a sensor chamber, at least one silicon-based micromechanical structure integrated with the sensor chamber of the foundation wafer, at least one covering that covers the foundation wafer in a region of the sensor chamber, the covering including a first layer which is a deposition layer and is permeable to an etching medium and reaction products, and a hermetically sealing second layer which is a sealing layer and located above the first layer, the deposition layer which is the first layer being permeable in a region of the sensor chamber to the etching medium and a reaction product, the deposition layer for being permeable having structures selected from the group consisting of etching openings, porous regions, and both.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: August 30, 2005
    Assignee: Robert Bosch GmbH
    Inventors: Frank Reichenbach, Stefan Pinter, Frank Henning, Hans Artmann, Helmut Baumann, Franz Laemer, Michael Offenberg, Georg Bischopink
  • Patent number: 6930368
    Abstract: A microelectromechanical system includes a first wafer, a second wafer including a moveable portion, and a third wafer. The movable portion is movable between the first wafer and the third wafer. The first wafer, the second wafer, and the third wafer are bonded together.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: August 16, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Peter G. Hartwell, Storrs T. Hoen, David Horsley, Chung Ching Yang, Paul P. Merchant, Carl P. Taussig
  • Patent number: 6930367
    Abstract: There are many inventions described and illustrated herein. In one aspect, there is described a thin film or wafer encapsulated MEMS, and technique of fabricating or manufacturing a thin film or wafer encapsulated MEMS employing anti-stiction techniques. In one embodiment, after encapsulation of the MEMS, an anti-stiction channel is formed thereby providing “access” to the chamber containing some or all of the active members or electrodes of the mechanical structures. Thereafter, an anti-stiction fluid (for example, gas or gas-vapor) is introduced into the chamber via the anti-stiction channel. The anti-stiction fluid may deposit on one, some or all of the active members of the mechanical structures thereby providing an anti-stiction layer (for example, a monolayer coating or self-assembled monolayer) and/or out-gassing molecules on such members or electrodes. After introduction and/or application of the anti-stiction fluid, the anti-stiction channel may be sealed, capped, plugged and/or closed.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: August 16, 2005
    Assignee: Robert Bosch GmbH
    Inventors: Markus Lutz, Aaron Partridge
  • Patent number: 6849912
    Abstract: What is proposed is a vertical field effect transistor produced from a semiconductor wafer, comprising a residual transistor composed of a source zone, a channel zone and a drain zone, as well as a movable gate structure disposed by means of at least one flexible suspension in front of said channel zone and spaced therefrom, which is characterized by the provision that the movable gate structure consists of the material of said semiconductor wafer. The suspensions of the movable structure preferably present a high ratio of their height to their width, such that the movable gate may preferably move in the wafer plane.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: February 1, 2005
    Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung, e.V.
    Inventors: Andreas Bertz, Steffen Heinz, Thomas Gessner
  • Patent number: 6847090
    Abstract: The present invention is directed to a process for the manufacture of a plurality of integrated capacitive transducers.
    Type: Grant
    Filed: January 8, 2002
    Date of Patent: January 25, 2005
    Assignee: Knowles Electronics, LLC
    Inventor: Peter V. Loeppert
  • Patent number: 6841839
    Abstract: Microrelays and microrelay fabrication and operating methods providing a microrelay actuator positively controllable between a switch closed position and a switch open position. The microrelays are a five terminal device, two terminals forming the switch contacts, one terminal controlling the actuating voltage on an actuator conductive area, one terminal controlling the actuating voltage on a first fixed conductive area, and one terminal controlling the actuating voltage on a second fixed conductive area deflecting the actuator in an opposite direction than the first fixed conductive area. Providing the actuating voltages as zero average voltage square waves and their complement provides maximum actuating forces, and positive retention of the actuator in both actuator positions. Various fabrication techniques are disclosed.
    Type: Grant
    Filed: August 22, 2003
    Date of Patent: January 11, 2005
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Uppili Sridhar, Quanbo Zou
  • Patent number: 6841838
    Abstract: A method of making a micro electromechanical gyroscope. A cantilevered beam structure, first portions of side drive electrodes and a mating structure are defined on a first substrate or wafer; and at least one contact structure, second portions of the side drive electrodes and a mating structure are defined on a second substrate or wafer, the mating structure on the second substrate or wafer being of a complementary shape to the mating structure on the first substrate or wafer and the first and second portions of the side drive electrodes being of a complementary shape to each other. A bonding layer, preferably a eutectic bonding layer, is provided on at least one of the mating structures and one or the first and second portions of the side drive electrodes. The mating structure of the first substrate is moved into a confronting relationship with the mating structure of the second substrate or wafer.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: January 11, 2005
    Assignee: HRL Laboratories, LLC
    Inventors: Randall L. Kubena, David T. Chang
  • Publication number: 20040266048
    Abstract: A method of bonding and packaging components of Micro-Electro-Mechanical Systems (MEMS) and MEMS based devices using a Solid-Liquid InterDiffusion (SLID) process is provided. A micro-machine is bonded to a micro-machine chip using bonding materials. A layer of chromium is first deposited onto surfaces of the micro-machine and the micro-machine chip followed by a layer of gold. Subsequently, a layer of indium is deposited between the layers of gold, and the surface of the micro-machine is pressed against the surface of the micro-machine chip forming a gold-indium alloy to serve as a bond between the micro-machine and the micro-machine chip. In addition, a cover is bonded to the micro-machine chip in the same manner providing a hermetic seal for the MEMS based device.
    Type: Application
    Filed: July 26, 2004
    Publication date: December 30, 2004
    Applicant: Honeywell International Inc.
    Inventors: William P. Platt, Carol M. Ford
  • Publication number: 20040256684
    Abstract: A method for producing micromechanical structures, in which a functional layer is deposited onto a sacrificial layer, and the sacrificial layer is removed again for the production of at least one mechanical functional element, which is characterized by a surface barrier layer, with which the functional layer begins on the sacrificial layer, and which has a different state from the remaining functional layer, is also removed at least to a considerable part, or, on the functional layer, one layer or a plurality of layers having at least approximately the same properties with respect to stress in the layer or layers such as the surface barrier layer is (are) applied. Additionally, a micromechanical structure having a functional layer in which the functional layer is constructed in such a way that the stresses are neutralized or no stress gradient appears.
    Type: Application
    Filed: April 2, 2004
    Publication date: December 23, 2004
    Inventors: Wilhelm Frey, Christoph Duenn
  • Publication number: 20040232504
    Abstract: A suspended semiconductor film is anchored to a substrate at at least two opposed anchor positions, and film segments are deposited on the semiconductor film adjacent to one or more of the anchor positions to apply either tensile or compressive stress to the semiconductor film between the film segments. A crystalline silicon film may be anchored to the substrate and have tensile stress applied thereto to reduce the lattice mismatch between the silicon and a silicon-germanium layer deposited onto the silicon film. By controlling the level of stress in the silicon film, the size, density and distribution of quantum dots formed in a high germanium content silicon-germanium film deposited on the silicon film can be controlled.
    Type: Application
    Filed: June 24, 2004
    Publication date: November 25, 2004
    Applicant: Wisconsin Alumni Research Foundation
    Inventors: Amit Lal, Max G. Lagally, Chung Hoon Lee, Paul Powell Rugheimer
  • Patent number: 6822304
    Abstract: A sputtered silicon layer and a low temperature fabrication method thereof, is introduced. The sputtered silicon layer is sputtered with predetermined sputtering criteria resulting in a predetermined pre-annealing configuration. The sputtering criteria include sputtering power, ambient sputtering pressure, choice of sacrificial layer and etchant. The initially sputtered layer is transformed during a low temperature annealing process into a post-annealing state. A released structure is micro-machined from the sputtered layer in its post-annealed state. The low temperature annealing leaves pre-fabricated integrated aluminum-metalized circuitry unaffected. Optional conductive sputtered co-layers reduce resistivity and may be used to further tune strain and strain gradient.
    Type: Grant
    Filed: November 10, 2000
    Date of Patent: November 23, 2004
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventor: Kenneth A. Honer
  • Patent number: 6815782
    Abstract: The invention relates to a miniature electrostatic actuation device (100) capable of generating movements along a determined direction (F), comprising pairs of electrodes (4) of which the mobile electrodes (8) may be pulled into contact with a fixed electrode (6) on a variable pull-in surface that varies as a function of the voltage applied between these pairs of electrodes. According to the invention, the device also comprises an actuation element (12) connected to the mobile electrodes (8), the element (12) being capable of occupying a rest position and of being guided along the determined direction (F) when the voltage applied between the electrodes in each pair (4) varies, the device comprising return arms (14) capable of pulling the actuation element (12) back towards its rest position, when the voltage applied between the two electrodes in each pair of electrodes is reduced. To be applied to actuation of continuously deformable micro-mirrors.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: November 9, 2004
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Eric Stadler, Julien Charton
  • Patent number: 6800912
    Abstract: A monolithically integrated, electromechanical microwave switch, capable of handling signals from DC to millimeter-wave frequencies, and an integrated electromechanical tunable capacitor are described. Both electromechanical devices include movable beams actuated either by thermo-mechanical or by electrostatic forces. The devices are fabricated directly on finished silicon-based integrated circuit wafers, such as CMOS, BiCMOS or bipolar wafers. The movable beams are formed by selectively removing the supporting silicon underneath the thin films available in a silicon-based integrated circuit technology, which incorporates at least one polysilicon layer and two metallization layers. A cavity and a thick, low-loss metallization are used to form an electrode above the movable beam. A thick mechanical support layer is formed on regions where the cavity is located, or substrate is bulk-micro-machined, i.e., etched.
    Type: Grant
    Filed: May 17, 2002
    Date of Patent: October 5, 2004
    Assignee: Corporation for National Research Initiatives
    Inventor: Mehmet Ozgur
  • Publication number: 20040188784
    Abstract: In a semiconductor sensor having a membrane structure, the destruction of the membrane caused by the expansion or contraction of a fluid within a hollow part formed under the membrane while the sensor is in use is prevented. A semiconductor sensor 10 comprising a substrate 30 and a membrane 20 formed on the top surface thereof, in which the bottom of the substrate 30 and a mounting surface 50 on which the sensor 10 is mounted are bonded, has pressure difference adjusting means 22a to 22c for eliminating the difference in pressure of a fluid between an inside and an outside of a hollow part 34 while the sensor is in use.
    Type: Application
    Filed: March 26, 2004
    Publication date: September 30, 2004
    Applicant: DENSO CORPORATION
    Inventor: Kazuaki Hamamoto
  • Patent number: 6787867
    Abstract: A manufacturing method for a planar lightwave circuit device. A lift-off mask layer is formed on a planar lightwave circuit composed of cores and a cladding. The lift-off mask layer is next exposed to light by using a mask having a plurality of first patterns respectively corresponding to the cores and a plurality of second patterns each formed on at least one side of each first pattern in spaced relationship therewith. A wiring pattern material layer is next deposited on the lift-off mask layer exposed above, and the lift-off mask layer is next stripped off to thereby form a plurality of real patterns respectively corresponding to the first patterns and a plurality of dummy patterns respectively corresponding to the second patterns, from the wiring pattern material layer.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: September 7, 2004
    Assignee: Fujitsu Limited
    Inventors: Yasuki Sakurai, Michiharu Itou, Takashi Shiotani
  • Patent number: 6787804
    Abstract: A semiconductor acceleration sensor includesa non-single-crystal-silicon-based substrate, an insulating beam structure having a movable section and a stationary section, at least one piezoresistor positioned on the beam structure, an insulating supporter positioned on the non-single-crystal-silicon-based substrate for fixing the stationary section of the beam structure and forming a distance between the beam structure and the non-single-crystal-silicon-based substrate, and a thin film transistor (TFT) control circuit positioned on the non-single-crystal-silicon-based substrate and electrically connected to the piezoresistor and the beam structure.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: September 7, 2004
    Assignee: AU Optronics Corp.
    Inventor: Chien-Sheng Yang
  • Publication number: 20040164368
    Abstract: An optical device having a high reflector tunable stress coating includes a micro-electromechanical system (MEMS) platform, a mirror disposed on the MEMS platform, and a multiple layer coating disposed on the mirror. The multiple layer coating includes a layer of silver (Ag), a layer of silicon dioxide (SiO2) deposited on the layer of Ag, a layer of intrinsic silicon (Si) deposited on the layer of SiO2, and a layer of silicon oxynitride (SiOxNy) deposited on the layer of Si. The concentration of nitrogen is increased and/or decreased to tune the stress (e.g., tensile, none, compressive).
    Type: Application
    Filed: February 18, 2004
    Publication date: August 26, 2004
    Inventor: Michael Goldstein
  • Patent number: 6780767
    Abstract: Semiconductor components in a wafer assembly, in which the components are connected to a frame by means of in each case one holder and are formed from the same silicon wafer. The holder connects the respective component to the frame on one side and has a desired breaking point. The desired breaking point is designed as a V-shaped groove, the surfaces of which form crystal planes. According to the method, the patterning for production of the holder takes place on the wafer back surface, with subsequent wet chemical anisotropic etching of the V-groove. In this way, the holder is produced independently of the processing of the wafer front surface, and when the semiconductor component is removed a defined broken edge is formed without there being any risk of the semiconductor component being damaged.
    Type: Grant
    Filed: June 21, 2002
    Date of Patent: August 24, 2004
    Assignee: Nanoworld AG
    Inventor: Stefan Lutter
  • Publication number: 20040129989
    Abstract: An inertial sensor with failure threshold includes a first body and a second body, which can move relative to one another and are constrained by a plurality of elastic elements, and a sample element connected between the first body and the second body and shaped so as to be subjected to a stress when the second body is outside of a relative resting position with respect to the first body. The sample element has at least one weakened region. The sensor may also include additional sample elements connected between the first and second bodies.
    Type: Application
    Filed: August 27, 2003
    Publication date: July 8, 2004
    Applicants: STMicroelectronics S.r.I., Nokia Corporation
    Inventors: Sarah Zerbini, Angelo Merassi, Guido Spinola Durante, Biagio De Masi
  • Patent number: 6756248
    Abstract: A pressure transducer designed to transform static pressure or dynamic pressure applied to a diaphragm into a corresponding electrical signal and a method of manufacturing the same are provided. The transducer includes a fixed electrode formed in an upper surface of a substrate and a moving electrode provided in the diaphragm disposed above the fixed electrode through a cavity. The substrate has formed in the bottom thereof at least one hole which is used in a manufacturing process for removing a sacrificial layer formed between the diaphragm and the upper surface of the substrate in dry etching to form the cavity.
    Type: Grant
    Filed: February 26, 2002
    Date of Patent: June 29, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masaharu Ikeda, Masayoshi Esashi
  • Patent number: 6753583
    Abstract: An electrostatic electroacoustical transducer contains an electrically conductive fixed electrode plate having an active surface with recesses. A conductive or semiconductive flexible diaphragm is disposed at a distance from the active surface of the electrode plate and within the recesses. An insulating device is disposed between the electrode plate and the diaphragm.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: June 22, 2004
    Assignee: Fachhochschule
    Inventors: Axel Stoffel, Zdenek Skvor
  • Publication number: 20040113217
    Abstract: A substrate under tension and/or compression improves performance of devices fabricated therein. Tension and/or compression can be imposed on a substrate through selection of appropriate gate sidewall spacer material disposed above a device channel region wherein the spacers are formed adjacent both the gate and the substrate and impose forces on adjacent substrate areas. Another embodiment comprises compressive stresses imposed in the plane of the channel using SOI sidewall spacers made of polysilicon that is expanded by oxidation. The substrate areas under compression or tension exhibit charge mobility characteristics different from those of a non-stressed substrate. By controllably varying these stresses within NFET and PFET devices formed on a substrate, improvements in IC performance have been demonstrated.
    Type: Application
    Filed: December 12, 2002
    Publication date: June 17, 2004
    Applicant: International Business Machines Corporation
    Inventors: Dureseti Chidambarrao, Omer H. Dokumaci, Bruce B. Doris, Jack A. Mandelman, Xavier Baie
  • Patent number: 6750999
    Abstract: A quasi-optical system is provided. More specifically, a quasi-optical system is provided comprising various embodiments of quasi-optical grids (such as arrays or layers and the like) with reconfigurable quasi-optical unit cells. The quasi-optical system, grids and unit cells are configured to control an incident beam in a variety of ways.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: June 15, 2004
    Inventor: Jung-Chih Chiao
  • Publication number: 20040104453
    Abstract: A method of forming a surface micromachined MEMS device applies an insulator to a substrate, and then deposits a conductive path on the insulator. The conductive path is capable of transmitting an electronic signal between two points on the MEMS device. The insulator electrically isolates the conductive path from the substrate. The MEMS device illustratively is free of semiconductor junctions formed by the substrate and the conductive path.
    Type: Application
    Filed: September 25, 2003
    Publication date: June 3, 2004
    Inventor: Bruce K. Wachtmann
  • Patent number: 6740945
    Abstract: A structure and method for creating a contact between a conductive layer and a pad for dissipating electrostatic charges comprising the steps of, forming a pad and a composite insulating layer between and over conductive plates on a substrate, wherein the insulating layer isolates and protects the conductive plates and pad from damage, the insulating layer comprising a dielectric region underlying a conductive layer. A passivation layer is formed over at least a portion of the conductive layer and a photoresist is patterned over at least a portion of the passivation. An opening is etched through the passivation and the insulating layers, wherein the photoresist and the conductive layer serve as masks. Finally, a conductive material is deposited in the opening to form an electrical contact between the pad and the conductive layer.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: May 25, 2004
    Assignee: STMicroelectronics, Inc.
    Inventors: Arnaud Yves Lepert, Danielle A. Thomas, Antonio A. Do-Bento-Vieira