Physical Deformation Patents (Class 257/415)
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Patent number: 12240748Abstract: A micro-electro-mechanical systems (MEMS) die includes a piston; an electrode facing the piston, wherein a capacitance between the piston and the electrode changes as the distance between the piston and the electrode changes; and a resilient structure (e.g., a gasket or a pleated wall) disposed between the piston and the electrode, wherein the resilient structure supports the piston and resists the movement of the piston with respect to the electrode. A back volume is bounded by the piston and the resilient structure and the resilient structure blocks air from leaving the back volume. The piston may be a rigid body made of a conductive material, such as metal or a doped semiconductor. The MEMS die may also include a second resilient structure, which provides further support to the piston and is disposed within the back volume.Type: GrantFiled: March 21, 2021Date of Patent: March 4, 2025Assignee: Knowles Electronics, LLCInventors: Peter V. Loeppert, Michael Pedersen, Vahid Naderyan
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Patent number: 12210033Abstract: A micromechanical component, in particular, an inertial sensor, including a seismic mass, a substrate, and a cap. The component includes a reference electrode, which is in a first electrode layer and is connected to the substrate, and a further reference electrode, which is in a second electrode layer and is connected to the cap. The seismic mass is deflectable on two sides, in a direction perpendicular to the major plane of extension of the reference electrode. The seismic mass includes a flexible limit stop in the direction of deflection towards the first electrode layer. The flexible limit stop is connected to the main part of the seismic mass using a spring element. The spring element is in an elastic layer, which is positioned between a layer of the main part of the seismic mass and the first electrode layer.Type: GrantFiled: September 25, 2020Date of Patent: January 28, 2025Assignee: ROBERT BOSCH GMBHInventors: Johannes Classen, Michael Saettler
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Patent number: 12209009Abstract: A MEMS device formed using the materials of the BEOL of a CMOS process where a post-processing of vHF and post backing was applied to form the MEMS device and where a total size of the MEMS device is between 50 um and 150 um. The MEMS device may be implemented as an inertial sensor among other applications.Type: GrantFiled: September 5, 2023Date of Patent: January 28, 2025Assignee: Nanusens SLInventor: Josep Montanyà Silvestre
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Patent number: 12203811Abstract: A process for manufacturing a detection device having at least one thermal detector covered by a mineral sacrificial layer, at least one getter portion covered by a carbon-based sacrificial layer, and a thin encapsulation layer surrounding the thermal detector and the getter portion includes a making a through-opening extending through the mineral sacrificial layer and opening on the substrate. The carbon-based sacrificial layer is deposited so as to cover the getter portion located in the through-opening and to entirely fill the through-opening.Type: GrantFiled: September 28, 2020Date of Patent: January 21, 2025Assignee: COMMISSARIAT À L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Geoffroy Dumont, Sébastien Becker
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Patent number: 12202724Abstract: The present disclosure provides a method for fabricating a semiconductor structure, including bonding a capping substrate over a sensing substrate, forming a through hole traversing the capping substrate, forming a dielectric layer over the capping substrate under a first vacuum level, and forming a metal layer over the dielectric layer under a second vacuum level, wherein the second vacuum level is higher than the first vacuum level.Type: GrantFiled: July 27, 2023Date of Patent: January 21, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Ching-Kai Shen, Yi-Chuan Teng, Wei-Chu Lin, Hung-Wei Liang, Jung-Kuo Tu
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Patent number: 12187606Abstract: A semiconductor device includes a first silicon layer disposed between second and third silicon layers and separated therefrom by respective first and second oxide layers. A cavity within the first silicon layer is bounded by interior surfaces of the second and third silicon layers, and a passageway extends through the second silicon layer to enable material removal from within the semiconductor device to form the cavity. A metal feature is disposed within the passageway to hermetically seal the cavity.Type: GrantFiled: March 3, 2023Date of Patent: January 7, 2025Assignee: SiTime CorporationInventors: Michael Julian Daneman, Charles I. Grosjean, Paul M. Hagelin
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Patent number: 12145839Abstract: A MEMS actuator assembly package features a number of drop test resistant mechanisms is disclosed. These mechanisms are used to decelerate and finally stops the heavy load of the image sensor attached to the MEMS actuators along all six directions of the in-plane and out-of-plane axes (±x, ±y, ±z). The MEMS actuator assembly package comprises first and second sets of flexible stoppers attached to the MEMS actuator along with a set of hard stoppers that engage in a sequential manner with the moving mass of the loaded actuator to decelerate it, bringing it to a complete stop when exposed to mechanical shock along the four directions of the in-plane axes (x and y). When the assembly package is exposed along the positive and negative direction of the z-axis, the moving mass is stopped by features built in the package.Type: GrantFiled: March 4, 2024Date of Patent: November 19, 2024Inventors: Faez Ba-Tis, Ahmed Galaom, Ali Banss, Hui Zuo
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Patent number: 12144108Abstract: A wiring board includes a substrate, wiring, and a reinforcing part. The substrate is stretchable, and includes a first surface and a second surface located opposite to the first surface. The wiring is located at the first surface side of the substrate. The reinforcing part overlaps the wiring when viewed in a direction normal to the first surface of the substrate. The substrate has a control region and a non-control region. The control region overlaps the reinforcing part. The non-control region does not overlap the reinforcing part. The non-control region is positioned to sandwich the control region in a direction orthogonal to the direction in which the wiring extends.Type: GrantFiled: October 31, 2019Date of Patent: November 12, 2024Assignee: DAI NIPPON PRINTING CO., LTD.Inventors: Naoko Okimoto, Kenichi Ogawa, Mitsutaka Nagae, Makiko Sakata, Toru Miyoshi
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Patent number: 12121996Abstract: A method of manufacturing a micro-oscillator includes: preparing a substrate having a flat portion and a curved surface portion formed in a three-dimensional curved shape protruding from one surface of the flat portion, the curved surface portion being surrounded by the flat portion; and irradiating an outer surface of the curved surface portion with a laser beam to separate the curved surface portion from the flat portion.Type: GrantFiled: March 14, 2023Date of Patent: October 22, 2024Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies CorporationInventors: Yuuki Inagaki, Yuji Ito, Yuki Ichihashi
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Patent number: 12125870Abstract: A stretchable display panel includes a first stretchable film, a first transparent optical clear adhesive, a patterned organic layer, multiple light-emitting elements, and multiple wires. The first transparent optical clear adhesive is located on the first stretchable film. The patterned organic layer includes multiple first island portions and multiple first bridge portions. Any adjacent two of the first island portions are connected via a corresponding one of the first bridge portions. The light-emitting elements are located above the first island portions. The first transparent optical clear adhesive is located between the light-emitting elements and the first stretchable film. A first surface of the patterned organic layer faces away from the light-emitting elements. An included angle between the first surface and a first side surface of the first island portions is greater than 90 degrees. The wires are located above the first bridge portions.Type: GrantFiled: March 24, 2022Date of Patent: October 22, 2024Assignee: Au Optronics CorporationInventors: Cheng-Wei Jiang, Yi-Da He
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Patent number: 12100641Abstract: An electronic package is provided, which includes a plurality of electronic components encapsulated by an encapsulation layer. A spacer is defined in the encapsulation layer and located between at least two adjacent electronic components of the plurality of electronic components, and a recess is formed in the spacer and used as a thermal insulation area. With the design of the thermal insulation area, the plurality of electronic components can be effectively thermally insulated from one another to prevent heat generated by one electronic component of high power from being conducted to another electronic component of low power that would thermally affect the operation of the low-power electronic component. A method for manufacturing the electronic package is also provided.Type: GrantFiled: July 18, 2023Date of Patent: September 24, 2024Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chih-Hsien Chiu, Siang-Yu Lin, Wen-Jung Tsai, Chia-Yang Chen, Chien-Cheng Lin
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Patent number: 12100661Abstract: Semiconductor dies with edges protected and methods for generating the semiconductor dies are disclosed. Further, the disclosed methods provide for separating the semiconductor dies without using a dicing technique. In one embodiment, trenches are formed on a front side of a substrate including semiconductor dies. Individual trenches correspond to scribe lines of the substrate where each trench has a depth greater than a final thickness of the semiconductor dies. A composite layer may be formed on sidewalls of the trenches to protect the edges of the semiconductor dies. The composite layer includes a metallic layer that shields the semiconductor dies from electromagnetic interference. Subsequently, the substrate may be thinned from a back side to singulate individual semiconductor dies from the substrate.Type: GrantFiled: September 15, 2023Date of Patent: September 24, 2024Assignee: Micron Technology, Inc.Inventors: Brandon P. Wirz, Andrew M. Bayless
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Patent number: 12054382Abstract: A micro-electromechanical-system (MEMS) device may be formed to include an anti-stiction polysilicon layer on one or more moveable MEMS structures of a device wafer of the MEMS device to reduce, minimize, and/or eliminate stiction between the moveable MEMS structures and other components or structures of the MEMS device. The anti-stiction polysilicon layer may be formed such that a surface roughness of the anti-stiction polysilicon layer is greater than the surface roughness of a bonding polysilicon layer on the surfaces of the device wafer that are to be bonded to a circuitry wafer of the MEMS device. The higher surface roughness of the anti-stiction polysilicon layer may reduce the surface area of the bottom of the moveable MEMS structures, which may reduce the likelihood that the one or more moveable MEMS structures will become stuck to the other components or structures.Type: GrantFiled: April 28, 2023Date of Patent: August 6, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hsi-Cheng Hsu, Kuo-Hao Lee, Jui-Chun Weng, Ching-Hsiang Hu, Ji-Hong Chiang, Lavanya Sanagavarapu, Chia-Yu Lin, Chia-Chun Hung, Jia-Syuan Li, Yu-Pei Chiang
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Patent number: 11996500Abstract: A lighting apparatus including at least two of first, second, and third light units, in which the first light unit includes a first LED emitting light having a peak wavelength in a range of 286 to 304 nm and a first wavelength converter, and to emit a portion of light from the first LED to the outside, the second light unit includes a second LED emitting light having a peak wavelength in a range of 400 to 420 nm and a second wavelength converter, and to emit a portion of light from the second LED to the outside, and the third light unit includes a third LED emitting light having a peak wavelength in a range of 286 to 470 nm and a third wavelength converter emitting light having a central wavelength in a range of 685 to 705 nm, 790 to 840 nm, or 875 to 935 nm.Type: GrantFiled: December 24, 2019Date of Patent: May 28, 2024Assignee: Seoul Viosys Co., Ltd.Inventors: Hee Ho Bae, Yeong Min Yoon, A Young Lee
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Patent number: 11996826Abstract: Acoustic resonator devices and methods are disclosed. An acoustic resonator device includes a substrate having a surface and a single-crystal piezoelectric plate having front and back surfaces. An etch-stop layer is sandwiched between the surface of the substrate and the back surface of the piezoelectric plate, a portion of the piezoelectric plate and the etch-stop layer forming a diaphragm spanning a cavity in the substrate. An interdigital transducer (IDT) is formed on the front surface of the single-crystal piezoelectric plate with interleaved fingers of the IDT disposed on the diaphragm. The etch-stop layer is impervious to an etch process used to form the cavity. The etch-stop layer is a high thermal conductivity material selected from aluminum nitride, boron nitride, and diamond.Type: GrantFiled: December 8, 2020Date of Patent: May 28, 2024Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Patrick Turner
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Patent number: 11955480Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.Type: GrantFiled: May 11, 2022Date of Patent: April 9, 2024Assignee: STMICROELECTRONICS (TOURS) SASInventor: Mohamed Boufnichel
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Patent number: 11945712Abstract: A process for manufacturing a MEMS device includes forming a first structural layer of a first thickness on a substrate. First trenches are formed through the first structural layer, and masking regions separated by first openings are formed on the first structural layer. A second structural layer of a second thickness is formed on the first structural layer in direct contact with the first structural layer at the first openings and forms, together with the first structural layer, thick structural regions having a third thickness equal to the sum of the first and the second thicknesses. A plurality of second trenches are formed through the second structural layer, over the masking regions, and third trenches are formed through the first and the second structural layers by removing selective portions of the thick structural regions.Type: GrantFiled: May 14, 2021Date of Patent: April 2, 2024Assignee: STMICROELECTRONICS S.r.l.Inventors: Giorgio Allegato, Lorenzo Corso, Ilaria Gelmi, Carlo Valzasina
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Patent number: 11938708Abstract: An economical, efficient, and effective formation of a high resolution pattern of conductive material on a variety of films by polymer casting. This allows, for example, quite small-scale patterns with sufficient resolution for such things as effective microelectronics without complex systems or steps and with substantial control over the characteristics of the film. A final end product that includes that high resolution functional pattern on any of a variety of substrates, including flexible, stretchable, porous, biodegradable, and/or biocompatible. This allows, for example, highly beneficial options in design of high resolution conductive patterns for a wide variety of applications.Type: GrantFiled: August 30, 2022Date of Patent: March 26, 2024Assignee: lowa State University Research Foundation, Inc.Inventors: Metin Uz, Surya Mallapragada
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Patent number: 11919769Abstract: A method includes fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a first mask on a second side of the device wafer, wherein the second side is planar. A plurality of dimple features is formed on an exposed portion on the second side of the device wafer. The first mask is removed from the second side of the device wafer. A second mask is deposited on the second side of the device wafer that corresponds to a standoff. An exposed portion on the second side of the device wafer is etched to form the standoff. The second mask is removed. A rough polysilicon layer is deposited on the second side of the device wafer. A eutectic bond layer is deposited on the standoff. In some embodiments, a micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.Type: GrantFiled: November 29, 2022Date of Patent: March 5, 2024Assignee: InvenSense, Inc.Inventors: Ashfaque Uddin, Daesung Lee, Alan Cuthbertson
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Patent number: 11897758Abstract: An electrical contacting between a surrounding wiring and a conductor region. The conductor region is situated in a conductor layer above an SOI wafer or SOI chip. A cover layer is situated above the conductor layer and below the surrounding wiring. The cover layer has a contacting region. The contacting region is insulated from the rest of the cover layer by a first configuration of recesses. An opening is formed at least in the contacting region. A metallic material is situated in the opening. The metallic material connects the surrounding wiring and the conductor region.Type: GrantFiled: June 25, 2019Date of Patent: February 13, 2024Assignee: ROBERT BOSCH GMBHInventors: Jochen Reinmuth, Markus Kuhnke, Stefan Majoni, Timo Schary
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Patent number: 11897763Abstract: A semiconductor package that contains an application-specific integrated circuit (ASIC) die and a micro-electromechanical system (MEMS) die. The MEMS die and the ASIC die are coupled to a substrate that includes an opening that extends through the substrate and is in fluid communication with an air cavity positioned between and separating the MEMS die from the substrate. The opening exposes the air cavity to an external environment and, following this, the air cavity exposes a MEMS element of the MEMS die to the external environment. The air cavity separating the MEMS die from the substrate is formed with a method of manufacturing that utilizes a thermally decomposable die attach material.Type: GrantFiled: November 24, 2020Date of Patent: February 13, 2024Assignee: STMicroelectronics, Inc.Inventor: Jefferson Sismundo Talledo
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Patent number: 11901192Abstract: To provide an etching processing method and an etching processing apparatus which allow an aluminum oxide film to be etched with high accuracy and with a high selectivity to each of a silicon oxide film and a silicon nitride film, the etching processing method includes the step of placing, in a processing chamber, a wafer having the aluminum oxide film disposed on an upper surface thereof, maintaining the wafer at a temperature of ?20° C. or less, and supplying vapor of hydrogen fluoride from a plurality of through holes in a plate-like member disposed above the upper surface of the wafer with a predetermined gap being provided therebetween only for a predetermined period to etch the aluminum oxide film.Type: GrantFiled: June 30, 2020Date of Patent: February 13, 2024Assignee: HITACHI HIGH-TECH CORPORATIONInventors: Hiroto Otake, Takashi Hattori
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Patent number: 11829565Abstract: A biometric sensor may comprise a plurality of a first type of signal traces formed on a first surface of a first layer of a multi-layer laminate package; at least one trace of a second type, formed on a second surface of the first layer or on a first surface of a second layer of the multi-layer laminate package; and connection vias in at least the first layer electrically connecting the signal traces of the first type or the signal traces of the second type to respective circuitry of the respective first or second type contained in an integrated circuit physically and electrically connected to one of the first layer, the second layer or a third layer of the multi-layer laminate package.Type: GrantFiled: August 12, 2021Date of Patent: November 28, 2023Assignee: Synaptics IncorporatedInventors: Brett Dunlap, Paul Wickboldt
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Patent number: 11827511Abstract: A MEMS transducer for a microphone includes a closed chamber, an array of conductive pins, a dielectric grid, and a diaphragm. The closed chamber is at a pressure lower than atmospheric pressure. The array of conductive pins is in a fixed position in the closed chamber, distributed in two dimensions, and have gaps formed therebetween. The dielectric grid is positioned within the closed chamber, includes a grid of dielectric material positioned between the gaps of the array of conductive pins, and is configured to move parallel to the conductive pins. The diaphragm is configured to form a portion of the closed chamber and deflect in response to changes in a differential pressure between the pressure within the closed chamber and a pressure outside the transducer. The diaphragm is configured to move the dielectric grid relative to the array of conductive pins in response to a change in the differential pressure.Type: GrantFiled: November 18, 2019Date of Patent: November 28, 2023Assignee: KNOWLES ELECTRONICS, LLCInventors: Peter V. Loeppert, Michael Pedersen
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Patent number: 11800782Abstract: The present application discloses a display panel, a method of manufacturing the same, and a display device, wherein the display panel includes a first substrate, a second substrate, and a light-transmitting planarization layer, a light transmittance of the first substrate is lower than that of the second substrate; at least one first through hole is provided on the substrate, at least one blind hole is provided on the second substrate, and the blind hole is provided corresponding to the first through hole; the light-transmitting planarization layer is provided in the blind hole to flatten the bottom of the blind hole, thus obtaining a relatively flat film surface.Type: GrantFiled: February 26, 2021Date of Patent: October 24, 2023Assignee: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.Inventor: Yunti Zhang
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Patent number: 11800602Abstract: A multilayered metal nanowire array including a plurality of stacked and separated nanowire array layers each including a plurality of vertically aligned metal nanowires, and a lateral interposer positioned in a gap between each pair of adjacent nanowire array layers and being thermally coupled to the nanowires in the adjacent layers so that the lateral interposers provide thermal conduction between the nanowire array layers and laterally across each nanowire array layer. The nanowire array layers between the interposers can have the same or different thicknesses, the diameter and density of the nanowires can be the same or different, and the nanowire metal can be the same or different.Type: GrantFiled: November 30, 2021Date of Patent: October 24, 2023Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATIONInventors: Michael T. Barako, Jesse B. Tice, Max H. Kuciej
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Patent number: 11787685Abstract: For manufacturing an optical microelectromechanical device, a first wafer of semiconductor material having a first surface and a second surface is machined to form a suspended mirror structure, a fixed structure surrounding the suspended mirror structure, elastic supporting elements which extend between the fixed structure and the suspended mirror structure, and an actuation structure coupled to the suspended mirror structure. A second wafer is machined separately to form a chamber delimited by a bottom wall having a through opening. The second wafer is bonded to the first surface of the first wafer in such a way that the chamber overlies the actuation structure and the through opening is aligned to the suspended mirror structure. Furthermore, a third wafer is bonded to the second surface of the first wafer to form a composite wafer device. The composite wafer device is then diced to form an optical microelectromechanical device.Type: GrantFiled: December 18, 2020Date of Patent: October 17, 2023Assignee: STMicroelectronics S.r.l.Inventors: Luca Seghizzi, Nicolo′ Boni, Laura Oggioni, Roberto Carminati, Marta Carminati
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Patent number: 11753296Abstract: A MEMS device includes a lower substrate having a resonator, an upper substrate disposed to oppose an upper electrode of the resonator, a bonding layer sealing an internal space between the lower substrate and the upper substrate, and wiring layers that contain the same metal material as the bonding layer. Moreover, a rare gas content of each of the wiring layers is less than 1×1020 (atoms/cm3).Type: GrantFiled: September 1, 2020Date of Patent: September 12, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Masakazu Fukumitsu
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Patent number: 11742816Abstract: An acoustic wave device includes: a substrate; a lower electrode, an air gap being interposed between the lower electrode and the substrate; a piezoelectric film located on the lower electrode; and an upper electrode located on the piezoelectric film such that a resonance region where at least a part of the piezoelectric film is interposed between the upper electrode and the lower electrode is formed and the resonance region overlaps with the air gap in plan view, wherein a surface facing the substrate across the air gap of the lower electrode in a center region of the resonance region is positioned lower than a surface closer to the piezoelectric film of the substrate in an outside of the air gap in plan view.Type: GrantFiled: December 10, 2019Date of Patent: August 29, 2023Assignee: TAIYO YUDEN CO., LTD.Inventors: Taisei Irieda, Tatsuya Aoki, Mitsuhiro Habuta, Satoshi Orito, Shinji Taniguchi
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Patent number: 11736845Abstract: A microphone component and a method for fabricating a microphone component are disclosed. In an embodiment, a microphone component includes a membrane and a backplate, wherein the membrane includes a plurality of holes, and wherein the holes have diameters smaller than 5 ?m.Type: GrantFiled: March 19, 2021Date of Patent: August 22, 2023Assignee: TDK CorporationInventors: Pirmin Hermann Otto Rombach, Dennis Mortensen
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Patent number: 11728073Abstract: A method for manufacturing an electronic component includes providing a substrate and a functional layer supported by the substrate; forming a structured protection layer on a side of the substrate to which the functional layer is attached, wherein the structured protection layer has a recess so that a portion of the functional layer is exposed; applying a dispersion comprising a solvent and electrically conductive components to the exposed portion of the functional layer so that the recess is at least partially filled with the dispersion; drying the dispersion in order to create an electrically conductive layer; and removing the structured protection layer.Type: GrantFiled: November 11, 2021Date of Patent: August 15, 2023Assignee: Infineon Technologies AGInventors: Markus Meyer, Jorge Eduardo Adatti Estevez, Alexandra Marina Roth
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Patent number: 11697889Abstract: A structure including a three-dimensionally stretchable single crystalline semiconductor membrane located on a substrate is provided. The structure is formed by providing a three-dimensional (3D) wavy silicon germanium alloy layer on a silicon handler substrate. A single crystalline semiconductor material membrane is then formed on a physically exposed surface of the 3D wavy silicon germanium alloy layer. A substrate is then formed on a physically exposed surface of the single crystalline semiconductor material membrane. The 3D wavy silicon germanium alloy layer and the silicon handler substrate are thereafter removed providing the structure.Type: GrantFiled: December 18, 2019Date of Patent: July 11, 2023Assignee: International Business Machines CorporationInventors: Alexander Reznicek, Karthik Balakrishnan, Stephen W. Bedell, Pouya Hashemi, Bahman Hekmatshoartabari, Keith E. Fogel
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Patent number: 11656243Abstract: A physical quantity sensor includes, when three directions orthogonal to one another are defined as a first direction, a second direction, and a third direction, a substrate; and a moving member facing the substrate in the third direction via a gap and becoming displaced in the third direction in relation to the substrate. The moving member has a first region that has a plurality of penetration holes penetrating the moving member in the third direction and having a square opening shape as viewed from the third direction, and a second region having no penetration hole. At least one of a length in the first direction and a length in the second direction of the second region is equal to or greater than S0+2×S1, where S0 is a length of one side of the penetration hole, and S1 is a space between the penetration holes next to each other.Type: GrantFiled: February 26, 2021Date of Patent: May 23, 2023Inventor: Satoru Tanaka
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Patent number: 11658169Abstract: A semiconductor device has a first substrate including an element region, a peripheral region that surrounds the element region, a first insulator with a first recess portion in the peripheral region, a first metal layer in the element region, and a first conductor in the peripheral region to surround the element region. A second substrate has an element region, a peripheral region that surrounds the element region, a second insulator with a second recess portion that faces the first recess portion, a second metal layer in contact with the first metal layer, and a second conductor that surrounds the element region of the second substrate.Type: GrantFiled: August 28, 2020Date of Patent: May 23, 2023Assignee: Kioxia CorporationInventor: Junichi Shibata
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Patent number: 11634317Abstract: A micro-electromechanical system (MEMS) device comprises a fixed portion and a proofmass suspended by at least one composite beam. The composite beam is cantilevered relative to the fixed portion and extends between a first end that is integrally formed with the fixed portion and a second distal end. The composite beam comprises an insulator having a top surface and at least two side surfaces; a conductor extending away from the fixed portion and surrounding at least a portion of the insulator; and a second conductor positioned adjacent to the top surface of the conductor and extending parallel with the insulator away from the fixed portion. The second conductor is separated from the first conductor to provide a low parasitic conductance of the composite beam.Type: GrantFiled: April 23, 2019Date of Patent: April 25, 2023Assignee: Kionix, Inc.Inventors: Andrew Hocking, Martin Heller, Wenting Gu
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Patent number: 11630012Abstract: A pressure sensor includes a micromechanical sensor element including a pressure-sensitive diaphragm, which spans a cavity in a base material and includes a diaphragm electrode. A fixed counter electrode is situated inside the cavity and, with the diaphragm electrode, forms a first measuring capacitor for detecting a first measuring pressure. A reference capacitor is situated inside the cavity and includes a first and a second fixed reference electrode. The pressure sensor is operable in a first operating mode, in which the first measuring capacitor and the first reference capacitor are interconnected in a first bridge circuit. The pressure sensor is operable in a second operating mode, in which the diaphragm electrode, the counter electrode and the reference electrodes are interconnected in such a way that the diaphragm electrode, together with the at least one first reference electrode, forms a second measuring capacitor for detecting a second measuring pressure.Type: GrantFiled: February 3, 2022Date of Patent: April 18, 2023Assignee: ROBERT BOSCH GMBHInventors: David Slogsnat, Joachim Kreutzer
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Patent number: 11591211Abstract: A method of manufacturing a semiconductive structure includes receiving a first substrate; disposing an interconnection layer on the first substrate; forming a plurality of conductors over the interconnection layer; filing gaps between the plurality of conductors with a film; forming a barrier layer over the film; removing the barrier layer; and partially removing the film to expose a portion of the interconnection and leave a portion of the interconnection layer covered by the film.Type: GrantFiled: October 7, 2019Date of Patent: February 28, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yen-Cheng Liu, Cheng-Yu Hsieh, Shang-Ying Tsai, Kuei-Sung Chang
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Patent number: 11585711Abstract: A capacitive sensor is disclosed. In an embodiment a semiconductor device includes a die including a capacitive pressure sensor integrated on a CMOS circuit, wherein the capacitive pressure sensor includes a first electrode and a second electrode separated from one another by a cavity, the second electrode including a suspended tensile membrane, and wherein the first electrode is composed of one or more aluminum-free layers containing Ti.Type: GrantFiled: January 10, 2019Date of Patent: February 21, 2023Assignee: SCIOSENSE B.V.Inventors: Willem Frederik Adrianus Besling, Remco Henricus Wilhelmus Pijnenburg, Kailash Vijayakumar, Jörg Siegert, Alessandro Faes
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Patent number: 11580767Abstract: A fingerprint sensor includes a die, a plurality of conductive structures, an encapsulant, a plurality of conductive patterns, a first dielectric layer, a second dielectric layer, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The conductive structures surround the die. The encapsulant encapsulates the die and the conductive structures. The conductive patterns are over the die and are electrically connected to the die and the conductive structures. Top surfaces of the conductive patterns are flat. The first dielectric layer is over the die and the encapsulant. A top surface of the first dielectric layer is coplanar with top surfaces of the conductive patterns. The second dielectric layer covers the first dielectric layer and the conductive patterns. The redistribution structure is over the rear surface of the die.Type: GrantFiled: September 10, 2020Date of Patent: February 14, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hsuan Tai, Chih-Hua Chen, Hao-Yi Tsai, Yu-Chih Huang, Chia-Hung Liu, Ting-Ting Kuo, Ying-Cheng Tseng
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Patent number: 11575081Abstract: A MEMS structure may include a substrate, a first metal layer arranged over the substrate, an aluminum nitride layer at least partially arranged over the first metal layer and a second metal layer including one or more patterns arranged over the aluminum nitride layer. The first metal layer may include an electrode area configured for external electrical connection and one or more isolated areas configured to be electrically isolated from the electrode area and further configured to be electrically isolated from external electrical connection. Each pattern of the second metal layer may be arranged to at least partially overlap with one of the isolated area(s) of the first metal layer.Type: GrantFiled: November 26, 2019Date of Patent: February 7, 2023Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.Inventors: Bevita Kallupalathinkal Chandran, Jia Jie Xia, Tze Sheong Neoh
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Patent number: 11554952Abstract: A method for closing openings in a flexible diaphragm of a MEMS element. The method includes: providing at least one opening in the flexible diaphragm, situating sealing material in the area of the at least one opening, melting-on at least the applied sealing material in the area of the at least one opening, and subsequently cooling the melted-on material to close the at least one opening.Type: GrantFiled: December 20, 2018Date of Patent: January 17, 2023Assignee: Robert Bosch GmbHInventors: Bernhard Gehl, Christoph Hermes, Juergen Butz
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Patent number: 11542154Abstract: A method includes fusion bonding a handle wafer to a first side of a device wafer. The method further includes depositing a first mask on a second side of the device wafer, wherein the second side is planar. A plurality of dimple features is formed on an exposed portion on the second side of the device wafer. The first mask is removed from the second side of the device wafer. A second mask is deposited on the second side of the device wafer that corresponds to a standoff. An exposed portion on the second side of the device wafer is etched to form the standoff. The second mask is removed. A rough polysilicon layer is deposited on the second side of the device wafer. A eutectic bond layer is deposited on the standoff. In some embodiments, a micro-electro-mechanical system (MEMS) device pattern is etched into the device wafer.Type: GrantFiled: March 18, 2021Date of Patent: January 3, 2023Assignee: InvenSense, Inc.Inventors: Ashfaque Uddin, Daesung Lee, Alan Cuthbertson
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Patent number: 11542151Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) apparatus. The MEMS apparatus includes a base substrate and a conductive routing layer disposed over the base substrate. A bump feature is disposed directly over the conductive routing layer. Opposing outermost sidewalls of the bump feature are laterally between outermost sidewalls of the conductive routing layer. A MEMS substrate is bonded to the base substrate and includes a MEMS device directly over the bump feature. An anti-stiction layer is arranged on one or more of the bump feature and the MEMS device.Type: GrantFiled: July 21, 2020Date of Patent: January 3, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuei-Sung Chang, Fei-Lung Lai, Shang-Ying Tsai, Cheng Yu Hsieh
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Patent number: 11531415Abstract: A module (1) for a display and/or operating device (10), the module (1) comprising a first transparent electrode (3) having a first matrix of a plurality of electrode islands (3a, 3b, 3c); a transparent piezoelectric layer (2) having a first and a second area; a second transparent electrode (4); a transparent substrate (12); and a conductive path arrangement (25) having at least a first conductive path (24a) on the transparent piezoelectric layer (2), wherein the transparent substrate (12) is coated with the second transparent electrode (4) and the second transparent electrode (4) is disposed between the transparent substrate and the transparent piezoelectric layer (2), and the first area is coated with the first transparent electrode and the second area is coated with the second transparent electrode (4); and the electrode islands (3a, 3b, 3c) are arranged electrically insulated from one another on the first area of the transparent piezoelectric material (2), wherein the at least first conductive path (24a)Type: GrantFiled: January 17, 2020Date of Patent: December 20, 2022Assignee: Bayerische Motoren Werke AktiengesellschaftInventors: Thomas Tille, Florian Miedl
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Patent number: 11493471Abstract: According to one embodiment, a sensor includes a first sensor part. The first sensor part includes a first counter electrode, a first movable electrode, a first layer, and a first intermediate layer. The first movable electrode is between the first counter electrode and the first layer. The first intermediate layer is between the first movable electrode and a portion of the first layer. A first gap is located between the first counter electrode and the first movable electrode. A distance between the first counter electrode and the first movable electrode changes according to a concentration of a gas around the first sensor part. The first layer includes a crystal. The first intermediate layer is amorphous, or a crystallinity of the first intermediate layer is less than a crystallinity of the first layer. A width of the first layer is greater than a width of the first intermediate layer.Type: GrantFiled: August 19, 2021Date of Patent: November 8, 2022Assignee: KABUSHIKI KAISHA TOSHIBAInventor: Yumi Hayashi
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Patent number: 11459228Abstract: A physical quantity sensor includes a substrate, a movable body that is provided displaceably in a state of being opposed to the substrate and is provided with a first through-hole and a second through-hole as through-holes, and a protrusion configured integrally with the substrate at a side of the movable body of the substrate, and in which the protrusion is provided at a position where the protrusion overlaps the through-hole and the movable body in plan view.Type: GrantFiled: August 5, 2019Date of Patent: October 4, 2022Assignee: Seiko Epson CorporationInventor: Satoru Tanaka
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Patent number: 11444048Abstract: In one instance, a semiconductor package includes a lead frame and a semiconductor die mounted to the lead frame via a plurality of bumps that are shaped or tapered. Each of the plurality of bumps includes a first end connected to the semiconductor die and an opposing, second end connected to the lead frame. The first end has an end surface area A1. The second end has an end surface area A2. The end surface area A1 of the first end is less than the end surface area A2 of the second end. Other aspects are disclosed.Type: GrantFiled: August 14, 2018Date of Patent: September 13, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventor: Sreenivasan K. Koduri
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Patent number: 11442294Abstract: A transmissive polarization control device includes: a semiconductor layer having a first surface and a second surface opposite to the first surface, the semiconductor layer including: a first conductivity type region having a conductivity type, a second conductivity type region having a conductivity type, and a pn junction located between the first and second conductivity type regions; a loop electrode disposed on the first surface and configured such that an electric current flowing through the loop produces a magnetic field in a direction penetrating the pn junction; and a near-field light formation region in which an impurity of the first conductivity type introduced as a dopant into the first conductivity type region for formation of near-field light is distributed. A polarization direction of linearly polarized light traveling through a region surrounded by the loop electrode and the near-field light formation region is rotated according to the electric current.Type: GrantFiled: June 23, 2020Date of Patent: September 13, 2022Assignee: NICHIA CORPORATIONInventors: Takuya Kadowaki, Motoichi Ohtsu, Tadashi Kawazoe
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Patent number: 11422075Abstract: The invention relates to a device (10) for determining the mechanical properties of nanomaterials comprising a substrate (30) onto which a nanomaterial specimen (40) can be anchored, wherein said substrate (30) is mechanically connected to an actuator (20) on one side and to a sensor (50) on the opposite side, and wherein the substrate (30) is configured to generate a fracture line (32?) in a predetermined position which divides the substrate (30) into two parts (31,31?), wherein a first part (31) is connected to the actuator (20) and a second part (31?) is connected to a sensor (50), in order to allow a relative movement between the actuator (20) and the sensor (50).Type: GrantFiled: September 28, 2018Date of Patent: August 23, 2022Assignee: UNIVERSITA' DEGLI STUDI DI TRENTOInventors: Maria Pantano, Nicola Pugno, Giorgio Speranza
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Patent number: 11408912Abstract: An optomechanical device for producing and detecting optical signals comprising a proof mass assembly, one or more laser devices, and a circuit. The one or more laser devices are configured to generate a first optical signal and a second optical signal. The circuit is configured to modulate, with an electro-optic modulator (EOM), the second optical signal, output the first optical signal and the second optical signal to the proof mass assembly, generate a filtered optical signal corresponding to a response by the proof mass assembly to the first optical signal without the second optical signal, and generate an electrical signal based on the filtered optical signal, wherein the EOM modulates the second optical signal based on the electrical signal.Type: GrantFiled: August 13, 2019Date of Patent: August 9, 2022Assignee: Honeywell International Inc.Inventors: Joshua Dorr, Chad Fertig, Arthur Savchenko, Steven Tin, Neil Krueger