With Magnetic Field Directing Means (e.g., Shield, Pole Piece, Etc.) Patents (Class 257/422)
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Patent number: 9048412Abstract: A magnetic memory device may include a first vertical magnetic layer, a non-magnetic layer on the first vertical magnetic layer, and a first junction magnetic layer on the non-magnetic layer, with the non-magnetic layer being between the first vertical magnetic layer and the first junction magnetic layer. A tunnel barrier may be on the first junction magnetic layer, with the first junction magnetic layer being between the non-magnetic layer and the tunnel barrier. A second junction magnetic layer may be on the tunnel barrier with the tunnel barrier being between the first and second junction magnetic layers, and a second vertical magnetic layer may be on the second junction magnetic layer with the second junction magnetic layer being between the tunnel barrier and the second vertical magnetic layer.Type: GrantFiled: March 12, 2014Date of Patent: June 2, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sechung Oh, Jangeun Lee, Jeahyoung Lee, Woojin Kim, Woo Chang Lim, Junho Jeong, Sukhun Choi
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Patent number: 9041130Abstract: According to one embodiment, a magnetic memory device includes a semiconductor substrate, a memory cell array area on the semiconductor substrate, the memory cell array area including magnetoresistive elements, each of the magnetoresistive elements having a reference layer with an invariable magnetization, a storage layer with a variable magnetization, and a tunnel barrier layer therebetween, a magnetic field generating area which generates a first magnetic field cancelling a second magnetic field applying from the reference layer to the storage layer, and which is separated from the magnetoresistive elements, and a closed magnetic path area functioning as a closed magnetic path of the first magnetic field, and surrounding the memory cell array area and the magnetic field generating area.Type: GrantFiled: February 11, 2014Date of Patent: May 26, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Shinya Kobayashi, Kenji Noma, Hisato Oyamatsu
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Patent number: 9035404Abstract: A semiconductor device includes a substrate, a multilayer wiring layer formed over the substrate, an MTJ (Magnetic Tunnel Junction) element formed in an insulating layer located lower than an uppermost wiring layer in the multilayer wiring layer, a wiring formed in a wiring layer immediately above the MTJ element and coupled to the MTJ element, and a shield conductor region provided in the wiring or a wiring layer immediately above the wiring, and covering an entirety of the MTJ element in a plan view.Type: GrantFiled: December 23, 2013Date of Patent: May 19, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventor: Yoshihisa Matsubara
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Patent number: 9018719Abstract: According to one embodiment, a magnetoresistive element includes a storage layer having a perpendicular and variable magnetization, a reference layer having a perpendicular and invariable magnetization, a shift adjustment layer having a perpendicular and invariable magnetization in a direction opposite to a magnetization of the reference layer, a first nonmagnetic layer between the storage layer and the reference layer, and a second nonmagnetic layer between the reference layer and the shift adjustment layer. A switching magnetic field of the reference layer is equal to or smaller than a switching magnetic field of the storage layer, and a magnetic relaxation constant of the reference layer is larger than a magnetic relaxation constant of the storage layer.Type: GrantFiled: March 19, 2012Date of Patent: April 28, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Katsuya Nishiyama, Hisanori Aikawa, Tadashi Kai, Toshihiko Nagase, Koji Ueda, Hiroaki Yoda
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Publication number: 20150108594Abstract: A MR sensor is disclosed that has a free layer (FL) with perpendicular magnetic anisotropy (PMA) which eliminates the need for an adjacent hard bias structure to stabilize free layer magnetization and minimizes shield-FL interactions. In a TMR embodiment, a seed layer, free layer, junction layer, reference layer, and pinning layer are sequentially formed on a bottom shield. After patterning, a conformal insulation layer is formed along the sensor sidewall. Thereafter, a top shield is formed on the insulation layer and includes side shields that are separated from the FL by a narrow read gap. The sensor is scalable to widths <50 nm when PMA is greater than the FL self-demag field. Effective bias field is rather insensitive to sensor aspect ratio which makes tall stripe and narrow width sensors a viable approach for high RA TMR configurations. Sensor sidewalls may extend into the seed layer or bottom shield.Type: ApplicationFiled: December 23, 2014Publication date: April 23, 2015Inventors: Yuchen Zhou, Kunliang Zhang, Zhigang Bai
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Publication number: 20150102441Abstract: The present invention is directed to a spin transfer torque (STT) MRAM device having a perpendicular magnetic tunnel junction (MTJ) memory element. The memory element includes a perpendicular MTJ structure in between a non-magnetic seed layer and a non-magnetic cap layer. The MTJ structure comprises a magnetic free layer structure and a magnetic reference layer structure with an insulating tunnel junction layer interposed therebetween, an anti-ferromagnetic coupling layer formed adjacent to the magnetic reference layer structure, and a magnetic fixed layer formed adjacent to the anti-ferromagnetic coupling layer. At least one of the magnetic free and reference layer structures includes a non-magnetic perpendicular enhancement layer, which improves the perpendicular anisotropy of magnetic layers adjacent thereto.Type: ApplicationFiled: April 17, 2014Publication date: April 16, 2015Applicant: Avalanche Technology, Inc.Inventors: Huadong Gan, Yuchen Zhou, Yiming Huai, Zihui Wang, Xiaobin Wang
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Patent number: 9006848Abstract: A nonvolatile magnetic memory device using a magnetic tunneling junction (MTJ) uses as a data storage unit an MTJ including a pinned magnetic layer, a nonmagnetic insulating layer, and a free magnetic layer which are sequentially stacked. The free magnetic layer includes at least one soft magnetic amorphous alloy layer in which zirconium (Zr) is added to a soft magnetic material formed of cobalt (Co) or a Co-based alloy.Type: GrantFiled: May 10, 2013Date of Patent: April 14, 2015Assignees: SK Hynix Inc., Industry-University Cooperation Foundation Hanyang UniverityInventor: Wan Jun Park
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Patent number: 9000546Abstract: A spin-wave waveguide includes a ferromagnetic thin film resembling a wire in shape. A part of the ferromagnetic thin film, large in film thickness, is formed at one end of the ferromagnetic thin film, and a part of the ferromagnetic thin film, small in film thickness, and a part of the ferromagnetic thin film, large in film thickness, are alternately formed on the same plane, for at least not less than one cycle. A part of the ferromagnetic thin film, large in film thickness, is formed at the other end of the ferromagnetic thin film, wherein an insulating film, and an electrode film are stacked in this order on the ferromagnetic thin film in the part of the ferromagnetic thin film, large in film thickness.Type: GrantFiled: December 4, 2012Date of Patent: April 7, 2015Assignee: Hitachi, Ltd.Inventors: Kenchi Ito, Masaki Yamada, Susumu Ogawa
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Patent number: 8994131Abstract: According to one embodiment, a magnetic memory includes a first magnetoresistive element includes a storage layer with a perpendicular and variable magnetization, a tunnel barrier layer, and a reference layer with a perpendicular and invariable magnetization, and stacked in order thereof in a first direction, and a first shift corrective layer with a perpendicular and invariable magnetization, the first shift corrective layer and the storage layer arranged in a direction intersecting with the first direction. Magnetization directions of the reference layer and the first shift corrective layer are the same.Type: GrantFiled: March 15, 2013Date of Patent: March 31, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Naoharu Shimomura, Eiji Kitagawa, Chikayoshi Kamata, Minoru Amano, Yuichi Ohsawa, Daisuke Saida, Megumi Yakabe, Hiroaki Maekawa
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Patent number: 8987848Abstract: A MTJ for a spintronic device that is a domain wall motion device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. The seed layer is preferably NiCr, NiFeCr, Hf, or a composite thereof with a thickness from 10 to 100 Angstroms. Furthermore, a magnetic layer such as CoFeB may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.Type: GrantFiled: April 4, 2014Date of Patent: March 24, 2015Assignee: Headway Technologies, Inc.Inventors: Guenole Jan, Ru-Ying Tong, Yu-Jen Wang
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Magnetic memory devices having a uniform perpendicular nonmagnetic rich antisotropy enhanced pattern
Patent number: 8987850Abstract: Provided are magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of controlling a magnetization direction of a magnetic pattern. In a magnetic memory device, atomic-magnetic moments non-parallel to one surface of a free pattern increase in the free pattern. Therefore, critical current density of the magnetic memory device may be reduced, such that power consumption of the magnetic memory device is reduced or minimized and/or the magnetic memory device is improved or optimized for a higher degree of integration.Type: GrantFiled: March 4, 2014Date of Patent: March 24, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sechung Oh, Jangeun Lee, Woojin Kim, Heeju Shin -
Patent number: 8987847Abstract: A MTJ for a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. The seed layer is preferably NiCr, NiFeCr, Hf, or a composite thereof with a thickness from 10 to 100 Angstroms. Furthermore, a magnetic layer such as CoFeB may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.Type: GrantFiled: April 4, 2014Date of Patent: March 24, 2015Assignee: Headway Technologies, Inc.Inventors: Guenole Jan, Ru-Ying Tong, Yu-Jen Wang
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Patent number: 8981508Abstract: A magnetic field sensor having a support with a top side and a bottom side, whereby a Hall plate is provided on the top side of the support and the Hall plate comprises a carbon-containing layer.Type: GrantFiled: December 10, 2013Date of Patent: March 17, 2015Assignee: Micronas GmbHInventor: Joerg Franke
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Patent number: 8981507Abstract: According to one embodiment, a method for manufacturing a nonvolatile memory device including a plurality of memory cells is disclosed. Each of the plurality of memory cells includes a base layer including a first electrode, a magnetic tunnel junction device provided on the base layer, and a second electrode provided on the magnetic tunnel junction device. The magnetic tunnel junction device includes a first magnetic layer, a tunneling barrier layer provided on the first magnetic layer, and a second magnetic layer provided on the tunneling barrier layer. The method can include etching a portion of the second magnetic layer and a portion of the first magnetic layer by irradiating gas clusters onto a portion of a surface of the second magnetic layer or a portion of a surface of the first magnetic layer.Type: GrantFiled: June 27, 2012Date of Patent: March 17, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Shigeki Takahashi, Kyoichi Suguro, Junichi Ito, Yuichi Ohsawa, Hiroaki Yoda
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Patent number: 8981502Abstract: Methods for forming a magnetic tunnel junction (MTJ) storage element and MTJ storage elements formed are disclosed. The MTJ storage element includes a MTJ stack having a pinned layer stack, a barrier layer and a free layer. An adjusting layer is formed on the free layer, such that the free layer is protected from process related damages. A top electrode is formed on the adjusting layer and the adjusting layer and the free layer are etched utilizing the top electrode as a mask. A spacer layer is then formed, encapsulating the top electrode, the adjusting layer and the free layer. The spacer layer and the remaining portions of the MTJ stack are etched. A protective covering layer is deposited over the spacer layer and the MTJ stack.Type: GrantFiled: March 29, 2010Date of Patent: March 17, 2015Assignee: QUALCOMM IncorporatedInventors: Wei-Chuan Chen, Seung H. Kang
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Patent number: 8975091Abstract: The present disclosure relates to a magnetic tunnel junction (MTJ) device and its fabricating method. Through forming MTJ through a damascene process, device damage due to the etching process and may be avoided. In some embodiments, a spacer is formed between a first portion and a second portion of the MTJ to prevent the tunnel insulating layer of the MTJ from being damaged in subsequent processes, greatly increasing product yield thereby. In other embodiments, signal quality may be improved and magnetic flux leakage may be reduced through the improved cup-shaped MTJ structure of this invention.Type: GrantFiled: September 9, 2014Date of Patent: March 10, 2015Assignee: Semiconductor Manufacturing International (Beijing) CorporationInventors: Min-Hwa Chi, Mieno Fumitake
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Patent number: 8969101Abstract: A method and structure for a three-axis magnetic field sensing device. An IC layer having first bond pads and second bond pads can be formed overlying a substrate/SOI member with a first, second, and third magnetic sensing element coupled the IC layer. One or more conductive cables can be formed to couple the first and second bond pads of the IC layer. A portion of the substrate member and IC layer can be removed to separate the first and second magnetic sensing elements on a first substrate member from the third sensing element on a second substrate member, and the third sensing element can be coupled to the side-wall of the first substrate member.Type: GrantFiled: August 17, 2011Date of Patent: March 3, 2015Assignee: mCube Inc.Inventors: Hong Wan, Anthony F. Flannery
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Patent number: 8963222Abstract: A spin Hall effect magnetoresistive memory comprises apparatus of a three terminal magnetoresistive memory cell having an MTJ stack, a functional magnetic layer having a magnetization anti-parallel or parallel coupled with a recording layer magnetization in the MTJ stack, and a SHE-metal base layer. The control circuitry coupled through the bit line and the two select transistors to selected ones of the plurality of magnetoresistive memory elements to supply a reading current across the magnetoresistive element stack and two bottom electrodes and to supply a bi-directional spin Hall effect recording current, and accordingly to directly switch the magnetization of the functional magnetic coupling layer and indirectly switching the magnetization of the recording layer through the coupling between the functional magnetic coupling layer and the recording layer.Type: GrantFiled: April 14, 2014Date of Patent: February 24, 2015Inventor: Yimin Guo
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Patent number: 8963544Abstract: A magnetic detection element includes a magnetoresistance effect portion composed of a magnetoresistance effect material and a pair of yoke portions. The pair of yoke portions is composed of a soft magnetic material and are respectively arranged so as to be electrically connected to both sides of the magnetoresistance effect portion. The pair of yoke portions guides magnetic flux into the magnetoresistance effect portion. The magnetic detection element also includes a bypass portion, which is composed of a soft magnetic material and is saturated with magnetic flux at lower magnetic field intensity than the yoke portions, and which guides a part of the magnetic flux generated in the yoke portions so as to divert the magnetic flux from the magnetoresistance effect portion.Type: GrantFiled: September 29, 2009Date of Patent: February 24, 2015Assignee: The Research Institute for Electric and Magnetic MaterialsInventors: Hirofumi Imatani, Masaaki Yamamoto, Mamiko Naka, Yasushi Kaneta, Kiwamu Shirakawa
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Patent number: 8962349Abstract: The present invention is directed to a method for fabricating a magnetic tunnel junction (MTJ) memory element. The method comprises the steps of providing a substrate having a contact dielectric layer, a bottom dielectric layer, a bottom electrode layer, an etch stop layer, an MTJ layer stack, and a top electrode layer sequentially formed thereon; etching the top electrode layer with a first mask thereon to form a top electrode; etching the MTJ layer stack with the top electrode thereon to form a patterned MTJ; encapsulating the patterned MTJ with a passivation layer; depositing a top dielectric layer on top of the passivation layer and planarizing the same layer; forming a second mask on the top dielectric layer; and etching the bottom electrode layer, the etch stop layer, the passivation layer, and the top dielectric layer with the second mask thereon to form a bottom electrode.Type: GrantFiled: November 25, 2013Date of Patent: February 24, 2015Assignee: Avalanche Technology, Inc.Inventors: Benjamin Chen, Kimihiro Satoh, Jing Zhang, Dong Ha Jung
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Publication number: 20150048465Abstract: Some implementations provide a die that includes a magnetoresistive random access memory (MRAM) cell array that includes several MRAM cells. The die also includes a first ferromagnetic layer positioned above the MRAM cell array, a second ferromagnetic layer positioned below the MRAM cell array, and several vias positioned around at least one MRAM cell. The via comprising a ferromagnetic material. In some implementations, the first ferromagnetic layer, the second ferromagnetic layer and the several vias define a magnetic shield for the MRAM cell array. The MRAM cell may include a magnetic tunnel junction (MTJ). In some implementations, the several vias traverse at least a metal layer and a dielectric layer of the die. In some implementations, the vias are through substrate vias. In some implementations, the ferromagnetic material has high permeability and high B saturation.Type: ApplicationFiled: September 26, 2014Publication date: February 19, 2015Inventors: Shiqun Gu, Rongtian Zhang, Vidhya Ramachandran, Dong Wook Kim
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Patent number: 8957486Abstract: Provided is a magnetic random access memory to which spin torque magnetization reversal is applied, the magnetic random access memory being thermal stable in a reading operation and also being capable of reducing a current in a wiring operation. A magnetoresistive effect element formed by sequentially stacking a fixed layer, a nonmagnetic barrier layer, and a recording layer is used as a memory element. The recording layer adopts a laminated ferrimagnetic structure.Type: GrantFiled: March 4, 2009Date of Patent: February 17, 2015Assignee: Hitachi, Ltd.Inventors: Kenchi Ito, Jun Hayakawa, Katsuya Miura, Hiroyuki Yamamoto
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Patent number: 8952471Abstract: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.Type: GrantFiled: June 14, 2013Date of Patent: February 10, 2015Assignee: Allegro Microsystems, LLCInventors: Michael C. Doogue, William P. Taylor, Vijay Mangtani
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Patent number: 8946837Abstract: According to one embodiment, a semiconductor storage device is disclosed. The device includes first magnetic layer, second magnetic layer, first nonmagnetic layer between them. The first magnetic layer includes a structure in which first magnetic material film, second magnetic material film, and nonmagnetic material film between the first and second magnetic material films are stacked. The first magnetic material film is nearest to the first nonmagnetic layer in the first magnetic layer. The nonmagnetic material film includes at least one of Ta, Zr, Nb, Mo, Ru, Ti, V, Cr, W, Hf. The second magnetic material film includes stacked materials, including first magnetic material nearest to the first nonmagnetic layer among the stacked materials, and second magnetic material which is same magnetic material as the first magnetic material and has smaller thickness than the first magnetic material.Type: GrantFiled: January 10, 2014Date of Patent: February 3, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Daisuke Watanabe, Katsuya Nishiyama, Toshihiko Nagase, Koji Ueda, Tadashi Kai
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Patent number: 8941196Abstract: Orthogonal spin-torque bit cells whose spin torques from a perpendicular polarizer and an in-plane magnetized reference layer are constructively or destructively combined. An orthogonal spin-torque bit cell includes a perpendicular magnetized polarizing layer configured to provide a first spin-torque; an in-plane magnetized free layer and a reference layer configured to provide a second spin-torque. The first spin-torque and the second spin-torque combine and the combined first spin-torque and second spin-torque influences the magnetic state of the in-plane magnetized free layer. The in-plane magnetized free layer and the reference layer form a magnetic tunnel junction. The first spin-torque and second spin-torque can combine constructively to lower a switching current, increase a switching speed, and/or torque decrease an operating energy of the orthogonal spin-torque bit cell.Type: GrantFiled: July 3, 2013Date of Patent: January 27, 2015Assignee: New York UniversityInventors: Daniel Bedau, Huanlong Liu, Andrew David Kent
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Patent number: 8928100Abstract: Embodiments are directed to STT MRAM devices. One embodiment of an STT MRAM device includes a reference layer, a tunnel barrier layer, a free layer and one or more conductive vias. The reference layer is configured to have a fixed magnetic moment. In addition, the tunnel barrier layer is configured to enable electrons to tunnel between the reference layer and the free layer through the tunnel barrier layer. The free layer is disposed beneath the tunnel barrier layer and is configured to have an adaptable magnetic moment for the storage of data. The conductive via is disposed beneath the free layer and is connected to an electrode. Further, the conductive via has a width that is smaller than a width of the free layer such that a width of an active STT area for the storage of data in the free layer is defined by the width of the conductive via.Type: GrantFiled: June 24, 2011Date of Patent: January 6, 2015Assignee: International Business Machines CorporationInventors: Michael C. Gaidis, Janusz J. Nowak, Daniel C. Worledge
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Publication number: 20140374860Abstract: Provided is a magnetic shield having improved shielding properties from an external magnetic field. A magnetic shield MS1 has in-plane magnetization as remanent magnetization, and is adapted to generate a perpendicular component in the magnetization direction by applying a magnetic field in the perpendicular direction to the magnetic shield.Type: ApplicationFiled: June 5, 2014Publication date: December 25, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventor: Tetsuhiro SUZUKI
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Patent number: 8907437Abstract: A current sensor packaged in an integrated circuit package to include a magnetic field sensing circuit, a current conductor and an insulator that meets the safety isolation requirements for reinforced insulation under the UL 60950-1 Standard is presented. The insulator is provided as an insulation structure having at least two layers of thin sheet material. The insulation structure is dimensioned so that plastic material forming a molded plastic body of the package provides a reinforced insulation. According to one embodiment, the insulation structure has two layers of insulating tape. Each insulating tape layer includes a polyimide film and adhesive. The insulation structure and the molded plastic body can be constructed to achieve at least a 500 VRMS working voltage rating.Type: GrantFiled: July 22, 2011Date of Patent: December 9, 2014Assignee: Allegro Microsystems, LLCInventors: Shaun D. Milano, Weihua Chen
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Patent number: 8907436Abstract: Provided are magnetic memory devices with a perpendicular magnetic tunnel junction. The device includes a magnetic tunnel junction including a free layer structure, a pinned layer structure, and a tunnel barrier therebetween. The pinned layer structure may include a first magnetic layer having an intrinsic perpendicular magnetization property, a second magnetic layer having an intrinsic in-plane magnetization property, and an exchange coupling layer interposed between the first and second magnetic layers. The exchange coupling layer may have a thickness maximizing an antiferromagnetic exchange coupling between the first and second magnetic layers, and the second magnetic layer may exhibit a perpendicular magnetization direction, due at least in part to the antiferromagnetic exchange coupling with the first magnetic layer.Type: GrantFiled: July 2, 2013Date of Patent: December 9, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: SeChung Oh, Ki Woong Kim, Younghyun Kim, Whankyun Kim, Sang Hwan Park
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Patent number: 8901686Abstract: A mounting structure for mounting a chip type electric element on a flexible board includes: the flexible board having a first land, on which a first lead terminal of another electric element is soldered; and the chip type electric element having a long side. A whole of the long side of the chip type electric element faces a long side of the first land. A length of the long side of the first land is defined as IA, and a distance between one long side of the first land and one long side of the chip type electric element is defined as IB, the one long side of the first land facing the chip type electric element but opposite to the one long side of the chip type electric element. The length of IA is equal to or larger than the distance of IB.Type: GrantFiled: November 23, 2011Date of Patent: December 2, 2014Assignee: Denso CorporationInventors: Satoru Hiramoto, Koichiro Matsumoto, Yoshiyuki Kono, Akitoshi Mizutani
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Patent number: 8901687Abstract: A magnetic device includes a substrate, a sensing block and a repair layer. The substrate has a registration layer and a barrier layer disposed on the registration layer. The sensing block is patterned to distribute on the barrier layer. The repair layer is disposed substantially on the barrier layer, wherein the barrier layer is configured to have a tunneling effect when a bias voltage exists between the sensing block and the registration layer.Type: GrantFiled: November 27, 2012Date of Patent: December 2, 2014Assignee: Industrial Technology Research InstituteInventors: Cheng Wei Chien, Kuei Hung Shen, Yung Hung Wang
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Patent number: 8895323Abstract: A method for forming MRAM (magnetoresistive random access memory) devices is provided. A bottom electrode assembly is formed. A magnetic junction assembly is formed, comprising, depositing a magnetic junction assembly layer over the bottom electrode assembly, forming a patterned mask over the magnetic junction assembly layer, etching the magnetic junction assembly layer to form the magnetic junction assembly with gaps, gap filling the magnetic junction assembly, and planarizing the magnetic junction assembly. A top electrode assembly is formed.Type: GrantFiled: December 14, 2012Date of Patent: November 25, 2014Assignee: Lam Research CorporationInventor: Joydeep Guha
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Patent number: 8890266Abstract: A magnetic sensor includes a plurality of groups, each group comprising a plurality of magnetic tunnel junction (MTJ) devices having a plurality of conductors configured to couple the MTJ devices within one group in parallel and the groups in series enabling independent optimization of the material resistance area (RA) of the MTJ and setting total device resistance so that the total bridge resistance is not so high that Johnson noise becomes a signal limiting concern, and yet not so low that CMOS elements may diminish the read signal. Alternatively, the magnetic tunnel junction devices within each of at least two groups in series and the at least two groups in parallel resulting in the individual configuration of the electrical connection path and the magnetic reference direction of the reference layer, leading to independent optimization of both functions, and more freedom in device design and layout.Type: GrantFiled: August 16, 2011Date of Patent: November 18, 2014Assignee: EverSpin Technologies, Inc.Inventors: Phillip Mather, Jon Slaughter, Nicholas Rizzo
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Patent number: 8890265Abstract: A package is formed by vertically stacking a cover and a substrate. A microphone chip is mounted at the top surface of a concave portion provided to the cover, and a circuit element is mounted on the upper surface of the substrate. The microphone chip is connected to a pad on the lower surface of the cover by a bonding wire. The circuit element is connected to a pad on the upper surface of the substrate by a bonding wire. A cover-side joining portion in conduction with the pad on the lower surface of the cover, and a substrate-side joining portion in conduction with the pad on the upper surface of the substrate, are joined by a conductive material. A conductive layer for electromagnetic shielding is embedded inside the cover near the bonding pad and the cover-side joining portion.Type: GrantFiled: August 29, 2012Date of Patent: November 18, 2014Assignee: OMRON CorporationInventor: Naoto Kuratani
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Patent number: 8884388Abstract: A magnetic memory element includes: a first magnetization free layer configured to be composed of ferromagnetic material with perpendicular magnetic anisotropy; a reference layer configured to be provided near the first magnetization free layer; a non-magnetic layer configured to be provided adjacent to the reference layer; and a step formation layer configured to be provided under the first magnetization free layer. The first magnetization free layer includes: a first magnetization fixed region of which magnetization is fixed, a second magnetization fixed region of which magnetization is fixed, and a magnetization free region configured to be connected with the first magnetization fixed region and the second magnetization fixed region. The first magnetization free layer has at least one of a step, a groove and a protrusion inside.Type: GrantFiled: March 9, 2011Date of Patent: November 11, 2014Assignee: NEC CorporationInventors: Shunsuke Fukami, Kiyokazu Nagahara, Tetsuhiro Suzuki
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Patent number: 8878317Abstract: A magnetoresistive element according to an embodiment includes: a first to third ferromagnetic layers, and a first nonmagnetic layer, the first and second ferromagnetic layers each having an axis of easy magnetization in a direction perpendicular to a film plane, the third ferromagnetic layer including a plurality of ferromagnetic oscillators generating rotating magnetic fields of different oscillation frequencies from one another. Spin-polarized electrons are injected into the first ferromagnetic layer and induce precession movements in the plurality of ferromagnetic oscillators of the third ferromagnetic layer by flowing a current between the first and third ferromagnetic layers, the rotating magnetic fields are generated by the precession movements and are applied to the first ferromagnetic layer, and at least one of the rotating magnetic fields assists a magnetization switching in the first ferromagnetic layer.Type: GrantFiled: August 16, 2011Date of Patent: November 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Tadaomi Daibou, Minoru Amano, Daisuke Saida, Junichi Ito, Yuichi Ohsawa, Chikayoshi Kamata, Saori Kashiwada, Hiroaki Yoda
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Patent number: 8878321Abstract: According to one embodiment, a magnetoresistive element comprises a first magnetic layer, in which a magnetization direction is variable and is perpendicular to a film surface, a tunnel barrier layer that is formed on the first magnetic layer, and a second magnetic layer that is formed on the tunnel barrier layer, a magnetization direction of the second magnetic layer being variable and being perpendicular to the film surface. The second magnetic layer comprises a body layer that constitutes an origin of perpendicular magnetic anisotropy, and an interface layer that is formed between the body layer and the tunnel barrier layer. The interface layer has a permeability higher than that of the body layer and a planar size larger than that of the body layer.Type: GrantFiled: September 14, 2012Date of Patent: November 4, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Hisanori Aikawa, Hiroaki Yoda, Masahiko Nakayama, Tatsuya Kishi, Sumio Ikegawa
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Patent number: 8865481Abstract: A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.Type: GrantFiled: February 4, 2014Date of Patent: October 21, 2014Assignee: QUALCOMM IncorporatedInventors: Xia Li, Xiaochun Zhu, Seung Hyuk Kang
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Patent number: 8866242Abstract: A memory device may comprise a magnetic tunnel junction (MTJ) stack, a bottom electrode (BE) layer, and a contact layer. The MTJ stack may include a free layer, a barrier, and a pinned layer. The BE layer may be coupled to the MTJ stack, and encapsulated in a planarized layer. The BE layer may also have a substantial common axis with the MTJ stack. The contact layer may be embedded in the BE layer, and form an interface between the BE layer and the MTJ stack.Type: GrantFiled: November 10, 2011Date of Patent: October 21, 2014Assignee: QUALCOMM IncorporatedInventors: Xia Li, Seung H. Kang, Matthew M. Nowak
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Patent number: 8860106Abstract: A spin filter includes a first electrode configured to be formed with a zigzag graphene ribbon with an even number of rows extending in a first direction, and to have a magnetic moment in a second direction crossing with the first direction; a second electrode configured to be formed with a zigzag graphene ribbon with an even number of rows extending in the first direction, and to have a magnetic moment in the second direction; and a channel region configured to be placed between the first electrode and the second electrode, and to have an energy level allowing up-spin electrons or down-spin electrons to pass.Type: GrantFiled: October 15, 2013Date of Patent: October 14, 2014Assignee: Fujitsu LimitedInventor: Mari Ohfuchi
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Patent number: 8860105Abstract: A spin-current switched magnetic memory element includes a plurality of magnetic layers, at least one of the plurality of magnetic layers having a perpendicular magnetic anisotropy component and including a current-switchable magnetic moment, and at least one barrier layer formed adjacent to the plurality of magnetic layers. The plurality of magnetic layers includes at least one composite layer.Type: GrantFiled: September 4, 2013Date of Patent: October 14, 2014Assignee: International Business Machines CorporationInventors: Jonathan Zanhong Sun, Rolf Allenspach, Stuart Stephen Papworth Parkin, John Casimir Slonczewski, Bruce David Terris
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Patent number: 8861136Abstract: A spin conduction element includes a main channel layer having a first electrode, a second electrode, a third electrode, a fourth electrode, a fifth electrode, and a sixth electrode, and extending in a first direction. Spins are injected into the main channel layer from a second ferromagnetic layer constituting the second electrode and a fourth ferromagnetic layer constituting the fourth electrode, and a spin current is detected as a voltage in a third ferromagnetic layer constituting the third electrode.Type: GrantFiled: March 13, 2013Date of Patent: October 14, 2014Assignee: TDK CorporationInventors: Tomoyuki Sasaki, Tohru Oikawa, Hayato Koike
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Patent number: 8860155Abstract: The present disclosure relates to a magnetic tunnel junction (MTJ) device and its fabricating method. Through forming MTJ through a damascene process, device damage due to the etching process and may be avoided. In some embodiments, a spacer is formed between a first portion and a second portion of the MTJ to prevent the tunnel insulating layer of the MTJ from being damaged in subsequent processes, greatly increasing product yield thereby. In other embodiments, signal quality may be improved and magnetic flux leakage may be reduced through the improved cup-shaped MTJ structure of this invention.Type: GrantFiled: March 22, 2012Date of Patent: October 14, 2014Assignee: Semiconductor Manufacturing International (Beijing) CorporationInventors: Chi Min-Hwa, Mieno Fumitake
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Publication number: 20140291789Abstract: The present disclosure describes a semiconductor MRAM device and a manufacturing method. The device reduces magnetic field induction “interference” (disturbance) phenomenon between adjacent magnetic tunnel junctions when data is written and read. This semiconductor MRAM device comprises a magnetic tunnel junction unit and a magnetic shielding material layer covering the sidewalls of the magnetic tunnel junction unit. The method for manufacturing a semiconductor device comprises: forming a magnetic tunnel junction unit, depositing an isolation dielectric layer to cover the top and the sidewall of the magnetic tunnel junction unit, and depositing a magnetic shielding material layer on the isolation dielectric layer.Type: ApplicationFiled: June 10, 2014Publication date: October 2, 2014Inventor: Xian Cheng ZENG
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Publication number: 20140293474Abstract: An MR element includes an MR part and upper and lower shield layers in a CPP structure. The MR element has side shield layers so as to interpose the MR part between the side shield layers in a track width direction. The MR part comprises a nonmagnetic intermediate layer and first and second ferromagnetic layers so as to interpose the nonmagnetic intermediate layer between the ferromagnetic layers. Each of the upper and lower shield layers has an inclined magnetization structure such that its magnetization is inclined relative to the track width direction. The side shield layers are magnetically coupled with the upper shield layer, respectively. The second ferromagnetic layer is indirectly magnetically coupled with the lower shield layer via an exchange-coupling functional gap layer. The side shield layer applies a bias magnetic field to the first ferromagnetic layer; and magnetizations of the first and second ferromagnetic layers are substantially orthogonal.Type: ApplicationFiled: March 29, 2013Publication date: October 2, 2014Applicant: TDK CORPORATIONInventors: Takekazu YAMANE, Takahiko MACHITA, Naomichi DEGAWA, Minoru OTA, Kenta HAMAMOTO
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Publication number: 20140293475Abstract: An MR element suppressing a false writing into a medium with an MR part has a CPP structure. The MR part includes a nonmagnetic intermediate layer and first and second ferromagnetic layers so as to interpose the nonmagnetic intermediate layer. First and second shield layers respectively have an inclining magnetization structure of which a magnetization is inclined with regard to a track width direction. The first and second ferromagnetic layers are respectively, magnetically coupled with the first and second shield layers. A magnetization direction adjustment layer for adjusting at least a magnetization direction of the first ferromagnetic layer is positioned at a rear end surface side of the first ferromagnetic layer, which is opposite to a front end surface receiving a magnetic field detected in the MR part.Type: ApplicationFiled: March 29, 2013Publication date: October 2, 2014Inventors: Naomichi DEGAWA, Takahiko MACHITA, Takekazu YAMANE, Takumi YANAGISAWA, Satoshi MIURA, Kenta HAMAMOTO, Minoru OTA, Kenzo MAKINO, Shohei KAWASAKI
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Patent number: 8836060Abstract: The present disclosure provides a spin device including: a graphene; a first ferromagnetic electrode and a second electrode that are in electrical contact with and sandwich the graphene; a third ferromagnetic electrode and a fourth electrode that sandwich the graphene at a position apart from the first and second electrodes in electrical contact with the graphene; a current applying portion that applies an electric current between the first ferromagnetic electrode and the second electrode; and a voltage-signal detecting portion that detects spin accumulation information as a voltage signal via the third ferromagnetic electrode and the fourth electrode. The spin accumulation information is generated, by application of the electric current, in a part of the graphene that is sandwiched between the third and fourth electrodes. The first and third ferromagnetic electrodes are disposed on the same surface of the graphene, and the second and fourth electrodes are non-magnetic or ferromagnetic electrodes.Type: GrantFiled: February 28, 2013Date of Patent: September 16, 2014Assignee: Panasonic CorporationInventors: Akihiro Odagawa, Nozomu Matsukawa
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Patent number: 8836057Abstract: Magnetoresistive elements, and memory devices including the same, include a pinned layer having a fixed magnetization direction, a free layer corresponding to the pinned layer, and a protruding element protruding from the free layer and having a changeable magnetization direction. The free layer has a changeable magnetization direction. The protruding element is shaped in the form of a tube. The protruding element includes a first protruding portion and a second protruding portion protruding from ends of the free layer facing in different directions.Type: GrantFiled: October 31, 2012Date of Patent: September 16, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-chul Lee, Ung-hwan Pi, Kwang-seok Kim, Kee-won Kim, Young-man Jang
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Patent number: 8836059Abstract: The present invention generally relates to a magnetic sensor in a read head having a hard or soft bias layer that is uniform in thickness within the sensor stack. The method of making such sensor is also disclosed. The free layer stripe height is first defined, followed by defining the track width, and lastly the pinned layer stripe height is defined. The pinned layer and the hard or soft bias layer are defined in the same process step. This approach eliminates a partial hard or soft bias layer and reduces potential instability issues.Type: GrantFiled: December 21, 2012Date of Patent: September 16, 2014Assignee: HGST Netherlands B.V.Inventors: Yongchul Ahn, Xiaozhong Dang, Yimin Hsu, Quang Le, Thomas Leong, Simon Liao, Guangli Liu, Aron Pentek
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Patent number: 8836058Abstract: A magnetic device includes a first electrode portion, a free layer portion arranged on the first electrode portion, the free layer portion including a magnetic insulating material, a reference layer portion contacting the free layer portion, the reference layer portion including a magnetic metallic layer, and a second electrode portion arranged on the reference layer portion.Type: GrantFiled: November 29, 2012Date of Patent: September 16, 2014Assignee: International Business Machines CorporationInventors: Marcin J. Gajek, Daniel C. Worledge