Abstract: Disclosed is a semiconductor device which includes a semiconductor chip and a base substrate. The semiconductor chip includes a semiconductor substrate, an interconnect layer and a high-frequency interconnect. The interconnect layer is provided on the substrate. The high-frequency interconnect is formed within the interconnect layer. The semiconductor chip is mounted onto the base substrate. An electromagnetic shield layer is provided between the high-frequency interconnect and the interconnect.

Abstract: According to one embodiment, a magnetic element includes first and second conductive layers, an intermediate interconnection, and first and second stacked units. The intermediate interconnection is provided between the conductive layers. The first stacked unit is provided between the first conductive layer and the interconnection, and includes first and second ferromagnetic layer and a first nonmagnetic layer provided between the first and second ferromagnetic layers. The second stacked unit is provided between the second conductive layer and the interconnection, and includes third and fourth ferromagnetic layers and a second nonmagnetic layer provided between the third and fourth ferromagnetic layers. A magnetization direction of the second ferromagnetic layer is determined by causing a spin-polarized electron and a magnetic field to act on the second ferromagnetic layer.

Abstract: A magnetic memory device includes a free layer and a guide layer on a substrate. An insulating layer is interposed between the free layer and the guide layer. At least one conductive bridge passes through the insulating layer and electrically connects the free layer and the guide layer. A diffusion barrier may be interposed between the guide layer and the insulating layer. The device may further include a reference layer having a fixed magnetization direction on a side of the free layer opposite the insulating layer and a tunnel barrier between the reference layer and the free layer. Related fabrication methods are also described.

Abstract: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.

Abstract: A magnetic tunnel junction (MTJ) storage element may comprise a pinned layer stack and a first functional layer. The pinned layer stack is formed of a plurality of layers comprising a bottom pinned layer, a coupling layer, and a top pinned layer. The first functional layer is disposed in the bottom pinned layer or the top pinned layer.

Abstract: A magnetic tunnel junction (MTJ) device for a magnetic random access memory (MRAM) in a semiconductor back-end-of-line (BEOL) process flow includes a first metal interconnect for communicating with at least one control device and a first electrode for coupling to the first metal interconnect through a via formed in a dielectric passivation barrier using a first mask. The device also includes an MTJ stack for storing data coupled to the first electrode, a portion of the MTJ stack having lateral dimensions based upon a second mask. The portion defined by the second mask is over the contact via. A second electrode is coupled to the MTJ stack and also has a same lateral dimension as defined by the second mask. The first electrode and a portion of the MTJ stack are defined by a third mask. A second metal interconnect is coupled to the second electrode and at least one other control device.

Abstract: Methods and apparatus for shielding a shielding a non-volatile memory, such as shielding a magnetic tunnel junction (MTJ) device from a magnetic flux are provided. In an example, a shielding layer is formed adjacent to an electrode of an MTJ device, such that the shielding layer substantially surrounds a surface of the electrode, and a metal line is coupled to the shielding layer. The metal line can be coupled to the shielding layer by a via.

Abstract: A method for manipulating domain pinning and reversal in a ferromagnetic material comprises applying an external magnetic field to a uniaxial ferromagnetic material comprising a plurality of magnetic domains, where each domain has an easy axis oriented along a predetermined direction. The external magnetic field is applied transverse to the predetermined direction and at a predetermined temperature. The strength of the magnetic field is varied at the predetermined temperature, thereby isothermally regulating pinning of the domains. A magnetic storage device for controlling domain dynamics includes a magnetic hard disk comprising a uniaxial ferromagnetic material, a magnetic recording head including a first magnet, and a second magnet. The ferromagnetic material includes a plurality of magnetic domains each having an easy axis oriented along a predetermined direction.

Abstract: A method of fabricating a spin-current switched magnetic memory element includes providing a wafer having a bottom electrode, forming a plurality of layers, such that interfaces between the plurality of layers are formed in situ, in which the plurality of layers includes a plurality of magnetic layers, at least one of the plurality of magnetic layers having a perpendicular magnetic anisotropy component and including a current-switchable magnetic moment, and at least one barrier layer formed adjacent to the plurality of magnetic layers, lithographically defining a pillar structure from the plurality of layers, and forming a top electrode on the pillar structure.

Abstract: A yield of semiconductor devices having a magnetic shield is enhanced. A magnetic shield member SIE has a first shield member SIE1 and a second shield member SIE2. The first shield member SIE1 has a first facing region FP1 facing a first surface of a semiconductor chip SC. The second shield member SIE2 has a second facing region FP2 facing a second surface of the semiconductor chip SC. A resin layer RL1 has a portion thereof making contact with the first shield member SIE1, and has another portion thereof making contact with the second shield member SIE2. Then, the first shield member SIE1 and the second shield member SIE2 are magnetically coupled via the resin layer RL1 or directly. The first shield member SIE1 and the second shield member SIE2 cover a magnetic memory cell MR in plan view.

Abstract: A spin conduction element includes a main channel layer having a first electrode, a second electrode, a third electrode, a fourth electrode, a fifth electrode, and a sixth electrode, and extending in a first direction. Spins are injected into the main channel layer from a second ferromagnetic layer constituting the second electrode and a fourth ferromagnetic layer constituting the fourth electrode, and a spin current is detected as a voltage in a third ferromagnetic layer constituting the third electrode.

Abstract: A magnetic layer that includes a seed layer comprising at least tantalum and a free magnetic layer comprising at least iron. The free magnetic layer is grown on top of the seed layer and the free magnetic layer is perpendicularly magnetized. The magnetic layer may be included in a magnetic tunnel junction (MTJ) stack.

Abstract: Embodiments generally relate to a magnetic read sensor and a method for its manufacture. A multi-layer insulating material may be used to cover both the first shield layer and also the sidewalls of the sensor structure in the magnetic read sensor. The first insulating layer of the multi-layer insulating material may be deposited by an ion beam sputtering process in a chamber that does not have any oxygen gas flowing into it so that oxygen diffusion into the sensor structure is reduced or eliminated. Then, a second insulating layer of the multi-layer insulating material may be deposited by atomic layer deposition such that the second insulating layer has a greater quality than the first insulating layer. The higher quality increases the breakdown voltage for the magnetic read sensor. Thus, the magnetic read sensor of the present invention has an effective insulating portion that increases the breakdown voltage without sensor damage.

Abstract: A magnetic storage device stable in write characteristic is provided. A first nonmagnetic film is provided over a recording layer. A first ferromagnetic film is provided over the first nonmagnetic film and has a first magnetization and a first film thickness. A second nonmagnetic film is provided over the first ferromagnetic film. A second ferromagnetic film is provided over the second nonmagnetic film, is coupled in antiparallel with the first ferromagnetic film, and has a second magnetization and a second film thickness. An antiferromagnetic film is provided over the second ferromagnetic film. The sum of the product of the first magnetization and the first film thickness and the product of the second magnetization and the second film thickness is smaller than the product of the magnetization of the recording layer and the film thickness of the recording layer.

Abstract: A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a “Z” axis magnetic field onto sensors orientated in the XY plane.

Abstract: Methods and associated structures of forming microelectronic devices are described. Those methods may include forming a first layer of magnetic material and at least one via structure disposed in a first dielectric layer, forming a second dielectric layer disposed on the first magnetic layer, forming at least one conductive structure disposed in the second dielectric layer, forming a third layer of dielectric material disposed on the conductive structure, forming a second layer of magnetic material disposed in the third layer of dielectric material and in the second layer of dielectric material, wherein the first and second layers of the magnetic material are coupled to one another.

Abstract: A magnetic tunnel junction includes an amorphous ferromagnetic reference layer having a first reference layer side and an opposing second reference layer side. The first reference layer side has a greater concentration of boron than the second reference layer side. A magnesium oxide tunnel barrier layer is disposed on the second side of the amorphous ferromagnetic reference layer. The magnesium oxide tunnel barrier layer has a crystal structure. An amorphous ferromagnetic free layer is disposed on the magnesium oxide tunnel barrier layer.

Abstract: A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel junction elements stores data by a change in a resistance state, and the data is rewritable by a current. Cell transistors are provided on the semiconductor substrate. Each of the cell transistors is in a conductive state when the current is applied to the corresponding magnetic tunnel junction element. Gate electrodes are included in the respective cell transistors. Each of the gate electrodes controls the conductive state of the corresponding cell transistor. In active areas, the cell transistors are provided, and the active areas extend in an extending direction of intersecting the gate electrodes at an angle of (90-a tan(?)) degrees.

Abstract: A MTJ for a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/X)n or (CoX)n composition where n is from 2 to 30, X is one of V, Rh, Ir, Os, Ru, Au, Cr, Mo, Cu, Ti, Re, Mg, or Si, and CoX is a disordered alloy. A CoFeB layer may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.

Abstract: A memory device includes a fixed magnetic layer, a tunnel barrier layer over the fixed magnetic layer, and a free magnetic structure formed over the tunnel barrier layer, wherein the free magnetic structure has layers or sub-layers that are weakly magnetically coupled. Thus, a low programming voltage can be used to avoid tunnel barrier breakdown, and a small pass transistor can be used to save die real estate.

Abstract: A magnetic sensor 1 comprises a main channel layer 7a having first, second, and third regions 71, 72, 73 and extending in a first direction; a first ferromagnetic layer 12A mounted on the first region 71; a second ferromagnetic layer 12B mounted on the second region 72; a projection channel layer 7b projecting in a direction perpendicular to a thickness direction of the main channel layer 7a from a side face of the third region 73 between the first and second regions 71, 72 in the main channel layer 7a; and a magnetic shield S covering both sides in the thickness direction of the projection channel layer 7b and both sides in the first direction of the projection channel layer 7b and exposing an end face 7c in the projecting direction of the projection channel layer 7b.

Abstract: A magnetic memory device including a memory layer having a vertical magnetization on the layer surface, of which the direction of magnetization is changed according to information; and a reference layer provided against the memory layer, and being a basis of information while having a vertical magnetization on the layer surface, wherein the memory device memorizes the information by reversing the magnetization of the memory layer by a spin torque generated when a current flows between layers made from the memory layer, the nonmagnetization layer and the reference layer, and a coercive force of the memory layer at a memorization temperature is 0.7 times or less than a coercive force at room temperature, and a heat conductivity of a center portion of an electrode formed on one side of the memory layer in the direction of the layer surface is lower than a heat conductivity of surroundings thereof.

Abstract: A CPP MTJ MRAM unit cell utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The strength of the switching field, Hs of the cell is controlled by the magnetic anisotropy of the cell which, in turn, is controlled by a combination of the shape anisotropy and the stress and magnetostriction of the cell free layer. The coefficient of magnetostriction of the free layer can be adjusted by methods such as adding Nb or Hf to alloys of Ni, Fe, Co and B or by forming the free layer as a lamination of layers having different values of their coefficients of magnetostriction. Thus, by tuning the coefficient of magnetostriction of the cell free layer it is possible to produce a switching field of sufficient magnitude to render the cell thermally stable while maintaining a desirable switching current.

Abstract: A magnetic storage device which enables stable operation at the time of recording information into MRAM and the stable retention of recorded information. The die of the magnetic storage device has a substrate, first and second wirings, a magnetic storage element and a first magnetic shielding structure. The first magnetic shielding structure is formed to cover the magnetic storage element in a plan view. Second and third magnetic shielding structures sandwich the die in a thickness direction. A lead frame member has the die mounted thereon and contains a ferromagnetic material. The lead frame member overlaps with only part of the die in a plan view.

Abstract: An interface circuit for a sensor array is provided. The interface circuit may be made up of an integrated circuit package that provides a first region and a second region. The first region may be spaced apart and opposite to the second region of the package. The first region of the package may provide a plurality of interfaces for interconnecting to an integrated circuit in the package a plurality of signals from the sensor array and having a first electrical characteristic, such as analog and test signals. The second region of the package may provide a plurality of interfaces for interconnecting to the integrated circuit a plurality of signals having at least one electrical characteristic different than the first characteristic, such as power and operational digital signals.

Abstract: A magnetic random access memory (MRAM) cell includes a storage layer, a sense layer, and a spacer layer between the storage layer and the sense layer. A field line is magnetically coupled to the MRAM cell to induce a magnetic field along a magnetic field axis, and at least one of the storage layer and the sense layer has a magnetic anisotropy axis that is tilted relative to the magnetic field axis. During a write operation, a storage magnetization direction is switchable between m directions to store data corresponding to one of m logic states, with m>2, where at least one of the m directions is aligned relative to the magnetic anisotropy axis, and at least another one of the m directions is aligned relative to the magnetic field axis. During a read operation, a sense magnetization direction is varied, relative to the storage magnetization direction, to determine the data stored by the storage layer.

Abstract: There is provided a magnonic-crystal spin wave device capable of controlling a frequency of a spin wave. The magnonic-crystal spin wave device according to the invention includes a spin wave waveguide made of magnetic material, and the spin wave waveguide guides the spin wave so as to propagate in one direction, and includes a magnonic crystal part which has a cross-section orthogonal to the direction, and at least one of a shape, area size, and center line of the cross-section periodically changes in the direction. In accordance with the invention, it is possible to easily control the frequency of the spin wave using the spin wave waveguide made of single magnetic material.

Abstract: A method and structure for a three-axis magnetic field sensing device is provided. The device includes a substrate, an IC layer, and preferably three magnetic field sensors coupled to the IC layer. A nickel-iron magnetic field concentrator is also provided.

Abstract: A magnetic sensor comprises a channel, a ferromagnetic body and first and second reference electrodes on the channel, a magnetic shield covering a part of the channel opposing the ferromagnetic body, and an insulating film disposed between the channel and the magnetic shield, while the magnetic shield has a through-hole extending toward the part of the channel opposing the ferromagnetic body.

Abstract: A method of assembling a magnetoresistive random access memory (MRAM) device includes providing a substrate having an opening. A tape is applied to a surface of the substrate and a first magnetic shield is placed onto the tape and within the substrate opening. An adhesive is applied between the first magnetic shield and the substrate to attach the first magnetic shield to the substrate. An MRAM die is attached to the first magnetic shield and bond pads of the MRAM die are connected to pads on the substrate with wires. A second magnetic shield is attached to a top surface of the MRAM die. An encapsulating material is dispensed onto the substrate, the MRAM die, the second magnetic shield and part of the first magnetic shield, cured, and then the tape is removed. Solder balls then may be attached to the substrate.

Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.

Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.

Abstract: A semiconductor device includes a semiconductor chip, and a guard ring made of an electrically conductive material and arranged between electrodes on the semiconductor chip and side edges of the semiconductor chip, the guard ring being divided by isolating sections on the semiconductor chip.

Abstract: A magnetoresistive random access memory (MRAM) cell includes a magnetic tunnel junction (MTJ), a top electrode disposed over the MTJ, a bottom electrode disposed below the MTJ, and an induction line disposed to one side of the MTJ. The induction line is configured to induce a perpendicular magnetic field at the MTJ.

Abstract: A magnetic memory device may include a first vertical magnetic layer, a non-magnetic layer on the first vertical magnetic layer, and a first junction magnetic layer on the non-magnetic layer, with the non-magnetic layer being between the first vertical magnetic layer and the first junction magnetic layer. A tunnel barrier may be on the first junction magnetic layer, with the first junction magnetic layer being between the non-magnetic layer and the tunnel barrier. A second junction magnetic layer may be on the tunnel barrier with the tunnel barrier being between the first and second junction magnetic layers, and a second vertical magnetic layer may be on the second junction magnetic layer with the second junction magnetic layer being between the tunnel barrier and the second vertical magnetic layer.

Abstract: Magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of forming perpendicular magnetic films are provided. The magnetic memory device may include a seed pattern on a substrate having a first crystal structure, a perpendicular magnetic pattern on the seed pattern having a second crystal structure, and an interlayer pattern between the seed pattern and the perpendicular magnetic pattern. The interlayer pattern may reduce a stress caused by a difference between horizontal lattice constants of the first and the second crystal structures.

Abstract: A method of flash-RAM memory includes non-volatile random access memory (RAM) formed on a monolithic die and non-volatile page-mode memory formed on top of the non-volatile RAM, the non-volatile page-mode memory and the non-volatile RAM reside on the monolithic die. The non-volatile RAM is formed of stacks of magnetic memory cells arranged in three-dimensional form for higher density and lower costs.

Abstract: A spin transport element 1 has a first ferromagnet 12A, a second ferromagnet 12B, a channel 7 extending from the first ferromagnet 12A to the second ferromagnet 12B, a magnetic shield S1 covering the channel 7, and an insulating film provided between the channel 7 and the magnetic shield S1.

Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.

Abstract: Oscillators and methods of manufacturing and operating the same are provided, the oscillators include a pinned layer, a free layer and a barrier layer having at least one filament between the pinned layer and the free layer. The pinned layer may have a fixed magnetization direction. The free layer corresponding to the pinned layer. The at least one filament in the barrier layer may be formed by applying a voltage between the pinned layer and the free layer. The oscillators may be operated by inducing precession of a magnetic moment of at least one region of the free layer that corresponds to the at least one filament, and detecting a resistance change of the oscillator due to the precession.

Abstract: There are provided a semiconductor device in which short circuit failures in magnetic resistor elements and the like are reduced, and a method of manufacturing the same. An interlayer insulating film in which memory cells are formed is formed such that the upper surface of the portion of the interlayer insulating film located in a memory cell region where the magnetic resistor elements are formed is at a position lower than that of the upper surface of the portion of the interlayer insulating film located in a peripheral region. Another interlayer insulating film is formed so as to cover the magnetic resistor elements. In the another interlayer insulating film, formed are bit lines electrically coupled to the magnetic resistor elements. Immediately below the magnetic resistor elements, formed are digit lines.

Abstract: An apparatus may include a back-bias magnet; and a semiconductor chip element; wherein the semiconductor chip element has a sensor for measuring a magnetic field strength; and wherein a contact surface is formed on a contact side of the back-bias magnet and on a contact side of the semiconductor chip element and wherein the contact side of the semiconductor chip element has one or more structures such that the contact surface of the back-bias magnet is shaped in a manner corresponding to the structures of the semiconductor chip element.

Abstract: Disclosed herein is a method of forming electronic device having thin-film components by using trenches. One or more of thin-film components is formed by depositing a thin-film in the trench followed by processing the deposited thin-film to have the desired thickness.

Abstract: According to one embodiment, a magnetic memory element includes a stacked body including first and second stacked units stacked with each other. The first stacked unit includes first and second ferromagnetic layers and a first nonmagnetic layer provided therebetween. The second stacked unit includes third and fourth ferromagnetic layers and a second nonmagnetic layer provided therebetween. Magnetization of the second and third ferromagnetic layers are variable. Magnetizations of the first and fourth ferromagnetic layers are fixed in a direction perpendicular to the layer surfaces. A cross-sectional area of the third ferromagnetic layer is smaller than a cross-sectional area of the first stacked unit when cut along a plane perpendicular to the stacking direction.

Abstract: A magnetic shield is presented. The shield may be used to protect a microelectronic device from stray magnetic fields. The shield includes at least two layers. A first layer includes a magnetic material that may be used to block DC magnetic fields. A second layer includes a conductive material that may be used to block AC magnetic fields. Depending on the type of material that the first and second layers include, a third layer may be inserted in between the first and second layers. The third layer may include a non-conductive material that may be used to ensure that separate eddy current regions form in the first and second layers.

Abstract: A memory device includes a first plurality of magnetic random access memory (MRAM) cells positioned along a first direction, and a first bit line electrically connected to the first plurality of MRAM cells, the bit line oriented in the first direction. The device includes a first plurality of field lines oriented in a second direction different from the first direction, the first plurality of field lines being spaced such that only a corresponding first one of the first plurality of MRAM cells is configurable by each of the first plurality of field lines. The device includes a second plurality of field lines oriented in a third direction different from the first direction and the second direction, the second plurality of field lines being spaced such that only a corresponding second one of the first plurality of MRAM cells is configurable by each of the second plurality of field lines.

Abstract: A semiconductor device includes a housing defining a cavity, a magnetic sensor chip disposed in the cavity, and mold material covering the magnetic sensor chip and substantially filling the cavity. One of the housing or the mold material is ferromagnetic, and the other one of the housing or the mold material is non-ferromagnetic.

Abstract: A system and method for forming a magnetic tunnel junction (MTJ) storage element utilizes a composite free layer structure. The MTJ element includes a stack comprising a pinned layer, a barrier layer, and a composite free layer. The composite free layer includes a first free layer, a superparamagnetic layer and a nonmagnetic spacer layer interspersed between the first free layer and the superparamagnetic layer. A thickness of the spacer layer controls a manner of magnetic coupling between the first free layer and the superparamagnetic layer.

Abstract: A Hall effect element includes a Hall plate having geometric features selected to result in a highest ratio of a sensitivity divided by a plate resistance. The resulting shape is a so-called “wide-cross” shape.

Abstract: Provided are a magnetic memory device and a method of forming the same. The method may include forming a pinning pattern on a substrate; forming a first interlayer insulating layer that exposes the pinning pattern on the substrate; forming a pinned layer, a tunneling barrier layer and a second magnetic conductive layer on the pinning pattern; and forming a pinned pattern, a tunnel barrier pattern and a second magnetic conductive pattern by performing a patterning process on the pinned layer, the tunnel barrier layer and the second magnetic conductive layer.