Abstract: A magnetic layer that includes a seed layer comprising at least tantalum and a free magnetic layer comprising at least iron. The free magnetic layer is grown on top of the seed layer and the free magnetic layer is perpendicularly magnetized. The magnetic layer may be included in a magnetic tunnel junction (MTJ) stack.

Abstract: A magnetic tunnel junction includes an amorphous ferromagnetic reference layer having a first reference layer side and an opposing second reference layer side. The first reference layer side has a greater concentration of boron than the second reference layer side. A magnesium oxide tunnel barrier layer is disposed on the second side of the amorphous ferromagnetic reference layer. The magnesium oxide tunnel barrier layer has a crystal structure. An amorphous ferromagnetic free layer is disposed on the magnesium oxide tunnel barrier layer.

Abstract: Magnetic devices, magnetoresistive structures, and methods and techniques associated with the magnetic devices and magnetoresistive structures are presented. For example, a magnetic device is presented. The magnetic device includes a ferromagnet, an antiferromagnet coupled to the ferromagnet, and a nonmagnetic metal proximate to the ferromagnet. The antiferromagnet provides uniaxial anisotropy to the magnetic device. A resistance of the nonmagnetic metal is dependent upon a direction of a magnetic moment of the ferromagnet.

Abstract: Back-end-of-line (BEOL) circuit structures and methods are provided for blocking externally-originating or internally-originating electromagnetic edge interference. One such BEOL circuit structure includes a semiconductor substrate supporting one or more integrated circuits, and multiple BEOL layers disposed over the semiconductor substrate. The multiple BEOL layers extend to an edge of the circuit structure and include at least one vertically-extending conductive pattern disposed adjacent to the edge of the circuit structure. The vertically-extending conductive pattern is defined, at least partially, by a plurality of elements disposed in the multiple BEOL layers. The plurality of elements are uniformly arrayed at the edge of the circuit structure in a first direction or a second direction throughout at least a portion thereof.

Abstract: Disclosed are a spin transistor and a method of operating the spin transistor. The disclosed spin transistor includes a channel formed of a magnetic material selectively passing a spin-polarized electron having a specific direction, a source formed of a magnetic material, a drain, and a gate electrode. When a predetermined voltage is applied to the gate electrode, the channel selectively passes a spin-polarized electron having a specific direction and thus, the spin transistor is selectively turned on.

Abstract: A method of forming a CPP MTJ MRAM element that utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The device includes a tunneling barrier layer of MgO and a non-magnetic CPP layer of Cu or Cr and utilizes a novel synthetic free layer having three ferromagnetic layers mutually exchange coupled in pairwise configurations. The free layer comprises an inner ferromagnetic and two outer ferromagnetic layers, with the inner layer being ferromagnetically exchange coupled to one outer layer and anti-ferromagnetically exchange coupled to the other outer layer. The ferromagnetic coupling is very strong across an ultra-thin layer of Ta, Hf or Zr of thickness preferably less than 0.4 nm.

Abstract: A semiconductor device having a MTJ device excellent in operating characteristics and a manufacturing method therefor are provided. The MTJ device is formed of a laminated structure which is obtained by laminating a lower magnetic film, a tunnel insulating film, and an upper magnetic film in this order. The lower and upper magnetic films contain noncrystalline or microcrystalline ferrocobalt boron (CoFeB) as a constituent material. The tunnel insulating film contains aluminum oxide (AlOx) as a constituent material. A CAP layer is formed over the upper magnetic film and a hard mask is formed over the CAP layer. The CAP layer contains a substance of crystalline ruthenium (Ru) as a constituent material and the hard mask contains a substance of crystalline tantalum (Ta) as a constituent material. The film thickness of the hard mask is larger than that of the CAP layer.

Abstract: The magnetic sensor includes a base substrate having a magnetic shield layer; a single-domain semiconductor crystal layer attached via an insulating film on the magnetic shield layer of the base substrate; a first ferromagnetic layer formed on top of the semiconductor crystal layer on the opposite side of the semiconductor crystal layer to the insulating film, via a first tunnel barrier layer; and a second ferromagnetic layer formed, at a distance from the first ferromagnetic layer, on top of the semiconductor crystal layer on the opposite side of the semiconductor crystal layer to the insulating film, via a second tunnel barrier layer.

Abstract: Methods and apparatus for shielding a shielding a non-volatile memory, such as shielding a magnetic tunnel junction (MTJ) device from a magnetic flux are provided. In an example, a shielding layer is formed adjacent to an electrode of an MTJ device, such that the shielding layer substantially surrounds a surface of the electrode, and a metal line is coupled to the shielding layer. The metal line can be coupled to the shielding layer by a via.

Abstract: To provide a semiconductor device capable of write operation to a selected magnetoresistive element without causing a malfunction of a non-selected magnetoresistive element and a manufacturing method of this semiconductor device. The semiconductor device includes a magnetic storage element having a magnetization free layer whose magnetization direction is made variable and formed over a lead interconnect and a digit line located below the magnetic storage element, extending in a first direction, and capable of changing the magnetization state of the magnetization free layer by the magnetic field generated. The digit line includes an interconnect body portion and a cladding layer covering therewith the bottom surface and the side surface of the interconnect body portion and opened upward. The cladding layer includes a sidewall portion covering therewith the side surface of the interconnect body portion and a bottom wall portion covering therewith the bottom surface of the interconnect body portion.

Abstract: A magnetic coupling type isolator includes: a magnetic field generator for generating an external magnetic field by an input signal; a magnetoresistive element for detecting the external magnetic field and converting the detected magnetic field into an electric signal, the magnetoresistive element being electrically insulated from the magnetic field generator and positioned in a location capable of being magnetically coupled so as to be overlapped with the magnetic field generator as seen in a top plan view; first and second shield films overlapped with the magnetic field generator and the magnetoresistive element as seen in a top plan view; and a third shield film disposed to surround the magnetoresistive element.

Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.

Abstract: Embodiments generally relate to a magnetic read sensor and a method for its manufacture. A multi-layer insulating material may be used to cover both the first shield layer and also the sidewalls of the sensor structure in the magnetic read sensor. The first insulating layer of the multi-layer insulating material may be deposited by an ion beam sputtering process in a chamber that does not have any oxygen gas flowing into it so that oxygen diffusion into the sensor structure is reduced or eliminated. Then, a second insulating layer of the multi-layer insulating material may be deposited by atomic layer deposition such that the second insulating layer has a greater quality than the first insulating layer. The higher quality increases the breakdown voltage for the magnetic read sensor. Thus, the magnetic read sensor of the present invention has an effective insulating portion that increases the breakdown voltage without sensor damage.

Abstract: A current-perpendicular-to-the-plane (CPP) magnetoresistive (MR) sensor has a dual composition hard bias layer structure that is used to longitudinally bias the sensor's free ferromagnetic layer. The dual composition hard bias layer structure is composed of first layer of CoPt, having high anisotropy compared to the second layer. The second layer, composed of CoFe, has a higher magnetization compared to the first layer. The resulting dual hard bias layer structure exhibits high values of coercivity and squareness while maintaining a reduced sensor thickness compared to sensors of the prior art.

Abstract: A magnetic memory device includes a free layer and a guide layer on a substrate. An insulating layer is interposed between the free layer and the guide layer. At least one conductive bridge passes through the insulating layer and electrically connects the free layer and the guide layer. A diffusion barrier may be interposed between the guide layer and the insulating layer. The device may further include a reference layer having a fixed magnetization direction on a side of the free layer opposite the insulating layer and a tunnel barrier between the reference layer and the free layer. Related fabrication methods are also described.

Abstract: In order to increase an efficiency of spin transfer and thereby reduce the required switching current, a current perpendicular to plane (CPP) magnetic element for a memory device includes either one or both of a free magnetic layer, which has an electronically reflective surface, and a permanent magnet layer, which has perpendicular anisotropy to bias the free magnetic layer.

Abstract: A magnetoresistive element includes a magnetoresistive film including a magnetization pinned layer, a magnetization free layer, an intermediate layer arranged between the magnetization pinned layer and the magnetization free layer, a cap layer arranged on the magnetization pinned layer or on the magnetization free layer, and a functional layer formed of an oxygen- or nitrogen-containing material and arranged in the magnetization pinned layer, or in the magnetization free layer, and a pair of electrodes which pass a current perpendicularly to a plane of the magnetoresistive film, in which a crystalline orientation plane of the functional layer is different from a crystalline orientation plane of its upper or lower adjacent layer.

Abstract: A magnetic tunnel junction includes an amorphous ferromagnetic reference layer having a first reference layer side and an opposing second reference layer side. The first reference layer side has a greater concentration of boron than the second reference layer side. A magnesium oxide tunnel barrier layer is disposed on the second side of the amorphous ferromagnetic reference layer. The magnesium oxide tunnel barrier layer has a crystal structure. An amorphous ferromagnetic free layer is disposed on the magnesium oxide tunnel barrier layer.

Abstract: A method of integrating a permanent bias magnet within a magnetoresistance sensor comprising depositing an alternating pattern of a metal material and a semiconductor material on or within a surface of an insulating substrate; depositing a mask on the surface of the insulating substrate to create an opening above the alternating pattern of metal material and semiconductor material; applying a magnetic paste within the opening above the alternating pattern of metal material and semiconductor material; curing the magnetic paste to form a hardened bias magnet; removing the mask; and magnetizing the hardened bias magnet by applying a strong magnetic field to the hardened bias magnet at a desired orientation.

Abstract: Provided are a magnetic memory device and a method of forming the same. The method may include forming a pinning pattern on a substrate; forming a first interlayer insulating layer that exposes the pinning pattern on the substrate; forming a pinned layer, a tunneling barrier layer and a second magnetic conductive layer on the pinning pattern; and forming a pinned pattern, a tunnel barrier pattern and a second magnetic conductive pattern by performing a patterning process on the pinned layer, the tunnel barrier layer and the second magnetic conductive layer.

Abstract: A magnetic sensor 1 comprises a main channel layer 7a having first, second, and third regions 71, 72, 73 and extending in a first direction; a first ferromagnetic layer 12A mounted on the first region 71; a second ferromagnetic layer 12B mounted on the second region 72; a projection channel layer 7b projecting in a direction perpendicular to a thickness direction of the main channel layer 7a from a side face of the third region 73 between the first and second regions 71, 72 in the main channel layer 7a; and a magnetic shield S covering both sides in the thickness direction of the projection channel layer 7b and both sides in the first direction of the projection channel layer 7b and exposing an end face 7c in the projecting direction of the projection channel layer 7b.

Abstract: Back-end-of-line (BEOL) circuit structures and methods are provided for blocking externally-originating or internally-originating electromagnetic edge interference. One such BEOL circuit structure includes a semiconductor substrate supporting one or more integrated circuits, and multiple BEOL layers disposed over the semiconductor substrate. The multiple BEOL layers extend to an edge of the circuit structure and include at least one vertically-extending conductive pattern disposed adjacent to the edge of the circuit structure. The vertically-extending conductive pattern is defined, at least partially, by a plurality of elements disposed in the multiple BEOL layers. The plurality of elements are uniformly arrayed at the edge of the circuit structure in a first direction or a second direction throughout at least a portion thereof.

Abstract: A method for forming a magnetic tunnel junction (MTJ) for magnetic random access memory (MRAM) using two masks includes depositing over an interlevel dielectric layer containing an exposed first interconnect metallization, a first electrode, a fixed magnetization layer, a tunneling barrier layer, a free magnetization layer and a second electrode. An MTJ structure including the tunnel barrier layer, free layer and second electrode is defined above the first interconnect metallization by a first mask. A first passivation layer encapsulates the MTJ structure, leaving the second electrode exposed. A third electrode is deposited in contact with the second electrode. A second mask is used to pattern a larger structure including the third electrode, the first passivation layer, the fixed magnetization layer and the first electrode. A second dielectric passivation layer covers the etched plurality of layers, the first interlevel dielectric layer and the first interconnect metallization.

Abstract: A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized material.

Abstract: A semiconductor device includes a semiconductor substrate on one side of which an integrated circuit and a plurality of connection pads connected to the integrated circuit are provided. An insulating film is provided on the plurality of connection pads except for parts of the connection pads and on the one side of the semiconductor substrate. A plurality of wiring lines are provided to be electrically connected to the integrated circuit via the connection pads, each of the wiring lines having a connection pad portion. A plurality of columnar electrodes are respectively provided on one side of the connection pad portions of the wiring lines. A sealing film is provide on the peripheries of the columnar electrodes to cover the integrated circuit and which is provided. At least one of the insulating film and the sealing film is formed of a resin in which magnetic powder is mixed.

Abstract: A magnetic random access memory of a spin transfer process, includes a plurality of magnetic memory cells 10, a current supply unit 43+20+30 and a control unit 41. The current supply unit 43+20+30 supplies a write current to the magnetic memory cell 10. The control unit controls a supply of the write current supplied by the current supply unit 43+20+30 on the basis of a write data. Each magnetic memory cell 10 includes a magnetic material storage layer which stores a data by using a magnetization state, and at least one spin control layer which supplies spin electrons to the magnetic material storage layer on the basis of a same control principle independently of the write data, on the basis of the write current.

Abstract: A semiconductor device has a magnetoresistive element, a bit line over the magnetoresistive element, and a yoke cover over the bit line. To form the yoke cover, a laminate film is first formed over the bit line, the laminate film having a first barrier metal layer, a magnetic layer, and a second barrier metal layer which are formed successively over the bit line. Then, the laminate film is subjected to: reactive ion etching with a gas mixture of a carbon tetrafluoride (CF4) gas and an argon (Ar) gas, reactive ion etching with a gas mixture of carbon monoxide (CO), an ammonia (NH3) gas, and an argon (Ar) gas, and reactive ion etching with a gas mixture of a carbon tetrafluoride (CF4) gas and an argon (Ar) gas.

Abstract: An integrated circuit package system includes: providing a tie bar and a lead adjacent thereto; connecting an integrated circuit and the lead; mounting a shield over the integrated circuit with the shield connected to the tie bar; and encapsulating the integrated circuit and the shield. An integrated circuit package system also includes: forming a lead and a support structure with substantially the same material as the lead and elevated above the lead; connecting an integrated circuit and the lead; mounting a shield over the integrated circuit with the shield on the support structure; and encapsulating the integrated circuit and the shield.

Abstract: We describe a CPP MTJ MRAM element that utilizes transfer of spin angular momentum as a mechanism for changing the magnetic moment direction of a free layer. The device includes a tunneling barrier layer of MgO and a non-magnetic CPP layer of Cu or Cr and utilizes a novel synthetic free layer having three ferromagnetic layers mutually exchange coupled in pairwise configurations. The free layer comprises an inner ferromagnetic and two outer ferromagnetic layers, with the inner layer being ferromagnetically exchange coupled to one outer layer and anti-ferromagnetically exchange coupled to the other outer layer. The ferromagnetic coupling is very strong across an ultra-thin layer of Ta, Hf or Zr of thickness preferably less than 0.4 nm.

Abstract: A magnetic stack with a multilayer free layer having a switchable magnetization orientation, the free layer comprising a first ferromagnetic portion and a second ferromagnetic portion with an electrically conducting non-magnetic intermediate layer between the first portion and the second portion. The magnetic stack also includes a first ferromagnetic reference layer having a pinned magnetization orientation, a first non-magnetic spacer layer between the free layer and the first reference layer, a second ferromagnetic reference layer having a pinned magnetization orientation, and a second non-magnetic spacer layer between the free layer and the second reference layer.

Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.

Abstract: An MTJ element is formed in a wiring layer located in a lower tier and yet application of heat to the MTJ element is suppressed. A first insulating layer is formed over a substrate. Subsequently, the MTJ element is formed over the first insulating layer. After that a first wiring is formed over the MTJ element. Thereafter, a second insulating layer is formed over the first wiring. Then a second wiring is formed in the superficial layer of the second insulating layer. The second wiring is heat treated by photoirradiation. A shield conductor is formed at the step of forming the second wiring.

Abstract: A system, structure, and method of making the structure are disclosed for generating a large chemical potential difference between spin-up and spin-down electrons in non-magnetic materials. The device includes an inverse spin valve of a sandwiched layer structure with alternating non-magnetic and magnetic layers. In an embodiment of the invention, the structure is a tri-layer device with a magnetic layer sandwiched by two non-magnetic metals. Once the inverse spin valve structure is provided, an external electric field is applied to the inverse spin valve to generate a large chemical potential difference between the spin-up and spin-down electrons. In an embodiment of the invention, this feature is exploited to create a tunable light emitting diode or laser. In an embodiment of the invention, a dynamical magnetism is induced and controlled in the valve by an electric field. The dynamical magnetization may be used as spin source, or in electronic storage devices.

Abstract: A magneto-resistive device has a magnetic free layer (33), a magnetic pinned layer (31) having a magnetic moment larger than that of the magnetic free layer, and an intermediate layer (32) provided between the magnetic free layer and the magnetic pinned layer. The negative-resistance device is characterized in that the negative-resistance device shows negative resistance by making the magnetic free layer continually change the magnetization direction along with the increase of the voltage which is applied to a magneto-resistive device so that electrons flow into the negative-resistance device from a magnetic free layer side.

Abstract: There is provided a magnetic memory device stable in write characteristics. The magnetic memory device has a recording layer. The planar shape of the recording layer has the maximum length in the direction of the easy-axis over a primary straight line along the easy-axis, and is situated over a length smaller than the half of the maximum length in the direction perpendicular to the easy-axis, and on the one side and on the other side of the primary straight line respectively, the planar shape has a first part situated over a length in the direction perpendicular to the easy-axis, and a second part situated over a length smaller than the length in the direction perpendicular to the easy-axis. The outer edge of the first part includes only a smooth curve convex outwardly of the outer edge.

Abstract: Techniques and device designs associated with devices having magnetically shielded magnetic or magnetoresistive tunnel junctions (MTJs) and spin valves that are configured to operate based on spin-transfer torque switching.

Abstract: A magnetoresistive element includes a first ferromagnetic layer having a first magnetization, the first magnetization having a first pattern when the magnetoresistive element is half-selected during a first data write, a second pattern when the magnetoresistive element is selected during a second data write, and a third pattern of residual magnetization, the first pattern being different from the second and third pattern, a second ferromagnetic layer having a second magnetization, and a nonmagnetic layer arranged between the first ferromagnetic layer and the second ferromagnetic layer and having a tunnel conductance changing dependent on a relative angle between the first magnetization and the second magnetization.

Abstract: Embodiments include shielded multi-layer packages for use with multi-chip modules and the like. A substrate (102) (e.g., chip carrier) has an adhesive layer (104), where electronic components (106, 108) are attached. An insulating layer (110) is formed over the plurality of electronic components, and a conductive encapsulant structure (115) is formed over the insulating layer. The adhesive layer is detached from the electronic components, and multi-layer circuitry (140) is formed over, and in electrical communication with, the plurality of electronic components. A shielding via (150) is formed through the multilayer circuitry such that it contacts the conductive encapsulant.

Abstract: Apparatus and associated method for writing data to a non-volatile memory cell, such as spin-torque transfer random access memory (STRAM). In accordance with some embodiments, a resistive sense element (RSE) has a heat assist region, magnetic tunneling junction (MTJ), and pinned region. When a first logical state is written to the MTJ with a spin polarized current, the pinned and heat assist regions each have a substantially zero net magnetic moment. When a second logical state is written to the MTJ with a static magnetic field, the pinned region has a substantially zero net magnetic moment and the heat assist region has a non-zero net magnetic moment.

Abstract: In order to increase an efficiency of spin transfer and thereby reduce the required switching current, a current perpendicular to plane (CPP) magnetic element for a memory device includes either one or both of a free magnetic layer, which has an electronically reflective surface, and a permanent magnet layer, which has perpendicular anisotropy to bias the free magnetic layer.

Abstract: A light emitting device includes a light emitting element, including a substrate including group III nitride compound semiconductor, a luminous layer structure including group III nitride compound semiconductor, the luminous layer structure formed on a first surface of the substrate, and an irregular surface formed on a second surface of the substrate, the second surface including a principal light emission surface, and a translucent sealing member for sealing the light emitting element, the translucent sealing member being separated from the second surface. At least one of translucent gel material and an inert gas is filled between the light emitting element and the translucent sealing member.

Abstract: A magnetic device including a magnetic element is described. The magnetic element includes a fixed layer having a fixed layer magnetization, a spacer layer that is nonmagnetic, and a free layer having a free layer magnetization. The free layer is changeable due to spin transfer when a write current above a threshold is passed through the first free layer. The free layer is includes low saturation magnetization materials.

Abstract: An integrated conformal electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules (30-33) to a process carrier (1) using a double side adhesive tape (2), and then sequentially depositing an insulating layer (15) and a conductive shielding layer (16) before encapsulating the modules with a molding compound (17). After removing the adhesive tape (2) to expose a surface of the encapsulated modules, a multi-layer circuit substrate (100) is formed over the exposed surface, where the circuit substrate includes shielding via structures (101-112) that are aligned with and electrically connected to the conductive shielding layer (16), thereby encircling and shielding the circuit module(s).

Abstract: Disclosed are ferroelectric and ferromagnetic noise isolation structures that reduce electromagnetic interference and noise in integrated circuit devices and system architectures. Representative structures comprise two or more devices that are vertically disposed relative to one another, and a thin ferroelectric or ferromagnetic film layer disposed between the respective devices that isolates electromagnetic energy coupling from one device to another.

Abstract: The semiconductor device which has a memory cell including the TMR film with which memory accuracy does not deteriorate, and its manufacturing method are obtained. A TMR element (a TMR film, a TMR upper electrode) is selectively formed in the region which corresponds in plan view on a TMR lower electrode in a part of formation area of a digit line. A TMR upper electrode is formed by 30-100 nm thickness of Ta, and functions also as a hard mask at the time of a manufacturing process. The interlayer insulation film formed from LT-SiN on the whole surface of a TMR element and the upper surface of a TMR lower electrode is formed, and the interlayer insulation film which covers the whole surface comprising the side surface of a TMR lower electrode, and includes LT-SiN is formed. The interlayer insulation film which covers the whole surface and includes SiO2 is formed.

Abstract: The invention includes a method of forming a semiconductor construction, such as an MRAM construction. A block is formed over a semiconductor substrate. First and second layers are formed over the block, and over a region of the substrate proximate the block. The first and second layers are removed from over the block while leaving portions of the first and second layers over the region proximate the block. At least some of the first layer is removed from under the second layer to form a channel over the region proximate the block. A material, such as a soft magnetic material, is provided within the channel. The invention also includes semiconductor constructions.

Abstract: A magnetoresistance device comprises a substrate, an elongate semiconductor channel extending in a first direction and at least two conductive leads providing a set of contacts to the channel. The device may comprise an optional semiconductor shunt in contact with the channel. The optional shunt, channel and set of contacts are stacked relative to the substrate in a second direction which is perpendicular to the first direction and the surface of the substrate. The device has a side face running along the channel. The device is responsive to a magnetic field generally perpendicular to the side face.

Abstract: A memory device includes a fixed magnetic layer, a tunnel barrier layer over the fixed magnetic layer, and a free magnetic structure formed over the tunnel barrier layer, wherein the free magnetic structure has layers or sub-layers that are weakly magnetically coupled. Thus, a low programming voltage can be used to avoid tunnel barrier breakdown, and a small pass transistor can be used to save die real estate.

Abstract: A magnetic memory element having a layer structure containing a fixing layer (pinned layer: PL) having a magnetization direction fixed unidirectionally, a nonmagnetic dielectric layer (TN1) in contact with the fixing layer (PL), and a memory layer (free layer: FL) having a first surface in contact with the nonmagnetic dielectric layer (TN1) and a second surface on the opposite to the first surface, the magnetization direction of the memory layer (FL) having a reversible magnetization direction in response to the current through the layer structure. The entire surface of the first surface of the memory layer (FL) is covered with the nonmagnetic dielectric layer (TN1) and in the joint surface of the nonmagnetic dielectric layer (TN1) and the fixing layer (PL), the first surface of the nonmagnetic dielectric layer (TN1) is exposed in a manner of surrounding the joint surface.

Abstract: A magnetic random access memory includes a bit line running in a first direction, a first word line running in a second direction different from the first direction, and a memory element having a magnetoresistive effect element including a fixed layer having a fixed magnetization direction, a recording layer having a reversible magnetization direction, and a nonmagnetic layer formed between the fixed layer and the recording layer, the magnetization directions in the fixed layer and the recording layer being perpendicular to a film surface, and a heater layer in contact with the magnetoresistive effect element, the memory element being connected to the bit line, and formed to oppose a side surface of the first word line such that the memory element is insulated from the first word line.