Abstract: A composite side shield structure is disclosed for providing biasing to a free layer in a sensor structure. The sensor is formed between a bottom shield and top shield each having a magnetization in a first direction that is parallel to an ABS. The side shield is stabilized by an antiferromagnetic (AFM) coupling scheme wherein a bottom (first) magnetic layer is AFM coupled to a second magnetic layer which in turn is AFM coupled to an uppermost (third) magnetic layer. First and third magnetic layers each have a magnetization aligned in the first direction and are coupled to bottom and top shields, respectively, for additional stabilization. The top shield may be modified to include an AFM scheme for providing additional stabilization and guidance to magnetic moments within AFM coupled magnetic layers in the top shield, and to the third magnetic layer in the side shield.

Abstract: A wrap around shield structure is disclosed for biasing a free layer in a sensor and includes a bottom shield, side shields, and top shield in which each shield element comprises a high moment layer with a magnetization saturation greater than that of Ni70Fe30. The high moment layers provide a better micro read width performance. Side shield structure includes a stack of antiferromagnetically (AFM) coupled magnetic layers on a second high moment layer. A first (lower) magnetic layer in each side shield is ferromagnetically coupled to the second high moment layer, and to a first high moment layer in the bottom shield. A third (upper) magnetic layer in each side shield is ferromagnetically coupled to a third high moment layer in the top shield for improved stabilization. Sensor sidewalls may terminate at a top surface of a reference layer to decrease reader shield spacing.

Abstract: A semiconductor device comprises: a semiconductor element including an electrode; a leading line electrically connected to the electrode, passing above the electrode, and led to a side thereof; and a current sensor sensing current flowing through the leading line. The current sensor includes a magneto-resistance element placed above the electrode and below the leading line. A resistance value of the magneto-resistance element varies linearly according to magnetic field generated by the current.

Abstract: A magnetic body structure including: a magnetic layer pattern; and a conductive pattern including a metallic glass alloy and covering at least a portion of the magnetic body structure.

Abstract: A semiconductor device includes a semiconductor chip having a first main surface, a second main surface opposite to the first main surface, a side surface arranged between the first main surface and the second main surface, and a magnetic storage device, a first magnetic shield overlaying on the first main surface, a second magnetic shield overlaying on the second main surface, and a third magnetic shield overlaying on the side surface. The first and second magnetic shields are mechanically connected via the third magnetic shield.

Abstract: A memory element includes a layered structure: a memory layer having a changeable magnetization direction, the magnetization direction being changed by applying a current in a lamination direction of the layered structure to record the information in the memory layer, including a first ferromagnetic layer having a magnetization direction that is inclined from a direction perpendicular to a film face, a bonding layer laminated on the first ferromagnetic layer, and a second ferromagnetic layer laminated on the bonding layer and bonded to the first ferromagnetic layer via the bonding layer, having a magnetization direction that is inclined from the direction perpendicular to the film face, a magnetization-fixed layer having a fixed magnetization direction, an intermediate layer that is provided between the memory layer and the magnetization-fixed layer, and is contacted with the first ferromagnetic layer, and a cap layer that is contacted with the second ferromagnetic layer.

Abstract: Some implementations provide a die that includes a magnetoresistive random access memory (MRAM) cell array that includes several MRAM cells. The die also includes a first ferromagnetic layer positioned above the MRAM cell array, a second ferromagnetic layer positioned below the MRAM cell array, and several vias positioned around at least one MRAM cell. The via comprising a ferromagnetic material. In some implementations, the first ferromagnetic layer, the second ferromagnetic layer and the several vias define a magnetic shield for the MRAM cell array. The MRAM cell may include a magnetic tunnel junction (MTJ). In some implementations, the several vias traverse at least a metal layer and a dielectric layer of the die. In some implementations, the vias are through substrate vias. In some implementations, the ferromagnetic material has high permeability and high B saturation.

Abstract: A magnetic memory layer and a magnetic memory device including the same, the magnetic memory layer including a first seed layer; a second seed layer on the first seed layer, the second seed layer grown according to a <002> crystal direction with respect to a surface of the first seed layer; and a main magnetic layer on the second seed layer, the main magnetic layer grown according to the <002> crystal direction with respect to a surface of the second seed layer.

Abstract: The present disclosure relates to the fabrication of spin transfer torque memory elements for non-volatile microelectronic memory devices. The spin transfer torque memory element may include a magnetic tunneling junction connected with specifically sized and/or shaped fixed magnetic layer that can be positioned in a specific location adjacent a free magnetic layer. The shaped fixed magnetic layer may concentrate current in the free magnetic layer, which may result in a reduction in the critical current needed to switch a bit cell in the spin transfer torque memory element.

Abstract: A magnetic junction is provided. The magnetic junction includes a reference stack, a nonmagnetic spacer layer and a free layer. The reference stack includes a high perpendicular magnetic anisotropy (PMA) layer and a graded polarization enhancement layer (PEL) between the high PMA and nonmagnetic spacer layers. The PEL is magnetically coupled with the reference layer. The PEL includes magnetic layers and nonmagnetic insertion layers. At least part of the PEL has a spin polarization greater than the PMA layer's. The nonmagnetic insertion layers are configured such that the magnetic layers are ferromagnetically coupled and the crystalline orientations of the high PMA and nonmagnetic spacer layers are decoupled. Each nonmagnetic insertion layer's thickness is insufficient for the crystalline orientations to be decoupled in the absence of the remaining nonmagnetic insertion layers. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.

Abstract: Methods and apparatus for shielding a shielding a non-volatile memory, such as shielding a magnetic tunnel junction (MTJ) device from a magnetic flux are provided. In an example, a shielding layer is formed adjacent to an electrode of an MTJ device, such that the shielding layer substantially surrounds a surface of the electrode, and a metal line is coupled to the shielding layer. The metal line can be coupled to the shielding layer by a via.

Abstract: A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (?L) occurring in the protective layer (11) and thus preventing said dimensional change (?L) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.

Abstract: A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel junction elements stores data by a change in a resistance state, and the data is rewritable by a current. Cell transistors are provided on the semiconductor substrate. Each of the cell transistors is in a conductive state when the current is applied to the corresponding magnetic tunnel junction element. Gate electrodes are included in the respective cell transistors. Each of the gate electrodes controls the conductive state of the corresponding cell transistor. In active areas, the cell transistors are provided, and the active areas extend in an extending direction of intersecting the gate electrodes at an angle of (90?atan(?)) degrees.

Abstract: There are disclosed herein various implementations of semiconductor packages having an interposer configured for magnetic signaling. One exemplary implementation includes a die transmit pad in an active die for transmitting a magnetic signal corresponding to a die electrical signal produced by the active die, and an interposer magnetic tunnel junction (MTJ) pad in the interposer for receiving the magnetic signal. A sensing circuit is coupled to the interposer MTJ pad for producing a receive electrical signal corresponding to the magnetic signal. In one implementation, the sensing circuit is configured to sense a resistance of the interposer MTJ pad and to produce the receive electrical signal according to the sensed resistance.

Abstract: A MTJ in an MRAM array is disclosed with a composite free layer having a lower crystalline layer contacting a tunnel barrier and an upper amorphous NiFeX layer for improved bit switching performance. The crystalline layer is Fe, Ni, or FEB with a thickness of at least 6 Angstroms which affords a high magnetoresistive ratio. The X element in the NiFeX layer is Mg, Hf, Zr, Nb, or Ta with a content of 5 to 30 atomic % NiFeX thickness is preferably between 20 to 40 Angstroms to substantially reduce bit line switching current and number of shorted bits. In an alternative embodiments, the crystalline layer may be a Fe/NiFe bilayer. Optionally, the amorphous layer may have a NiFeM1/NiFeM2 configuration where M1 and M2 are Mg, Hf, Zr, Nb, or Ta, and M1 is unequal to M2. Annealing at 300° C. to 360° C. provides a high magnetoresistive ratio of about 150%.

Abstract: Chip packages are described with soft-magnetic shields that are included inside or attached externally to the package containing a MRAM chip. In one group of embodiments a single shield with vias for bonding wires is affixed to the surface of the MRAM chip having the contact pads. The limitation of shield to chip distance due to bonding wire is eliminated by VIA holes according to the invention which achieves minimal spacing between the shield and chip. A second shield without vias can be positioned on the opposite side of the chip from the first shield. In one group of embodiments a hardened ferro-fluid shield can be the only shield or the structure can include a shield with or without vias. One group of embodiments includes an external shield with vias for solder access to the package contact pads affixed to the outer surface of the package.

Abstract: A method and system provide a magnetic junction usable in a magnetic device. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction. At least one of the free layer and the pinned layer include at least one half-metal.

Abstract: The present disclosure describes a semiconductor MRAM device and a manufacturing method. The device reduces magnetic field induction “interference” (disturbance) phenomenon between adjacent magnetic tunnel junctions when data is written and read. This semiconductor MRAM device comprises a magnetic tunnel junction unit and a magnetic shielding material layer covering the sidewalls of the magnetic tunnel junction unit. The method for manufacturing a semiconductor device comprises: forming a magnetic tunnel junction unit, depositing an isolation dielectric layer to cover the top and the sidewall of the magnetic tunnel junction unit, and depositing a magnetic shielding material layer on the isolation dielectric layer.

Abstract: Spin transfer torque memory (STTM) devices incorporating a field plate for application of an electric field to reduce a critical current required for transfer torque induced magnetization switching. Embodiments utilize not only current-induced magnetic filed or spin transfer torque, but also electric field induced manipulation of magnetic dipole orientation to set states in a magnetic device element (e.g., to write to a memory element). An electric field generated by a voltage differential between an MTJ electrode and the field plate applies an electric field to a free magnetic layer of a magnetic tunneling junction (MTJ) to modulate one or more magnetic properties over at least a portion of the free magnetic layer.

Abstract: A semiconductor chip includes a magnetic storage device and includes an electrode pad on a first face. The semiconductor chip is coated with a magnetic shield layer in a state in which at least the electrode pad is exposed. The semiconductor chip is mounted on an interconnect substrate through a bump. At least one of the semiconductor chip and the interconnect substrate includes a convex portion, and the bump is disposed over the convex portion.

Abstract: A method and structure for a three-axis magnetic field sensing device is provided. The device includes a substrate, an IC layer, and preferably three magnetic field sensors coupled to the IC layer. A nickel-iron magnetic field concentrator is also provided.

Abstract: A magnetic memory device including a memory layer having a vertical magnetization on the layer surface, of which the direction of magnetization is changed according to information; and a reference layer provided against the memory layer, and being a basis of information while having a vertical magnetization on the layer surface, wherein the memory device memorizes the information by reversing the magnetization of the memory layer by a spin torque generated when a current flows between layers made from the memory layer, the nonmagnetization layer and the reference layer, and a coercive force of the memory layer at a memorization temperature is 0.7 times or less than a coercive force at room temperature, and a heat conductivity of a center portion of an electrode formed on one side of the memory layer in the direction of the layer surface is lower than a heat conductivity of surroundings thereof.

Abstract: A thermally stable Magnetic Tunnel Junction (MTJ) cell, and a memory device including the same, include a pinned layer having a pinned magnetization direction, a separation layer on the pinned layer, and a free layer on the separation layer and having a variable magnetization direction. The pinned layer and the free layer include a magnetic material having Perpendicular Magnetic Anisotropy (PMA). The free layer may include a central part and a marginal part on a periphery of the central part. The free layer is shaped in the form of a protrusion in which the central part is thicker than the marginal part.

Abstract: According to one embodiment, a magnetic memory element includes a stacked body including first and second stacked units stacked with each other. The first stacked unit includes first and second ferromagnetic layers and a first nonmagnetic layer provided therebetween. The second stacked unit includes third and fourth ferromagnetic layers and a second nonmagnetic layer provided therebetween. Magnetization of the second and third ferromagnetic layers are variable. Magnetizations of the first and fourth ferromagnetic layers are fixed in a direction perpendicular to the layer surfaces. A cross-sectional area of the third ferromagnetic layer is smaller than a cross-sectional area of the first stacked unit when cut along a plane perpendicular to the stacking direction.

Abstract: According to one embodiment, a magnetoresistive element includes a storage layer having a variable and perpendicular magnetization, a tunnel barrier layer on the storage layer, a reference layer having an invariable and perpendicular magnetization on the tunnel barrier layer, a hard mask layer on the reference layer, and a sidewall spacer layer on sidewalls of the reference layer and the hard mask layer. An in-plane size of the reference layer is smaller than an in-plane size of the storage layer. A difference between the in-plane sizes of the storage layer and the reference layer is 2 nm or less. The sidewall spacer layer includes a material selected from a group of a diamond, DLC, BN, SiC, B4C, Al2O3 and AlN.

Abstract: In accordance with an embodiment, a magnetoresistive element includes a lower electrode, a first magnetic layer on the lower electrode, a first diffusion prevention layer on the first magnetic layer, a first interfacial magnetic layer on the first metal layer, a nonmagnetic layer on the first interfacial magnetic layer, a second interfacial magnetic layer on the nonmagnetic layer, a second diffusion prevention layer on the second interfacial magnetic layer, a second magnetic layer on the second diffusion prevention layer, and an upper electrode layer on the second magnetic layer. The ratio of a crystal-oriented part to the other part in the second interfacial magnetic layer is higher than the ratio of a crystal-oriented part to the other part in the first interfacial magnetic layer.

Abstract: Methods of forming spin torque microelectronic devices are described. Those methods may include forming a free FM layer on a substrate, forming a non-magnetic layer on the free FM layer, forming at least three input pillars on the non-magnetic layer, and forming an output pillar on the non-magnetic layer to form a majority gate device.

Abstract: Provided are magnetic memory devices, electronic systems and memory cards including the same, methods of manufacturing the same, and methods of controlling a magnetization direction of a magnetic pattern. In a magnetic memory device, atomic-magnetic moments non-parallel to one surface of a free pattern increase in the free pattern. Therefore, critical current density of the magnetic memory device may be reduced, such that power consumption of the magnetic memory device is reduced or minimized and/or the magnetic memory device is improved or optimized for a higher degree of integration.

Abstract: A storage element includes: a storage layer which has magnetization perpendicular to a film surface, the direction of the magnetization being changed in accordance with information; a magnetization fixed layer which has magnetization perpendicular to a film surface used as a base of information stored in the storage layer; and an insulating layer of a nonmagnetic substance provided between the storage layer and the magnetization fixed layer. In the storage element described above, the magnetization of the storage layer is reversed using a spin torque magnetization reversal generated by a current flowing in a lamination direction of a layer structure including the storage layer, the insulating layer, and the magnetization fixed layer to store information, the storage layer is directly provided with a layer at a side opposite to the insulating layer, and this layer includes a conductive oxide.

Abstract: A magnetic stack having a ferromagnetic free layer, a metal oxide layer that is antiferromagnetic at a first temperature and non-magnetic at a second temperature higher than the first temperature, a ferromagnetic pinned reference layer, and a non-magnetic spacer layer between the free layer and the reference layer. During a writing process, the metal oxide layer is non-magnetic. For magnetic memory cells, such as magnetic tunnel junction cells, the metal oxide layer provides reduced switching currents.

Abstract: A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.

Abstract: An MTJ element is formed in a wiring layer located in a lower tier and yet application of heat to the MTJ element is suppressed. A first insulating layer is formed over a substrate. Subsequently, the MTJ element is formed over the first insulating layer. After that a first wiring is formed over the MTJ element. Thereafter, a second insulating layer is formed over the first wiring. Then a second wiring is formed in the superficial layer of the second insulating layer. The second wiring is heat treated by photoirradiation. A shield conductor is formed at the step of forming the second wiring.

Abstract: A nonvolatile magnetic memory device having a magnetoresistance-effect element includes: (A) a laminated structure having a recording layer in which an axis of easy magnetization is oriented in a perpendicular direction; (B) a first wiring line electrically connected to a lower part of the laminated structure; and (C) a second wiring line electrically connected to an upper part of the laminated structure, wherein a high Young's modulus region having a Young's modulus of a higher value than that of a Young's modulus of a material forming the recording layer is provided close to a side surface of the laminated structure.

Abstract: According to one embodiment, a magnetoresistive element includes the following configuration. A first magnetic layer has an invariable magnetization. A second magnetic layer has a variable magnetization. A nonmagnetic layer is provided between the first and the second magnetic layers. The first magnetic layer has a structure in which first, second and third magnetic material films and a nonmagnetic material film are stacked. The first magnetic material film is provided in contact with the nonmagnetic layer, the nonmagnetic material film is provided in contact with the first magnetic material film, the second magnetic material film is provided in contact with the nonmagnetic material film, and the third magnetic material film is provided in contact with the second magnetic material film. The second magnetic material film has a Co concentration higher than that of the first magnetic material film.

Abstract: A magnetic stack with out of plane magnetisation, the magnetic stack including: a first magnetic layer constituted of one or more materials selected from the following group: cobalt, iron and nickel and magnetic alloys based on the materials; a second layer constituted of a metallic material able to confer to an assembly formed by the first and the second layers a perpendicular anisotropy of interfacial origin when the second layer has a shared interface with the first layer; and a third layer deposited on the first layer, the second layer being deposited on the third layer, the third layer being constituted of a metallic material having a miscibility less than 10% with the material of the first layer.

Abstract: A spin MOSFET includes: a first ferromagnetic layer provided on a semiconductor substrate, and having a fixed magnetization direction perpendicular to a film plane; a semiconductor layer provided on the first ferromagnetic layer, including a lower face opposed to the upper face of the first ferromagnetic layer, an upper face opposed to the lower face, and side faces different from the lower and upper faces; a second ferromagnetic layer provided on the upper face of the semiconductor layer, and having a variable magnetization direction perpendicular to a film plane; a first tunnel barrier provided on the second ferromagnetic layer; a third ferromagnetic layer provided on the first tunnel barrier; a gate insulating film provided on the side faces of the semiconductor layer; and a gate electrode provided on the side faces of the semiconductor layer with the gate insulating film being interposed therebetween.

Abstract: A memory element includes a layered structure and a negative thermal expansion material layer. The layered structure includes a memory layer, a magnetization-fixed layer, and an intermediate layer. The memory layer has magnetization perpendicular to a film face in which a magnetization direction is changed depending on information, and includes a magnetic layer having a positive magnetostriction constant. The magnetization direction is changed by applying a current in a lamination direction of the layered structure to record the information in the memory layer. The magnetization-fixed layer has magnetization perpendicular to a film face that becomes a base of the information stored in the memory layer. The intermediate layer is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer.

Abstract: Methods and apparatus for shielding a shielding a non-volatile memory, such as shielding a magnetic tunnel junction (MTJ) device from a magnetic flux are provided. In an example, a shielding layer is formed adjacent to an electrode of an MTJ device, such that the shielding layer substantially surrounds a surface of the electrode, and a metal line is coupled to the shielding layer. The metal line can be coupled to the shielding layer by a via.

Abstract: A magnetic tunnel junction (MTJ) etching process uses a sacrifice layer. An MTJ cell structure includes an MTJ stack with a first magnetic layer, a second magnetic layer, and a tunnel barrier layer in between the first magnetic layer and the second magnetic layer, and a sacrifice layer adjacent to the second magnetic layer, where the sacrifice layer protects the second magnetic layer in the MTJ stack from oxidation during an ashing process. The sacrifice layer does not increase a resistance of the MTJ stack. The sacrifice layer can be made of Mg, Cr, V, Mn, Ti, Zr, Zn, or any alloy combination thereof, or any other suitable material. The sacrifice layer can be multi-layered and/or have a thickness ranging from 5 ? to 400 ?. The MTJ cell structure can have a top conducting layer over the sacrifice layer.

Abstract: An integrated circuit can have a first substrate supporting a magnetic field sensing element and a second substrate supporting another magnetic field sensing element. The first and second substrates can be arranged in a variety of configurations. Another integrated circuit can have a first magnetic field sensing element and second different magnetic field sensing element disposed on surfaces thereof.

Abstract: A switch comprising a spin-transistor and a first control wire. The spin-transistor is configured so that when a magnetic field applied to the spin-transistor is less than a threshold value, the transistor is in a conductive state in which electric current flows through the spin-transistor. When the magnetic field applied to the spin-transistor is greater than the threshold value, the spin-transistor is in a resistive state in which the electric current flowing through the spin-transistor is substantially reduced. The first control wire is for receiving a current to affect the magnetic field applied to the spin-transistor.

Abstract: A magnetoresistive element includes a first electrode layer, a first fixed layer provided on the first electrode layer and having a fixed magnetization direction, a first intermediate layer provided on the first fixed layer and made of a metal oxide, a free layer provided on the first intermediate layer and having a variable magnetization direction, and a second electrode layer provided on the free layer. At least one of the first electrode layer and the second electrode layer contains a conductive metal oxide.

Abstract: According to one embodiment, a semiconductor memory device includes plural magneto-resistance elements. In the semiconductor memory device, each of the magneto-resistance elements includes: a first magnetic layer formed on a semiconductor substrate, the first magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; a non-magnetic layer formed on the first magnetic layer; a second magnetic layer formed on the non-magnetic layer, the second magnetic layer having an easy axis of magnetization perpendicular to a film surface thereof; and a sidewall film provided so as to cover a sidewall of each of the magneto-resistance elements with a protective film interposed therebetween, the sidewall film providing a tensile stress to the magneto-resistance element along the easy axis of magnetization.

Abstract: An embodiment of an integrated electronic device having a body, made at least partially of semiconductor material and having a top surface, a bottom surface, and a side surface, and a first antenna, which is integrated in the body and enables magnetic or electromagnetic coupling of the integrated electronic device with a further antenna. The integrated electronic device moreover has a coupling region made of magnetic material, which provides, in use, a communication channel between the first antenna and the further antenna.

Abstract: Disclosed herein is a storage element, including: a storage layer configured to retain information based on a magnetization state of a magnetic material; and a magnetization pinned layer configured to be provided for the storage layer with intermediary of a tunnel barrier layer, wherein the tunnel barrier layer has a thickness not less than or equal to 0.1 nm to not more than or equal to 0.6 nm and interface roughness less than 0.5 nm, and information is stored in the storage layer through change in direction of magnetization of the storage layer by applying a current in a stacking direction and injecting a spin-polarized electron.

Abstract: A magnetic memory element includes: a first magnetization free layer; a non-magnetic layer; a reference layer; a first magnetization fixed layer group; and a first blocking layer. The first magnetization free layer is composed of ferromagnetic material with perpendicular magnetic anisotropy and includes a first magnetization fixed region, a second magnetization fixed region and a magnetization free region. The non-magnetic layer is provided near the first magnetization free layer. The reference layer is composed of ferromagnetic material and provided on the non-magnetic layer. The first magnetization fixed layer group is provided near the first magnetization fixed region. The first blocking layer is provided being sandwiched between the first magnetization fixed layer group and the first magnetization fixed region or in the first magnetization fixed layer group.

Abstract: A memory device includes a first plurality of magnetic random access memory (MRAM) cells positioned along a first direction, and a first bit line electrically connected to the first plurality of MRAM cells, the bit line oriented in the first direction. The device includes a first plurality of field lines oriented in a second direction different from the first direction, the first plurality of field lines being spaced such that only a corresponding first one of the first plurality of MRAM cells is configurable by each of the first plurality of field lines. The device includes a second plurality of field lines oriented in a third direction different from the first direction and the second direction, the second plurality of field lines being spaced such that only a corresponding second one of the first plurality of MRAM cells is configurable by each of the second plurality of field lines.

Abstract: An integrated magnetoresistive device, where a substrate of semiconductor material is covered, on a first surface, by an insulating layer. A magnetoresistor of ferromagnetic material extends in the insulating layer and defines a sensitivity plane of the sensor. A concentrator of ferromagnetic material including at least one arm, extending in a transversal direction to the sensitivity plane and vertically offset to the magnetoresistor. In this way, magnetic flux lines directed perpendicularly to the sensitivity plane are concentrated and deflected so as to generate magnetic-field components directed in a parallel direction to the sensitivity plane.

Abstract: A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, the method includes depositing a capping material on a free layer of a magnetic tunneling junction structure to form the capping layer and oxidizing a portion of the capping material to form a layer of oxidized material.

Abstract: A ferromagnetic thin-film based digital memory cell with a memory film of an anisotropic ferromagnetic material and with a source layer positioned on one side thereof so that a majority of conduction electrons passing therefrom have a selected spin orientation to be capable of reorienting the magnetization of the film. A disruption layer is positioned on the other side of the memory film so that conduction electrons spins passing therefrom are substantially random in orientation. The magnitude of currents needed to operate the cell can be reduced using coincident thermal pulses to raise the cell temperature.