Abstract: A method of shielding an integrated circuit from electromagnetic interference. The integrated circuit is at least partially encapsulated within an electromagnetic interference resistant molding compound, and then the integrated circuit is completely encapsulated within a second molding compound. In this manner, the electromagnetic interference resistant molding compound protects the integrated circuit from electromagnetic interference, while the second molding compound can be selected for properties traditionally desired in a molding compound, such as thermal, electrical insulating, and structural properties. Thus, the integrated circuit according to the present invention can be placed closer to structures, such as power supplies, which produce electromagnetic interference, without experiencing an unacceptable degradation of performance due to the electromagnetic interference caused by the structures.

Abstract: A magnetic memory array comprises a plurality of magnetic memory cells, a magnetic shielding disposed adjacent to at least one of the magnetic memory cells to reduce magnetic interference with respect to another of the magnetic memory cells, and an insulator disposed as to separate at least a portion of the magnetic shielding from the at least one magnetic memory cell. The magnetic shielding may be a magnetic shield layer, patterned magnetic shield materials, and/or magnetic particles embedded in the insulator.

Abstract: A spin valve transistor, magnetic reproducing head including a spin valve transistor and a magnetic information storage system having the spin valve transistor. The spin valve transistor has a collector, a base formed on the collector, a tunnel barrier layer formed on the base and an emitter formed on the tunnel barrier layer. In one embodiment, the collector may have a first semiconductor layer of first composition and a second semiconductor layer of a different composition epitaxially grown. The base of the first spin valve transistor may be formed on the second semiconductor layer and have a magnetization pinned layer having a magnetization substantially fixed in an applied magnetic field, a nonmagnetic layer and a magnetization free layer having a magnetization free to rotate under the applied magnetic field. The emitter of a spin valve transistor of a second embodiment may include a semiconductor layer containing an oxide of transitional metal and contacting the tunnel barrier layer.

Abstract: A method and structure for a microelectronic device comprises a first film over a substrate, a first polish resistant layer over the first film, a second film over the first polish resistant layer, a second polish resistant layer over the second film, wherein the first and second polish resistant layers comprise diamond-like carbon. The first film comprises an electrically resistive material, while the second film comprises low resistance conductive material. The first film is an electrical resistor embodied as a magnetic read sensor. The electrically resistive material is sensitive to magnetic fields. The device further comprises a generally vertical junction between the first and second films and a dielectric film abutted to the electrically resistive material.

Abstract: A method and system for providing a magnetic element capable of being written using spin-transfer effect while being thermally stable and a magnetic memory using the magnetic element are disclosed. The magnetic element includes a first, second and third pinned layers, first and second nonmagnetic layers, a free layer and a nonmagnetic spacer layers. The first, second and third pinned layers are ferromagnetic and have first, second and third magnetizations pinned in first, second and third directions. The first and second nonmagnetic layers include first and second diffusion barriers, respectively. The first and second nonmagnetic layers are between the first and second pinned layers and the second and third pinned layers, respectively. The first and second pinned layers and the second and third pinned layers are antiferromagnetically coupled. The nonmagnetic spacer layer is conductive and resides between the free layer and the third pinned layer.

Abstract: A semiconductor magnetic sensor includes a semiconductor substrate, a source, a drain, a gate, and a carrier condensing means. The source and the drain are located in a surface of the substrate. One of the source and the drain includes adjoining two regions. The gate is located between the source and the drain for drawing minority carriers of the substrate to induce a channel, through which the carriers flow between the source and the drain to form a channel carrier current. The carriers flow into the two regions to form two regional carrier currents. The magnitude of a magnetic field where the sensor is placed is measured using the difference in quantity between the two regional carrier currents. The carrier condensing means locally increases carrier density in the channel carrier current in the proximity of an axis that passes between the two regions in order to increase the difference.

Abstract: Hall Effect devices, memory devices, and Hall Effect device readout voltage increasing method. A hall effect device includes a conductive film layer capable an electrical current, a ferromagnetic layer having a configurable orientation and configured to cover a portion of the conductive film layer such that fringe magnetic fields can be generated by an edge portion of the ferromagnetic layer, a high permeability magnetic layer disposed below the conductive film layer. The fringe magnetic fields are drawn toward the high permeability magnetic layer such that the magnetic fields pass though the conductive film layer to enable closure of the magnetic fields.

Abstract: MRAM structures employ the magnetic properties of layered magnetic and non-magnetic materials to read memory storage logic states. Improvements in switching reliability may be achieved by altering the shape of the layered magnetic stack structure. Forming recessed regions with sloped interior walls in an ILD layer prior to depositing the layered magnetic stack structure produces a significant advantage over the prior art by allowing a CMP process to be used to define the magnetic bit shapes. The sloped interior walls of the recessed regions, which is singular to the present invention, provide a unique formation and shaping of the magnetic stack structure, which may reduce the magnetic coupling effect between magnetic layers of the magnetic stack structure.

Abstract: A method of fabricating a magnetoresistive tunneling junction cell comprising the steps of providing a substrate with a surface, depositing a first magnetic region (17) having a resultant magnetic moment vector onto the substrate, depositing an electrically insulating material (16) onto the first magnetic region, and depositing a second magnetic region (15) onto the electrically insulating material, wherein at least a portion of one of the first and second magnetic regions is formed by depositing said region at a nonzero deposition angle relative to a direction perpendicular to the surface of the substrate to create an induced anisotropy.

Abstract: In some embodiments of the present invention, an apparatus includes an electromagnetic shielding structure. The electromagnetic shielding structure is formed at least partially in one or more redistribution layers formed on an integrated circuit die. The electromagnetic shielding structure substantially surrounds a circuit element, such as an inductor structure. The circuit element may be formed at least partially in the one or more redistribution layers. An inductor structure may be constructed as a loop structure at least partially in one or more redistribution layers formed on the integrated circuit die. The shielding structure may be formed at least partially in one or more redistribution layers of the integrated circuit die to enclose the inductor in a Faraday cage-like enclosure. The redistribution layers may be formed above integrated circuit pads or above a passivation layer of the integrated circuit die.

Abstract: The invention includes a magnetoresistive memory device having a conductive core, and a first magnetic layer extending at least partially around the conductive core. A non-magnetic material is over at least a portion of the first magnetic layer and separated from the conductive core by at least the first magnetic layer. A second magnetic layer is over the non-magnetic material, and separated from the first magnetic layer by at least the non-magnetic material. The invention also includes methods of forming magnetoresistive memory devices.

Abstract: A semiconductor Hall sensor can reduce measuring error due to an unbalanced voltage by decreasing the unbalanced voltage, and improve resistance to electrostatic by suppressing maximum electric field in the sensor. A cross-shaped pattern of the semiconductor Hall sensor includes cutouts at its concave corners. Among the four concave corners of the cross-shaped pattern, consecutive two or four concave corners are provided with the cutouts. Besides, among the four concave corners of the cross-shaped patterns, the consecutive two or four concave corners have an acute angle at the intersection of the input terminal side pattern and output terminal side pattern. The semiconductor Hall sensor becomes insensitive to defects or unbalance of its pattern, thereby being able to reduce the unbalanced voltage as compared with a conventional cross-shaped pattern of the semiconductor Hall sensor.

Abstract: A package for opto-electrical components includes a casing having a chamber for at least one board or tile adapted to carry the opto-electrical components. The casing includes a set of electrical connections including at least one radio-frequency differential line between the chamber and the casing exterior.

Abstract: This invention provides an asymmetrically patterned magnetic memory storage device. In a particular embodiment at least one magnetic memory cell is provided. Each magnetic memory cell provides at least one ferromagnetic data layer of a first size, the data layer characterized by an alterable orientation of magnetization, an intermediate layer in contact with the data layer and at least one ferromagnetic reference layer of a second size, the reference layer characterized by a reference magnetic field. The reference layer is in contact with the intermediate layer, opposite from and asymmetric to the data layer. The magnetic memory cell is characterized as having only one-end involvement. More specifically, the asymmetric alignment provides that only one set of magnetic poles are in substantial vertical alignment, and as such subject to the strong influence of one another.

Abstract: The invention includes a method of forming a magnetoresistive memory device. A trench is formed in an insulative material, and the trench is partially filled with a first magnetic material to narrow the trench. The narrowed trench is at least partially filled with a conductive material. A second magnetic material is formed over the conductive material. A non-magnetic layer is formed over the second magnetic material. A third magnetic material is formed over the non-magnetic layer. The conductive material and the first and second magnetic materials are incorporated into a sense portion of the magnetoresistive memory device. The third magnetic material is incorporated into a reference portion of the magnetoresistive memory device.

Abstract: A shield device is provided in which a layer of deformable electrically conductive material is conformed to fit over the components [692] on the board. In one embodiment of the invention the deformnable material is conductive foam [600], such as metalized foam. One or both sides of the foam layer [6001 can be covered with dielectric material. Portions of the dielectric material and foam can be removed, such as from the bottom layer [615 ] to create insulating slants [615a] over the component. The board can be placed over the components, which are received in recesses in the shield which are either preformed or result from compression of the deformable material at the location of the components. In one embodiment of the invention, regions of a conductive layer are removed and the layer is placed over the components. A top layer [610] is placed thereover. The invention also relates to the method of foaming the board level shield.

Abstract: A magnetic tunnel junction (MTJ) sensor system and a method for fabricating the same are provided. First provided are a first lead layer, and a pinned layer. Positioned adjacent to pinned layer is a free layer. The magnetization direction of the pinned layer is substantially perpendicular to the magnetization direction of the free layer at zero applied magnetic field. Also included is a tunnel barrier layer positioned between the pinned layer and the free layer. Further provided is a second lead layer, where the pinned layer, the free layer, and the tunnel barrier layer are positioned between the first lead layer and the second lead layer. A pair of hard bias layers are positioned adjacent to the pinned layer, the free layer, and the tunnel barrier layer. To prevent shunt currents from flowing, insulating layers are positioned between the hard bias layers and the first lead layer and the second lead layer. Such insulating layers are constructed from a non-conductive, magnetic material.

Abstract: A magnetic memory device includes first and second ferromagnetic layers. Each ferromagnetic layer has a magnetization that can be oriented in either of two directions. The first ferromagnetic layer has a higher coercivity than the second ferromagnetic layer. The magnetic memory device further includes a structure for forming a closed flux path with the second ferromagnetic layer.

Abstract: MRAM devices include an MRAM substrate having a face, elongated main magnetic resistors that extend along the face and elongated reference magnetic resistors that extend along the face nonparallel to the elongated main magnetic resistors. The elongated reference magnetic resistors may extend along the face orthogonal to the elongated main magnetic resistors. The elongated main magnetic resistors may be configured to have a maximum resistance or a minimum resistance, and the elongated reference magnetic transistors may be configured to have resistance midway between the maximum resistance and the minimum resistance.

Abstract: A magnetic memory of a present invention is formed as below. The magnetic memory has a TMR film formed on a first conductive film, and a second conductive film with a flat top surface, having the same plane shape as that of the TMR film, formed on the TMR laminated film. A first insulating film having a flat top surface and the same height as the surface of the second conductive film is formed so as to surround the TMR film and the second conductive film. A third conductive film connected electrically to the second conductive film is formed on the first insulating film.

Abstract: A ferromagnetic thin-film based digital memory cell with a memory film of an anisotropic ferromagnetic material and with a source layer positioned on one side thereof so that a majority of conduction electrons passing therefrom have a selected spin orientation to be capable of reorienting the magnetization of the film. A disruption layer is positioned on the other side of the memory film so that conduction electrons spins passing therefrom are substantially random in orientation. The magnitude of currents needed to operate the cell can be reduced using coincident thermal pulses to raise the cell temperature.

Abstract: An asymmetric cladded conductor structure for a magnetic field sensitive memory cell is disclosed. One or both of the conductors that cross the memory cell can include an asymmetric cladding that covers a top surface and only a portion of the opposed side surfaces of the conductors such that the cladding on the opposed side surfaces is recessed along those opposed side surfaces in a direction away from a data layer of the memory cell. The cladding is recessed by an offset distance. The asymmetric cladding increases a reluctance of a closed magnetic path with a resulting decrease in magnetic coupling with the data layer. An aspect ratio of the memory cell can be reduced thereby increasing areal density.

Abstract: A magnetic memory array comprises a plurality of magnetic memory cells, a magnetic shielding disposed adjacent to at least one of the magnetic memory cells to reduce magnetic interference with respect to another of the magnetic memory cells, and an insulator disposed as to separate at least a portion of the magnetic shielding from the at least one magnetic memory cell. The magnetic shielding may be a magnetic shield layer, patterned magnetic shield materials, and/or magnetic particles embedded in the insulator.

Abstract: A magnetic sensor uses injection of spin-polarized electrons between magnetized regions via a semiconductor and spin precession of electrons that a magnetic field being measured causes in the semiconductor. The sensor can include donor n+-doped &dgr;-layers and acceptor doped transition layers at one or both interfaces between magnetized regions and the semiconductor region. The properties of the &dgr;-doped layers and the transition layers can be adjusted to improve efficiency of injection of spin-polarized electrons into the semiconductor at small voltage between about 25 and 50 mV. One geometry for the sensor has the magnetized regions that are laterally spaced apart on a major surface of a substrate with the semiconductor being either between or adjacent to the magnetic regions to form a current path for spin-polarized electrons.

Abstract: In one embodiment, a semiconductor device having single or multi-layer intermediate layers that easily adhere to a glass frit and lead lines of respective interconnections is disclosed. In general, the single or multi-layer intermediate layers are formed on at least the top surfaces of portions of the respective lead lines on which the glass frit is placed.

Abstract: A magnetic memory device based on easy domain wall propagation and the extraordinary Hall effect includes a perpendicular-to-plane a magnetic electrically conductive element (2) that includes a memory node (3). Electrical conductors (12-15) surround the node (3) so that when energised, a magnetic field is produced to change the magnetization state of the node (3). In memory state “0” a magnetic domain is pinned within tapered portion (5) of the element (2). When a magnetic field is applied to the device, the domain (D) becomes unpinned and extends into the node (3) to produce a “1” state. The state of magnetization is sensed by means of a Hall contact (11). The current pulse (Jc) is applied through the element (2) so that the Hall voltage can be detected.

Abstract: Systems, devices and methods are provided for magnetic memory elements with low remanence flux concentrators. Improved bit yield is attributable to reduced remanence in the flux concentrator. Remanence provides the memory element with a biasing magnetic field. The flux concentrator includes anisotropy aligned with an appropriate conductor. One aspect of the present subject matter is a memory cell. One memory cell embodiment includes a magnetic memory element and a flux concentrator operably positioned with respect to a conductor. The conductor is adapted to provide a current-induced magnetic flux to the magnetic memory element. The flux concentrator includes an easy axis of magnetization aligned with the conductor and a hard axis of magnetization orthogonal to the easy axis of magnetization. Other aspects are provided herein.

Abstract: A magnetic random access memory module includes a magnetic memory array. A permeable metal layer extends over a first side of the magnetic memory array. An electrically insulating layer is disposed between the permeable metal layer and the magnetic memory array.

Abstract: A cladded conductive interconnect for programming a magnetoresistive memory device which includes a conductive material with a length, a first barrier conductive material positioned on the conductive material, and a multi-layer cladding region positioned along the length of the conductive material wherein the multi-layer cladding region includes N ferromagnetic layers, where N is a whole number greater than or equal to two, and wherein the multi-layer cladding region further includes at least one spacer layer, wherein the spacer layer can include a metal, an insulator, or an exchange interaction material, and wherein the spacer layer is sandwiched therebetween each adjacent ferromagnetic layer.

Abstract: The invention relates to improving the switching reliability of a magnetic memory cell in a magnetic random access memory (MRAM). Embodiments of the invention add an antiferromagnet to a magnetic memory cell. An antiferromagnetic layer can be formed adjacent to a soft layer in the MRAM on a side of the soft layer that is opposite to a hard layer of the MRAM. One embodiment further includes an additional interlayer of non-antiferromagnetic material between the antiferromagnetic layer and the soft layer.

Abstract: A symmetric van der Pauw disk of homogeneous nonmagnetic semiconductor material, such as indium antimonide, with an embedded concentric conducting material inhomogeneity, such as gold, exhits room temperature geometric extraordinary magnetoresistance (EMR) as high as 100%, 9,100% and 750,000% at magnetic fields of 0.05, 0.25 and 4.0 Tesla, respectively. Moreover, for inhomogeneities of sufficiently large cross section relative to that of the surrounding semiconductor material, the resistance of the disk is field-independent up to an onset field above which the resistance increases rapidly. These results can be understood in terms of the field-dependent deflection of current around the inhomogeneity.

Abstract: A magnetic memory array comprises a plurality of magnetic memory cells, a magnetic shielding disposed adjacent to at least one of the magnetic memory cells to reduce magnetic interference with respect to another of the magnetic memory cells, and an insulator disposed as to separate at least a portion of the magnetic shielding from the at least one magnetic memory cell. The magnetic shielding may be a magnetic shield layer, patterned magnetic shield materials, and/or magnetic particles embedded in the insulator.

Abstract: A method of manufacturing an integrated circuit and an integrated circuit employing the same. In one embodiment, the method of manufacturing the integrated circuit includes (1) conformally mapping a micromagnetic device, including a ferromagnetic core, to determine appropriate dimensions therefor, (2) depositing an adhesive over an insulator coupled to a substrate of the integrated circuit and (3) forming the ferromagnetic core of the appropriate dimensions over the adhesive.

Abstract: Structures and methods for making a magnetic structure are discussed. Various embodiments increase a magnetic field to unambiguously select a magnetic memory cell structure. One method includes folding a current line into two portions around a magnetic memory cell structure. Each portion contributes its magnetic flux to increase the magnetic field to unambiguously select the magnetic memory cell structure. Another method increases the flux density by reducing a cross-sectional area of a portion of the current line, wherein the portion of the current line is adjacent to the to the magnetic memory cell structure.

Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface: and (b) a ferromagnetic multilayer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can be a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.

Abstract: There is provided, according to one embodiment of this invention, a semiconductor memory device comprising first memory elements to store a first state or a second state according to a change in resistance value, each of the first memory elements comprising one terminal and the other terminal, the first memory elements arranged parallel with each other, a first wiring connected with the one terminal of each of the first memory elements, and a second wiring formed in parallel with the first wiring and connected with the other terminal of each of the first memory elements, wherein the first state or the second state stored in one of selected from the first memory elements is read out by delivering an electric current from one of the first and second wirings via the one of selected from the first memory elements to the other of the first and second wirings.

Abstract: The object of the invention is the shielding of a magnetic memory against high external magnetic fields. The magnetic memory (1) comprises an array of magnetic memory elements (2), each memory element (3) including at least one layer of magnetic material (4). The operation of the magnetic memory elements (3) is based on a magnetoresistance effect. The memory (1) is protected against high external magnetic fields by a shielding layer (14), which has been split into regions (5) covering the memory elements (3). The magnetic memory (1) is not erased by high external magnetic fields because of a strong attenuation of the external magnetic field by the regions (5) of the shielding layer (14).

Abstract: A semiconductor structure (1), comprising a isolation region (5) formed on a semiconductor material (10). A pillar (15) is formed in the semiconductor material under the isolation region, where the pillar is capped with a first dielectric material (20) to form a void (16).

Abstract: A Hall effect device comprising: (a) an electrically-conductive layer or plate having a top surface; and (b) a ferromagnetic layer, where the conductive film or layer is composed of high mobility semiconductors. Also, a Hall effect device can have a ferromagnetic element that is a multilayer (e.g., a bilayer), and a device in which the Hall plate comprises an indium compound, germanium or mixtures thereof. The devices are useful for a variety of applications such as a memory element in a nonvolatile random access memory array (NRAM) and as a logic gate.

Abstract: A magnetic random access memory (MRAM) with a low write current, characterized in that an improved MRAM structure is composed of a plurality of conductive metal pillars disposed on both sides of a magnetic tunnel junction (MTJ) cell functioning as a memory cell. The conductive metal pillars generate a superposed magnetic field so as to reduce the write current into the MTJ cell, thereby reducing the power consumption during the operation of an MRAM. The metal pillars are formed by employing a modified mask so that a plurality of plugs are formed by via etching and metal deposition. Moreover, at least one turn of conductive metal coil is disposed near the memory cell. The enhanced magnetic field thus generated results in a lowered write current as well as reduced power consumption.

Abstract: A unipolar spin diode and a unipolar spin transistor. In one embodiment, the unipolar spin diode includes a first semiconductor region having a conductivity type and a spin polarization, and a second semiconductor region having a conductivity type that is the same conductivity type of the first semiconductor and a spin polarization that is different from the spin polarization of the first semiconductor region. The first semiconductor region and the second semiconductor region are adjacent to each other so as to form a spin depletion layer therebetween, the spin depletion layer having a first side and an opposing second side. When a majority carrier in the first semiconductor region moves across the spin depletion layer from the first side of the spin depletion layer to the second side of the spin depletion layer, the majority carrier in the first semiconductor region becomes a minority carrier in the second semiconductor region.

Abstract: This invention relates to organic based spintronic devices, and electronic devices comprising them, including spin valves, spin tunnel junctions, spin transistors and spin light-emitting devices. New polymer-, organic- and molecular-based electronic devices in which the electron spin degree of freedom controls the electric current to enhance device performance. Polymer-, organic-, and molecular-based spintronic devices have enhanced functionality, ease of manufacture, are less costly than inorganic ones. The long spin coherence times due to the weak spin-orbit interaction of carbon and other low atomic number atoms that comprise organic materials make them ideal for exploiting the concepts of spin quantum devices. The hopping mechanism of charge transport that dominates in semiconducting polymers (vs. band transport in crystalline inorganic semiconductors) enhances spin-magneto sensitivity and reduces the expected power loss.

Abstract: A magnetic device which has a layer having pores on a substrate and is to be used by applying electric current in the direction of depth of the pores includes a laminated structure in which a first ferromagnetic layer, a second ferromagnetic layer having a smaller coercive force than the first ferromagnetic layer and a non-magnetic layer are laminated within a part or all of the pores, wherein a hard layer having the first ferromagnetic layer, and a free ferromagnetic layer including the second ferromagnetic layer are laminated through the non-magnetic layer, and the hard layer further has a laminated structure in which a plurality of first ferromagnetic layers form antiferromagnetic coupling through the non-magnetic layer. A solid-state magnetic memory has the magnetic device.

Abstract: Micromachine systems are provided. An embodiment of such a micromachine system includes a substrate that defines a trench. First and second microelectromechanical devices are arranged at least partially within the trench. Each of the microelectromechanical devices incorporates a first portion that is configured to move relative to the substrate. Methods also are provided.

Abstract: A compact sensing apparatus having reduced cross section and methods are provided for sensing the magnitude and direction of an electrical or magnetic field. The compact sensing apparatus and method preferably provide one of two transducer orientations in relation to the direction of the field arranged in the sensor apparatus to provide the smallest possible cross section. The compact sensing apparatus preferably includes a plurality of mounting pins. Each of the plurality of mounting pins preferably includes a first pin portion and a second pin portion connected to the first pin portion at a predetermined angle. The predetermined angle is preferably less than 180 degrees and more preferably in the range of about 70-110 degrees.

Abstract: A conductor structure for a magnetic memory is disclosed. The conductor structure includes one or more conductors that have a width that is less than a dimension of a memory cell in a direction the conductor crosses the memory cell. A thickness of the conductor is preselected to reduce a cross-sectional area of the conductor and increase a current density within the conductor. A magnetic field sufficient to rotate an alterable orientation of magnetization in a data layer of the memory cell can be generated by a reduced magnitude of a current flowing in the conductor due to the increased current density. Alternatively, the magnitude of the current can be reduced by increasing a thickness of the conductor to increase its area and reduce its resistance to the flow of electrons and partially cladding the conductor to reduce a total magnetic path around the conductor thereby increasing the magnetic field.

Abstract: An encoder unit is disposed facing a scale. The encoder unit is constructed such that a processing circuit and a read head are integrally formed on one and the same semiconductor substrate. This construction results in size reduction and integral formation of the encoder unit.

Abstract: A magnetic control device including an antiferromagnetic layer, a magnetic layer placed in contact with one side of the antiferromagnetic layer, and an electrode placed in contact with another side of the antiferromagnetic layer, wherein the direction of the magnetization of the magnetic layer is controlled by voltage applied between the magnetic layer and the electrode. In particular, when an additional magnetic layer is further laminated on the magnetic layer placed in contact with the antiferromagnetic layer via a non-magnetic layer, the direction of the magnetization of the controlled magnetic layer can be detected as a change in the electric resistance. Since such a magnetic control device, in principle, responds to the electric field or magnetic field, it forms a magnetic component capable of detecting an electric signal or a magnetic signal. In this case, the direction of the magnetization basically is maintained until the next signal is detected, so that such a device also can form an apparatus.

Abstract: A magneto-resistive device includes first and second ferromagnetic layers having different coercivities, and a spacer layer between the first and second layers. Each ferromagnetic layer has a magnetization that can be oriented in either of two directions.

Abstract: A method for generating electrically conducting and/or semiconducting structures in three dimensions in a matrix that includes two or more materials in spatially separated material structures is disclosed. An electric field is applied to the separate material structure and the field is modulated spatially according to a protocol. The protocol represents a predetermined pattern of electrically conducting and/or semiconducting structures that are generated in the material structure in response to the field. The matrix composed by the material structures includes structures of this kind in three dimensions.