Abstract: Circuits and methods use a feedback arrangement to select one or more measuring devices from a plurality of measuring devices in order to rapidly identify a direction of a sensed parameter. In some embodiments, the plurality of measuring devices corresponds to a plurality of magnetic field sensing elements and the sensed parameter is a magnetic field.

Abstract: A spin filter includes a first electrode configured to be formed with a zigzag graphene ribbon with an even number of rows extending in a first direction, and to have a magnetic moment in a second direction crossing with the first direction; a second electrode configured to be formed with a zigzag graphene ribbon with an even number of rows extending in the first direction, and to have a magnetic moment in the second direction; and a channel region configured to be placed between the first electrode and the second electrode, and to have an energy level allowing up-spin electrons or down-spin electrons to pass.

Abstract: Magnetic devices and methods of fabricating the same are provided. According to the magnetic device, a tunnel barrier pattern is interposed between a first magnetic pattern and a second magnetic pattern. An edge portion of the tunnel barrier pattern is thicker than a central portion of the tunnel barrier pattern. The central portion of the tunnel barrier pattern has a substantially uniform thickness.

Abstract: There is provided a memory element including a magnetic layer that includes at least one kind of element selected from a group consisting of Fe, Co, and Ni, and carbon, has a content of carbon that is equal to or greater than 3 atomic % and less than 70 atomic % with respect to a total content of Fe, Co, and Ni, and has magnetic anisotropy in a direction perpendicular to a film face; and an oxide layer that is formed of an oxide having a sodium chloride structure or a spinel structure and that comes into contact with the magnetic layer.

Abstract: A semiconductor device includes a semiconductor switching element and a rectifier element. The semiconductor switching element includes a plurality of switching cells connected in parallel between a first and a second load terminal and is formed in a cell area of a first semiconductor layer. The rectifier element includes a plurality of rectifier cells connected in parallel between the first load terminal and an auxiliary terminal. The rectifier cells are formed in a second semiconductor layer parallel to the first semiconductor layer in a vertical projection of the cell area. The semiconductor device may integrate free-wheeling diodes for inductive loads and semiconductor switching elements for switching the inductive loads.

Abstract: A method of manufacturing a magnetic device includes forming a stack structure, the stack structure including a magnetic layer, and etching the stack structure by using an etching gas, the etching gas including at least 80% by volume of H2 gas.

Abstract: According to one embodiment, a magnetoresistive element includes first, second and third magnetic layers, and first and second nonmagnetic layers. The third magnetic layer has stack layers including a first stack layer close to the second magnetic layer, and a second stack layer far from the second magnetic layer. Each of the first and second stack layers includes a first layer made of a ferromagnetic material and a second layer made of a nonmagnetic material, and a first ratio of a film thickness of the first layer to that of the second layer in the first stack layer is higher than a second ratio of a film thickness of the first layer to that of the second layer in the second stack layer.

Abstract: According to one embodiment, a magnetic storage device includes an insulating region, a lower electrode including a first portion formed in a hole provided in the insulating region and a second portion protruded from the insulating region, a spacer insulating film formed on a side surface of at least the second portion of the lower electrode, a magnetic tunneling junction portion formed on a top surface of the lower electrode, and an upper electrode formed on the magnetic tunneling junction portion.

Abstract: A chip package with isolated pin, isolated pad or isolated chip carrier and a method of making the same are disclosed. In one embodiment a chip package includes a chip, a package encapsulating the chip, pads or pins disposed on a first side of the package and an isolation pad or an isolation pin disposed on a second side of the package, the isolation pin or the isolation pad electrically isolated from the chip, wherein the chip comprises a magnetic field sensor configured to measure a magnetic field generated outside of the package.

Abstract: In one aspect, a method includes processing a metal substrate, performing a first etch on a first surface of the metal substrate to form, for an integrated circuit package, secondary leads and a curved component having two primary leads and performing a second etch, on a second surface of the substrate opposite the first surface, at locations on the secondary leads and locations on the curved component to provide a locking mechanism. Each primary lead located at a respective end of the curved component.

Abstract: A nonvolatile memory device is provided. The nonvolatile memory device comprises a plurality of impurity regions formed in a substrate, a first contact electrically connected to at least one of the impurity regions, a second contact electrically connected to at least one of the impurity regions, a first information storage portion formed at a first height from the substrate and electrically connected to the first contact, and a second information storage portion formed at a second height, which is different from the first height, from the substrate and electrically connected to the second contact.

Abstract: A vertical Hall Effect sensor assembly in one embodiment includes a first sensor with a first doped substrate, a first doped well, the first doped well having a doping opposite to the first doped substrate, a first endmost inner contact accessible at a first surface of the first sensor and located at a first end portion of the first doped well, a first intermediate inner contact accessible at the first surface and located between the first endmost inner contact and a second end portion of the first doped well, and a first electrode positioned on the first surface immediately adjacent to the first endmost inner contact and the first intermediate inner contact, the first electrode electrically isolated from the first doped well, and a first voltage source operably connected to the first electrode.

Abstract: An embodiment integrates memory, such as spin-torque transfer magnetoresistive random access memory (STT-MRAM) within a logic chip. The STT-MRAM includes a magnetic tunnel junction (MTJ) with an upper MTJ layer, lower MTJ layer, and tunnel barrier directly contacting the upper MTJ layer and the lower MTJ layer; wherein the upper MTJ layer includes an upper MTJ layer sidewall and the lower MTJ layer includes a lower MTJ sidewall horizontally offset from the upper MTJ layer. Another embodiment includes a memory area, comprising a MTJ, and a logic area located on a substrate; wherein a horizontal plane intersects the MTJ, a first Inter-Layer Dielectric (ILD) material adjacent the MTJ, and a second ILD material included in the logic area, the first and second ILD materials being unequal to one another. In an embodiment the first and second ILDs directly contact one another. Other embodiments are described herein.

Abstract: A micro-electromechanical device and method of manufacture are disclosed. A sacrificial layer is formed on a silicon substrate. A metal layer is formed on a top surface of the sacrificial layer. Soft magnetic material is electrolessly deposited on the metal layer to manufacture the micro-electromechanical device. The sacrificial layer is removed to produce a metal beam separated from the silicon substrate by a space.

Abstract: This technology relates to an electronic device and a method for fabricating the same. An electronic device in accordance with this technology includes semiconductor memory. The semiconductor memory may include a magnetization-pinned layer configured to include a first magnetic layer, a second magnetic layer, and a non-magnetic layer interposed between the first magnetic layer and the second magnetic layer, a free magnetization layer spaced apart from the magnetization-pinned layer, a tunnel barrier layer interposed between the magnetization-pinned layer and the free magnetization layer, and a magnetic spacer configured to come in contact with a side of the first magnetic layer and at least part of a side of the second magnetic layer.

Abstract: The present disclosure provides a spin device including: a graphene; a first ferromagnetic electrode and a second electrode that are in electrical contact with and sandwich the graphene; a third ferromagnetic electrode and a fourth electrode that sandwich the graphene at a position apart from the first and second electrodes in electrical contact with the graphene; a current applying portion that applies an electric current between the first ferromagnetic electrode and the second electrode; and a voltage-signal detecting portion that detects spin accumulation information as a voltage signal via the third ferromagnetic electrode and the fourth electrode. The spin accumulation information is generated, by application of the electric current, in a part of the graphene that is sandwiched between the third and fourth electrodes. The first and third ferromagnetic electrodes are disposed on the same surface of the graphene, and the second and fourth electrodes are non-magnetic or ferromagnetic electrodes.

Abstract: Magnetoresistive elements, and memory devices including the same, include a pinned layer having a fixed magnetization direction, a free layer corresponding to the pinned layer, and a protruding element protruding from the free layer and having a changeable magnetization direction. The free layer has a changeable magnetization direction. The protruding element is shaped in the form of a tube. The protruding element includes a first protruding portion and a second protruding portion protruding from ends of the free layer facing in different directions.

Abstract: A magnetic device includes a first electrode portion, a free layer portion arranged on the first electrode portion, the free layer portion including a magnetic insulating material, a reference layer portion contacting the free layer portion, the reference layer portion including a magnetic metallic layer, and a second electrode portion arranged on the reference layer portion.

Abstract: An integrated passive component having a semiconductor body, arranged on a metal substrate and having a first surface, and a plurality of metal surfaces formed on the surface, a passivation layer formed on the surface, an integrated circuit formed near the surface of the semiconductor body, whereby the integrated circuit is connected to metal surfaces via traces formed below the passivation layer, a part of the metal surfaces is connected to pins via bonding wires, and a first coil formed above the passivation layer, whereby the first coil with a plurality of turns has a longitudinal axis formed substantially parallel to the surface of the semiconductor body, and in a lower part of the first coil, said part which is formed substantially parallel to the longitudinal axis of the coil on the surface of the semiconductor body, parts of a plurality of turns are formed as sections of traces.

Abstract: An integrated passive component having a semiconductor body, arranged on a metal substrate and having a first surface, and a plurality of metal surfaces formed on the surface, and an integrated circuit formed on the surface of the semiconductor body, whereby the integrated circuit is connected by traces to the metal surfaces, and having a dielectric passivation layer formed on the surface, and the metal surfaces are connected to pins by bonding wires, and a first coil former, formed above the dielectric layer, with a winding, whereby the winding has a first connector and a second connector, and whereby the winding is formed as a wire or litz wire and the first connector of the winding is connected to a first metal surface and the second connector to a second metal surface.

Abstract: Magnetoresistive structures, magnetic random-access memory devices including the same, and methods of manufacturing the magnetoresistive structure, include a first magnetic layer having a magnetization direction that is fixed, a second magnetic layer corresponding to the first magnetic layer, wherein a magnetization direction of the second magnetic layer is changeable, and a magnetoresistance (MR) enhancing layer and an intermediate layer both between the first magnetic layer and the second magnetic layer.

Abstract: Current sensors, conductors and methods are disclosed. In an embodiment, a magnetic current sensor comprises a conductor comprising a first sheet metal layer having a first thickness and comprising at least one hole, and a second sheet metal layer having a second thickness less than the first thickness and comprising at least one notch, the second sheet metal layer being coupled to the first sheet metal layer such that the at least one hole of the first sheet metal layer at least partially overlaps with the at least one notch of the second sheet metal layer; and an integrated circuit (IC) die comprising at least one magnetic sensor element and being coupled to the conductor such that the at least one magnetic sensor element is generally aligned with a tip of the at least one notch of the second sheet metal layer.

Abstract: The present invention is directed to a spin transfer torque magnetic random access memory (STT-MRAM) device having a plurality of memory elements. Each of the plurality of memory elements comprises a magnetic reference layer with a first invariable magnetization direction substantially perpendicular to layer plane thereof; a magnetic free layer separated from the magnetic reference layer by an insulating tunnel junction layer with the magnetic free layer having a variable magnetization direction substantially perpendicular to layer plane thereof; a dielectric layer formed in contact with the magnetic free layer opposite the insulating tunnel junction layer; and a first conductive layer formed in contact with the dielectric layer opposite the magnetic free layer.

Abstract: A semiconductor device comprises: a semiconductor element including an electrode; a leading line electrically connected to the electrode, passing above the electrode, and led to a side thereof; and a current sensor sensing current flowing through the leading line. The current sensor includes a magneto-resistance element placed above the electrode and below the leading line. A resistance value of the magneto-resistance element varies linearly according to magnetic field generated by the current.

Abstract: A magnetic body structure including: a magnetic layer pattern; and a conductive pattern including a metallic glass alloy and covering at least a portion of the magnetic body structure.

Abstract: According to an embodiment of the invention, a magnetic tunnel junction (MTJ) element includes a reference ferromagnetic layer, a storage ferromagnetic layer, and an insulating layer. The storage ferromagnetic layer includes a CoFeB sub-layer coupled to a CoFe sub-layer and/or a NiFe sub-layer through a non-magnetic sub-layer. The insulating layer is disposed between the reference and storage ferromagnetic layers.

Abstract: Embodiments relate to current sensors and methods. In an embodiment, a current sensor comprises a leadframe; a semiconductor die coupled to the leadframe; a conductor comprising a metal layer on the semiconductor die, the conductor comprising at least one bridge portion and at least two slots, a first slot having a first tip and a second slot having a second tip, a distance between the first and second tips defining a width of one of the at least one bridge portion, wherein the conductor is separated from the leadframe by at least a thickness of the semiconductor die, and the thickness is about 0.2 millimeters (mm) to about 0.7 mm; and at least one magnetic sensor element arranged on the die relative to and spaced apart from the one of the at least one bridge portion and more proximate the conductor than the leadframe.

Abstract: A memory element includes a layered structure: a memory layer having a changeable magnetization direction, the magnetization direction being changed by applying a current in a lamination direction of the layered structure to record the information in the memory layer, including a first ferromagnetic layer having a magnetization direction that is inclined from a direction perpendicular to a film face, a bonding layer laminated on the first ferromagnetic layer, and a second ferromagnetic layer laminated on the bonding layer and bonded to the first ferromagnetic layer via the bonding layer, having a magnetization direction that is inclined from the direction perpendicular to the film face, a magnetization-fixed layer having a fixed magnetization direction, an intermediate layer that is provided between the memory layer and the magnetization-fixed layer, and is contacted with the first ferromagnetic layer, and a cap layer that is contacted with the second ferromagnetic layer.

Abstract: A magnetic memory layer and a magnetic memory device including the same, the magnetic memory layer including a first seed layer; a second seed layer on the first seed layer, the second seed layer grown according to a <002> crystal direction with respect to a surface of the first seed layer; and a main magnetic layer on the second seed layer, the main magnetic layer grown according to the <002> crystal direction with respect to a surface of the second seed layer.

Abstract: A magnetic miniaturized memory element with improved thermal stability of magnetization includes a first magnetic layer, an insulating layer that is formed on the first magnetic layer, a second magnetic layer that is formed on the insulating layer, and an expanded interlayer insulating film that comes into contact with side surfaces of the first and second magnetic layers, where at least one of the first magnetic layer and the second magnetic layer is strained and deformed so as to be elongated in an easy magnetization axis direction of the first magnetic layer or the second magnetic layer or compressive strain remains in any direction in the plane of at least one of the first magnetic layer and the second magnetic layer.

Abstract: An integrated magnetic sensor formed by a semiconductor chip having a surface and accommodating a magnetic via and a sensing coil. The magnetic via is formed by a cylindrical layer of ferromagnetic material that extends perpendicular to the surface of the first chip and has in cross-section an annular shape of a circular or elliptical or curvilinear type. The sensing coil surrounds the magnetic via at a distance and is connected to an electronic circuit.

Abstract: A magnetic junction is provided. The magnetic junction includes a reference stack, a nonmagnetic spacer layer and a free layer. The reference stack includes a high perpendicular magnetic anisotropy (PMA) layer and a graded polarization enhancement layer (PEL) between the high PMA and nonmagnetic spacer layers. The PEL is magnetically coupled with the reference layer. The PEL includes magnetic layers and nonmagnetic insertion layers. At least part of the PEL has a spin polarization greater than the PMA layer's. The nonmagnetic insertion layers are configured such that the magnetic layers are ferromagnetically coupled and the crystalline orientations of the high PMA and nonmagnetic spacer layers are decoupled. Each nonmagnetic insertion layer's thickness is insufficient for the crystalline orientations to be decoupled in the absence of the remaining nonmagnetic insertion layers. The free layer is switchable between stable magnetic states when a write current is passed through the magnetic junction.

Abstract: BEOL memory cells are described that include one or more sidewall protection layers on the memory device (including, for example, an MTJ element) deposited prior to interconnect via etching to prevent the formation of electrical shorts between layers. One embodiment uses a single layer sidewall protection sleeve that is deposited after the memory device has been patterned. The layer material is vertically etched down to expose the upper surface of the top electrode while leaving a residual layer of protective material surrounding the rest of the memory device. The material for the protection layer is selected to resist the etchant used to remove the first dielectric material from the via in the subsequent interconnect process. A second embodiment uses dual-layer sidewall protection in which the first layer covers the memory element is preferably an oxygen-free dielectric and the second layer protects the first layer during via etching.

Abstract: A memory includes a semiconductor substrate. Magnetic tunnel junction elements are provided above the semiconductor substrate. Each of the magnetic tunnel junction elements stores data by a change in a resistance state, and the data is rewritable by a current. Cell transistors are provided on the semiconductor substrate. Each of the cell transistors is in a conductive state when the current is applied to the corresponding magnetic tunnel junction element. Gate electrodes are included in the respective cell transistors. Each of the gate electrodes controls the conductive state of the corresponding cell transistor. In active areas, the cell transistors are provided, and the active areas extend in an extending direction of intersecting the gate electrodes at an angle of (90?atan(?)) degrees.

Abstract: A multi-chip push-pull magnetoresistive bridge sensor utilizing magnetic tunnel junctions is disclosed. The magnetoresistive bridge sensor is composed of a two or more magnetic tunnel junction sensor chips placed in a semiconductor package. For each sensing axis parallel to the surface of the semiconductor package, the sensor chips are aligned with their reference directions in opposition to each other. The sensor chips are then interconnected as a push-pull half-bridge or Wheatstone bridge using wire bonding. The chips are wire-bonded to any of various standard semiconductor lead frames and packaged in inexpensive standard semiconductor packages.

Abstract: According to one embodiment, a magnetic memory comprises an electrode, a memory layer which is formed on the electrode and has magnetic anisotropy perpendicular to a film plane, and in which a magnetization direction is variable, a tunnel barrier layer formed on the memory layer, and a reference layer which is formed on the tunnel barrier layer and has magnetic anisotropy perpendicular to the film plane, and in which a magnetization direction is invariable. The memory layer has a positive magnetostriction constant on a side of the electrode, and a negative magnetostriction constant on a side of the tunnel barrier layer.

Abstract: Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.

Abstract: A magneto-resistance effect element for a sensor to sense a variation in externally applied magnetism includes a pinned layer having a fixed magnetization direction, a free layer having a magnetization direction which varies in response to an external magnetic field, and an intermediate layer provided between the pinned layer and the free layer. The pinned layer has a planar shape which is long in the fixed magnetization direction and which is short in a direction orthogonal to the fixed magnetization direction. Moreover, the pinned layer preferably has a planar shape in which the pinned layer is divided into a plurality of sections.

Abstract: In one embodiment, a magnetic element for a semiconductor device includes a reference layer, a free layer, and a nonmagnetic spacer layer disposed between the reference layer and the free layer. The nonmagnetic spacer layer includes a binary, ternary, or multi-nary alloy oxide material. The binary, ternary, or multi-nary alloy oxide material includes MgO having one or more additional elements selected from the group consisting of: Ru, Al, Ta, Tb, Cu, V, Hf, Zr, W, Ag, Au, Fe, Co, Ni, Nb, Cr, Mo, and Rh.

Abstract: Provided is a magnetic tunneling junction device including a first structure including a magnetic layer; a second structure including at least two extrinsic perpendicular magnetization structures, each including a magnetic layer and; a perpendicular magnetization inducing layer on the magnetic layer; and a tunnel barrier between the first and second structures.

Abstract: The present disclosure describes a semiconductor MRAM device and a manufacturing method. The device reduces magnetic field induction “interference” (disturbance) phenomenon between adjacent magnetic tunnel junctions when data is written and read. This semiconductor MRAM device comprises a magnetic tunnel junction unit and a magnetic shielding material layer covering the sidewalls of the magnetic tunnel junction unit. The method for manufacturing a semiconductor device comprises: forming a magnetic tunnel junction unit, depositing an isolation dielectric layer to cover the top and the sidewall of the magnetic tunnel junction unit, and depositing a magnetic shielding material layer on the isolation dielectric layer.

Abstract: A magnetic field sensor has a plurality of vertical Hall elements arranged in at least a portion of a polygonal shape. The magnetic field sensor includes an electronic circuit to process signals generated by the plurality of vertical Hall elements to identify a direction of a magnetic field. A corresponding method of fabricating the magnetic field sensor is also described.

Abstract: Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.

Abstract: A semiconductor device including: a semiconductor body having a first side and a second side opposite to one another; a first barrier element, which extends over the first side of the semiconductor body and is made of a first material configured to act as barrier against metal ions, for example chosen from among titanium, tantalum, titanium alloys or compounds, tantalum alloy; a magnetic element, which extends over the first barrier layer and is made of a second material having magnetic properties, for example a ferromagnetic material; a second barrier element, which extends over the magnetic layer and is made of a third material configured to act as barrier against metal ions, for example chosen from among titanium, tantalum, titanium alloys or compounds, tantalum alloys or compounds. The first and second barrier elements form a top encapsulating structure and a bottom encapsulating structure for the magnetic element.

Abstract: A non-volatile reconfigurable logic device executing logical operations and a memory function and controlled by a magnetic field is provided. The reconfigurable logic device includes i) at least one semiconductor device; and ii) a pair of magnetic field controlled devices respectively spaced apart from both sides of the semiconductor device and that are adapted to generate magnetic field leakage to control the semiconductor device. The semiconductor device includes i) a first semiconductor layer; and ii) a second semiconductor layer located on the first semiconductor layer. One of the first semiconductor layer and the second semiconductor layer is a p-type semiconductor layer and the other is an n-type semiconductor layer.

Abstract: An ST-MRAM structure, a method for fabricating the ST-MRAM structure and a method for operating an ST-MRAM device that results from the ST-MRAM structure each utilize a spin Hall effect base layer that contacts a magnetic free layer and effects a magnetic moment switching within the magnetic free layer as a result of a lateral switching current within the spin Hall effect base layer. This resulting ST-MRAM device uses an independent sense current and sense voltage through a magnetoresistive stack that includes a pinned layer, a non-magnetic spacer layer and the magnetic free layer which contacts the spin Hall effect base layer. Desirable non-magnetic conductor materials for the spin Hall effect base layer include certain types of tantalum materials and tungsten materials that have a spin diffusion length no greater than about five times the thickness of the spin Hall effect base layer and a spin Hall angle at least about 0.05.

Abstract: A sensor and fabrication process are provided for forming reference layers with substantially orthogonal magnetization directions having zero offset with a small compensation angle. An exemplary embodiment includes a sensor layer stack of a magnetoresistive thin-film based magnetic field sensor, the sensor layer stack comprising a pinning layer; a pinned layer including a layer of amorphous material over the pinning layer, and a first layer of crystalline material over the layer of amorphous material; a nonmagnetic coupling layer over the pinned layer; a fixed layer over the nonmagnetic coupling layer; a tunnel barrier over the fixed layer; and a sense layer over the nonmagnetic intermediate layer. Another embodiment includes a sensor layer stack where a pinned layer including two crystalline layers separated by a amorphous layer.

Abstract: A magnetic field sensor having a support with a top side and a bottom side, whereby a Hall plate is provided on the top side of the support and the Hall plate comprises a carbon-containing layer.

Abstract: A magnetic field sensor has a plurality of vertical Hall elements arranged in at least a portion of a polygonal shape. The magnetic field sensor includes an electronic circuit to process signals generated by the plurality of vertical Hall elements to identify a direction of a magnetic field. A corresponding method of fabricating the magnetic field sensor is also described.

Abstract: A method and system provide a magnetic junction usable in a magnetic device. The magnetic junction includes a pinned layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the pinned layer and the free layer. The free layer has a gradient in a critical switching current density (Jc0) such that a first Jc0 of a first portion of the free layer is lower than a second Jc0 of a second portion of the free layer. The second portion of the free layer is further from the nonmagnetic spacer layer than the first portion is. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.