Abstract: A solid state imaging device 1 is provided with a photoelectric conversion portion 2 having a plurality of photosensitive regions 7, and a potential gradient forming portion 3 having an electroconductive member 8 arranged opposite to the photosensitive regions 7. A planar shape of each photosensitive region 7 is a substantially rectangular shape. The photosensitive regions 7 are juxtaposed in a first direction intersecting with the long sides. The potential gradient forming portion 3 forms a potential gradient becoming higher along a second direction from one of the short sides to the other of the short sides of the photosensitive regions 7. The electroconductive member 8 includes a first region 8a extending in the second direction and having a first electric resistivity, and a second region 8b extending in the second direction and having a second electric resistivity smaller than the first electric resistivity.

Abstract: The present disclosure relates to a back-side illuminated CMOS image sensor (BSI CIS). In some embodiments, the BSI CSI has a semiconductor substrate with a front-side and a back-side. A plurality of photodetectors are located within the front-side of the semiconductor substrate. An implantation region is located within the semiconductor substrate at a position separated from the plurality of photodetectors. The implantation region is disposed below the plurality of photodetectors and has a non-uniform doping concentration along a lateral plane parallel to the back-side of the semiconductor substrate. The non-uniform doping concentration allows for the BSI CSI to achieve a small total thickness variation (TTV) between one or more photodetectors and a back-side of a thinned semiconductor substrate that provides for good device performance.

Abstract: A solid state imaging device including: a plurality of sensor sections formed in a semiconductor substrate in order to convert incident light into an electric signal; a peripheral circuit section formed in the semiconductor substrate so as to be positioned beside the sensor sections; and a layer having negative fixed electric charges that is formed on a light incidence side of the sensor sections in order to form a hole accumulation layer on light receiving surfaces of the sensor sections.

Abstract: A backside illumination image sensor, a method of fabricating the same, and an electronic system including the backside illumination image sensor, the backside illumination image sensor including a semiconductor substrate, the semiconductor substrate having an upper surface and a lower surface; photodiodes in the semiconductor substrate; and metal interconnections below the semiconductor substrate, wherein each of the photodiodes includes a N-type region, a lower P-type region below the N-type region, and an upper P-type region on the N-type region.

Abstract: An image sensor includes front-side and backside photodetectors of a first conductivity type disposed in a substrate layer of the first conductivity type. A front-side pinning layer of a second conductivity type is connected to a first contact. The first contact receives a predetermined potential. A backside pinning layer of the second conductivity type is connected to a second contact. The second contact receives an adjustable and programmable potential.

Abstract: An image sensor having small pixels with high charge storage capacity, low dark current, no image lag, and good blooming control may be provided. The high charge storage capacity is achieved by placing a p+ type doped layer under the pixel charge storage region with an opening in it for allowing photo-generated charge carriers to flow from the silicon hulk to the charge storage well located near the surface of the photodiode. A compensating n-type doped implant may be formed in the opening. Image lag is prevented by placing a p? type doped region under the p+ type doped photodiode pinning layer and aligned with the opening. Blooming control is achieved by adjusting the length of the transfer gate in the pixel and thereby adjusting the punch-through potential under the gate.

Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. An contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the contact etch stop layer.

Abstract: An embodiment integrated circuit includes a first device supporting a first back end of line layer, the first back end of line layer including a first alignment marker, and a second device including a spin-on glass via and supporting a second back end of line layer, the second back end of line layer including a second alignment marker, the spin-on glass via permitting the second alignment marker to be aligned with the first alignment marker using ultraviolet light.

Abstract: A bonding pad structure for an image sensor device and a method of fabrication thereof. The image sensor device has a radiation-sensor region including a substrate and a radiation detection device, and a bonding pad region including the bonding pad structure. The bonding pad structure includes: an interconnect layer; an interlayer dielectric layer (IDL), both layers extending from under the substrate into the bonding pad region; an isolation layer formed on IDL; a conductive pad having a planar portion and one or more bridging portions extending perpendicularly from the planar portion, through the IDL and isolation layers, and to the interconnect layer; and a plurality of non-conducting stress-releasing structures disposed between the isolation layer and the conductive pad in such a way to adjoin its planar and the bridging portions together for releasing potential pulling stress applied thereon and preventing a conductive pad peeling.

Abstract: A semiconductor device, which is configured as a backside illuminated solid-state imaging device, includes a stacked semiconductor chip which is formed by bonding two or more semiconductor chip units to each other and in which, at least, a pixel array and a multi-layer wiring layer are formed in a first semiconductor chip unit and a logic circuit and a multi-layer wiring layer are formed in a second semiconductor chip unit; a semiconductor-removed region in which a semiconductor section of a part of the first semiconductor chip unit is completely removed; and a plurality of connection wirings which is formed in the semiconductor-removed region and connects the first and second semiconductor chip units to each other.

Abstract: A method for forming a back-side illuminated image sensor, including the steps of: a) forming, from the front surface, doped polysilicon regions, of a conductivity type opposite to that of the substrate, extending in depth orthogonally to the front surface and emerging into the first layer; b) thinning the substrate from its rear surface to reach the polysilicon regions, while keeping a strip of the first layer; c) depositing, on the rear surface of the thinned substrate, a doped amorphous silicon layer, of a conductivity type opposite to that of the substrate; and d) annealing at a temperature capable of transforming the amorphous silicon layer into a crystallized layer.

Abstract: Provided is a method of fabricating a backside illuminated image sensor that includes providing a device substrate having a frontside and a backside, where pixels are formed at the frontside and an interconnect structure is formed over pixels, forming a re-distribution layer (RDL) over the interconnect structure, bonding a first glass substrate to the RDL, thinning and processing the device substrate from the backside, bonding a second glass substrate to the backside, removing the first glass substrate, and reusing the first glass substrate for fabricating another backside-illuminated image sensor.

Abstract: Ultra-thin semiconductor devices, including piezo-resistive sensing elements can be formed a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: Ultra-thin semiconductor devices, including piezoresistive sensing elements can be formed in a wafer stack that facilitates handling many thin device dice at a wafer level. Three embodiments are provided to form the thin dice in a wafer stack using three different fabrication techniques that include anodic bonding, adhesive bonding and fusion bonding. A trench is etched around each thin die to separate the thin die from others in the wafer stack. A tether layer, also known as a tether, is used to hold thin dice or dice in a wafer stack. Such as wafer stack holds many thin dice together at a wafer level for handling and enables easier die picking in packaging processes.

Abstract: In a case when a structure of forming a p+ layer on a substrate rear surface side is employed in order to prevent dark current generation from the silicon boundary surface, various problems occur. According to this invention, an insulation film 39 is provided on a rear surface on a silicon substrate 31 and a transparent electrode 40 is further provided thereon, and by applying a negative voltage with respect to the potential of the silicon substrate 31 from a voltage supply source 41 to the insulation film 39 through the transparent electrode 40, positive holes are accumulated on a silicon boundary surface of the substrate rear surface side and a structure equivalent to a state in which a positive hole accumulation layer exists on aforesaid silicon boundary surface is to be created. Thus, various problems in the related art can be avoided.

Abstract: A photoelectric conversion apparatus comprises multiple photoelectric conversion portions (51) disposed in a semiconductor substrate (5B) wherein each photoelectric conversion portion (51) includes: a P-type charge accumulating area (107) containing a first impurity; and an N-type well portion (102) that, along with the P-type charge accumulating area, configures a photodiode, and each well portion has: an N-type first semiconductor region (102a) containing arsenic at a first density; an N-type second semiconductor region (102b,102C) disposed below the first semiconductor region and containing arsenic at a second density that is lower than the first density; and an N-type third semiconductor region (102d) disposed below the second semiconductor region and containing a second impurity at a third density that is higher than the first density.

Abstract: According to an embodiment, an active layer is formed on a first surface of a semiconductor substrate, a wiring layer is formed on the active layer, and an insulating layer is formed covering the wiring layer. The first surface of the semiconductor substrate is bonded to a support substrate via the insulating layer, and the semiconductor substrate bonded to the support substrate is thinned leaving the semiconductor substrate having a predetermined thickness which covers the active layer from a second surface. At least a part of area of the thinned semiconductor substrate is removed to expose the active layer.

Abstract: Methods and apparatus for a backside illuminated (BSI) image sensor device are disclosed. A BSI sensor device is formed on a substrate comprising a photosensitive diode. The substrate may be thinned at the backside, then a B doped Epi-Si(Ge) layer may be formed on the backside surface of the substrate. Additional layers may be formed on the B doped Epi-Si(Ge) layer, such as a metal shield layer, a dielectric layer, a micro-lens, and a color filter.

Abstract: A backside illuminated image sensor includes a semiconductor layer and a trench disposed in the semiconductor layer. The semiconductor layer has a frontside surface and a backside surface. The semiconductor layer includes a light sensing element of a pixel array disposed in a sensor array region of the semiconductor layer. The pixel array is positioned to receive external incoming light through the backside surface of the semiconductor layer. The semiconductor layer also includes a light emitting element disposed in a periphery circuit region of the semiconductor layer external to the sensor array region. The trench is disposed in the semiconductor layer between the light sensing element and the light emitting element. The trench is positioned to impede a light path between the light emitting element and the light sensing element when the light path is internal to the semiconductor layer.

Abstract: Photodetector arrays, image sensors, and other apparatus are disclosed. In one aspect, an apparatus may include a surface to receive light, a plurality of photosensitive regions disposed within a substrate, and a material coupled between the surface and the plurality of photosensitive regions. The material may receive the light. At least some of the light may free electrons in the material. The apparatus may also include a plurality of discrete electron repulsive elements. The discrete electron repulsive elements may be coupled between the surface and the material. Each of the discrete electron repulsive elements may correspond to a different photosensitive region. Each of the discrete electron repulsive elements may repel electrons in the material toward a corresponding photosensitive region. Other apparatus are also disclosed, as are methods of use, methods of fabrication, and systems incorporating such apparatus.

Abstract: An image sensor includes a photosensitive region disposed within a semiconductor layer and a stress adjusting layer. The photosensitive region is sensitive to light incident through a first side of the image sensor to collect an image charge. The stress adjusting layer is disposed over the first side of the semiconductor layer to establish a stress characteristic that encourages photo-generated charge carriers to migrate towards the photosensitive region.

Abstract: A backside illuminated image sensor is provided which includes a substrate having a front side and a backside, a sensor formed in the substrate at the front side, the sensor including at least a photodiode, and a depletion region formed in the substrate at the backside, a depth of the depletion region is less than 20% of a thickness of the substrate.

Abstract: A solid-state imaging device includes: a semiconductor substrate that has a light sensing portion which photoelectrically converts incident light; an infrared cut filter layer or a light shielding layer that is provided on a surface side opposite to a light receiving surface of the semiconductor substrate and is formed on substantially the entire surface of an area corresponding to an area in which the light sensing portion of the semiconductor substrate is formed; and a wiring layer that is provided on an upper layer of the infrared cut filter layer or the light shielding layer.

Abstract: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.

Abstract: An electrical component includes a semiconductor layer having a first conductivity type and a interconnect layer disposed adjacent to a frontside of the semiconductor layer. At least one bond pad is disposed in the interconnect layer and formed adjacent to the frontside of the semiconductor layer. An opening formed from the backside of the semiconductor layer and through the semiconductor layer exposes at least a portion of the bond pad. A first region having a second conductivity type extends from the backside of the semiconductor layer to the frontside of the semiconductor layer and surrounds the opening. The first region can abut a perimeter of the opening or alternatively, a second region having the first conductivity type can be disposed between the first region and a perimeter of the opening.

Abstract: An image sensor includes front-side and backside photodetectors of a first conductivity type disposed in a substrate layer of the first conductivity type. A front-side pinning layer of a second conductivity type is connected to a first contact. The first contact receives a predetermined potential. A backside pinning layer of the second conductivity type is connected to a second contact. The second contact receives an adjustable and programmable potential.

Abstract: An image sensor includes front-side and backside photodetectors of a first conductivity type disposed in a substrate layer of the first conductivity type. A front-side pinning layer of a second conductivity type is connected to a first contact. The first contact receives a predetermined potential. A backside pinning layer of the second conductivity type is connected to a second contact. The second contact receives an adjustable and programmable potential.

Abstract: The invention describes a solid-state CMOS image sensor array and in particular describes in detail the image sensor array pixels, with global and rolling shutter capabilities, that utilize charge storage gates located on top of a pinned photodiode. The sensor array is illuminated from the back side and the location of the storage gate on top of the pinned photodiode saves valuable pixel area, which does not compromise the Dynamic Range of the image sensor.

Abstract: A photoelectric conversion device comprises an n-type surface region, a p-type region which is formed under the surface region, and an n-type buried layer which is formed under the p-type region, wherein the surface region, the p-type region, and the buried layer form a buried photodiode, and a diffusion coefficient of a dominant impurity of the surface region is smaller than a diffusion coefficient of a dominant impurity of the buried layer.

Abstract: A backside illumination image sensor equipped with a plurality of pixels disposed in a two-dimensional pattern, includes: image-capturing pixels; and focus detection pixels.

Abstract: A solid state imaging device including a semiconductor layer comprising a plurality of photodiodes, a first antireflection film located over a first surface of the semiconductor layer, a second antireflection film located over the first antireflection film, a light shielding layer having side surfaces which are adjacent to at least one of first and the second antireflection film.

Abstract: An image sensor and a method of manufacturing the same. The image sensor includes a plurality of photoelectric conversion units that are horizontally arranged and selectively emit electric signals by absorbing color beams.

Abstract: A solid-state imaging device has an element substrate that is formed with a plurality of photodiodes, a back-surface electrode, and an electric charge discharging path. A wiring layer for controlling the photodiodes is formed in a front surface of the element substrate. Light is incident upon the photodiodes from a back surface of the element substrate. By applying the back-surface electrode with a voltage in accordance with timing of operation control of the photodiodes, a potential is modulated in the vicinity of the back surface of the element substrate. When an electron inversion layer formed in the vicinity of the back surface of the element substrate upon applying a positive voltage to the back-surface electrode is coupled to a region for accumulating signal charge through a monotonously changing potential gradient, the electric charge that has flowed into the electron inversion layer is discharged through the electric charge discharging path.

Abstract: An imager may include an imaging die that is stacked with an image processing die. The imaging die may generate output signals from received light. The image processing die may process the output signals. Through-silicon vias of the imaging die or solder balls may electrically couple the imaging die to the image processing die and convey the output signals to the image processing die. The imaging die may include a pixel array that generates pixel signals from the received light. The image processing die may generate control signals that control the imaging die and are conveyed to the imaging die over the through-silicon vias or solder balls.

Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.

Abstract: A backside illuminated image sensor includes an isolation structure passing through a substrate, a sensor element formed overlying the front surface of the substrate, and a color filter formed overlying the back surface of the substrate.

Abstract: To provide a solid-state imaging device able to improve light transmittance of a transparent insulation film in a light incident side of a substrate, suppress the dark current, and prevent a quantum efficiently loss, wherein a pixel circuit is formed in a first surface of the substrate and light is received from a second surface, and having: a light receiving unit formed in the substrate and for generating a signal charge corresponding to an amount of incidence light and storing it; a transparent first insulation film formed on the second surface; and a transparent second insulation film formed on the first insulation film and for retaining a charge having the same polarity as the signal charge in an interface of the first insulation film or in inside, thicknesses of the first and second insulation film being determined to obtain a transmittance higher than when using only the first insulation film.

Abstract: Disclosed herein is a solid-state imaging device including: a laminated semiconductor chip configured to be obtained by bonding two or more semiconductor chip sections to each other and be obtained by bonding at least a first semiconductor chip section in which a pixel array and a multilayer wiring layer are formed and a second semiconductor chip section in which a logic circuit and a multilayer wiring layer are formed to each other in such a manner that the multilayer wiring layers are opposed to each other and are electrically connected to each other; and a light blocking layer configured to be formed by an electrically-conductive film of the same layer as a layer of a connected interconnect of one or both of the first and second semiconductor chip sections near bonding between the first and second semiconductor chip sections. The solid-state imaging device is a back-illuminated solid-state imaging device.

Abstract: A semiconductor device including a device substrate having a front side and a back side. The semiconductor device further includes an interconnect structure disposed on the front side of the device substrate, the interconnect structure having a n-number of metal layers. The semiconductor device also includes a bonding pad disposed on the back side of the device substrate, the bonding pad extending through the interconnect structure and directly contacting the nth metal layer of the n-number of metal layers.

Abstract: According to one embodiment, an imaging device includes a semiconductor substrate having a first conductivity type, a well region which is arranged on a front surface side of the semiconductor substrate and has the first conductivity type, photodiodes which are arranged in the well region and have a second conductivity type, a diffusion layer which is arranged between the photodiodes, supplies a potential to the well region, and has the first conductivity type, an overflow drain layer which is arranged on a back surface side of the semiconductor substrate and has the second conductivity type, an overflow drain electrode which extends from the front surface side of the semiconductor substrate to the overflow drain layer and supplies a bias potential to the overflow drain layer from the front surface side of the semiconductor substrate, and a wiring layer which is arranged on the front surface of the semiconductor substrate.

Abstract: A semiconductor image sensor module 1 at least includes a semiconductor image sensor chip 2 having a transistor forming region on a first main surface of a semiconductor substrate and having a photoelectric conversion region with a light incident surface formed on a second main surface on the side opposite to the first main surface and an image signal processing chip 3 for processing image signals formed in the semiconductor image sensor chip 2, wherein a plurality of bump electrodes 15a are formed on a first main surface, a plurality of bump electrodes 15b are formed on the image signal processing chip 3, both the chips 2 and 3 are formed to be laminated through heat dissipating means 4 and the plurality of bump electrodes 15a of the semiconductor image sensor chip 2 and the plurality of bump electrodes 15b on the image signal processing chip 3 are electrically connected.

Abstract: An object is to prevent a reduction of definition (or resolution) (a peripheral blur) caused when reflected light enters a photoelectric conversion element arranged at a periphery of a photoelectric conversion element arranged at a predetermined address. A semiconductor device is manufactured through the steps of: forming a structure having a first light-transmitting substrate, a plurality of photoelectric conversion elements over the first light-transmitting substrate, a second light-transmitting substrate provided so as to face the plurality of photoelectric conversion elements, a sealant arranged so as to bond the first light-transmitting substrate and the second light-transmitting substrate and surround the plurality of photoelectric conversion elements; and thinning the first light-transmitting substrate by wet etching.

Abstract: A backside illuminated image sensor comprises a photodiode and a first transistor located in a first chip, wherein the first transistor is electrically coupled to the photodiode. The backside illuminated image sensor further comprises a second transistor formed in a second chip and a plurality of logic circuits formed in a third chip, wherein the second chip is stacked on the first chip and the third chip is stacked on the second chip. The logic circuit, the second transistor and the first transistor are coupled to each other through a plurality of boding pads and through vias.

Abstract: According to one embodiment, in a semiconductor device, a semiconductor substrate has a first surface and a second surface which is opposed to the first surface. An insulating layer is provided on the first surface of the semiconductor substrate. A metal wiring is provided within the insulating layer. A support substrate is bonded to the insulating layer. A poly silicon electrode is connected to the metal wiring through a contact. A pad is provided on the second surface of the semiconductor substrate and is connected to the poly silicon electrode through a metal film deposited in a via-hole to penetrate the semiconductor substrate and extend to the poly silicon electrode.

Abstract: Image sensors include a second photoelectric conversion device disposed in a lower portion of a substrate and a first photoelectric conversion device extending between the secondary photoelectric conversion device and a light receiving surface of the substrate. Electrical isolation between the first and second photoelectric conversion devices is provided by a photoelectron barrier, which may be an optically transparent electrically insulating material. MOS transistors may be utilized to transfer photoelectrons generated within the first and second photoelectric conversion devices to a floating diffusion region within the image sensor. These transistors may represent one example of means for transferring photoelectrons generated in the first and second photoelectric conversion devices to a floating diffusion region in the substrate, in response to first and second gating signals, respectively. The first and second gating signals may be active during non-overlapping time intervals.

Abstract: A solid state imaging device according to an embodiment includes a light sensing part which conducts photoelectric conversion on incident light. The solid state imaging device includes a ferroelectric layer including an organic compound on a surface of the light sensing part on which light is incident. The solid state imaging device includes a transparent electrode formed on the ferroelectric layer.

Abstract: A back-illuminated image sensor includes a sensor layer disposed between an insulating layer and a circuit layer electrically connected to the sensor layer. An imaging area includes a plurality of photodetectors is formed in the sensor layer and a well that spans the imaging area. The well can be disposed between the backside of the sensor layer and the photodetectors, or the well can be a buried well formed adjacent to the backside of the sensor layer with a region including formed between the photodetectors and the buried well. One or more side wells can be formed laterally adjacent to each photodetector. The dopant in the well has a segregation coefficient that causes the dopant to accumulate on the sensor layer side of an interface between the sensor layer and the insulating layer.

Abstract: A method of forming a backside illuminated image sensor includes forming a guard ring structure of a predetermined depth in a front-side surface of a semiconductor substrate, the guard ring structure outlining a two-dimensional array of pixels, each pixel of the array of pixels separated from an adjacent pixel by the guard ring structure. The method further includes forming at least one image sensing element on the front-side surface of the semiconductor substrate, the at least one image sensing element being formed in a pixel of the array of pixels and surrounded by the guard ring structure. The method further includes reducing a thickness of the semiconductor substrate until the guard ring structure is co-planar with a back-side surface of the semiconductor substrate.

Abstract: A frame body surrounding a perimeter of each light-emitting element is provided one surface of a substrate. Glass films having apertures are formed on the substrate by glass printing to form the frame body.

Abstract: A method of etching capable of rapidly and flatly performing wet etching on a Si substrate using fluonitric acid represented by HF(a)HNO3(b)H2O(c) (where the unit of a, b and c is wt % and a+b+c=100). The etching rate of an SiO2 layer with the highly concentrated fluonitric acid is significantly lowered by the appropriate selection of its composition as compared with the etching rate of the Si substrate, and etch the Si substrate until the SiO2 layer is exposed. In this way, it is possible to rapidly etch the Si substrate and significantly enhance the flatness of the etched surface.