Abstract: A photodetector arrangement has a semiconductor body with a substrate, and first, second and third layers. The first layer is located at the first main surface of the semiconductor body which is suited for reception of incident photon radiation which is to be detected. The second layer is located at the second main surface of the semiconductor body which is at a distance to the first main surface. The third layer is located between the substrate and the second layer.

Abstract: A scanning head for an optical position-measuring system includes a receiver grating, formed of photosensitive areas, for the scanning of locally intensity-modulated light of differing wavelengths. The receiver grating is formed from a semiconductor layer stack of a doped p-layer, an intrinsic i-layer and a doped n-layer. The individual photosensitive areas have a first doped layer and at least a part of the intrinsic layer in common and are electrically separated from one another by interruptions in the second doped layer.

Abstract: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity of the lower electrode.

Abstract: A photodiode that can separately detect the intensities of the three wavelength ranges of ultraviolet light of 400 nm or below includes an insulating layer; and a plurality of silicon semiconductor layers having different thicknesses formed on the insulating layer, wherein each of the plurality of silicon semiconductor layers has a low-concentration diffusion layer formed by diffusing one of a P-type impurity or an N-type impurity therein with a low concentration; a P-type high-concentration diffusion layer formed by diffusing a P-type impurity therein with a high concentration; and an N-type high-concentration diffusion layer formed by diffusing an N-type impurity therein with a high concentration, and wherein the P-type high-concentration diffusion layer and the N-type high-concentration diffusion layer formed in a respective one of the plurality of silicon semiconductor layers are arranged to face each other with the low-concentration diffusion layer interposed there between.

Abstract: The pixel for use in an image sensor comprises a low-doped semiconductor substrate (A). On the substrate (A), an arrangement of a plurality of floating areas e.g., floating gates (FG2-FG6), is provided. Neighboring floating gates are electrically isolated from each other yet capacitively coupled to each other. By applying a voltage (V2-V1) to two contact areas (FG1, FG7), a lateral steplike electric field is generated. Photogenerated charge carriers move along the electric-field lines to the point of highest potential energy, where a floating diffusion (D) accumulate the photocharges. The charges accumulated in the various pixels are sequentially read out with a suitable circuit known from image-sensor literature, such as a source follower or a charge amplifier with row and column select mechanisms. The pixel of offers at the same time a large sensing area, a high photocharge-detection sensitivity and a high response speed without any static current consumption.

Abstract: A semiconductor photo detecting element includes a PIN-type photo detecting element and window semiconductor layer. The PIN-type photo detecting element has a semiconductor substrate, a first semiconductor layer, a second semiconductor layer and a third semiconductor layer. The first semiconductor layer is provided on the semiconductor substrate, is lattice-matched to the semiconductor substrate, includes a first conductivity type dopant, and has first band gap energy. The second semiconductor layer is provided on the first semiconductor layer, has the first band gap energy, and has a concentration of the first conductivity type dopant lower than that of the first semiconductor layer or is substantially undoped. The third semiconductor layer is provided on the second semiconductor layer. The window semiconductor layer has second band gap energy larger than the first band gap energy at a light-incoming side with respect to the second semiconductor layer and has a thickness of 5 nm to 50 nm.

Abstract: An optical sensor element includes: an n-type semiconductor region formed on a substrate; an i-type semiconductor region which is formed on the substrate between the p-type semiconductor region and the n-type semiconductor region and which is lower in impurity concentration than the p-type semiconductor region and the n-type semiconductor region; an anode electrode formed on the insulation film and connected to the p-type semiconductor region; and a cathode electrode formed on the insulation film and connected to the n-type semiconductor region. A reverse bias voltage Vb is applied when detecting the photocurrent, the reverse bias voltage Vb satisfying a following relation.

Abstract: A double heterojunction bipolar transistor on a substrate comprises a collector formed of InGaAsP, a base in contact with the collector, an emitter in contact with the base, and electrodes forming separate electrical contacts with each of the collector, base, and emitter, respectively. A device incorporates this transistor and an opto-electronic device optically coupled with the collector of the transistor to interact with light transmitted therethrough.

Abstract: In a mesa type PIN-PD formed using a heavily doped semiconductor material, a high frequency response is degraded as slow carriers occur in a heavily doped layer when light incident into a light receiving section transmits through an absorbing layer and reaches the heavily doped layer on a side near the substrate. In a p-i-n multilayer structure, a portion corresponding to a light receiving section of a heavily doped layer on a side near a substrate is previously made thinner than the periphery of the light receiving section by an etching or selective growth technique, over which an absorbing layer and another heavily doped layer are grown to form the light receiving section of mesa structure. This makes it possible to form a good ohmic contact and to realize a PIN-PD with excellent high frequency response characteristics.

Abstract: An electro-optic device includes a semiconducting layer in which is formed a waveguide, a modulator formed across the waveguide comprising a p-doped region to one side and an n-doped region to the other side of the waveguide, wherein at least one of the doped regions extends from the base of a recess formed in the semiconducting layer. In this way, the doped regions can extend further into the semiconducting layer and further hinder escape of charge carriers without the need to increase the diffusion distance of the dopant and incur an additional thermal burden on the device. In an SOI device, the doped region can extend to the insulating layer. Ideally, both the p and n-doped regions extend from the base of a recess, but this may be unnecessary in some designs. Insulating layers can be used to ensure that dopant extends from the base of the recess only, giving a more clearly defined doped region.

Abstract: An image sensor and a fabricating method thereof are provided. A pixel area and a peripheral circuit area can have a step difference on a semiconductor substrate. A Complimentary Metal Oxide Semiconductor (CMOS) circuit can be provided on the pixel area, and an interlayer dielectric layer can be provided on the pixel area and the peripheral circuit area. A photodiode can be provided on the interlayer dielectric layer of the pixel area such that the top of the photodiode, or an intrinsic layer of the photodiode, is about even with the top of the interlayer dielectric layer of the peripheral circuit area.

Abstract: Disclosed herein is a solid-state imaging element which includes a plurality of drive signal inputs, a plurality of bus lines, and a plurality of vertical transfer register electrodes. In the solid-state imaging element, a charge accumulated in light-receiving elements in a pixel region is vertically transferred by the drive signals input to the electrodes. Each of the electrodes has a contact part connected to the second contact and having a width smaller than a width of the electrodes in the pixel region, and a blank region is formed between predetermined adjacent two of the contact parts so that a width of the blank region is larger than a distance between respective two of the contact parts other than the predetermined adjacent two of the contact parts. The first contact is disposed on the blank region.

Abstract: Color image sensors include pixels having varying color characteristics. One of the pixels is a cyan-type pixel, which includes primary and secondary photodetectors therein. The primary photodetector extends adjacent a portion of a surface of a semiconductor substrate that is configured to receive visible light incident thereon. The secondary photodetector is buried in the semiconductor substrate. The secondary photodetector is configured to receive visible light that has passed through the primary photodetector.

Abstract: To provide a stacked photoelectric conversion device and a method for producing the same, in which an interlayer is provided between photoelectric conversion layers to obtain an effect of controlling the amount of incidence light, and carrier recombination at an interface between the interlayer and a semiconductor layer is decreased to enhance photoelectric conversion efficiency. The stacked photoelectric conversion device of the present invention comprises a plurality of silicon-based photoelectric conversion layers having a p-i-n structure stacked, wherein at least a pair of adjacent photoelectric conversion layers have an interlayer of a silicon nitride therebetween, the pair of the photoelectric conversion layers are electrically connected with each other, and a p-type silicon-based semiconductor layer constituting a part of the photoelectric conversion layer and contacting the interlayer contains a nitrogen atom.

Abstract: An image sensor includes a plurality of unit pixels arranged in a matrix shape, each of which is disposed in a region defined by a gate line extending in a first direction and a data line extending in a second direction that is different from the first direction. Each of the unit pixels includes a switching diode and a sensing diode. The switching diode has a plus terminal electrically connected to the gate line, and a minus terminal electrically connected to a signal node. The sensing diode has a plus terminal electrically connected to the data line, and a minus terminal electrically connected to the signal node. Therefore, a two-dimensional image may be sensed at once without moving of the sensing module so that scan time (image sensing time) may be reduced.

Abstract: Provided is an image sensor. The image sensor can include a first substrate comprising a pixel portion in which a readout circuitry is provided and a peripheral portion in which a peripheral circuitry is provided. An interlayer dielectric including lines can be formed on the first substrate to connect with the readout circuitry and the peripheral circuitry. A crystalline semiconductor layer can be provided on a portion of the interlayer dielectric corresponding to the pixel portion through a bonding process. The crystalline semiconductor layer can include a first photodiode and second photodiode. The first and second photodiodes can be defined by device isolation trenches in the crystalline semiconductor layer. A device isolation layer can be formed on the crystalline semiconductor layer comprising the device isolation trenches. An upper electrode layer passes through the device isolation layer to connect with a portion of the first photodiode.

Abstract: A technique for making an integrated circuit package. Specifically, a stacked memory device is provided with minimal interconnects. Memory die are stacked on top of each other and electrically coupled to a substrate. Thru vias are provided in the substrate and/or memory die to facilitate the electrical connects without necessitating a complex interconnect technology between each of the interfaces. Wire bonds are used to complete the circuit package.

Abstract: A photoelectric structure is presented, comprising one or more PiN cells. The PiN cell is formed by an intrinsic semiconductor bulk having front and rear surfaces enclosed between p- and n-type regions extending along side surfaces of said semiconductor bulk. The front and rear surfaces of the intrinsic semiconductor bulk are active surfaces of the PiN cell and said side surfaces of said semiconductor bulk formed with said p- and n-type regions are configured and operable for collecting excess charged carriers generated in said semiconductor bulk in response to collected electromagnetic radiation to which at least one of the active surfaces is exposed during the PiN cell operation.

Abstract: A semiconductor device and a method for manufacturing the device include connecting a second wafer to a first wafer, forming a hard mask layer on and/or over a backside of the second wafer, forming a hard mask pattern over the second layer and then forming a via hole by etching the first and the second wafers to a predetermined depth using the hard mask pattern as an etching mask.

Abstract: An object is to provide a photoelectric conversion element having a side surface with different taper angles by conducting etching of a photoelectric conversion layer step-by-step. A pin photodiode has a high response speed compared with a pn photodiode but has a disadvantage of large dark current. One cause of the dark current is considered to be conduction through an etching residue which is generated in etching and deposited on a side surface of the photoelectric conversion layer. Leakage current of the photoelectric conversion element is reduced by forming a structure in which a side surface has two different tapered shapes, which conventionally has a uniform surface, so that the photoelectric conversion layer has a side surface of a p-layer and a side surface of an n-layer, which are not in the same plane.

Abstract: CMOS image sensor is realized, wherein a pre-amp amplifies the voltage of a photo detector, and a main amp amplifies the output of the pre-amp. And the pre-amp is adjustable for receiving the output of the photo detector, and also the main amp is adjustable for optimizing the output swing. With the adjustable amps, low sensitivity photo detector can be amplified more, and high sensitivity photo detector can be amplified less, which enables to adjust the gain of each amp from the low-sensitive to high-sensitive photo detector. The information for adjusting the amps is stored in the latches of the chip, wherein include laser-blown fuses or electric fuses. In doing so, the photo detector can be stacked over the access device. In particular, photo detector is repairable, wherein failed photo detector is replaced with non-failed photo detector.

Abstract: A semiconductor photodetector 10 has a first semiconductor substrate 1 that is of a first conductive type and a low resistivity and has a (111) front surface, and a second semiconductor substrate 2 that is of the first conductive type and a high resistivity, has a (100) front surface, and is adhered onto first semiconductor substrate 1. A semiconductor region 3 of a second conductive type is formed on the front surface side of second semiconductor substrate 2. A region of a periphery of semiconductor region 3 is etched until first semiconductor substrate 1 is exposed. A first electrode 1e and a second electrode 2e are electrically connected to the exposed front surface of first semiconductor substrate 1 and to semiconductor region 3, respectively.

Abstract: An integrated vertical SiC—PN power diode has a highly doped SiC semiconductor body of a first conductivity type, a low-doped drift zone of the first conductivity type, arranged above the semiconductor body on the emitter side, an emitter zone of a second conductivity type, applied to the drift zone, and at least one thin intermediate layer of the first conductivity type. The intermediate layer is arranged inside the drift zone, has a higher doping concentration than the drift zone, and divides the drift zone into at least one first anode-side drift zone layer and at least one second cathode-side drift zone layer. There is also disclosed a circuit configuration with such SiC—PN power diodes.

Abstract: A transparent conductive layer includes a substrate, a first conductive layer disposed on the substrate, and a second conductive layer disposed on the first conductive layer, wherein the second conductive layer comprises a textured surface and an opening which exposes the first conductive layer, wherein the opening comprises a diameter of about 1 micrometer to about 3 micrometers. Also disclosed is a method of manufacturing the transparent conductive layer and a photoelectric device.

Abstract: A waveguide photodetector detecting light incident on a light detecting end face includes: a substrate; and a layer stack structure on the substrate and including a semiconductor layer of a first conductivity type, an undoped semiconductor layer, and a semiconductor layer of a second conductivity type. The undoped semiconductor layer includes two or more undoped light absorbing layers and undoped non-light-absorbing layers. One non-light-absorbing layer is disposed between adjacent undoped light absorbing layers. The non-light-absorbing layers have a bandgap wavelength shorter than the wavelength of the incident light that is detected.

Abstract: A lateral p-i-n photodetector is provided that includes an array of vertical semiconductor nanowires of a first conductivity type that are grown over a semiconductor substrate also of the first conductivity type. Each vertically grown semiconductor nanowires of the first conductivity type is surrounded by a thick epitaxial intrinsic semiconductor film. The gap between the now formed vertically grown semiconductor nanowires-intrinsic semiconductor film columns (comprised of the semiconductor nanowire core surrounded by intrinsic semiconductor film) is then filled by forming an epitaxial semiconductor material of a second conductivity type which is different from the first conductivity type. In a preferred embodiment, the vertically grown semiconductor nanowires of the first conductivity type are n+ silicon nanowires, the intrinsic epitaxial semiconductor layer is comprised of intrinsic epitaxial silicon, and the epitaxial semiconductor material of the second conductivity type is comprised of p+ silicon.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.

Abstract: A photo sensor has an insulator layer for covering a diode stack, and the insulator layer is made of photoresist to reduce a side leakage current.

Abstract: An image sensor device having a pixel cell with a pinned photodiode, which utilizes the fixed charge of an high K dielectric layer over the n-type region for the pinning effect without implanting a p-type layer over the n-type region, and methods of forming such a device.

Abstract: In a laser pickup photodetector of an optical disk playback device, the sensitivity to blue light is improved. On a main surface of a semiconductor substrate, a high resistivity epitaxial layer that becomes an i layer of a PIN photodiode (PIN-PD) is formed. On a surface of the epitaxial layer, two trenches are formed, on a surface of one trench an N+ region that becomes a cathode region of the PIN-PD is formed, and on a surface of the other trench a P+ region that becomes an anode region is formed. When the cathode region and the anode region are set in a reverse bias state, a light receiving semiconductor region that is an i layer between the cathode region and anode region is depleted. The depleted layer expands to a surface of the semiconductor substrate. Accordingly, for blue light having a short wavelength, signal charges can be generated on a surface of the semiconductor substrate and the cathode region can collect the signal charges and extract the charges as a light receiving signal.

Abstract: A semiconductor device that attenuates light to the circuit element area is provided. The semiconductor device includes light-sensitive element area formed on substrate and a circuit element area formed on the substrate. Additionally, a multilayer wiring area is formed on circuit element area. A Tantalum film (which is generally made of tantalum or a tantalum compound) is formed on the surface of the multilayer wiring area to attenuate incident light on circuit element area.

Abstract: Dual seed semiconductor photodetectors and methods to fabricate thereof are described. A dual seed semiconductor photodetector is formed directly on an insulating layer on a substrate. The dual seed semiconductor photodetector includes an optical layer formed on a dual seed semiconductor layer. The dual seed semiconductor layer includes a seed layer and a buffer layer. The seed layer of a first material is formed on an insulating layer over a substrate. The buffer layer is formed on the seed layer. Next, an optical layer of a second material is formed on the buffer layer. The buffer layer includes the first material and the second material. In one embodiment, the first material is silicon. In one embodiment, the second material is germanium.

Abstract: An apparatus is provided. The apparatus generally comprises a photoreceptive region and a circuit region formed in a substrate. A multilayer wiring region is then formed on the substrate over at least a portion of the circuit region. The multilayer wiring region includes a wiring layer and a light-blocking layer. The wiring layer is coupled to the circuit region, and the light-blocking wall has a metal layer that is arranged along at least a portion of the perimeter of the photoreceptive region and that is formed in the same process step as the wiring layer.

Abstract: A photo detector is disclosed. The photo detector has a substrate, a semiconductor layer disposed on the substrate, an insulating layer covered on the semiconductor layer, an interlayer dielectric layer covered on the insulating layer, and two electrodes formed on a portion of the interlayer dielectric layer. The semiconductor layer has a first doping region, a second doping region, and an intrinsic region located between the first doping region and the second doping region. The interlayer dielectric layer has at least three holes to expose a portion of the insulating layer, a portion of the first doping region, and the second doping region. The electrodes are connected to the first doping region and the second doping region through two of the holes.

Abstract: A PIN photodiode having a substrate, a first type electrode layer disposed on the substrate, a first layer of intrinsic material disposed over a portion of the first-type electrode layer, a first type window layer disposed over said intrinsic layer. An island shaped region of intrinsic material is disposed over the window layer and a dielectric layer disposed over the island region and at least the peripheral portion of said island shaped region whereby an opening is formed in the island shaped region. A dopant is diffused through the opening so as to form a PN junction that extends into the first layer of intrinsic material.

Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.

Abstract: An image sensor device is disclosed. The image sensor device comprises a substrate having a pixel region and at least one integrated circuit in the substrate of the pixel region. A photodiode is disposed on the substrate of the pixel region, comprising a lower electrode, a transparent upper electrode and a photoelectric conversion layer. The lower electrode is disposed on the substrate and is electrically connected to the integrated circuit. The photoelectric conversion layer is disposed on the lower electrode and has a submicron structure therein. The transparent upper electrode is disposed on the photoelectric conversion layer.

Abstract: A backlit photodiode array includes a semiconductor substrate having first and second main surfaces opposite to each other. A first dielectric layer is formed on the first main surface. First and second conductive vias are formed extending from the second main surface through the semiconductor substrate and the first dielectric layer. The first and second conductive vias are isolated from the semiconductor substrate by a second dielectric material. A first anode/cathode layer of a first conductivity is formed on the first dielectric layer and is electrically coupled to the first conductive via. An intrinsic semiconductor layer is formed on the first anode/cathode layer. A second anode/cathode layer of a second conductivity opposite to the first conductivity is formed on the intrinsic semiconductor layer and is electrically coupled to the second conductive via.

Abstract: An electronic device can include a gated diode, wherein the gated diode includes a junction diode structure including a junction. A first conductive member spaced apart from and adjacent to the junction can be connected to a first signal line. A second conductive member, spaced apart from and adjacent to the junction, can be both electrically connected to a second signal line and electrically insulated from the first conductive member. The junction diode structure can include a p-n or a p-i-n junction. A process for forming the electronic device is also described.

Abstract: A photoelectric conversion device including a photoelectric conversion part including a pair of electrodes and a photoelectric conversion layer provided between the pair of electrodes, wherein the photoelectric conversion part further includes a first charge blocking layer for reducing an injection of a charge into the photoelectric conversion layer from one of the pair of electrodes when a voltage is applied between the pair of electrodes, the first charge blocking layer being provided between the one of the pair of electrodes and the photoelectric conversion layer; and the first charge blocking layer has a relative dielectric constant larger than a relative dielectric constant of the photoelectric conversion layer.

Abstract: Embodiments relate to an image sensor. According to embodiments, an image sensor may include a circuitry, a first substrate, a photodiode, a metal interconnection, and an electrical junction region. The circuitry and the metal interconnection may be formed on and/or over the first substrate. The photodiode may contact the metal interconnection and may be formed on and/or over the first substrate. The circuitry may include an electrical junction region on and/or over the first substrate and a first conduction type region on and/or over the electrical junction region and connected to the metal interconnection. According to embodiments, an image sensor and a manufacturing method thereof may provide a vertical integration of circuitry and a photodiode.

Abstract: A photodetector includes a semiconductor substrate having first and second main surfaces opposite to each other. The photodetector includes at least one trench formed in the first main surface and a first anode/cathode region having a first conductivity formed proximate the first main surface and sidewalls of the at least one trench. The photodetector includes a second anode/cathode region proximate the second main surface. The second anode/cathode region has a second conductivity opposite the first conductivity. The at least one trench extends to the second main surface of the semiconductor substrate.

Abstract: A semiconductor element is formed on a first surface of the substrate. A resin layer is formed over a second surface of the substrate which is opposite to the first surface of the substrate and on a part of the side surface of the substrate. A step is formed on the side surface of the substrate. The width of the upper section of the substrate with a step is narrower than the lower section of the substrate with a step. Therefore, the substrate can also be a protrusion.

Abstract: A semiconductor photodetector (1) for detecting short duration laser light pulses of predetermined wavelength in a light signal (2) comprises a micro-resonator (3) of vertical Fabry-Perot construction having a Bragg mirror pair, namely, a front mirror (5) and a rear mirror (6) with an active region (8) located between the front and rear mirrors (5,6). An N-type substrate (11) supports the rear mirror (6). The light signal (2) is directed into the active region (8) through the front mirror (5) while a pump beam (17) is directed into the active region (8) at an end (18) thereof. The spacing between the front and rear mirrors (5,6) is such as to cause light of the predetermined wavelength to resonate between the mirrors (5,6).

Abstract: An image sensor includes a circuitry, a substrate, an electrical junction region, a high concentration first conduction type region, and a photodiode. The circuitry includes a transistor and is formed on and/or over the substrate. The electrical junction region is formed in one side of the transistor. The high concentration first conduction type region is formed on and/or over the electrical junction region. The photodiode is formed over the circuitry.

Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.

Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.

Abstract: A photo-detector, in which metal wiring for connecting electrodes is arranged on a planarized surface and thus the metal wiring arrangement is simplified, and a method of manufacturing the same are provided. The photo-detector includes a multi-layer compound semiconductor layer formed on a compound semiconductor substrate. A number of p-n junction diodes are arranged in a regular order in a selected region of the compound semiconductor layer, and an isolation region for individually isolated the p-n junction diodes is formed by implanting impurity ions in the multi-layer compound semiconductor layer. The isolation region and the surface of the compound semiconductor layer are positioned on the same level. The isolation region may be a Fe-impurity region.

Abstract: An ambient light sensor includes a substrate, a buffer layer formed on the substrate, an absorption layer formed on the buffer layer for absorbing the visible light, and a filter layer formed on the absorption layer for filtering infrared light and high-energy photon insensitive to human eye. The absorption layer is a PIN junction having a compositional graded intrinsic layer. The peak wavelength of responsivity spectrum of the ambient light sensor is very close to that of human eye.

Abstract: A pixel cell with controlled leakage is formed by modifying the location and gate profile of a high dynamic range (HDR) transistor. The HDR transistor may have the gate profile of a transfer gate or a reset gate. The HDR transistor may be located on a side of the photodiode that is the same, opposite to, or perpendicular to the transfer gate. The leakage through the HDR transistor may be controlled by modifying the photodiode implants around the transistor. The photodiode implants at the HDR transistor may be placed similarly to the implants at the transfer gate. However, when the photodiode implants are moved away from the HDR transistor, leakage is reduced. When the photodiode implants are moved farther under the HDR transistor, leakage is increased to the extent desirable. The leakage through the HDR transistor may also be controlled by applying a voltage across the transistor.