Pin Detector, Including Combinations With Non-light Responsive Active Devices Patents (Class 257/458)
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Patent number: 8816461Abstract: A dichromatic photodiode and method for dichromatic photodetection are disclosed. A wide bandgap junction comprises a lattice matched junction operable to detect a first light spectrum. A narrow bandgap junction is coupled to the wide bandgap junction, and comprises a photodiode structure. The narrow bandgap junction is operable to detect a second light spectrum.Type: GrantFiled: September 13, 2011Date of Patent: August 26, 2014Assignee: The Boeing CompanyInventors: Ping Yuan, Xiaogang Bai, Rengarajan Sudharsanan
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Patent number: 8810762Abstract: Disclosed is a display device that has a light detecting element (D1) disposed in a pixel region (1), an opening (a through hole) (19a) formed in an insulating film (19) that is disposed above the light detecting element (D1), and a transparent electrode (20) formed in the opening (19a), and that can reduce occurrence of leakage between the transparent electrode (20) and other wiring line (SL). Specifically disclosed is a display device that has an active matrix substrate (100) in which a first wiring line (SL) and a second wiring line (GL) are formed so as to cross each other, and a light detecting element (D1) disposed on a pixel region (1) in the active matrix substrate (100).Type: GrantFiled: May 27, 2011Date of Patent: August 19, 2014Assignee: Sharp Kabushiki KaishaInventors: Tatsuya Kawasaki, Hiroshi Aichi
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Patent number: 8809906Abstract: A semiconductor optical device includes a first clad layer, a second clad layer and an optical waveguide layer sandwiched between the first clad layer and the second clad layer, wherein the optical waveguide layer includes a first semiconductor layer, a second semiconductor layer disposed on the first semiconductor layer and extending in one direction, and a third semiconductor layer covering a top surface of the second semiconductor layer, and wherein the first semiconductor layer includes an n-type region disposed on one side of the second semiconductor layer, a p-type region disposed on the other side of the second semiconductor layer, and an i-type region disposed between the n-type region and the p-type region, and wherein the second semiconductor layer has a band gap narrower than band gaps of the first semiconductor layer and the third semiconductor layer.Type: GrantFiled: September 13, 2012Date of Patent: August 19, 2014Assignee: Fujitsu LimitedInventors: Lei Zhu, Shigeaki Sekiguchi, Shinsuke Tanaka, Kenichi Kawaguchi
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Publication number: 20140209986Abstract: A design structure embodied in a machine readable medium used in a design process includes a first dielectric layer disposed on an intermediary layer, a first conductive pad portion and a first interconnect portion disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer, a first capping layer disposed on the first interconnect portion and a portion of the first conductive pad portion, a second capping layer disposed on the first capping layer and a portion of the second dielectric layer, an n-type doped silicon layer disposed on the second capping layer and the first conductive pad portion, an intrinsic silicon layer disposed on the n-type doped silicon layer, and a p-type doped silicon layer disposed on the intrinsic silicon layer.Type: ApplicationFiled: March 31, 2014Publication date: July 31, 2014Applicant: International Business Machines CorporationInventors: Jeffrey P. Gambino, Robert K. Leidy, Richard J. Rassel
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Publication number: 20140210035Abstract: A silicon photomultiplier detector cell may include a photodiode region and a readout circuit region formed on a same substrate. The photodiode region may include a first semiconductor layer exposed on a surface of the silicon photomultiplier detector cell and doped with first type impurities; a second semiconductor layer doped with second type impurities; and/or a first epitaxial layer between the first semiconductor layer and the second semiconductor layer. The first epitaxial layer may contact the first semiconductor layer and the second semiconductor layer. The first epitaxial layer may be doped with the first type impurities at a concentration lower than a concentration of the first type impurities of the first semiconductor layer.Type: ApplicationFiled: September 4, 2013Publication date: July 31, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jae-chul PARK, Young KIM, Chae-hun LEE, Yong-woo JEON, Chang-jung KIM
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Patent number: 8772899Abstract: Methods and apparatus for a backside illuminated (BSI) image sensor device are disclosed. A BSI sensor device is formed on a substrate comprising a photosensitive diode. The substrate may be thinned at the backside, then a B doped Epi-Si(Ge) layer may be formed on the backside surface of the substrate. Additional layers may be formed on the B doped Epi-Si(Ge) layer, such as a metal shield layer, a dielectric layer, a micro-lens, and a color filter.Type: GrantFiled: March 1, 2012Date of Patent: July 8, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shiu-Ko JangJian, Min Hao Hong, Kei-Wei Chen, Ying-Lang Wang
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Patent number: 8754495Abstract: A method of fabricating a photodiode array having different photodiode structures includes providing a semiconductor substrate having first and second diode areas including a bottom substrate portion doped with a first doping type, an intrinsic layer, and a top silicon layer doped with a second doping type. The second diode areas are implanted with the second doping type. A dopant concentration in the surface of the second diode areas is at least three times higher than in the first diode areas. The top silicon layer is thermally oxidized to form a thermal silicon oxide layer to provide a bottom Anti-Reflective Coating (ARC) layer. The second diode areas grow thermal silicon oxide thicker as compared to the first diode areas. A top ARC layer is deposited on the bottom ARC layer. First PDs are provided in the first diode areas and second PDs provided in the second diode areas.Type: GrantFiled: April 26, 2013Date of Patent: June 17, 2014Assignee: Texas Instruments IncorporatedInventors: Hiroyuki Tomomatsu, Motoaki Kusamaki, Kohichi Kubota, Yuta Masuda, Akihiro Sugihara, Hiroshi Sera Kitada, Takeshi Konno
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Patent number: 8742413Abstract: In a photosensor and a method of manufacturing the same, the photosensor comprises: an intrinsic silicon layer formed on a substrate; a P-type doped region formed in a same plane with the intrinsic silicon layer; and an oxide semiconductor layer formed on or under the intrinsic silicon layer, and overlapping an entire region of the intrinsic silicon layer.Type: GrantFiled: September 22, 2011Date of Patent: June 3, 2014Assignee: Samsung Display Co., Ltd.Inventors: Jae-Hwan Oh, Won-Kyu Lee, Seong-Hyun Jin, Young-Jin Chang, Jae-Beom Choi
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Patent number: 8742523Abstract: A semiconductor device contains a photodiode which has a plurality of p-n junctions disposed in a stack. Two contact structures on the semiconductor device are connected across at least one of the junctions to allow electrical connection to an external detection circuit, so that signal current from incident light on the photodiode which generates electron-hole pairs across the connected junction may be sensed by the external detection circuit. At least one of the junctions is electrically shorted at the semiconductor device, so that signal current from the shorted junction may not be sensed by the external detection circuit.Type: GrantFiled: February 15, 2013Date of Patent: June 3, 2014Assignee: Texas Instruments IncorporatedInventors: Henry Litzmann Edwards, Dimitar Trifonov Trifonov
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Patent number: 8734008Abstract: An active sensor apparatus includes an array of sensor elements arranged in a plurality of columns and rows of sensor elements. The sensor apparatus includes a plurality of column and row thin film transistor switches for selectively activating the sensor elements, and a plurality of column and row thin film diodes for selectively accessing the sensor elements to obtain information from the sensor elements. The thin film transistor switches and thin film diodes are formed on a common substrate.Type: GrantFiled: November 3, 2009Date of Patent: May 27, 2014Assignee: Next Biometrics ASInventor: Matias N. Troccoli
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Publication number: 20140138789Abstract: According to one aspect of the invention, there is provided a pin photodetector comprising a dopant diffusion barrier layer disposed within an active light absorbing region of the pin photodetector.Type: ApplicationFiled: October 8, 2013Publication date: May 22, 2014Applicant: Agency for Science, Technology and ResearchInventors: Andy Eu-Jin Lim, Tsung-Yang Liow, Patrick Guo-Qiang Lo
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Patent number: 8716712Abstract: An object of the invention is to improve the accuracy of light detection in a photosensor, and to increase the light-receiving area of the photosensor. The photosensor includes: a light-receiving element which converts light into an electric signal; a first transistor which transfers the electric signal; and a second transistor which amplifies the electric signal. The light-receiving element includes a silicon semiconductor, and the first transistor includes an oxide semiconductor. The light-receiving element is a lateral-junction photodiode, and an n-region or a p-region included in the light-receiving element overlaps with the first transistor.Type: GrantFiled: February 15, 2011Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Munehiro Kozuma, Yoshiyuki Kurokawa
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Patent number: 8704326Abstract: A thin-film photoelectric conversion device includes a crystalline germanium photoelectric conversion layer having improved open circuit voltage, fill factor, and photoelectric conversion efficiency for light having a longer wavelength. The photoelectric conversion device comprises a first electrode layer, one or more photoelectric conversion units, and a second electrode layer sequentially stacked on a substrate, wherein each of the photoelectric conversion units comprises a photoelectric conversion layer arranged between a p-type semiconductor layer and an n-type semiconductor layer. At least one of the photoelectric conversion units includes a crystalline germanium photoelectric conversion layer comprising a crystalline germanium semiconductor that is substantially intrinsic or weak n-type and is essentially free of silicon.Type: GrantFiled: January 27, 2011Date of Patent: April 22, 2014Assignee: Kaneka CorporationInventors: Naoki Kadota, Toshiaki Sasaki
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Patent number: 8698263Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.Type: GrantFiled: July 6, 2012Date of Patent: April 15, 2014Assignee: Wisconsin Alumni Research FoundationInventors: Zhenqiang Ma, Max G. Lagally, Hao-Chih Yuan
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Patent number: 8692295Abstract: A double heterojunction bipolar transistor on a substrate comprises a collector formed of InGaAsP, a base in contact with the collector, an emitter in contact with the base, and electrodes forming separate electrical contacts with each of the collector, base, and emitter, respectively. A device incorporates this transistor and an opto-electronic device optically coupled with the collector of the transistor to interact with light transmitted therethrough.Type: GrantFiled: September 25, 2009Date of Patent: April 8, 2014Assignee: HRL Laboratories, LLCInventors: Rajesh D. Rajavel, Stephen Thomas, III
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Publication number: 20140077327Abstract: Photodetectors operable to achieve multiplication of photogenerated carriers at ultralow voltages. Embodiments include a first p-i-n semiconductor junction combined with a second p-i-n semiconductor junction to form a monolithic photodetector having at least three terminals. The two p-i-n structures may share either the p-type region or the n-type region as a first terminal. Regions of the two p-i-n structures doped complementary to that of the shared terminal form second and third terminals so that the first and second p-i-n structures are operable in parallel. A multiplication region of the first p-i-n structure is to multiply charge carriers photogenerated within an absorption region of the second p-i-n structure with voltage drops between the shared first terminal and each of the second and third terminals being noncumulative.Type: ApplicationFiled: May 22, 2013Publication date: March 20, 2014Inventors: Yun-chung N. NA, Yimin KANG
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Patent number: 8669632Abstract: A solid-state imaging device and a method for manufacturing the same are provided. The solid-state imaging device includes a structure that provides a high sensitivity and high resolution without variations in spectral sensitivity and without halation of colors, and prevents light from penetrating into an adjacent pixel portion. A plurality of photodiodes are formed inside a semiconductor substrate. A wiring layer includes a laminated structure of an insulating film and a wire and is formed on the semiconductor substrate. A plurality of color filters are formed individually in a manner corresponding to the plurality of photodiodes above the wiring layer. A planarized film and a microlens are sequentially laminated on each of the color filters. In the solid-state imaging device, each of the color filters has an refraction index higher than that of the planarized film and has, in a Z-axis direction, an upper surface in a concave shape.Type: GrantFiled: April 17, 2012Date of Patent: March 11, 2014Assignee: Panasonic CorporationInventors: Tetsuya Nakamura, Motonari Katsuno, Masayuki Takase, Masao Kataoka
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Publication number: 20140055838Abstract: A photonic device is provided. The photonic device includes: a semiconductor layer including first and second regions; an insulating layer covering the semiconductor layer; and first and second plugs extending to pass through the insulating layer and electrically connected to the corresponding first and second regions. The first plug is in a rectifying contact with the first region, and the second plug is in an ohmic contact with the second region.Type: ApplicationFiled: June 21, 2013Publication date: February 27, 2014Inventors: Kwang-hyun LEE, Dong-jae SHIN, Ho-chul JI
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Patent number: 8659109Abstract: An image sensor including a plurality of pixels each including a charge collection region including an N-type region bounded by P-type regions and having an overlying P-type layer; and an insulated gate electrode positioned over the P-type layer and arranged to receive a gate voltage for conveying charges stored in the charge collection region through the P-type layer.Type: GrantFiled: January 4, 2011Date of Patent: February 25, 2014Assignee: STMicroelectronics (Crolles 2) SASInventor: François Roy
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Patent number: 8653436Abstract: A pinned photodiode structure with peninsula-shaped transfer gate which decrease the occurrence of a potential barrier between the photodiode and the floating drain, prevents loss of full well capacity (FWC) and decreases occurrences of image lag.Type: GrantFiled: December 17, 2009Date of Patent: February 18, 2014Assignee: OmniVision Technologies, Inc.Inventor: Hisanori Ihara
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Patent number: 8637800Abstract: An image sensor architecture provides an SNR in excess of 100 dB, without requiring the use of a mechanical shutter. The circuit components for an active pixel sensor array are separated and arranged vertically in at least two different layers in a hybrid chip structure. The top layer is preferably manufactured using a low-noise PMOS manufacturing process, and includes the photodiode and amplifier circuitry for each pixel. A bottom layer is preferably manufactured using a standard CMOS process, and includes the NMOS pixel circuit components and any digital circuitry required for signal processing. By forming the top layer in a PMOS process to optimized for forming low-noise pixels, the pixel performance can be greatly improved, compared to using CMOS. In addition, since the digital circuitry is now separated from the imaging circuitry, it can be formed using a standard CMOS process, which has been optimized for circuit speed and manufacturing cost.Type: GrantFiled: April 19, 2011Date of Patent: January 28, 2014Assignee: AltaSens, Inc.Inventor: Lester Kozlowski
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Patent number: 8633513Abstract: Structures and method for reducing junction leakage in semiconductor devices. The die can include a substrate having a cut edge, a first region of first conductivity type within the substrate and a region of a second conductivity type within the substrate and in contact with the first region forming a junction. At least one semiconductor device is on the substrate. A second region of the first conductivity type is between the plurality of semiconductor devices and the cut edge within the region of the second conductivity type, and extending to the junction. The second region of the first conductivity type can isolate the at least one semiconductor device from leakage pathways created by saw damage at the junction along the cut edge.Type: GrantFiled: November 26, 2008Date of Patent: January 21, 2014Assignee: Aptina Imaging CorporationInventors: Daniel Doyle, Jeffrey Gleason
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Publication number: 20140015087Abstract: A photoelectric device is disclosed. The photoelectric device includes a semiconductor substrate, first and second semiconductor stacks having opposite conductive types and alternately arranged on a first surface of the semiconductor substrate, and a gap insulation layer formed between the first and second semiconductor stacks. An undercut may be formed in the gap insulation layer. A method of manufacturing a photoelectric device is also disclosed.Type: ApplicationFiled: March 15, 2013Publication date: January 16, 2014Applicant: SAMSUNG SDI CO., LTD.Inventors: June-Hyuk JUNG, Young-Soo KIM, Sung-Chul LEE, Jae-Ho SHIN, Dong-Hun LEE
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Patent number: 8629526Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type and a first electrode. The second regions are provided separately on a first major surface side of the first layer. The third region is provided on the first major surface side of the first layer so as to surround the second regions. The first electrode is provided on the first layer and the second regions. The first layer has a first portion and a second portion. The second portion has a lower resistivity than the first portion. The second portion is provided between the second regions and between the first portion and the first major surface and is provided outside the third region and between the first portion and the first major surface.Type: GrantFiled: September 15, 2011Date of Patent: January 14, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Tsuyoshi Ohta, Masatoshi Arai, Miwako Suzuki
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Patent number: 8628995Abstract: A tandem thin-film silicon solar cell comprises a transparent substrate, a first unit cell positioned on the transparent substrate, the first unit cell comprising a p-type window layer, an i-type absorber layer and an n-type layer, an intermediate reflection layer positioned on the first unit cell, the intermediate reflection layer including a hydrogenated n-type microcrystalline silicon oxide of which the oxygen concentration is profiled to be gradually increased and a second unit cell positioned on the intermediate reflection layer, the second unit cell comprising a p-type window layer, an i-type absorber layer and an n-type layer.Type: GrantFiled: November 30, 2011Date of Patent: January 14, 2014Assignee: Intellectual Discovery Co., Ltd.Inventor: Seung-Yeop Myong
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Patent number: 8598673Abstract: A quad photoreceiver includes a low capacitance quad InGaAs p-i-n photodiode structure formed on an InP (100) substrate. The photodiode includes a substrate providing a buffer layer having a metal contact on its bottom portion serving as a common cathode for receiving a bias voltage, and successive layers deposited on its top portion, the first layer being drift layer, the second being an absorption layer, the third being a cap layer divided into four quarter pie shaped sections spaced apart, with metal contacts being deposited on outermost top portions of each section to provide output terminals, the top portions being active regions for detecting light. Four transimpedance amplifiers have input terminals electrically connected to individual output terminals of each p-i-n photodiode.Type: GrantFiled: August 23, 2010Date of Patent: December 3, 2013Assignee: Discovery Semiconductors, Inc.Inventors: Abhay M. Joshi, Shubhashish Datta
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Publication number: 20130313579Abstract: Detectors based on such Ge(Sn) alloys of the formula Ge1-xSnx (e.g., 0<x<0.01) have increased responsivity while keeping alloy scattering to a minimum. Such small amounts of Sn are also useful for improving the performance of the recently demonstrated Ge-on-Si laser structures, since the addition of Sn monotonically reduces the separation between the direct and indirect minima in the conduction band of Ge. Thus, provided herein are Ge(Sn) alloys of the formula Ge1xSnx, wherein x is less than 0.01, wherein the alloy is optionally n-doped or p-doped; and assemblies and photodiodes comprising the same, and methods for their formation.Type: ApplicationFiled: November 18, 2011Publication date: November 28, 2013Inventors: John Kouvetakis, Richard Beeler, Jose Menendez, Radek Roucka
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Patent number: 8592298Abstract: A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming a growth mask coupled to the n-type GaN epitaxial layer. The method further includes patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer, and forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer. The at least one p-type GaN epitaxial structure comprises at least one portion of an edge termination structure. The method additionally includes forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate.Type: GrantFiled: December 22, 2011Date of Patent: November 26, 2013Assignee: Avogy, Inc.Inventors: Linda Romano, David P. Bour, Andrew Edwards, Hui Nie, Isik C. Kizilyalli, Richard J. Brown, Thomas R. Prunty
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Patent number: 8592936Abstract: A photoelectric conversion device includes: a first substrate of which end portions are cut off so as to slope or with a groove shape; a photodiode and an amplifier circuit over the first substrate; a first electrode electrically connected to the photodiode and provided over one end portion of the first substrate; a second electrode electrically connected to the amplifier circuit and provided over an another end portion of the first substrate; and a second substrate having third and fourth electrodes thereon. The first and second electrodes are attached to the third and fourth electrodes, respectively, with a conductive material provided not only at the surfaces of the first, second, third, and fourth electrodes facing each other but also at the side surfaces of the first and second electrodes to increase the adhesiveness between a photoelectric conversion device and a member on which the photoelectric conversion device is mounted.Type: GrantFiled: June 21, 2012Date of Patent: November 26, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara
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Patent number: 8592881Abstract: An organic light emitting element includes an organic light emitting diode formed on a substrate, coupled to a transistor including a gate, a source and a drain and including a first electrode, an organic thin film layer and a second electrode; a photo diode formed on the substrate and having a semiconductor layer including a high-concentration P doping region, a low-concentration P doping region, an intrinsic region and a high-concentration N doping region; and a controller that controls luminance of light emitted from the organic light emitting diode, to a constant level by controlling a voltage applied to the first electrode and the second electrode according to the voltage outputted from the photo diode.Type: GrantFiled: April 7, 2008Date of Patent: November 26, 2013Assignee: Samsung Display Co., Ltd.Inventors: Yun-gyu Lee, Byoung-deog Choi, Hye-hyang Park, Ki-ju Im
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Publication number: 20130299936Abstract: An avalanche photodiode includes a substrate; an avalanche multiplying layer, a p-type electric field controlling layer, a light-absorbing layer, and a window layer sequentially laminated on the substrate. A p-type region is present in parts of the window layer and the light-absorbing layer. Carbon is the dopant of the electric field controlling layer. Zn is the dopant of the p-type region. A bottom face of the p-type region is closer to the substrate than is an interface between the light-absorbing layer and the window layer.Type: ApplicationFiled: January 21, 2013Publication date: November 14, 2013Applicant: Mitsubishi Electric CorporationInventors: Ryota Takemura, Eitaro Ishimura
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Patent number: 8575713Abstract: A semiconductor device 700 includes a substrate and an optical sensor unit 700 formed on the substrate for sensing light and for generating a sensing signal, the optical sensor unit 700 including a first thin film diode 701A for detection of light in a first wavelength range, a second thin film diode 701B detecting light in a second wavelength range that contains wavelengths longer than the longest wavelength in the first wavelength range. The first thin film diode 701A and the second thin film diode 701B are connected in parallel to each other. The sensing signal is generated based on the output from one of the first thin film diode 701A and the second thin film diode 701B. By this means, the wavelength range that can be detected by the optical sensor unit can be expanded and the sensing sensitivity can be increased.Type: GrantFiled: February 12, 2010Date of Patent: November 5, 2013Assignee: Sharp Kabushiki KaishaInventors: Naoki Makita, Masahiro Fujiwara
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Patent number: 8569672Abstract: Disclosed are a pinned photodiode having and electrically controllable pinning layer and an image sensor including the pinned photodiode. A predetermined voltage is applied to the pinning layer for the depletion duration of the photodiode in the image sensor, so that stable surface pinning is acquired and the uniform surface pinning is achieved between pixels.Type: GrantFiled: August 19, 2009Date of Patent: October 29, 2013Assignee: Intellectual Ventures II LLCInventor: Man Lyun Ha
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Patent number: 8558341Abstract: An object is to provide a photoelectric conversion element with high conversion efficiency. In a photoelectric conversion element with a fine periodic structure on a light-receiving surface side, focus is given to the traveling direction of light that is reflected off another surface. The photoelectric conversion element may be given a structure in which a textured structure that reflects light to the other surface is provided, and light that travels from the light-receiving surface side to the other surface side is reflected so that a component that travels along the photoelectric conversion layer increases. By the distance traveled by the reflected light inside the photoelectric conversion layer increasing, the light that enters the photoelectric conversion element is more easily absorbed by the photoelectric conversion layer and less easily released from the light-receiving surface side, and a photoelectric conversion element with high conversion efficiency can be provided.Type: GrantFiled: December 13, 2011Date of Patent: October 15, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Koichiro Tanaka, Fumito Isaka, Jiro Nishida
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Patent number: 8558335Abstract: A solid-state imaging device includes a photoelectric conversion unit that is formed on a semiconductor substrate, a reading unit that reads signal charges of the photoelectric conversion unit, a gate insulating film and an electrode disposed thereon that constitute the reading unit, a light shielding film that covers the electrode, and an antireflection film that is formed on the photoelectric conversion unit and is constituted by films of four or more layers. The film of the lower layer of the antireflection film is also used as a stopper film during patterning, and a gap between the end of the light shielding film and the semiconductor substrate which is defined by interposing a plurality of films of the lower layer of the antireflection film is set so as to be smaller than the thickness of the gate insulating film.Type: GrantFiled: November 1, 2011Date of Patent: October 15, 2013Assignee: Sony CorporationInventor: Mitsuhiro Nagano
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Patent number: 8552466Abstract: A photodiode element includes a first layer of a first diffusion type and a second layer. The second layer defines a charge-collecting area. The charge-collecting area includes an active region of a second diffusion type and an inactive region. The active region surrounds the inactive region. The photodiode element also includes an intrinsic semiconductor layer between the first layer and the second layer.Type: GrantFiled: May 4, 2009Date of Patent: October 8, 2013Assignee: General Electric CompanyInventors: Abdelaziz Ikhlef, Wen Li, Jeffrey Alan Kautzer
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Patent number: 8546899Abstract: A light receiving element includes a waveguide that includes a waveguide core, a multi-mode interference waveguide that has a width larger than a width of the waveguide, the multi-mode interference waveguide receiving a first light from the waveguide core at a first end, and a photodetection portion that includes a first semiconductor layer and an absorption layer disposed on the first semiconductor layer, the first semiconductor layer including at least one layer and receiving a second light from the multi-mode interference waveguide at a second end, the absorption layer being disposed above the first semiconductor layer and absorbing the second light. A distance from the first end of the multi-mode interference waveguide to the second end of the photodetection portion is longer than 70% of a first length and shorter than 100% of the first length, the first length being a length where self-imaging occurs in the multi-mode interference waveguide.Type: GrantFiled: February 21, 2012Date of Patent: October 1, 2013Assignee: Fujitsu LimitedInventor: Kazumasa Takabayashi
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Patent number: 8536673Abstract: Provided is a light receiving circuit for detecting a change in amount of light, in which an input circuit at a subsequent stage is compact and inexpensive and current consumption is low. The light receiving circuit includes: a photoelectric conversion element for supplying a current corresponding to an amount of incident light; an N-channel MOS transistor including a drain supplied with the current from the photoelectric conversion element; and a control circuit for controlling a gate voltage of the NMOS transistor via a low pass filter so that a drain voltage of the N-channel MOS transistor becomes a desired voltage.Type: GrantFiled: April 22, 2011Date of Patent: September 17, 2013Assignee: Seiko Instruments Inc.Inventors: Fumiyasu Utsunomiya, Taro Yamasaki, Isamu Fujii
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Patent number: 8513759Abstract: A photodiode array for near infrared rays that includes photodiodes having a uniform size and a uniform shape, has high selectivity for the wavelength of received light between the photodiodes, and has high sensitivity with the aid of a high-quality semiconducting crystal containing a large amount of nitrogen, a method for manufacturing the photodiode array, and an optical measurement system are provided. The steps of forming a mask layer 2 having a plurality of openings on a first-conductive-type or semi-insulating semiconductor substrate 1, the openings being arranged in one dimension or two dimensions, and selectively growing a plurality of semiconductor layers 3a, 3b, and 3c including an absorption layer 3b in the openings are included.Type: GrantFiled: October 18, 2010Date of Patent: August 20, 2013Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yasuhiro Iguchi, Hiroshi Inada, Youichi Nagai
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Patent number: 8507962Abstract: Pixel sensor cells, e.g., CMOS optical imagers, methods of manufacturing and design structures are provided with isolation structures that prevent carrier drift to diffusion regions. The pixel sensor cell includes a photosensitive region and a gate adjacent to the photosensitive region. The pixel sensor cell further includes a diffusion region adjacent to the gate. The pixel sensor cell further includes an isolation region located below a channel region of the gate and about the photosensitive region, which prevents electrons collected in the photosensitive region to drift to the diffusion region.Type: GrantFiled: October 4, 2010Date of Patent: August 13, 2013Assignee: International Business Machines CorporationInventors: Brent A. Anderson, Mark D. Jaffe
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Patent number: 8497562Abstract: A solid-state image pickup device is provided which includes a substrate; a transistor formed on the substrate; a photoelectric conversion element including a first electrode connected to a drain or a source of the transistor, a semiconductor layer stacked on the first electrode, and a second electrode stacked on the semiconductor layer; an insulating layer disposed on the second electrode; and a bias line formed on the insulating layer to be connected to the second electrode, in which the insulating layer contains at least an inorganic insulating film, and the bias line is connected to the second electrode via a contact hole formed in the insulating layer, and a side surface of the semiconductor layer is in contact with the inorganic insulating film.Type: GrantFiled: July 11, 2011Date of Patent: July 30, 2013Assignee: Epson Imaging Devices CorporationInventors: Yukimasa Ishida, Takashi Sato, Yasushi Yamazaki
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Patent number: 8487380Abstract: One or more embodiments relate to an apparatus comprising: a first transistor including a fin; and a second transistor including a fin, the fin of the first transistor having a lower charge carrier mobility than the fin of the second transistor.Type: GrantFiled: May 16, 2012Date of Patent: July 16, 2013Assignee: Infineon Technologies AGInventors: Joerg Berthold, Christian Pacha, Klaus Von Arnim
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Patent number: 8481909Abstract: A detection apparatus includes conversion elements and switch elements disposed below the conversion elements; insulating layers are disposed between the conversion elements and switch elements. Each conversion element includes a first electrode corresponding to a switch element. A second electrode extends over the plurality of conversion elements; and a semiconductor layer formed between the first electrodes and the second electrode extends over the plurality of conversion elements. Insulating layers include first regions located immediately below the first electrodes and a second region located between the first regions. A third electrode is disposed in the second region and between the insulating layers. The third electrode is supplied with a potential that sets a potential of a part where the second region is in contact with the semiconductor layer to a value between a potential of the second electrode and a potential of the first electrode.Type: GrantFiled: November 14, 2011Date of Patent: July 9, 2013Assignee: Canon Kabushiki KaishaInventors: Minoru Watanabe, Chiori Mochizuki, Takamasa Ishii, Jun Kawanabe, Kentaro Fujiyoshi, Hiroshi Wayama
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Patent number: 8476728Abstract: A parasitic PIN device in a BiCMOS process is disclosed. The device is formed on a silicon substrate, in which an active region is isolated by shallow trenches. The device includes: an N-type region, consisting of N-type pseudo buried layers respectively formed at the bottom of shallow trench isolation oxide layers and extending into the active region; an I-type region, consisting of an N-type collector implantation region formed in the active region and contacting with the N-type region; a P-type region, consisting of a P-doped intrinsic base epitaxial layer on a surface of the active region and contacting with the I-type region. The device of the present invention has a low insertion loss and a high isolation. A manufacturing method of parasitic PIN device in compatible with existing BiCMOS process is also disclosed.Type: GrantFiled: August 25, 2011Date of Patent: July 2, 2013Assignee: Shanghai Hua Hong NEC Electronics Co., Ltd.Inventors: Wensheng Qian, Ju Hu
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Patent number: 8471352Abstract: Electrical pumping of photonic crystal (PC) nanocavities using a lateral p-i-n junction is described. Ion implantation doping can be used to form the junction, which under forward bias pumps a gallium arsenide photonic crystal nanocavity with indium arsenide quantum dots. Efficient cavity-coupled electroluminescence is demonstrated in a first experimental device. Electrically pumped lasing is demonstrated in a second experimental device. This approach provides several significant advantages. Ease of fabrication is improved because difficult timed etch steps are not required. Any kind of PC design can be employed. Current flow can be lithographically controlled to focus current flow to the active region of the device, thereby improving efficiency, reducing resistance, improving speed, and reducing threshold. Insulating substrates can be employed, which facilitates inclusion of these devices in photonic integrated circuits.Type: GrantFiled: April 5, 2011Date of Patent: June 25, 2013Assignee: The Board of Trustees of the Leland Stanford Junior UniversityInventors: Bryan Ellis, Jelena Vuckovic, Ilya Fushman
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Patent number: 8466477Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.Type: GrantFiled: February 16, 2012Date of Patent: June 18, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Koichi Tachibana, Chie Hongo, Hajime Nago, Shinya Nunoue
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Publication number: 20130127005Abstract: A photovoltaic device and a method of manufacturing the same are disclosed. In one embodiment, the device includes i) a semiconductor substrate, ii) a first conductive semiconductor layer formed on a first region of the semiconductor substrate and iii) a first transparent conductive layer formed on the first conductive semiconductor layer. The device may further include i) a second conductive semiconductor layer formed on a second region of the semiconductor substrate, ii) a second transparent conductive layer formed on the second conductive semiconductor layer and iii) a gap passivation layer interposed between i) the first layers and ii) the second layers, wherein the gap passivation layer has a thickness greater than the sum of the thicknesses of the first layers.Type: ApplicationFiled: July 30, 2012Publication date: May 23, 2013Applicant: Samsung SDI Co., Ltd.Inventors: Cho-Young Lee, Min-Seok Oh, Yun-Seok Lee, Nam-Kyu Song
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Publication number: 20130113066Abstract: An image sensor device comprising at least one transistor lying on a semiconductor-on-insulator substrate, the substrate comprising a thin semi-conducting layer wherein a channel area of said transistor is made, an insulating layer separating the thin semi-conducting layer with a semi-conducting support layer, the device being characterized in that the semi-conducting support layer comprises at least one photosensitive area including at least one P-doped region and at least one N-doped region forming a junction provided facing the channel area of said transistor.Type: ApplicationFiled: October 26, 2012Publication date: May 9, 2013Applicant: Commissariat a L'Energie Atomique et Aux Energies AlternativesInventor: Commissariat A L'Energie Atomique et Aux Energies Alternatives
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Publication number: 20130068936Abstract: A sub-mount having a photodiode region, includes a photodiode which has a first conductivity-type layer arranged in a surface portion of the sub-mount of the photodiode region to form a light-receiving surface and a second conductivity-type region arranged below the first conductivity-type layer and is configured to receive at the light-receiving surface a light emitted from a light-emitting element and convert the light into a photocurrent. A peak light-receiving wavelength at which the photocurrent of the photodiode becomes its maximum value is more than or equal to a minimum emission wavelength of the light-emitting element and less than or equal to a maximum emission wavelength of the light-emitting element.Type: ApplicationFiled: September 13, 2012Publication date: March 21, 2013Applicant: ROHM CO., LTD.Inventor: Yoshiteru NAGAI
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Publication number: 20130068954Abstract: Disclosed is a non-planar energy transducer, including a substrate and a switching device disposed thereon. An elastomer having a periodic structure is disposed on the switching device. A bottom electrode is conformally disposed on the elastomer to electrically connect to the switching device. An energy conversion layer is conformally disposed on the bottom electrode, and a top electrode is conformally disposed on the energy conversion layer, wherein the top electrode connects to a positive voltage or a negative voltage.Type: ApplicationFiled: December 15, 2011Publication date: March 21, 2013Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventor: Isaac Wing-Tak CHAN