Pin Detector, Including Combinations With Non-light Responsive Active Devices Patents (Class 257/458)
  • Patent number: 7863516
    Abstract: A monolithic semiconductor photovoltaic solar cell comprising a plurality of subcells disposed in series on an electrically conductive substrate. At least one subcell of the plurality of subcells includes an epitaxially grown self-assembled quantum dot material. The subcells are electrically connected via tunnel junctions. Each of the subcells has an effective bandgap energy. The subcells are disposed in order of increasing effective bangap energy, with the subcell having the lowest effective bandgap energy being closest to the substrate. In certain cases, each subcell is designed to absorb a substantially same amount of solar photons.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: January 4, 2011
    Assignee: Cyrium Technologies Incorporated
    Inventor: Simon Fafard
  • Publication number: 20100327381
    Abstract: Sidewall photodetectors for integrated photonic devices and their method of manufacture. An embodiment includes a p-i-n film stack formed on a sidewall of a substrate semiconductor feature having sufficiently large area to accommodate the spot size of a multi-mode fiber. An embodiment includes a first sidewall photodetector coupled to a second sidewall photodetector by a waveguide, the first sidewall photodetector having an i-layer tuned to absorb a first wavelength of light incident to the first sidewall and pass a second wavelength of light to the second sidewall photodetector having an i-layer tuned to absorb the second wavelength.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventors: Michael T. Morse, Mario J. Paniccia, Olufemi I. Dosunmu
  • Publication number: 20100320387
    Abstract: A photo-detector comprising: a p-doped semiconductor layer; an n-doped semiconductor layer juxtaposed with the p-doped semiconductor layer; one of an intrinsic amorphous silicon layer sandwiched between the p-doped semiconductor layer and the n-doped semiconductor layer and a depletion region formed between the p-doped semiconductor layer juxtaposed with the n-doped semiconductor layer; a plurality of mesoscopic sized particles within the one of the intrinsic amorphous silicon layer sandwiched between the p-doped semiconductor layer and the n-doped semiconductor layer and the depletion region formed between the p-doped semiconductor layer juxtaposed with the n-doped semiconductor layer. A source of pumping light is provided and arranged to be received at the mesoscopic sized particles thereby generating free carriers confined in the mesoscopic sized particles. Received light of a target waveband releases the carriers from confinement which is detected as a flow of current.
    Type: Application
    Filed: August 5, 2008
    Publication date: December 23, 2010
    Applicant: D.C. SIRICA LTD.
    Inventors: Valery Garber, Emamuel Baskin, Alex Fayer
  • Publication number: 20100308429
    Abstract: Flexible lateral p-i-n (“PIN”) diodes, arrays of flexible PIN diodes and imaging devices incorporating arrays of PIN diodes are provided. The flexible lateral PIN diodes are fabricated from thin, flexible layers of single-crystalline semiconductor. A plurality of the PIN diodes can be patterned into a single semiconductor layer to provide a flexible photodetector array that can be formed into a three-dimensional imaging device.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 9, 2010
    Applicant: WISCONSIN ALUMNI RESEARCH FOUNDATION
    Inventors: Zhenqiang Ma, Max G. Lagally, Hao-Chih Yuan
  • Publication number: 20100308345
    Abstract: A light sensing system comprises a first light sensor (21?), a second light sensor (21) and a first light shielding material (24) disposed over the first light sensor (21?) but not over the second light sensor (21) so as to block ambient light from being incident on the first light sensor (21). A first electrically conductive material (23a) is disposed between the first light shielding layer (24) and the first light sensor and a second electrically conductive material (23b) is disposed over the second light sensor. The second electrically conductive material (23b) is at least partially light-transmissive. Providing the first electrically conductive material (23a) between the first light shielding layer (24) and the first light sensor eliminates any parasitic capacitance that would otherwise be set up by the light shielding layer (24) (which is typically a metallic layer).
    Type: Application
    Filed: February 6, 2008
    Publication date: December 9, 2010
    Inventors: Christopher James Brown, Benjamin James Hadwen
  • Patent number: 7847364
    Abstract: Apparatus including flexible line extending along a length. Flexible line includes first charge carrier-transporting body, photosensitive body over first charge carrier-transporting body, and second charge carrier-transporting body over photosensitive body. Each of first and second charge carrier-transporting bodies and photosensitive body extend along at least part of length of flexible line. Photosensitive body is capable of near-infrared or visible light-induced generation of charge carrier pairs. Second charge carrier-transporting body is at least semi-transparent to near-infrared light or visible light.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: December 7, 2010
    Assignee: Alcatel-Lucent USA Inc.
    Inventors: Gang Chen, Ashok J. Maliakal, Oleg Mitrofanov, Ronen Rapaport, Nikolai Zhitenev
  • Publication number: 20100301441
    Abstract: A photodetector with an improved electrostatic discharge damage threshold is disclosed, suitable for applications in telecommunication systems operating at elevated data rates. The photodetector may be a PIN or an APD fabricated in the InP compound semiconductor system. The increased ESD damage threshold is achieved by reducing the ESD induced current density in the photodetector by a suitable widening of the contact at a critical location, increasing the series resistance and promoting lateral current spreading by means of a current spreading layer.
    Type: Application
    Filed: June 1, 2009
    Publication date: December 2, 2010
    Inventors: Zhong PAN, David Venables
  • Publication number: 20100301440
    Abstract: A mesa photodiode which includes a mesa, the sidewall of the mesa is a surface that is inclined in the direction in which the bottom of the mesa becomes wider. At least the sidewall of the mesa is covered with a semiconductor layer of a first conductivity type, a second conductivity type, a semi-insulating type, or an undoped type. The semiconductor layer is grown on at least the sidewall of the mesa. The inclined angle of the inclined surface of the mesa at the upper end portion is smaller than the inclined angle of the inclined surface of the mesa at the lower end portion.
    Type: Application
    Filed: April 20, 2010
    Publication date: December 2, 2010
    Applicant: NEC ELECTRONICS CORPORATION
    Inventors: Isao Watanabe, Tomoaki Koi
  • Publication number: 20100295145
    Abstract: A light-absorbing layer is composed of a compound-semiconductor film of charcopyrite structure, a surface layer is disposed on the light-absorbing layer, the surface layer having a higher band gap energy than the compound-semiconductor film, an upper electrode layer is disposed on the surface layer, and a lower electrode layer is disposed on a backside of the light-absorbing layer in opposition to the upper electrode layer, the upper electrode layer and the lower electrode layer having a reverse bias voltage applied in between to detect electric charges produced by photoelectric conversion in the compound-semiconductor film, as electric charges due to photoelectric conversion are multiplied by impact ionization, while the multiplication by impact ionization of electric charges is induced by application of a high-intensity electric field to a semiconductor of charcopyrite structure, allowing for an improved dark-current property, and an enhanced efficiency even in detection of low illumination intensities, wit
    Type: Application
    Filed: May 18, 2010
    Publication date: November 25, 2010
    Applicant: Rohm Co., Ltd.
    Inventors: Kenichi Miyazaki, Osamu Matsushima
  • Publication number: 20100289103
    Abstract: Among photodiodes used in an optical system for applying light to the entire chip, the conventional PIN photodiode has a problem that light should be applied only to a light reception surface in order to prevent degradation of light response and that positioning of the optical system is difficult. Moreover, in the mesa type PIN photodiode not requiring positioning of an optical system, disconnection failure is often caused by the mesa step. The present invention is made to solve the aforementioned problems, and its object is to provide a PIN photodiode having an improved light response and causing less disconnection failure of metal wiring and a light reception device using the PIN photodiode. The PIN photodiode of the present invention has a structure that the light reception surface is surrounded by a groove of a predetermined depth.
    Type: Application
    Filed: December 13, 2006
    Publication date: November 18, 2010
    Applicant: ROHM CO., LTD.
    Inventors: Masashi Yamamoto, Jun Ichihara
  • Patent number: 7829915
    Abstract: The present invention changes layer polarities of an epitaxy structure of an avalanche photodiode into n-i-n-i-p. A transport layer is deposed above an absorption layer to prevent absorbing photon and producing electrons and holes. A major part of electric field is concentrated on a multiplication layer for producing avalanche and a minor part of the electric field is left on the absorption layer for transferring carrier without avalanche. Thus, bandwidth limit from a conflict between RC bandwidth and carrier transferring time is relieved. Meanwhile, active area is enlarged and alignment error is improved without sacrificing component velocity too much.
    Type: Grant
    Filed: August 7, 2008
    Date of Patent: November 9, 2010
    Assignee: National Central University
    Inventors: Jin-Wei Shi, Yen-Hsiang Wu
  • Patent number: 7829920
    Abstract: A photo detector has a sensing TFT (thin film transistor) and a photodiode. The sensing TFT has a gate and a base. The photodiode has an intrinsic semiconductor region electrically connected to the gate and the base of the sensing TFT. The sensing TFT and the photodiode both have a structure comprising low temperature poly-silicon. A display panel contains the photo detector is also disclosed.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: November 9, 2010
    Assignee: Au Optronics Corporation
    Inventors: An-Thung Cho, Chia-Tien Peng, Kun-Chih Lin, Wen-Jen Chiang, Chih-Yang Chen, Chrong-Jung Lin, Ya-Chin King, Chih-Wei Chao, Chien-Sen Weng, Feng-Yuan Gan
  • Publication number: 20100276773
    Abstract: An object is to provide a photoelectric conversion element having a side surface with different taper angles by conducting etching of a photoelectric conversion layer step-by-step. A pin photodiode has a high response speed compared with a pn photodiode but has a disadvantage of large dark current. One cause of the dark current is considered to be conduction through an etching residue which is generated in etching and deposited on a side surface of the photoelectric conversion layer. Leakage current of the photoelectric conversion element is reduced by forming a structure in which a side surface has two different tapered shapes, which conventionally has a uniform surface, so that the photoelectric conversion layer has a side surface of a p-layer and a side surface of an n-layer, which are not in the same plane.
    Type: Application
    Filed: July 12, 2010
    Publication date: November 4, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shinya SASAGAWA, Shinya HASEGAWA, Hidekazu Takahashi, Tatsuya Arao
  • Publication number: 20100276777
    Abstract: A photodiode element includes a first layer of a first diffusion type and a second layer. The second layer defines a charge-collecting area. The charge-collecting area includes an active region of a second diffusion type and an inactive region. The active region surrounds the inactive region. The photodiode element also includes an intrinsic semiconductor layer between the first layer and the second layer.
    Type: Application
    Filed: May 4, 2009
    Publication date: November 4, 2010
    Applicant: General Electric Company
    Inventors: Abdelaziz Ikhlef, Wen Li, Jeffrey Alan Kautzer
  • Patent number: 7825328
    Abstract: A backside illuminated multi-junction solar cell module includes a substrate, multiple multi-junction solar cells, and a cell interconnection that provides a series connection between at least two of the multi-junction solar cells. The substrate may include a material that is substantially transparent to solar radiation. Each multi-junction solar cell includes a first active cell, grown over the substrate, for absorbing a first portion of the solar radiation for conversion into electrical energy and a second active cell, grown over the first active cell, for absorbing a second portion of the solar radiation for conversion into electrical energy. At least one of the first and second active cells includes a nitride.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: November 2, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Jizhong Li
  • Publication number: 20100258895
    Abstract: The invention provides a semiconductor device manufactured with a plurality of photodiodes so that it does not short circuit, and includes an opening without leakage. A second semiconductor layer (12, 16) of second conductivity type is formed on a main surface of a first semiconductor layer (10, 11) of the first conductivity type. Element-separating regions (13, 14, 15, 17) are formed at least on the second semiconductor layer to separate the device into the regions of photodiodes (PD1-PD4). A conductive layer (18) is formed on the second semiconductor layer 16 in a divided pattern that provides a segment for each photodiode and is connected to the second semiconductor layer (16) along the an outer periphery with respect to all photodiodes. An insulation layer (19, 21) is formed on the entire surface to cover conductive layer (18). An opening, which reaches the second semiconductor layer (16), is formed in the insulation layer (19, 21) in the region inside the pattern of conductive layer (18).
    Type: Application
    Filed: June 29, 2010
    Publication date: October 14, 2010
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yohichi Okumura, Hiroyuki Tomomatsu
  • Patent number: 7812355
    Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor device having a semiconductor element capable of reducing a cost and improving a throughput with a minute structure, and further, a method for manufacturing a liquid crystal television and an EL television. According to one feature of the invention, a method for manufacturing a semiconductor device comprises the steps of: forming a light absorption layer over a substrate, forming a first region over the light absorption layer by using a solution, generating heat by irradiating the light absorption layer with laser light, and forming a first film pattern by heating the first region with the heat.
    Type: Grant
    Filed: December 8, 2008
    Date of Patent: October 12, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroko Shiroguchi, Yoshiaki Yamamoto
  • Patent number: 7812420
    Abstract: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: October 12, 2010
    Inventors: Yu-Da Shiu, Chyh-Yih Chang, Ming-Dou Ker, Che-Hao Chuang
  • Patent number: 7791154
    Abstract: An object is to provide a photoelectric conversion element having a side surface with different taper angles by conducting etching of a photoelectric conversion layer step-by-step. A pin photodiode has a high response speed compared with a pn photodiode but has a disadvantage of large dark current. One cause of the dark current is considered to be conduction through an etching residue which is generated in etching and deposited on a side surface of the photoelectric conversion layer. Leakage current of the photoelectric conversion element is reduced by forming a structure in which a side surface has two different tapered shapes, which conventionally has a uniform surface, so that the photoelectric conversion layer has a side surface of a p-layer and a side surface of an n-layer, which are not in the same plane.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: September 7, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shinya Sasagawa, Shinya Hasegawa, Hidekazu Takahashi, Tatsuya Arao
  • Patent number: 7786544
    Abstract: An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: August 31, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Masato Yonezawa, Hajime Kimura, Yu Yamazaki
  • Patent number: 7786545
    Abstract: Disclosed are an image sensor and a method for manufacturing the same. The image sensor includes a substrate provided with a transistor circuit, first and second interconnections separated from each other on the substrate, a first conductive-type conductive layer formed at side surfaces of the first interconnection, a second conductive-type conductive layer formed at side surfaces of the second interconnection, and an intrinsic layer formed between the first and second conductive-type conductive layers thereby forming a P-I-N structure.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: August 31, 2010
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Seoung Hyun Kim
  • Patent number: 7786543
    Abstract: A MOS or CMOS based active pixel sensor with special sampling features to substantially eliminate clock noise. The sensor includes an array of pixels fabricated in or on a substrate, each pixel defining a charge collection node on which charges generated inside a photodiode region are collected, a charge integration node, at which charges generated in said pixel are integrated to produce pixel signals, a charge sensing node from which reset signals and the pixel signals are sensed. In preferred embodiments the sensor includes a continuous electromagnetic radiation detection structure located above the pixel circuits providing a photodiode region for each pixel. The sensor includes integrated circuit elements adapted to maintain voltage potentials of the charge integration nodes substantially constant during charge integration cycles. The sensor also includes integrated circuit elements having electrical capacitance adapted to store charges providing an electrical potential at the charge integration node.
    Type: Grant
    Filed: August 17, 2007
    Date of Patent: August 31, 2010
    Assignee: e-Phocus
    Inventor: Tzu-Chiang Hsieh
  • Publication number: 20100213466
    Abstract: Photosensor based on SOI technology and display devices comprising the same. The photosensor can be a photodiode or a phototransistor, or a combination thereof when incorporated in a device. The photosensor exhibits a higher photoresponse than a traditional photosensor based on amorphous silicon film or polysilicon thin film technology. The present invention is useful, e.g., in making multifunctional display devices having photosensing function integrated therein.
    Type: Application
    Filed: February 26, 2009
    Publication date: August 26, 2010
    Inventors: Karl D. Hirschman, Robert Manley, Carlo Anthony Kosik Williams
  • Publication number: 20100213566
    Abstract: Wirebonds are formed to couple an opto-electronic device chip having two or more opto-electronic devices to a signal processing chip. Two or more mutually adjacent wirebond groups, each corresponding to one of the opto-electronic devices, are formed. For example, each wirebond group can include a first wirebond coupling a P-terminal of the opto-electronic device of the wirebond group to the signal processing chip, a second wirebond coupling an N-terminal of the opto-electronic device of the wirebond group to the signal processing chip, and a third wirebond coupling the opto-electronic device chip to the signal processing chip.
    Type: Application
    Filed: February 24, 2009
    Publication date: August 26, 2010
    Applicant: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventors: Peter Ho, Michael A. Robinson, Zuowei Shen
  • Patent number: 7781672
    Abstract: Photovoltaic modules, as well as related systems, methods and components are disclosed. In some embodiments, a photovoltaic module can include a first photovoltaic cell including an electrode, a second photovoltaic cell including an electrode, and an interconnect. The electrode of the first photovoltaic cell can overlap the electrode of the second photovoltaic cell. The interconnect can electrically connect the electrode of the first photovoltaic cell and the electrode of the second photovoltaic cell. The interconnect can mechanically couple the first and second photovoltaic cells.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: August 24, 2010
    Assignee: Konarka Technologies, Inc.
    Inventors: Russell Gaudiana, Alan Montello, Edmund Montello
  • Patent number: 7782921
    Abstract: An electrical-optical coupling and detecting device. An apparatus according to an embodiment of the present invention includes a reflective surface defined on semiconductor material. The reflective surface is to reflect an incident optical beam towards an optical destination. An optical detector is monolithically integrated in the reflective surface of the semiconductor material. The optical detector arranged in the reflective surface of the semiconductor material is to detect the incident optical beam.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: August 24, 2010
    Assignee: Intel Corporation
    Inventors: Andrew C. Alduino, Mario J. Paniccia, Rami Cohen, Assia Barkai, Ansheng Liu
  • Patent number: 7777290
    Abstract: The present invention provides high-speed, high-efficiency PIN diodes for use in photodetector and CMOS imagers. The PIN diodes include a layer of intrinsic semiconducting material, such as intrinsic Ge or intrinsic GeSi, disposed between two tunneling barrier layers of silicon oxide. The two tunneling barrier layers are themselves disposed between a layer of n-type silicon and a layer of p-type silicon.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: August 17, 2010
    Assignee: Wisconsin Alumni Research Foundation
    Inventors: Max G. Lagally, Zhenqiang Ma
  • Patent number: 7777128
    Abstract: Modules are disclosed. The modules can include a first photovoltaic cell including an electrode; and a second photovoltaic cell including an electrode having a bent end connected to the electrode of the first photovoltaic cell.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: August 17, 2010
    Assignee: Konarka Technologies, Inc.
    Inventors: Alan Montello, Kevin Oliver, Kethinni G. Chittibabu
  • Publication number: 20100200941
    Abstract: Intended is to provide a device structure, which makes the light receiving sensitivity and the high speediness of a photodiode compatible. Also provided is a Schottky barrier type photodiode having a conductive layer formed on the surface of a semiconductor layer. The photodiode is so constituted that a light can be incident on the back side of the semiconductor layer, and that a periodic structure, in which a light incident from the back side of the semiconductor layer causes a surface plasmon resonance, is made around the Schottky junction of the photodiode.
    Type: Application
    Filed: November 28, 2007
    Publication date: August 12, 2010
    Inventors: Junichi Fujikata, Daisuke Okamoto, Kikuo Makita, Kenichi Nishi, Keishi Ohashi
  • Patent number: 7772484
    Abstract: Modules are disclosed. The modules can include a first photovoltaic cell including an electrode, a second photovoltaic cell including an electrode, and an interconnect disposed in the electrode of the first photovoltaic cell and disposed in the electrode of the second photovoltaic cell so that the electrode of the first photovoltaic cell and the electrode of the second photovoltaic cell are connected.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: August 10, 2010
    Assignee: Konarka Technologies, Inc.
    Inventors: Lian Li, Alan Montello, Edmund Montello, Russell Gaudiana
  • Patent number: 7772667
    Abstract: The present invention provides a photoelectric conversion device in which a leakage current is suppressed. A photoelectric conversion device of the present invention comprises: a first electrode over a substrate; a photoelectric conversion layer including a first conductive layer having one conductivity, a second semiconductor layer, and a third semiconductor layer having a conductivity opposite to the one conductivity of the second semiconductor layer over the first electrode, wherein an end portion of the first electrode is covered with the first semiconductor layer; an insulating film, and a second electrode electrically connected to the third semiconductor film with the insulating film therebetween, over the insulating film, are formed over the third semiconductor film, and wherein a part of the second semiconductor layer and a part of the third semiconductor layer is removed in a region of the photoelectric conversion layer, which is not covered with the insulating film.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: August 10, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuusuke Sugawara, Kazuo Nishi, Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto
  • Publication number: 20100193804
    Abstract: Provided are a photodetector capable of suppressing variations in the output characteristics among photodiodes, and a display device provided with the photodetector. A display device in use has an active matrix substrate (20) including a transparency base substrate (2), a plurality of active elements and a photodetector. The photodetector includes a light-shielding layer (3) provided on one main surface of the base substrate (2), a photodiode (1) arranged on an upper layer of the light-shielding layer (3), and an electrode (12) arranged in the vicinity of the photodiode (1) on the upper layer of the light-shielding layer (3). The photodiode (1) includes a silicon layer (11), and the silicon layer (11) is insulated electrically from the light-shielding layer (3). The electrode (12) is insulated electrically from the light-shielding layer (3) and the silicon layer (11).
    Type: Application
    Filed: June 12, 2008
    Publication date: August 5, 2010
    Inventors: Christopher Brown, Hiromi Katoh
  • Patent number: 7768048
    Abstract: An infrared sensor IC and an infrared sensor, which are extremely small and are not easily affected by electromagnetic noise and thermal fluctuation, and a manufacturing method thereof are provided. A compound semiconductor that has a small device resistance and a large electron mobility is used for a sensor (2), and then, the compound semiconductor sensor (2) and an integrated circuit (3), which processes an electrical signal output by the compound semiconductor sensor (2) and performs an operation, are arranged in a single package using hybrid formation. In this manner, an infrared sensor IC that can be operated at room temperature can be provided by a microminiature and simple package that is not conventionally produced.
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: August 3, 2010
    Assignee: Asahi Kasei EMD Corporation
    Inventors: Koichiro Ueno, Naohiro Kuze, Yoshitaka Moriyasu, Kazuhiro Nagase
  • Patent number: 7767501
    Abstract: The abrupt metal-insulator transition device includes: an abrupt metal insulator transition material layer including an energy gap of less than or equal to 2 eV and holes within a hole level; and two electrodes contacting the abrupt metal-insulator transition material layer. Here, each of the two electrodes is formed by thermally treating a stack layer of a first layer formed on the abrupt metal-insulator transition material layer and comprising Ni or Cr, a second layer formed on the first layer and comprising In, a third layer formed on the second layer and comprising Mo or W, and a fourth layer formed on the third layer and comprising Au.
    Type: Grant
    Filed: December 5, 2005
    Date of Patent: August 3, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Doo-Hyeb Youn, Hyun-Tak Kim, Byung-Gyu Chae, Sung-Lyul Maeng, Kwang-Yong Kang
  • Publication number: 20100189154
    Abstract: A purpose is to provide a semiconductor optical device having good characteristics to be formed on a semi-insulating InP substrate. Firstly, a semi-insulating substrate including a Ru—InP layer on a conductive substrate is used. Secondly, a semi-insulating substrate including a Ru—InP layer on a Ru—InP substrate or an Fe—InP substrate is used and semiconductor layers of an n-type semiconductor layer, a quantum-well layer, and a p-type semiconductor layer are stacked in this order.
    Type: Application
    Filed: December 1, 2009
    Publication date: July 29, 2010
    Inventors: Shigeki Makino, Takeshi Kitatani, Tomonobu Tsuchiya
  • Publication number: 20100181651
    Abstract: A sealed semiconductor device having reduced delamination of the sealing layer in high temperature, high humidity conditions is disclosed. The semiconductor device includes a substrate and a stack of device layers on the substrate sealed with a sealing layer. The upper surface of a street area of the substrate is oxidized so that the oxidized region extends under the sealing layer. The presence of the oxidized region of the upper surface of the substrate helps reduce the delamination, because the oxidized surface does not react with water to the same extent as a non-oxidized surface. The semiconductor devices remain sealed after dicing through the street area because the oxidized surface does not delaminate.
    Type: Application
    Filed: January 18, 2010
    Publication date: July 22, 2010
    Inventors: Zhong PAN, Craig Ciesla
  • Patent number: 7759757
    Abstract: An electro-optical device includes an insulating substrate, a switching element, at least one PIN diode, and at least one reflector. The switching element includes a first polysilicon semiconductor layer formed on the insulating substrate, and a gate electrode formed between the insulating substrate and the first semiconductor layer. Each of the at least one PIN diode includes a second polysilicon semiconductor layer formed on the insulating substrate. The at least one reflector is formed in the same layer as the gate electrode and opposite the second semiconductor layer or layers of the at least one PIN diode.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: July 20, 2010
    Assignee: Sony Corporation
    Inventors: Shin Koide, Hiroko Muramatsu, Shin Fujita
  • Patent number: 7755157
    Abstract: Solar cells and methods of their manufacture are described that exhibit decreased or eliminated leak current, improved open voltage and improved fill factor characteristics. In an embodiment, a separate processed surface is interposed between a first and a second main surface of a crystal substrate, as prepared by laser irradiation and cut processing. The laser irradiation is applied to an amorphous semiconductor layer of the same conductive type as an underlying single crystal substrate, but does not penetrate an underlying amorphous opposite type layer. Details of lamination and laser characteristics for processing the layers are provided.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: July 13, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Toshio Asaumi, Toshiaki Baba, Akira Terakawa, Yasufumi Tsunomura
  • Publication number: 20100171119
    Abstract: To provide a stacked photoelectric conversion device capable of inhibiting extreme decrease of the output in the morning and evening. A stacked photoelectric conversion device of the present invention comprises a first photoelectric conversion layer, a second photoelectric conversion layer and a third photoelectric conversion layer stacked in this order from a light entrance side, each photoelectric conversion layer having a p-i-n junction and formed of a silicon based semiconductor, wherein a short-circuit photocurrent of the first photoelectric conversion layer is larger than a short-circuit photocurrent of the second photoelectric conversion layer or a short-circuit photocurrent of the third photoelectric conversion layer under a condition of light source: xenon lamp, irradiance: 100 mW/cm2, AM: 1.5, and temperature: 25° C.
    Type: Application
    Filed: May 29, 2008
    Publication date: July 8, 2010
    Inventors: Yoshiyuki Nasuno, Yasuaki Ishikawa
  • Publication number: 20100171128
    Abstract: Provided are a photodetector capable of suppressing variations in the output characteristics among photodiodes, and a display device provided with the photodetector. A display device in use has an active matrix substrate (20) including a transparency base substrate (2), a plurality of active elements and a photodetector. The photodetector includes a light-shielding layer (3) provided on the base substrate (2), and a photodiode (1) arranged on an upper layer of the light-shielding layer (3). The light-shielding layer (3) is overlapped with the photodiode (1) in the thickness direction of the base substrate (2). The photodiode (1) includes a silicon layer (11) insulated electrically from the light-shielding layer (3). The silicon layer (11) includes a player (11c), an i-layer (11b) and an n-layer (11a) that are provided adjacent to each other in the planar direction. The p-layer (11c) is formed so that its area (length Lp) will be larger than the area (length Ln) of the n-layer (11a).
    Type: Application
    Filed: June 12, 2008
    Publication date: July 8, 2010
    Inventors: Christopher Brown, Hiromi Katoh
  • Patent number: 7750233
    Abstract: A thin film solar cell includes: a transparent conductive film arranged on a translucent insulating substrate; first and second separation trenches orthogonal to each other on the translucent insulating substrate and separating the transparent conductive film; and a first opening trench parallel to the first separation trench and second opening trenches parallel to said second separation trench, orthogonal to each other on the translucent insulating substrate; wherein solar cells formed on the translucent insulating substrate are arranged at adjacent positions with said first opening trench positioned therebetween and at adjacent positions with said second opening trench positioned therebetween; pairs of said solar cells adjacent to each other with said first opening trench positioned therebetween are electrically connected, and among pairs of solar cells positioned adjacent to each other with the second opening trench in between, some are electrically connected to each other, and others are electrically insu
    Type: Grant
    Filed: March 6, 2006
    Date of Patent: July 6, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yasushi Fujioka, Tohru Takeda
  • Publication number: 20100164047
    Abstract: An image sensor includes a semiconductor substrate, an interconnection and an interlayer dielectric, an image sensing device, a trench, a buffer layer, a barrier pattern, a via hole, and a metal contact. The semiconductor substrate includes a readout circuitry. The interconnection and an interlayer dielectric layer are formed on and/or over the semiconductor substrate while the interconnection is connected to the readout circuitry. The image sensing device may be formed on and/or over the interlayer dielectric and a trench may be formed in the image sensing device, the trench corresponding to the interconnection. The buffer layer may be formed on a sidewall of the trench. The barrier pattern may be formed on the buffer layer with the via hole penetrating through the image sensing device and the interlayer dielectric under the barrier pattern and exposing the interconnection. The metal contact may be formed in the via hole.
    Type: Application
    Filed: December 21, 2009
    Publication date: July 1, 2010
    Inventor: KI-JUN YUN
  • Publication number: 20100164048
    Abstract: The disclosure provides a method for fabricating a semiconductor substrate comprising the steps of: providing a semiconductor on insulator type substrate, providing a diffusion barrier layer and providing a second semiconductor layer. By providing the diffusion barrier layer, it becomes possible to suppress diffusion from the highly doped first semiconductor layer into the second semiconductor layer. The invention also relates to a corresponding semiconductor substrate and opto-electronic devices comprising such a substrate.
    Type: Application
    Filed: December 22, 2009
    Publication date: July 1, 2010
    Applicant: S.O.I.TEC Silicon on Insulator Technologies
    Inventors: Christophe Figuet, Christophe Bouvier, Céline Cailler, Alexis Drouin, Thibaut Maurice
  • Patent number: 7741690
    Abstract: A photoelectric conversion device includes an intrinsic semiconductor layer, a first conductive type semiconductor layer disposed on a first side of the intrinsic semiconductor layer, and a second conductive type semiconductor layer disposed on a second side of the intrinsic semiconductor layer opposite the first side. The intrinsic semiconductor layer includes an amorphous semiconductor layer and a crystalline semiconductor layer including a plurality of crystals. A diameter of a crystal of the plurality of crystals is equal to or less than approximately 100 angstroms.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: June 22, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Ho Choo, Dong-Cheol Kim
  • Patent number: 7736927
    Abstract: A photodetector is formed in a semiconductor body. A hard mask grating is photolithographically formed on a surface of the semiconductor body. The semiconductor body is etched using the hard mask grating as a mask. The etching is performed down to a predetermined depth. An implantation is performed such that an anode or cathode of the photodetector that has been interrupted during the etching is re-formed.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: June 15, 2010
    Assignee: Infineon Technologies AG
    Inventors: Holger Wille, Gernot Langguth, Karl-Heinz Mueller
  • Patent number: 7732886
    Abstract: A PIN photodiode structure includes a substrate, a P-doped region disposed in the substrate, an N-doped region disposed in the substrate, and a first semiconductor material disposed in the substrate and between the P-doped region and the N-doped region.
    Type: Grant
    Filed: July 15, 2008
    Date of Patent: June 8, 2010
    Assignee: United Microelectronics Corp.
    Inventors: Hung-Lin Shih, Tsan-Chi Chu, Wen-Shiang Liao, Wen-Ching Tsai
  • Patent number: 7732706
    Abstract: The invention is a novel manufacturing method for making multi-junction solar cell circuits that addresses current problems associated with such circuits by allowing the formation of integral diodes in the cells and allows for a large number of circuits to readily be placed on a single silicon wafer substrate. The standard Ge wafer used as the base for multi-junction solar cells is replaced with a thinner layer of Ge or a II-V semiconductor material on a silicon/silicon dioxide substrate. This allows high-voltage cells with multiple multi-junction circuits to be manufactured on a single wafer, resulting in less array assembly mass and simplified power management.
    Type: Grant
    Filed: September 16, 2005
    Date of Patent: June 8, 2010
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventor: Nick Mardesich
  • Publication number: 20100133639
    Abstract: A semiconductor component that includes a photosensitive doped semiconductor layer, in which electrical charge carriers are released during absorption of electromagnetic radiation is disclosed. The photosensitive semiconductor layer has a structured interface and at least one layer which generates an electric field for separating the released charge carriers disposed downstream of the structured interface. The electric field extends over the structured interface. The photosensitive semiconductor component is distinguished by a high efficiency of the charge carrier separation, in particular, for generating an electric current.
    Type: Application
    Filed: November 24, 2009
    Publication date: June 3, 2010
    Inventors: Kevin Fuechsel, Andreas Tuennermann, Ernst-Bernhard Kley
  • Patent number: 7728409
    Abstract: A semiconductor device formed by decreasing thickness of a substrate by grinding, and performing ion implantation. In a diode in which a P anode layer and an anode electrode are formed at a side of a right face of an N? drift layer, and an N+ cathode layer and a cathode electrode are formed at a side of a back face of the N? drift layer, an N cathode buffer layer is formed thick compared with the N+-type cathode layer between the N?-type drift layer and the N+ cathode layer, the buffer layer being high in concentration compared with the N? drift layer, and low compared with the N+ cathode layer. When a reverse bias voltage is applied, a depletion layer is stopped in the middle of the N cathode buffer layer, and thus prevented from reaching the N+ cathode layer, so that the leakage current is suppressed.
    Type: Grant
    Filed: November 9, 2006
    Date of Patent: June 1, 2010
    Assignee: Fuji Electric Device Technology Co., Ltd.
    Inventor: Michio Nemoto
  • Publication number: 20100127280
    Abstract: Provided is a photo sensor that can be downsized while suppressing occurrence of noise caused by a dark current, and a display device including the photo sensor. The photo sensor used includes a plurality of photodiodes (9-11) formed in a same silicon layer (8). The photodiodes (9-11) have p-type semiconductor regions (9a, 10a, 11a) and n-type semiconductor regions (9c, 10c, 11c) formed respectively in the silicon layer (8). Further, the photodiodes (9-11) are arranged in series so that the respective forward directions will be aligned with each other. In two photodiodes adjacent to each other, the n-type semiconductor region of one of the photodiodes and the p-type semiconductor region of the other photodiode are formed to overlap each other in the thickness direction of the silicon layer.
    Type: Application
    Filed: April 10, 2008
    Publication date: May 27, 2010
    Inventors: Hiromi Katoh, Masakazu Satoh, Benjamin Hadwen