Abstract: An integrated circuit arrangement includes a pin photodiode and a highly doped connection region of a bipolar transistor. A production method produces an intermediate region of the pin diode with a large depth and without auto-doping in a central region.

Abstract: An optical receiver assembly that is configured to avoid the introduction of feedback in an electrical signal converted by the assembly is disclosed. In one embodiment, an optical receiver assembly is disclosed, comprising a capacitor, an optical detector provided with a power supply being mounted on a top electrode of the capacitor, and an amplifier mounted on the reference surface. The assembly further includes an isolator interposed between the reference surface and the capacitor, wherein the isolator includes a bottom layer of dielectric material that is affixed to a portion of the reference surface, and a metallic top plate that is electrically coupled both to a ground of the amplifier and to the capacitor. This configuration bootstraps the amplifier ground to the amplifier input via the photodiode top electrode of the capacitor to cancel out feedback signals present at the amplifier ground.

Abstract: An area sensor of the present invention has a function of displaying an image in a sensor portion by using light-emitting elements and a reading function using photoelectric conversion devices. Therefore, an image read in the sensor portion can be displayed thereon without separately providing an electronic display on the area sensor. Furthermore, a photoelectric conversion layer of a photodiode according to the present invention is made of an amorphous silicon film and an N-type semiconductor layer and a P-type semiconductor layer are made of a polycrystalline silicon film. The amorphous silicon film is formed to be thicker than the polycrystalline silicon film. As a result, the photodiode according to the present invention can receive more light.

Abstract: This invention relates to imaging device and its related transferring technologies to independent substrate able to attain significant broadband capability covering the wavelengths from ultra-violet (UV) to long-Infrared. More particularly, this invention is related to the broadband image sensor (along with its manufacturing technologies), which can detect the light wavelengths ranges from as low as UV to the wavelengths as high as 20 ?m covering the most of the wavelengths using of the single monolithic image sensor on the single wafer. This invention is also related to the integrated circuit and the bonding technologies of the image sensor to standard integrated circuit for multicolor imaging, sensing, and advanced communication. Our innovative approach utilizes surface structure having more than micro-nano-scaled 3-dimensional (3-D) blocks which can provide broad spectral response.

Abstract: An image sensor includes a semiconductor substrate, an interconnection and an interlayer dielectric, an image sensing device, a trench, a buffer layer, a barrier pattern, a via hole, and a metal contact. The semiconductor substrate includes a readout circuitry. The interconnection and an interlayer dielectric layer are formed on and/or over the semiconductor substrate while the interconnection is connected to the readout circuitry. The image sensing device may be formed on and/or over the interlayer dielectric and a trench may be formed in the image sensing device, the trench corresponding to the interconnection. The buffer layer may be formed on a sidewall of the trench. The barrier pattern may be formed on the buffer layer with the via hole penetrating through the image sensing device and the interlayer dielectric under the barrier pattern and exposing the interconnection. The metal contact may be formed in the via hole.

Abstract: A lateral photodiode, with improved response speed, includes a semiconductor substrate having active regions, and a p-type region and an n-type region arranged parallel to the surface of the substrate. The active regions are an n-layer and a p-layer respectively, and stacked in the thickness direction of the substrate to form a p-n junction. In addition, a barrier layer, for preventing movement of carriers from the substrate toward the active region, is provided on the side of the active regions toward the substrate.

Abstract: A PIN photodiode having a substrate, a first type electrode layer disposed on the substrate, a first layer of intrinsic material disposed over a portion of the first-type electrode layer, and a first type window layer disposed over the intrinsic layer. An island shaped region of intrinsic material is disposed over the window layer and a dielectric layer is disposed over the island region and at least the peripheral portion of said island shaped region whereby an opening is formed in the island shaped region. A dopant is diffused through the opening so as to form a PN junction that extends into the first layer of intrinsic material.

Abstract: A structure comprises a single wafer with a first subcollector formed in a first region having a first thickness and a second subcollector formed in a second region having a second thickness, different from the first thickness. A method is also contemplated which includes providing a substrate including a first layer and forming a first doped region in the first layer. The method further includes forming a second layer on the first layer and forming a second doped region in the second layer. The second doped region is formed at a different depth than the first doped region. The method also includes forming a first reachthrough in the first layer and forming a second reachthrough in second layer to link the first reachthrough to the surface.

Abstract: In one embodiment, a detector includes an AlxIn(1-x)Sb absorber layer, and an AlyIn(1-y)Sb passivation layer disposed above the AlxIn(1-x)Sb absorber layer, wherein x<y. The detector further includes a junction formed in a region of the AlxIn(1-x)Sb absorber layer, and a metal contact disposed above the junction and through the AlyIn(1-y)Sb passivation layer.

Abstract: In one embodiment, a detector includes an AlzIn(1-x)Sb passivation/etch stop layer, an AlxIn(1-x)Sb absorber layer disposed above the Alzn(1-x)Sb passivation/etch stop layer, and an AlIn(1-y)Sb passivation layer disposed above the AlxIn(1-x)Sb absorber layer, wherein x<z and x<y. The detector further includes a junction formed in a region of the AlxIn(1?x)Sb absorber layer, and a metal contact disposed above the junction and through the AlyIn(1-y)Sb passivation layer.

Abstract: A solid-state imaging device has a substrate in which are formed a pixel array portion having a plurality of pixels, and a peripheral circuitry portion. The device is characterized in that a first multilevel metallization structure is formed over the peripheral circuitry portion, and a second multilevel metallization structure thinner than the first multilevel metallization structure is formed over the pixel array portion.

Abstract: A projection system includes a light source module illuminating a plurality of monochromic lights, at least one optical modulator modulating the lights illuminated by the light source module according to each of color signals, a color combining prism combining the monochromic lights modulated by the optical modulator to form an image, and a projection lens projecting the image formed by the color combining prism toward a screen. A semiconductor diode including a P type semiconductor layer, an intrinsic semiconductor layer, and an N type semiconductor layer to absorb or transmit the monochromic lights according to the value of a reverse bias voltage is arranged in units of pixels.

Abstract: A display includes: a substrate having a pixel region and a sensor region in which photo-sensor parts are formed; an illuminating section operative to illuminate the substrate from one surface side of the substrate; a thin film photodiode disposed in the sensor region, having at least a P-type semiconductor region and an N-type semiconductor region, and operative to receive light incident from the other surface side of the substrate; and a metallic film formed on the one surface side of the substrate so as to face the thin film photodiode through an insulator film, operative to restrain light generated from the illuminating section from being directly incident on the thin film photodiode from the one surface side, and fixed to a predetermined potential, wherein in the thin film photodiode, the width of the P-type semiconductor region and the width of the N-type semiconductor region are different from each other.

Abstract: A thin-film metal-oxide compound includes a titanium dioxide layer having a thickness of about 100 to 1000 nanometers. The titanium dioxide layer has a single-phase anatase structure. The titanium dioxide layer is directly disposed on a substrate comprised of glass, sapphire, or silicon. A solar cell includes a backing layer, a p-n junction layer, a metal-oxide layer, a top electrical layer and a contact layer. The backing layer includes a p-type semiconductor material. The p-n junction layer has a first side disposed on a front side of the backing layer. The metal-oxide layer includes an n-type titanium dioxide film having a thickness in the range of about 100 to about 1000 nanometers. The metal-oxide layer is disposed on a second side of the p-n junction layer. The top electrical layer is disposed on the metal-oxide layer, and the contact layer is disposed on a back side of the backing layer.

Abstract: An integrated circuit device for converting an incident optical signal into an electrical signal comprises a semiconductor substrate, a well region formed inside the semiconductor substrate, a dielectric layer formed over the well region, and a layer of polysilicon for receiving the incident optical signal, formed over the dielectric layer, including a p-type portion, an n-type portion and an undoped portion disposed between the p-type and n-type portions, wherein the well region is biased to control the layer of polysilicon for providing the electrical signal.

Abstract: A diode comprises a substrate formed of a first material having a first doping polarity. The substrate has a planar surface and at least one semispherical structure extending from the planar surface. The semispherical structure is formed of the first material. A layer of second material is over the semispherical structure. The second material comprises a second doping polarity opposite the first doping polarity. The layer of second material conforms to the shape of the semispherical structure. A first electrical contact is connected to the substrate, and a second electrical contact is connected to the layer of second material. Additional semiconductor structures are formed by fabricating additional layers over the original layers.

Abstract: A photodetector array includes a semiconductor substrate having opposing first and second main surfaces, a first layer of a first doping concentration proximate the first main surface, and a second layer of a second doping concentration proximate the second main surface. The photodetector includes at least one conductive via formed in the first main surface and an anode/cathode region proximate the first main surface and the at least one conductive via. The via extends to the second main surface. The conductive via is isolated from the semiconductor substrate by a first dielectric material. The anode/cathode region is a second conductivity opposite to the first conductivity. The photodetector includes a doped isolation region of a third doping concentration formed in the first main surface and extending through the first layer of the semiconductor substrate to at least the second layer of the semiconductor substrate.

Abstract: Consistent with the present disclosure, a current blocking layer is provided between output waveguides carrying light to be sensed by the photodiodes in a balanced photodetector, and the photodiodes themselves. Preferably, the photodiodes are provided above the waveguides and sense light through evanescently coupling with the waveguides. In addition, the current blocking layer may include alternating p and n-type conductivity layers, such that, between adjacent ones of such layers, a reverse biased pn-junction is formed. The pn-junctions, therefore, limit the amount of current flowing from one photodiode of the balanced detector to the other, thereby improving performance.

Abstract: An optical detector includes a detector surface operable to receive light, a depleted field region coupled to the underside of the detector surface, a charge collection node underlying the depleted field region, an active pixel area that includes the portion of the depleted field region above the charge collection node and below the detector surface, and two or more guard regions coupled to the underside of the detector surface and outside of the active pixel area. The depleted field region includes an intrinsic or a near-intrinsic material. The charge collection node has a first width, and the guard regions are separated by a second width that is greater than the first width of the charge collection node. The guard regions are operable to prevent crosstalk to an adjacent optical detector.

Abstract: In order to improve photoelectric conversion properties of a silicon-based thin-film photoelectric converter to which a conductive SiOx layer is inserted to obtain an optical confinement effect, the silicon-based thin-film photoelectric converter according to the present invention includes an i-type photoelectric conversion layer of hydrogenated amorphous silicon or an alloy thereof, an i-type buffer layer made of hydrogenated amorphous silicon, and an n-type Si1-xOx layer (x is 0.25-0.6) stacked successively, wherein the buffer layer has a higher hydrogen concentration at its interface with and as compared with the photoelectric conversion layer and has a thickness of at least 5 nm and at most 50 nm. Accordingly, generation of silicon crystal phase parts and reduction of resistivity are promoted in the n-type Si1-xOx layer, contact resistance at the interface is reduced, and FF of the photoelectric converter is improved, so that the photoelectric converter achieves improved properties.

Abstract: A photo sensor includes a patterned shielding conductive layer disposed on a transparent substrate, and a buffer dielectric layer, a patterned semiconductor layer, and a dielectric layer disposed on the patterned shielding layer in order. The patterned semiconductor layer includes an intrinsic region, a first doped region, and a second doped region, wherein the first and second doped regions are positioned at two sides of the intrinsic region separately. A patterned transparent conductive layer is disposed on the dielectric layer and covers the boundary of the intrinsic region and the first doped region and the boundary of the intrinsic region and the second doped region. The patterned transparent conductive layer is electrically connected to the patterned shielding conductive layer.

Abstract: Radiation-absorbing semiconductor devices and associated methods of making and using are provided. In one aspect, for example, a method for making a radiation-absorbing semiconductor device having enhanced photoresponse can include forming an active region on a surface of a low oxygen content semiconductor, and annealing the low oxygen content semiconductor to a temperature of from about 300° C. to about 1100° C., wherein the forming of the active region and the annealing of the low oxygen content semiconductor are performed in a substantially oxygen-depleted environment.

Abstract: In one example, an optical detector includes a photosensitive layer, and a group of additional layers associated with that photosensitive layer. The group of additional layers may include first and second contact layer configured for electrical communication with the photosensitive layer. In this example, one of the group of layers is shaped so as to define a corner whose radius of curvature is greater than about 2 microns.

Abstract: A photodetector with an improved electrostatic discharge damage threshold is disclosed, suitable for applications in telecommunication systems operating at elevated data rates. The photodetector may be a PIN or an APD fabricated in the InP compound semiconductor system. The increased ESD damage threshold is achieved by reducing the ESD induced current density in the photodetector by a suitable widening of the contact at a critical location, increasing the series resistance and promoting lateral current spreading by means of a current spreading layer.

Abstract: Disclosed herein is a solid-state imaging device including: a semiconductor substrate; a sensor of impurity diffusion layer formed on the surface layer of said semiconductor substrate; a negative charge accumulation layer formed on said sensor from an insulating material containing a first metallic substance; and an interfacial layer formed between said sensor and said negative charge accumulation layer from an insulating material containing a second metallic substance having greater electronegativity than said first metallic substance.

Abstract: Polymerizable anions and/or cations can be used as the ionically conductive species for the formation of a p-i-n junction in conjugated polymer thin films. After the junction is formed, the ions are polymerized in situ, and the junction is locked thereafter. The resulting polymer p-i-n junction diodes could have a high current rectification ratio. Electroluminescence with high quantum efficiency and low operating voltage may be produced from this locked junction. The diodes may also be used for photovoltaic energy conversion. In a photovoltaic cell, the built-in potential helps separate electron-hole pairs and increases the open-circuit voltage.

Abstract: Disclosed herein is a photodiode cell, including: a first-type substrate; a second-type epitaxial layer disposed on the first-type substrate; heavily-doped second-type layers, each having a small depth, formed on the second-type epitaxial layer; and heavily-doped first-type layers, each having a narrow and shallow section, disposed on the second-type epitaxial layer and formed between the heavily-doped second-type layers, wherein the first-type and second-type have opposite doped states.

Abstract: A photo-sensor having a structure which can suppress electrostatic discharge damage is provided. Conventionally, a transparent electrode has been formed over the entire surface of a light receiving region; however, in the present invention, the transparent electrode is not formed, and a p-type semiconductor layer and an n-type semiconductor layer of a photoelectric conversion layer are used as an electrode. Therefore, in the photo-sensor according to the present invention, resistance is increased an electrostatic discharge damage can be suppressed. In addition, positions of the p-type semiconductor layer and the n-type semiconductor layer, which serve as an electrode, are kept away; and thus, resistance is increased and withstand voltage can be improved.

Abstract: A transparent conductive layer includes a substrate, a first conductive layer disposed on the substrate, and a second conductive layer disposed on the first conductive layer, wherein the second conductive layer comprises a textured surface and an opening which exposes the first conductive layer, wherein the opening comprises a diameter of about 1 micrometer to about 3 micrometers. Also disclosed is a method of manufacturing the transparent conductive layer and a photoelectric device.

Abstract: A semiconductor device that attenuates light to the circuit element area is provided. The semiconductor device includes light-sensitive element area formed on substrate and a circuit element area formed on the substrate. Additionally, a multilayer wiring area is formed on circuit element area. A Tantalum film (which is generally made of tantalum or a tantalum compound) is formed on the surface of the multilayer wiring area to attenuate incident light on circuit element area.

Abstract: A solar cell includes a p-type semiconductor substance, and an n-type semiconductor substance. The p-type semiconductor substance and the n-type semiconductor substance form a pn junction or a pin junction, and the p-type semiconductor substance or the n-type semiconductor substance includes a structure film having a plurality of carbon nanotubes electrically connected to each other.

Abstract: Provided is an image sensor and a method for manufacturing the same. The image sensor includes a substrate on which a circuitry including a first lower metal line and a second lower metal line is formed. A lower electrode is formed on the first lower metal line. A separation metal pattern surrounds the lower electrode and connected to the second lower metal line. An intrinsic layer is formed on the lower electrode. A second conductive type conduction layer is formed on the intrinsic layer. An upper electrode is formed on the second conductive type conductive layer. A bias can be applied to the second lower metal line such that the separation metal pattern can provide a Schottky Barrier, directing electrons to the lower electrode and inhibiting crosstalk between pixels.

Abstract: The present invention provides a detection element that can suppress leak current from an end face of a semiconductor layer. That is, of an n+ layer and a p+ layer respectively disposed between an i layer, in which an electric charge is generated as a result of being illuminated with light, and a pair of electrodes, an edge portion of a formed face of the p+ layer is formed further inward than that of the i layer.

Abstract: A photoelectric conversion device includes a p-type layer, an i-type layer and an n-type layer each made of a silicon base semiconductor, stacked in this order, wherein the i-type layer contains n-type impurities in a concentration of 1.0×1016 to 2.0×1017 cm?3.

Abstract: The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer.

Abstract: A vertical stack of a first silicon germanium alloy layer, a second epitaxial silicon layer, a second silicon germanium layer, and a germanium layer are formed epitaxially on a top surface of a first epitaxial silicon layer. The second epitaxial silicon layer, the second silicon germanium layer, and the germanium layer are patterned and encapsulated by a dielectric cap portion, a dielectric spacer, and the first silicon germanium layer. The silicon germanium layer is removed between the first and second silicon layers to form a silicon germanium mesa structure that structurally support an overhanging structure comprising a stack of a silicon portion, a silicon germanium alloy portion, a germanium photodetector, and a dielectric cap portion. The germanium photodetector is suspended by the silicon germanium mesa structure and does not abut a silicon waveguide. Germanium diffusion into the silicon waveguide and defect density in the germanium detector are minimized.

Abstract: A lateral p-i-n photodetector is provided that includes an array of vertical semiconductor nanowires of a first conductivity type that are grown over a semiconductor substrate also of the first conductivity type. Each vertically grown semiconductor nanowires of the first conductivity type is surrounded by a thick epitaxial intrinsic semiconductor film. The gap between the now formed vertically grown semiconductor nanowires-intrinsic semiconductor film columns (comprised of the semiconductor nanowire core surrounded by intrinsic semiconductor film) is then filled by forming an epitaxial semiconductor material of a second conductivity type which is different from the first conductivity type. In a preferred embodiment, the vertically grown semiconductor nanowires of the first conductivity type are n+ silicon nanowires, the intrinsic epitaxial semiconductor layer is comprised of intrinsic epitaxial silicon, and the epitaxial semiconductor material of the second conductivity type is comprised of p+ silicon.

Abstract: A pinned photodiode with improved short wavelength light response. In exemplary embodiments of the invention, a gate oxide is formed over a doped, buried region in a semiconductor substrate. A conductor is formed on top of the gate oxide. The gate conductor is transparent, and in one embodiment is a layer of indium-tin oxide. The transparent conductor can be biased to reduce the need for a surface dopant in creating a pinned photodiode region. The biasing of the transparent conductor produces a hole-rich accumulation region near the surface of the substrate. The gate conductor material permits a greater amount of charges from short wavelength light to be captured in the photo-sensing region in the substrate, and thereby increases the quantum efficiency of the photosensor.

Abstract: A photodetector array comprises a plurality of photodetectors formed by a high resistivity low doping concentration first semiconductor substrate and a low resistivity high doping concentration second semiconductor substrate. The first and second semiconductor substrates are directly bonded together with a silicon-to-silicon atomic bond at a bond interface, thereby providing a sharp transition from the first substrate to the second substrate. A method of making the photodetector array is also provided.

Abstract: Considering further promotion of high output and miniaturization of a sensor element, it is an object of the present invention to form a plurality of elements in a limited area so that an area occupied by the element is reduced for integration. It is another object to provide a process which improves the yield of a sensor element. According to the present invention, a sensor element using an amorphous silicon film and an output amplifier circuit constituted by a thin film transistor are formed over a substrate having an insulating surface. In addition, a metal layer for protecting an exposed wire when a photoelectric conversion layer of the sensor element is patterned is provided between the photoelectric conversion layer and the wire connected to the thin film transistor.

Abstract: An electron detector (30) for detection of electrons comprises a semiconductor wafer (11) having a central portion (12) with a thickness of at most 150 ?m, preferably at most 100 ?m, formed by etching an area of a thicker wafer. On opposite sides of the central portion (12) there are n-type and p-type contacts (16, 31). In operation, a reverse bias is applied across the contacts (16, 31) and electrons incident on the layer (15) of intrinsic semiconductor material between the contacts (16, 31) generate electron-hole pairs which accelerate towards the contacts (16, 31) where they may detected as a signal. Conductive terminals (24, 32) contact the contacts (16, 31) and are connected to a signal processing circuit in IC chips (28, 37) mounted to the semiconductor wafer (11) outside the active area of the detector (30). The contacts (16, 31) are shaped as arrays of strips extending orthogonally on the two sides of the intrinsic layer (15) to provide two-dimensional spatial resolution.

Abstract: A mesa photodiode which includes a mesa, the side wall of the mesa (a light-receiving region mesa) and at least a shoulder portion of the mesa in an upper face of the mesa are continuously covered with a semiconductor layer of a first conductivity type, a second conductivity type, a semi-insulating type, or an undoped type (an undoped InP layer, for example) that is grown on the side wall and the upper face of the mesa. In the semiconductor layer, a layer thickness D1 of a portion covering the side wall of the mesa is equal to or greater than 850 nm.

Abstract: According to an exemplary aspect of the present invention, at least a semiconductor mesa and a semiconductor layer covering at least the side wall of the mesa and a semiconductor mesa are formed on an n-type semiconductor substrate. The semiconductor mesa includes at least a light absorption layer and a p-type contact layer. The principal surface of the semiconductor substrate tilts at an angle ? to the (100) plane. The angle ? is 0.1 degree?|?|?10 degrees.

Abstract: An object of the present invention is to reduce the conducting loss of an existing conversion circuit while suppressing its noise. The present invention is typically a circuit arrangement includes at least one switching device and a free-wheel diode connected in parallel with the switching device. The free-wheel diode is formed by connecting a silicon PiN diode in parallel with a Schottky barrier diode that uses a semiconductor material having a wider band gap than silicon as a base material. The silicon PiN diode and Schottky barrier diode are separate chips.

Abstract: An image sensor device is disclosed. The image sensor device comprises a substrate having a pixel region and at least one integrated circuit in the substrate of the pixel region. A photodiode is disposed on the substrate of the pixel region, comprising a lower electrode, a transparent upper electrode and a photoelectric conversion layer. The lower electrode is disposed on the substrate and is electrically connected to the integrated circuit. The photoelectric conversion layer is disposed on the lower electrode and has a submicron structure therein. The transparent upper electrode is disposed on the photoelectric conversion layer.

Abstract: The lattice mismatching between a Ge layer and a Si layer is as large as about 4%. Thus, when the Ge layer is grown on the Si layer, penetration dislocation is introduced to cause leakage current at the p-i-n junction. Thereby, the photo-detection sensitivity is reduced, and the reliability of the element is also lowered. Further, in the connection with a Si waveguide, there are also problems of the reflection loss due to the difference in refractive index between Si and Ge, and of the absorption loss caused by a metal electrode.

Abstract: Wirebonds are formed to couple an opto-electronic device chip having two or more opto-electronic devices to a signal processing chip. Two or more mutually adjacent wirebond groups, each corresponding to one of the opto-electronic devices, are formed. For example, each wirebond group can include a first wirebond coupling a P-terminal of the opto-electronic device of the wirebond group to the signal processing chip, a second wirebond coupling an N-terminal of the opto-electronic device of the wirebond group to the signal processing chip, and a third wirebond coupling the opto-electronic device chip to the signal processing chip.

Abstract: It is possible to reduce the contact resistance so as to improve the conversion efficiency of a photoelectric conversion element structure. Provided is a photoelectric conversion element structure of the pin structure which selects an upper limit energy level of the valence band of the p-type semiconductor or the electron affinity of the n-type semiconductor layer and the work function of a metal layer which is brought into contact with the semiconductor, so as to reduce the contact resistance as compared to the case when Al or Ag is used as an electrode. The selected metal layer may be arranged between the electrode formed from Al or Ag and the semiconductor or may be substituted for the n- or p-type semiconductor.

Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.

Abstract: A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.