Abstract: In a semiconductor device including a semiconductor substrate and at least one sensor element made of vanadium oxide formed over the semiconductor substrate, the sensor element is designed so that a density of a current flowing through the sensor element is between 0 and 100 ?A/?m2.

Abstract: Apparatus, methods, and systems for bonding a cover wafer to a MEMS threshold sensors located on a silicon disc. The cover wafer is trenched to form a region when bonded to the silicon wafer that produces a gap over the contact bond pads of the MEMS threshold sensor. The method includes a series of cuts that remove part of the cover wafer over the trenches to permit additional cuts that may avoid the contact bond pads of the MEMS threshold sensor. In addition the glass frit provides for isolation of the sensor with a hermetic seal. The cavity between the MEMS threshold sensor and the cover wafer may be injected with a gas such as nitrogen to influence the properties of the MEMS threshold sensor. The MEMS threshold sensor may be utilized to sense a threshold for pressure, temperature or acceleration.

Abstract: A semiconductor device comprises a plurality of banks, a plurality of control circuits, and a plurality of temperature sensors, wherein each of the plurality of temperature sensors is disposed near at least one of the plurality of banks for sensing the temperature of the area surrounding the at least one of the plurality of banks and for outputting a sense signal corresponding to a sensed temperature, and each of the plurality of control circuits outputs at least one control signal, for controlling an operation of the at least one of the plurality of banks, to the at least one of the plurality of banks based on the sense signal.

Abstract: A solid-state energy converter with a semiconductor or semiconductor-metal implementation is provided for conversion of thermal energy to electric energy, or electric energy to refrigeration. In n-type heat-to-electricity embodiments, a highly doped n* emitter region made of a metal or semiconductor injects carriers into an n-type gap region. A p-type layer is positioned between the emitter region and gap region, allowing for discontinuity of corresponding Fermi-levels and forming a potential barrier to sort electrons by energy. Additional p-type layers can optionally be formed on the collector side of the converter. One type of these layers with higher carrier concentration (p*) serves as a blocking layer at the cold side of the converter, and another layer (p**) with carrier concentration close to the gap reduces a thermoelectric back flow component. Ohmic contacts on both sides of the device close the electrical circuit through an external load to convert heat to electricity.

Abstract: A thermoelectric module has a first substrate, a second substrate spaced from the first substrate, a plurality of P type thermoelectric elements and N type thermoelectric elements arranged in the space between the first and second substrates, and a plurality of electrodes which connect the P type and N type thermoelectric elements in series. Each electrode is connected to a respective one of the plurality of P type thermoelectric elements at a first connection and a respective one of the plurality of N type thermoelectric elements in the space, and a sealant is located at an edge portion of the space. Each one of a series of first or outer electrodes closest to the edge portion of the space has a concave portion that is concaved in a direction departing from the edge portion of the space and is at a position between the first connection and the second connection.

Abstract: A silicon/germanium (SiGe) superlattice thermal sensor is provided with a corresponding fabrication method. The method forms an active CMOS device in a first Si substrate, and a SiGe superlattice structure on a second Si-on-insulator (SOI) substrate. The first substrate is bonded to the second substrate, forming a bonded substrate. An electrical connection is formed between the SiGe superlattice structure and the CMOS device, and a cavity is formed between the SiGe superlattice structure and the bonded substrate.

Abstract: Gallium oxide films for sensing gas comprise Ga2O3 and have a porosity of at least about 30%. Such films can be formed by coating a substrate with a solution comprising: a gallium salt and a porogen comprising an organic compound comprising a hydrophilic chain and a hydrophobic chain; and heating the substrate to a temperature in the range from about 400° C. to about 600° C. while exposing the substrate to an oxygen-containing source to convert the gallium salt to a gallium oxide.

Abstract: In a semiconductor device including a semiconductor substrate, and at least one sensor element made of vanadium oxide formed over the semiconductor substrate, the sensor element is designed so that a density of a current flowing through the sensor element is between 0 and 100 ?A/?m2.

Abstract: Provided are a semiconductor power module package and a method of fabricating the same. The semiconductor power module package includes a substrate, semiconductor chips arranged on a top surface of the substrate, and a temperature sensor mounted on a top surface of at least one of the semiconductor chips. The semiconductor chips and the temperature sensor are electrically connected to each other through leads. A sealing material covers the top surface of the substrate, the semiconductor chips, and the temperature sensor except for portions of the leads and a bottom surface of the substrate. The temperature sensor may include a thermistor, and the thermistor may include first and second electrode terminals connected to corresponding leads of the leads. A first wiring pattern may be in contact with the first electrode terminal, and a second wiring pattern may be in contact with the second electrode terminal.

Abstract: A thermionic or thermotunneling generator or heat pump is disclosed, comprising electrodes substantially facing one another and separated by spacers disposed between the electrodes, wherein the substrate material for the cathode is preferably a single crystalline silicon wafer while the substrate for the anode is an organic wafer, and preferably a polished polyimide (PI) wafer. On the cathode side, standard silicon wafer processes create the 10-1000 nm thin spacers and edge seals from thermally grown oxide. Either wafer is partially covered with a thin film of material that is characterized by high electrical conductivity and low work function. In one embodiment, the cathode is partially covered with a thin film of Ag—Cs—O. In another embodiment, the anode is additionally covered with a thin film of Ag—Cs—O, in which case the work function of the cathode coating material is reduced further utilizing an Avto Metal structure of nanoscale patterned indents.

Abstract: Systems and methods for positioning thermal sensors within an integrated circuit in a manner that provides useful thermal measurements corresponding to different parts of the integrated circuit. In one embodiment, an integrated circuit includes multiple, duplicate functional blocks. A separate thermal sensor is coupled to each of the duplicate functional blocks, preferably in the same relative location on each of the duplicate functional blocks, and preferably at a hotspot. One embodiment also includes thermal sensors on one or more functional blocks of other types in the integrated circuit. One embodiment includes a thermal sensor positioned at a cool spot, such as at the edge of the integrated circuit chip. Each of the thermal sensors may have ports to enable power and ground connections or data connections between the sensors and external components or devices.

Abstract: A compact resistive thermal sensor is provided for an integrated circuit (IC), wherein different sensor components are placed on different layers of the IC. This allows the lateral area needed for the sensor resistance wire on any particular IC layer to be selectively reduced. In a useful embodiment, a conductive element extending between first and second layers for connecting said first and second conductive paths into a single continuous conductive path having a resistance that varies with temperature. The sensor is responsive to electric current sent through said continuous path for determining temperature proximate to said continuous path from said path resistance.

Abstract: The present invention relates to a sensor element which has a semiconductor structure based on a Group III-nitride. The semiconductor sensor element serves for determining the pressure, the temperature, a force, a deflection or an acceleration. It has a substrate base 1, disposed thereon, a homogeneous semiconductor layer based on a Group III-nitride, the surface of the homogeneous semiconductor layer 2 orientated towards the substrate base 1 having at least partially a spacing from the surface of the substrate base orientated towards the homogeneous semiconductor layer 2, 2f, and being distinguished in that at least two electrical conducting contacts 5 for conducting an electrical output signal, which can be generated by the homogeneous semiconductor layer 2, 2f, are disposed on, at or under the homogeneous semiconductor layer 2, 2f or are integrated in the latter.

Abstract: Methods and structures for discharging plasma formed during the fabrication of semiconductor device are disclosed. The semiconductor device includes a wordline, a common ground line and a fuse structure for electrically coupling the wordline and the common ground line until a break signal is applied via the fuse structure.

Abstract: A solid-state imaging device includes first pixels and second pixels. Each of the first pixels and the second pixels includes a p-type diffusion layer formed in a semiconductor substrate and an n-type diffusion layer formed on the p-type diffusion layer. A first p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the first pixels. A second p-type implantation layer having a lower impurity concentration than the first p-type implantation layer or no p-type implantation layer is formed on a surface side of the semiconductor substrate on the n-type diffusion layer of the second pixels.

Abstract: According to one embodiment of the present invention, a temperature sensor is provided, including a first electrode, a second electrode, a nanoporous material disposed between the first electrode and the second electrode, and a diffusion material which is located outside the nanoporous material that is capable of diffusion into the nanoporous material. The amount of diffusion material diffusing into the nanoporous material is dependent on the temperature to which the temperature sensor is exposed. The resistance of the nanoporous material is dependent on the amount of diffusion material diffusing into the nanoporous material.

Abstract: An apparatus comprising a microelectromechanical system (MEMS) device. The MEMS device includes a substrate having an anchoring pad thereon and a structural element. The structural element has a beam that includes a first part and a second part. The first part is attached to both the anchoring pad and to the second part. The second part is movable with respect to the substrate and made of an electrically conductive material. Additionally, at least one of the following conditions hold: the first part is made of a material having: a first yield stress that is greater than a second yield stress of the electrically conductive material of the second part; a fatigue resistance that is greater than a second fatigue resistance of the electrically conductive material of the second part; or, a creep rate that is less than a second creep rate of the electrically conductive material of the second part.

Abstract: A vanadium oxide film is formed on an interlayer insulating layer, and a silicon oxide film and a silicon nitride film are formed on the vanadium oxide film in this order. With a resist pattern used as a mask, the silicon nitride film is patterned. Then, the resist pattern is removed using a stripping solution or oxygen plasma ashing. Next, with the patterned silicon nitride film used as a mask, the silicon oxide film and the vanadium oxide film are etched to form a resistor film of vanadium oxide.

Abstract: An electronic device and method are presented for creating at least one predetermined stimulus at the device output. The device comprises an electrically non-conductive holey structure (110) carrying at least two active electrically conductive cores (C1, C2) electrically insulated from one another along their lengths, for supplying a potential difference (V1, V2) between them, and at least one stimulus creator (S1) configured to be affected by said potential difference to provide a predetermined output of the device.

Abstract: Embodiments of the invention include a temperature sensor apparatus, method and system for providing an output voltage response that is linear to the temperature of the integrated circuit to which the temperature sensor belongs and/or the integrated circuit die on which the temperature sensor resides. The output voltage of the temperature sensor has an adjustable gain component and an adjustable voltage offset component that both are adjustable independently based on circuit parameters. The temperature sensor includes a conventional bandgap circuit, which generates an internal PTAT (proportional to absolute temperature) current to produce a bandgap reference voltage, and a current mirror arrangement that provides a scaled current that is proportional to the bandgap circuit's PTAT current. Conventionally, the scaled PTAT current is sourced through an output resistor to provide the output voltage of the temperature sensor.

Abstract: A method of manufacturing high temperature thermistors. A polycrystalline thermistor body is formed from a material selected from a list consisting of bulk polycrystalline Si with intrinsic conductivity and bulk polycrystalline Ge with intrinsic conductivity. At least one ohmic contact is formed on at least one surface of the polycrystalline thermistor body.

Abstract: A temperature sensor structure for a semiconductor device. One embodiment provides a semiconductor substrate including the semiconductor device. A dissipation region of the semiconductor device is adjacent to a main surface of the semiconductor substrate. A first layer arrangement is disposed on the main surface of the semiconductor substrate adjacent to the dissipation region of the semiconductor device. A second layer arrangement is disposed on the first layer arrangement with an insulation layer for galvanic separation therebetween. The first and second layer arrangements and the insulation layer form a layer structure on the main surface above the dissipation region. A circuit element is disposed in the second layer arrangement, the circuit element having a temperature-dependent characteristic and being coupled thermally to the dissipation region.

Abstract: Sensors are provided which enable detection with a high sensitivity in microchemistry and biochemical analysis by using devices integrated into a compact configuration and can be freely disposed on desired positions of a channel to perform detection. A measuring apparatus for detecting information and outputting light according to the information, the apparatus comprising: an active layer for emitting light and a micro-optical cavity, wherein light emission is limited in the active layer due to the influence of the selection of a photoelectromagnetic field mode, the selection is made by the micro-optical cavity, the light emission and a degree of selection of a photoelectromagnetic field mode is changed according to an environmental condition of the micro-optical cavity, so that the light emission is changed and the environmental condition is measured according to a change in the light emission.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings.

Abstract: A system and method for manufacturing semiconductor wafers comprising an RFID temperature sensor and generally described herein. Other embodiments may be described and claimed.

Abstract: The present invention is to provide an optical subassembly with a co-axial package that enables to sense the temperature of the devices mounted within the subassembly with a relatively inexpensive chip thermistor. The subassembly includes a co-axial package and a FPC board to connect the subassembly to the outer circuit. The thermistor is mounted on the FPC board such that one electrode thereof is connected to a pattern formed on a surface opposite to a surface facing the subassembly and the other electrode is soldered to a via hole connecting two surfaces of the FPC board and this via hole is soldered directly to the subassembly.

Abstract: A separated MEMS thermal actuator is disclosed which is largely insensitive to creep in the cantilevered beams of the thermal actuator. In the separated MEMS thermal actuator, a inlaid cantilevered drive beam formed in the same plane, but separated from a passive beam by a small gap. Because the inlaid cantilevered drive beam and the passive beam are not directly coupled, any changes in the quiescent position of the inlaid cantilevered drive beam may not be transmitted to the passive beam, if the magnitude of the changes are less than the size of the gap.

Abstract: A high temperature NTC thermistor includes a polycrystalline thermistor body, selected from a list consisting of polycrystalline Si with intrinsic conductivity and polycrystalline Ge with intrinsic conductivity. At least one ohmic contact is disposed on at least one surface of the polycrystalline thermistor body.

Abstract: An embodiment of the present invention related to fingerprint sensors is described. The sensor comprises an integrated-circuit chip having a sensitive surface, a substrate provided with electrical connections and wire-bonding wires connecting the chip to the electrical connections. The sensor further includes a molded protective resin at least partly covering the substrate and the chip and completely encapsulating the wire-bonding wires. The resin forms, on at least one side of the chip and at most three sides, a bump rising to at least 500 microns above the sensitive surface, this bump encapsulating the wire-bonding wires and constituting a guide for a finger, the fingerprint of which it is desired to detect.

Abstract: In a semiconductor integrated circuit device, a sheet-like temperature monitor member of vanadium oxide is provided, whose one end is connected to one via while the other end is connected to another via. A sheet-like thermal conducting layer of aluminum is provided below the temperature monitor member. A region equal to or greater than a half of the entire temperature monitor member overlies the thermal conducting layer in a plan view.

Abstract: A thermal protection device is for an integrated power MOSFET transistor including an interdigitated array of source regions and drain regions defined in a well region of the monocrystalline silicon substrate, and gate structures overhanging channel regions defined between adjacent source and drain regions. The thermal protection device may include a temperature sensor and a comparator for generating an over temperature flag signal usable for turning off the overheated power transistor.

Abstract: An on die thermal sensor includes a bandgap unit for generating a first voltage containing temperature information, a tracking unit for tracking a voltage level of the first voltage, and a low power control unit for generating a tracking enable signal for enabling the tracking unit and disabling the tracking unit after a minimum tracking operation time of the tracking unit elapses.

Abstract: The present invention comprises a tunneling device in which the collector electrode is modified so that tunneling of higher energy electrons from the emitter electrode to the collector electrode is enhanced. In one embodiment, the collector electrode is contacted with an insulator layer, preferably aluminum or silicon nitride, disposed between the collector and emitter electrodes. The present invention additionally comprises a method for enhancing tunneling of higher energy electrons from an emitter electrode to a collector electrode, the method comprising the step of contacting the collector electrode with an insulator, preferably aluminum or silicon nitride, and placing the insulator between the collector electrode and the emitter electrode.

Abstract: A laminated wafer sensor structure includes a housing layer having pocket openings formed therein, a circuit layer having a sensor element and electronic components mounted for registration with the pocket openings in the housing layer, and a rigid back layer. The laminated structure is suitable for handling by conventional robotic wafer handling systems. The wafer sensor structure is adapted for electrical connection to a base station that is also adapted for connection to a host computer system to facilitate communication among the sensor structure, the base station and the host computer.

Abstract: A MOSFET has its gate voltage controlled to provide a constant drain current of the MOSFET, for example to limit inrush current for charging a capacitance of a power supply arrangement. A decrease in the gate voltage supplied to the MOSFET, corresponding to an increase in the junction temperature of the MOSFET, by more than a determined amount is detected and used to reduce the gate voltage, and hence the drain current, for example to zero, to prevent heating of the MOSFET beyond a maximum operating temperature.

Abstract: A method of fabricating a CoSb3-based thermoelectric device is disclosed. The method includes providing a high-temperature electrode, providing a buffer layer on the high-temperature electrode, forming composite n-type and p-type layers, attaching the buffer layer to the composite n-type and p-type layers, providing a low-temperature electrode on the composite n-type and p-type layers and separating the composite n-type and p-type layers from each other to define n-type and p-type legs between the high-temperature electrode and the low-temperature electrode.

Abstract: A method of manufacturing high temperature thermistors from an ingot. The high temperature thermistors can be comprised of germanium or silicon. The high temperature thermistors have at least one ohmic contact.

Abstract: A semiconductor device is disclosed. In one embodiment the semiconductor device includes a semiconductor body of which is integrated a temperature sensor for measuring the temperature prevailing in the semiconductor body. The temperature sensor has a MOS transistor and a bipolar transistor. The MOS transistor is integrated into the semiconductor body nd configured such that the substhreshold current intensity of the MOS transistor is proportional to the temperature to be measured. The subthreshold current of the MOS transistor is amplified by the bipolar transistor.

Abstract: A silicon wafer is fabricated utilizing two or more semiconductor wafers. The wafers are processed using conventional wafer processing techniques and the wafer contains a plurality of output terminals which essentially are platinum titanium metallization or high temperature contacts. A glass cover member is provided which has a plurality of through holes. Each through hole is associated with a contact on the semiconductor wafer. A high temperature lead is directed through the through hole or aperture in the glass cover and is bonded directly to the appropriate contact. The lead is of a sufficient length to extend into a second non through aperture in the contact glass. The non through aperture is located on the side of the contact glass not in contact with the silicon sensor. The non through aperture is then filled with a high temperature conductive glass frit. A plurality of slots are provided.

Abstract: A method of manufacturing a nanowire filament includes forming and fusing actions. In a forming action, close proximity conductors are formed. In another forming action, a junction oxide is formed between the close proximity conductors. In a fusing action, a nanowire filament is fused between the close proximity conductors, through the junction oxide. A circuit is also provided, having first and second close proximity conductors, and a nanowire filament fused between the close proximity conductors.

Abstract: The present invention provides an SiGe-based thin film, a method for manufacturing this thin film, and applications of this thin film.

Abstract: In a temperature sensor section of a semiconductor integrated circuit device, first vias of tungsten are formed at the topmost layer of a multi-layer wiring layer and pads of titanium are provided on regions of the multi-layer wiring layer which covers the vias. An insulating layer is provided in such a way as to cover the multi-layer wiring layer and the pads, second vias are so formed as to reach the pads. Vanadium oxide is buried in the second vias by reactive sputtering, and a temperature monitor part of vanadium oxide is provided in such a way as to connect the second vias each other. Accordingly, the temperature monitor part is connected between the two wires.

Abstract: This invention provides a miniaturized silicon thermal flow sensor with improved characteristics, based on the use of two series of integrated thermocouples (6, 7) on each side of a heater (4), all integrated on a porous silicon membrane (2) on top of a cavity (3). Porous silicon (2) with the cavity (3) underneath provides very good thermal isolation for the sensor elements, so as the power needed to maintain the heater (4) at a given temperature is very low. The formation process of the porous silicon membrane (2) with the cavity (3) underneath is a two-step single electrochemical process. It is based on the fact that when the anodic current is relatively low, we are in a regime of porous silicon formation, while if this current exceeds a certain value we turn into a regime of electropolishing. The process starts at low current to form porous silicon (2) and it is then turned into electropolishing conditions to form the cavity (3) underneath.

Abstract: A micromechanical component includes an anti-adhesive layer, formed from at least one fluorine-containing silane, applied to at least parts of its surface for reducing surface forces. To increase mechanical and thermal load capacity, the anti-adhesive layer is provided as a multilayer coating which is formed from at least one metal oxide layer and at least one layer composed of at least one fluorine-containing silane.

Abstract: The invention is directed to improving of a yield and reliability of a BGA type semiconductor device having ball-shaped conductive terminals. A semiconductor wafer having warped portions is supported by a plurality of pins, being spaced from a heated stage. The semiconductor wafer is heated as a whole by uniformly irradiating thermal radiation thereto by using IR heaters disposed on an upper part of the semiconductor wafer and side heaters facing to lateral surfaces of the semiconductor wafer. This enables uniform reflowing of the conductive terminals provided on the semiconductor wafer, and makes each of the conductive terminals form a uniform shape.

Abstract: A semiconductor component, such as a humidity sensor, which has a semiconductor substrate, such as, for example, made of silicon, a first electrode and a second electrode and at least one first layer that is accessible for a medium acting from the outside on the semiconductor component, the first layer being arranged at least partially between the first and the second electrode. To reduce the costs for producing the semiconductor component the first layer has pores into which the medium reaches at least partially.

Abstract: The present invention provides an integrated circuit. The integrated circuit has a plurality of chip areas. The integrated circuit also has a plurality of temperature sensors, at least one per chip area. The temperature sensors generate a voltage proportional to the measured temperature. A voltage comparator compares the voltage output of the plurality of temperature sensors. The voltage comparator is further employable to generate a signal if the difference between the voltages generated by the plurality of temperature sensors exceeds a threshold.

Abstract: Disclosed is a temperature sensor for an integrated circuit having at least one field effect transistor (FET) having a polysilicon gate, in which a current and a voltage is supplied to the polysilicon gate, changes in the current and the voltage of the polysilicon gate are monitored, wherein the polysilicon gate of the at least one FET is electrically isolated from other components of the integrated circuit, and the changes in the current or voltage are used to calculate a change in resistance of the polysilicon gate, and the change in resistance of the polysilicon gate is used to calculate a temperature change within the integrated circuit.

Abstract: A method and a system for protecting the power semiconductor components used in the powerstages of power electronics devices, such as frequency converters, wherein calculation modeling the degree of heating of the semiconductor junction of the power components (V11–V16) is used, wherein the degree of heating of the power components between the measurable outer surface or cooler and the internal semiconductor junction is determined on the basis of the dissipation power and a thermal network model of the component, wherein the temperature of the outer surface of the power component or the temperature of the cooler is measured, wherein the modeled temperature of the semiconductor junction is the sum of the measured temperature of the outer surface or cooler and the calculated degree of heating, and wherein, based on the modeled junction temperature, an alarm is issued or some other protective action is taken.

Abstract: A family of isostructural compounds have been prepared having the general formula AnPbmBinO2n+m. These compounds possess a NaCl lattice type structure as well as low thermal conductivity and controlled electrical conductivity. Furthermore, the electrical properties can be controlled by varying the values for n and m. These isostructural compounds can be used for semiconductor applications such as detectors, lasers and photovoltaic cells. These compounds also have enhanced thermoelectric properties making them excellent semiconductor materials for fabrication of thermoelectric devices.