Amorphous Semiconductor Is Alloy Or Contains Material To Change Band Gap (e.g., Si X Ge 1-x , Sin Y ) Patents (Class 257/55)
  • Patent number: 5616932
    Abstract: The content of bonding hydrogen in an a - SiGe film is so adjusted that in a case where the content of bonding hydrogen per Si atom in the film is in the range of approximately 8 to 14 at. %, [SiH.sub.2 ]/[Si] and [SiH]/[Si] are respectively in the ranges of approximately 0.5 to 4 at. % and approximately 7 to 10 at. %, and both [SiH.sub.2 ]/[Si] and [SiH]/[Si] increase at approximately equal slops as the content of bonding hydrogen increases.
    Type: Grant
    Filed: November 21, 1994
    Date of Patent: April 1, 1997
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Keiichi Sano, Yoichiro Aya
  • Patent number: 5603778
    Abstract: A photoelectric conversion device which has high conversion efficiency and high reliability, and a manufacturing method to make the photoelectric conversion device at a low cost are provided by improving a method of forming a transparent conductive metal oxide film to achieve stable film production for a long period of time and to prevent deterioration in transparency and resistance of such an oxide layer otherwise caused by high-rate film formation. In a method of manufacturing a photoelectric conversion device which comprises a reflecting layer at least one surface of which has high reflectivity to light, and a transparent conductive oxide layer formed by a sputtering process, a thin film semiconductor junction laminate a transparent electrode which are formed on the reflecting layer in this order, the metal oxide layer is formed by sputtering in which a metal oxide target having specific resistance not larger than 5.0 .OMEGA.cm and a crystal particle size not larger than 15 .mu.
    Type: Grant
    Filed: April 19, 1995
    Date of Patent: February 18, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yuichi Sonoda
  • Patent number: 5600152
    Abstract: In order to reduce the dark current due to an interfacial defect and effect higher sensitivity, there is disclosed a manufacturing method for a photoelectric conversion device having a light absorbing layer and a carrier multiplying layer at least having a non-single crystalline semiconductor, the carrier multiplying layer being composed of a plurality of graded layers of which the forbidden band width continuously changes from the minimum forbidden band width Eg1 to the maximum forbidden band width Eg2, wherein there is an energy step sufficient to avalanche multiply the carriers between a region of the maximum forbidden band width Eg2 and a region of the minimum forbidden band width Eg1 adjacent thereto, when an electric field is applied, characterized in that after the deposition of any one of the region of the minimum forbidden band width Eg1 and the region of the maximum forbidden band width Eg2, the plasma treatment is performed with a gas at least containing oxygen or nitrogen, and further the other re
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: February 4, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiraku Kozuka, Shigetoshi Sugawa
  • Patent number: 5599403
    Abstract: The present invention provides photoelectric conversion elements, wherein the long wavelength sensitivity, the fill factor, and the photoelectric conversion efficiency are improved. In order to provide photoelectric conversion elements wherein light deterioration is reduced, the field durability enhanced, and the temperature characteristic improved, a p-layer composed of amorphous silicon type semiconductor containing hydrogen, an i-layer composed of amorphous silicon-germanium type semiconductor containing hydrogen and further including microcrystalline germanium, and an n-layer composed of amorphous silicon type semiconductor containing hydrogen are laminated on a substrate, the i-layer being formed at a substrate temperature from 400.degree. to 600.degree. C. by microwave plasma CVD, the particle diameter of said microcrystalline germanium ranging from 50 to 500 angstroms. Also, the content of microcrystalline germanium varies in the layer thickness direction.
    Type: Grant
    Filed: June 12, 1995
    Date of Patent: February 4, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshimitsu Kariya, Keishi Saito
  • Patent number: 5589007
    Abstract: A photovoltaic element comprises a first non-monocrystalline silicon-containing semiconductor layer of a first-conductivity type, a first i-type non-monocrystalline silicon-containing semiconductor layer formed by microwave plasma CVD, a second i-type non-monocrystalline silicon-containing semiconductor layer formed by high-frequency plasma CVD, and a second non-monocrystalline silicon-containing semiconductor layer of a conductivity type opposite to the first-conductivity type, wherein the second semiconductor layer is formed by plasma doping.
    Type: Grant
    Filed: September 5, 1995
    Date of Patent: December 31, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Hideo Tamura, Atsushi Yasuno, Akira Sakai, Tadashi Hori
  • Patent number: 5573601
    Abstract: A pin type photovoltaic element having an electroconductive substrate and a cell stacked with an n-type semiconductor layer, an i-type semiconductor layer and a p-type semiconductor, all composed of a non-single crystal material containing silicon, and featuring an intermediate layer. The intermediate layer composed of non-single material containing silicon atoms as the matrix and atoms of elements belonging to Group IIIA and VA of the periodic table is between the i-type conductor layer and the p-type conductor layer or the n-type semiconductor layer. The intermediate layer may contain carbon atoms and/or germanium atoms.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: November 12, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keishi Saitoh, Tatsuyuki Aoike, Yasushi Fujioka, Masafumi Sano, Mitsuyuki Niwa
  • Patent number: 5567956
    Abstract: An information processing apparatus including a photoelectric conversion element having a photoelectric conversion section. The photoelectric conversion section has an insulating layer with first and second opposed surfaces, and a photoconductive semiconductor layer with first and second opposed surfaces and an intermediate region disposed therebetween, the second surface of the semiconductor layer being adjacent to the first surface of the insulating layer. The photoconductive semiconductor layer has a non-monocrystalline matrix of silicon atoms and including hydrogen atoms distributed nonuniformly. A concentration of the hydrogen atoms is greater near the first and second surfaces of the photoconductive semiconductor layer than in the intermediate region, so that an energy band gap width of the photoconductive semiconductor layer varies between the first and second surfaces of said photoconductive semiconductor layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: October 22, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masato Yamanobe, Shinichi Takeda, Takayuki Ishii, Toshihiro Saika, Isao Kobayashi
  • Patent number: 5563425
    Abstract: An object of the present invention is to provide a photoelectrical conversion device in which recombination of carriers excited by light is prevented and the open voltage and the carrier range of positive holes are improved and to provide a generating system using the photoelectrical conversion device. The photoelectrical conversion device includes a p-layer, an i-layer, and an n-layer, wherein the photoelectrical conversion device being formed by stacking the p-layer, the i-layer and the n-layer each of which is made of non-single-crystal silicon semiconductor, the i-layer contains germanium atoms, the band gap of the i-layer is smoothly changed in a direction of the thickness of the i-layer, the minimum value of the band gap is positioned adjacent to the p-layer from the central position of the i-layer and both of a valence control agent to serve as a donor and another valence control agent to serve as an acceptor are doped into the i-layer.
    Type: Grant
    Filed: November 10, 1993
    Date of Patent: October 8, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keishi Saito, Tatsuyuki Aoike, Masafumi Sano, Mitsuyuki Niwa, Ryo Hayashi, Masahiko Tonogaki
  • Patent number: 5543634
    Abstract: In a gaseous glow-discharge process for coating a substrate with semiconductor material, a variable electric field in the region of the substrate and the pressure of the gaseous material are controlled to produce a uniform coating having useful semiconducting properties. Electrodes having concave and cylindrical configurations are used to produce a spacially varying electric field. Twin electrodes are used to enable the use of an AC power supply and collect a substantial part of the coating on the substrate. Solid semiconductor material is evaporated and sputtered into the glow discharge to control the discharge and improve the coating. Schottky barrier and solar cell structures are fabricated from the semiconductor coating. Activated nitrogen species is used to increase the barrier height of Schottky barriers.
    Type: Grant
    Filed: June 2, 1994
    Date of Patent: August 6, 1996
    Assignee: Plasma Physics Corp.
    Inventor: John H. Coleman
  • Patent number: 5521400
    Abstract: A semiconductor device including a conductive substrate or a first conductive layer formed on the substrate, a non-single-crystal semiconductor layer member is disposed on the conductive substrate or the conductive layer, the non-single-crystal semiconductor layer member having at least one intrinsic, non-single-crystal semiconductor layer, and a second conductive layer disposed on the non-single-crystal semiconductor layer. The intrinsic non-single-crystal semiconductor layer contains sodium and oxygen in very low concentrations where each concentration is 5.times.10.sup.18 atoms/cm.sup.3 or less.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: May 28, 1996
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 5507881
    Abstract: Solar cells are formed of (a) a transparent substrate; (b) a transparent electrode; (c) a first doped layer comprising amorphous silicon oxide, optionally including nitrogen, said first doped layer containing a dopant whereby the first doped layer is of a first conductivity type and has an optical gap of from 2.0 to 2.3 eV and a ratio of light conductivity to dark conductivity of 5 or less at 25.degree. C.; (d) a layer of intrinsic amorphous silicon; (e) a second doped layer comprising amorphous silicon, said second doped layer containing a dopant whereby the second doped layer is of a second conductivity type different from the first conductivity type; and (f) a second electrode. The first doped layer may be of either n-type or p-type conductivity. The first doped layer can be formed over the transparent electrode by decomposing a gas mixture comprising SiH.sub.4, an oxygen source gas selected from N.sub.2 O or CO.sub.2, and a dopant, in a hydrogen carrier at a substrate temperature of 150.degree. to 250.
    Type: Grant
    Filed: March 16, 1994
    Date of Patent: April 16, 1996
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Porponth Sichanugrist, Shinji Fujikake, Hiromitsu Ota
  • Patent number: 5501745
    Abstract: The present invention relates to a low temperature method for making a photovoltaic material. In particular, the present invention describes a low temperature method for the deposition in vacuo of successive layers of materials required for a photovoltaic device. The present invention uses ion beam assisted processes in which a selected silicon containing precursor film is controllably converted to an amorphous silicon and carbon mixture. Ion beams are used to control the hydrogen content and thereby control the electrical conductivity of the material. The present invention further comprises the addition of a dopant and the deposition of the electrical contacts, both by thermal evaporation.
    Type: Grant
    Filed: May 31, 1994
    Date of Patent: March 26, 1996
    Assignee: Southwest Research Institute
    Inventor: Geoffrey Dearnaley
  • Patent number: 5464991
    Abstract: Non-linear optical materials are formed from amorphous thin films having semiconductor microcrystallites dispersed therein. Amorphous thin films of nitrides or carbides are selected that have a larger bandgap than the bandgap of the semiconductor materials which form the dispersed microcrystallites in order to prevent the surfaces of the microcrystallites from undergoing chemical reactions such as oxidation and the like. The non-linear optical materials are prepared by a sputtering method in which a target formed from the semiconductor material and a separate target formed from the nitrides or carbides are sputtered to produce the non-linear optical material.
    Type: Grant
    Filed: October 31, 1994
    Date of Patent: November 7, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshio Manabe, Ichiro Tanahashi, Tsuneo Mitsuyu
  • Patent number: 5456764
    Abstract: Solar cell made using a heterojunction formed from a crystalline silicon layer of a first conductivity type and a hydrogenated amorphous silicon film of a second conductivity type different from the first conductivity type. The hydrogenated amorphous silicon film includes oxygen.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: October 10, 1995
    Assignee: Fuji Electric Co., Ltd.
    Inventors: Akihiko Asano, Yukimi Ichikawa
  • Patent number: 5456762
    Abstract: The present invention provides photoelectric conversion elements, wherein the long wavelength sensitivity, the fill factor, and the photoelectric conversion efficiency are improved. In order to provide photoelectric conversion elements wherein light deterioration is reduced, the field durability enhanced, and the temperature characteristic improved, a p-layer composed of amorphous silicon type semiconductor containing hydrogen, an i-layer composed of amorphous silicon-germanium type semiconductor containing hydrogen and further including microcrystalline germanium, and an n-layer composed of amorphous silicon type semiconductor containing hydrogen are laminated on a substrate, the i-layer being formed at a substrate temperature from 400.degree. to 600.degree. C. by microwave plasma CVD, the particle diameter of said microcrystalline germanium ranging from 50 to 500 angstroms. Also, the content of microcrystalline germanium varies in the layer thickness direction.
    Type: Grant
    Filed: December 22, 1993
    Date of Patent: October 10, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshimitsu Kariya, Keishi Saito
  • Patent number: 5442205
    Abstract: A heterostructure includes a stained epitaxial layer of either silicon or germanium that is located overlying a silicon substrate, with a spatially graded Ge.sub.x Si.sub.1-x epitaxial layer overlain by a ungraded Ge.sub.x.sbsb.0 Si.sub.1-x.sbsb.0 intervening between the silicon substrate and the strained layer. Such a heterostructure can serve as a foundation for such devices as surface emitting LEDs, either n-channel or p-channel silicon-based MODFETs, and either n-channel or p-channel silicon-based MOSFETs.
    Type: Grant
    Filed: August 9, 1993
    Date of Patent: August 15, 1995
    Assignee: AT&T Corp.
    Inventors: Daniel Brasen, Eugene A. Fitzgerald, Jr., Martin L. Green, Donald P. Monroe, Paul J. Silverman, Ya-Hong Xie
  • Patent number: 5434531
    Abstract: An integrated circuit which includes a pair of serially arranged P channel transistor devices connected with their source and drain terminals in series. The devices are constructed as N well devices in a P substrate. Using a pair of N well devices allows higher voltages to be divided and applied across the two devices without reaching the breakdown limits of either the oxide or the junctions between different portions of the devices used in the process. These devices have been found capable of transferring ten or more volts to circuitry for programming or erasing flash EEPROM cells even the they are a part of integrated circuitry designed for only 3.3 volt usage.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: July 18, 1995
    Assignee: Intel Corporation
    Inventors: Michael J. Allen, Charles H. Lucas
  • Patent number: 5417770
    Abstract: A method of quickly depositing a non-single-crystal semiconductor film and forming a silicon-type non-single-crystal photovoltaic device, and a method of continuously manufacturing the photovoltaic devices. By this method the deposited film is formed by decomposing a raw material gas with microwave energy which is lower than the microwave energy required to completely decompose the raw material gas. RF energy is applied at the same time which is higher in energy than the microwave energy. The microwave energy acts on the raw material gas at an internal pressure level of 50 mTorr or lower to form a uniform non-single-crystal semiconductor film with excellent electrical characteristics and reduced light deterioration.
    Type: Grant
    Filed: June 25, 1993
    Date of Patent: May 23, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keishi Saitoh, Tatsuyuki Aoike, Masafumi Sano, Mitsuyuki Niwa, Jinsho Matsuyama, Toshimitsu Kariya, Yuzou Kouda, Ryou Hayashi, Masahiko Tonogaki
  • Patent number: 5414275
    Abstract: A photoelectric converting device with PIN structure includes an amorphous I-type semiconductor layer and charge injection blocking layers positioned to sandwich the I-type layer. At least one of the charge injection blocking layers comprises an amorphous P- or N-semiconductor layer in contact with the I-type layer and an amorphous P- or N-semiconductor layer containing microcrystalline structure.
    Type: Grant
    Filed: December 6, 1993
    Date of Patent: May 9, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shigetoshi Sugawa, Ihachiro Gofuku
  • Patent number: 5371380
    Abstract: A non-single crystalline semiconductor containing at least one kind of atoms selected from the group consisting of silicon atoms (Si) and germanium atoms (Ge) as a matrix, and at least one kind of atoms selected from the group consisting of hydrogen atoms (H) and halogen atoms (X), wherein said non-single crystalline semiconductor has an average radius of 3.5 .ANG. or less and a density of 1.times.10.sup.19 (cm.sup.-3) or less as for microvoids contained therein. The non-single crystalline semiconductor excels in semiconductor characteristics and adhesion with other materials and are effectively usable as a constituent element of various semiconductor devices.
    Type: Grant
    Filed: January 31, 1994
    Date of Patent: December 6, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keishi Saito, Tatsuyuki Aoike, Mitsuyuki Niwa, Toshimitsu Kariya, Yuzo Koda
  • Patent number: 5349204
    Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: September 20, 1994
    Assignee: Semiconductor Energy Laboratory, Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 5342452
    Abstract: A photovoltaic device includes a conductive substrate, a semiconductor layer formed on the conductive substrate and made of a non-single-crystal semiconductor material containing at least silicon atoms, and a transparent electrode stacked on the semiconductor layer, wherein the transparent electrode is made of a conductive oxide containing carbon atoms, nitrogen atoms, or both and the carbon and/or nitrogen atoms are contained in larger quantities in the portion of the transparent electrode adjacent to the semiconductor layer.
    Type: Grant
    Filed: September 23, 1992
    Date of Patent: August 30, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Keishi Saito, Tatsuyuki Aoike
  • Patent number: 5324364
    Abstract: A pin junction photovoltaic device comprising a substrate and a pin junction semiconductor active layer region disposed on said substrate, said pin junction semiconductor active layer region comprising a p-type semiconductor layer composed of a p-type non-single crystalline semiconductor material, an i-type semiconductor layer composed of an i-type non-single crystalline semiconductor material, and an n-type semiconductor layer composed of an n-type non-single crystalline semiconductor material, characterized in that (a) a buffer layer comprising a non-single crystalline silicon semiconductor material substantially free of germanium atoms is interposed between said p-type semiconductor layer and said i-type semiconductor layer, (b) a buffer layer comprising a non-single crystalline silicon semiconductor material substantially free of germanium atoms is interposed between said i-type semiconductor layer and said n-type semiconductor layer, and said i-type semiconductor layer is formed of an amorphous silicon g
    Type: Grant
    Filed: April 13, 1993
    Date of Patent: June 28, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koichi Matsuda, Masafumi Sano, Tsutomu Murakami
  • Patent number: 5311047
    Abstract: An amorphous Si/SiC heterojunction color-sensitive phototransistor was successfully fabricated by plasma-enhanced chemical vapor deposition. The structure is glass/ITO/a-Si(n.sup.+ -i-p.sup.+)/a-SiC(i-n.sup.+)/Al. The device is a bulk barrier transistor with a wide-bandgap amorphous SiC emitter. The phototransistor revealed a very high optical gain of 40 and a response speed of 10 us at an input light power of 5 uW and a collector current of 0.12 mA at a voltage of 14 V. The peak response occurs at 610 nm under 1 V bias and changes to 420 and 540 nm under 7- and 13-V biases, respectively.
    Type: Grant
    Filed: November 16, 1988
    Date of Patent: May 10, 1994
    Assignee: National Science Council
    Inventor: Chun-Yen Chang
  • Patent number: 5282993
    Abstract: An amorphous semiconductor material which does not age under the action of light is particularly suitable for red-sensitive photovoltaic components and is highly photosensitive. The amorphous semiconductor material is germanium based, particularly a silicon-germanium alloy. To this end, the semiconductor material has a compact, void-free structure, is manufactured in a glow discharge reactor by appropriate variation of the precipitation parameters, and contains one element from Group VI A of the periodic system.
    Type: Grant
    Filed: June 17, 1992
    Date of Patent: February 1, 1994
    Assignee: Siemens Aktiengesellschaft
    Inventor: Franz Karg
  • Patent number: 5272355
    Abstract: A solid state optoelectronic switching and display device and a method for its manufacture are disclosed. The device, formed in silicon, essentially is a surface-emitting visible light-emitting diode that allows rapid and efficient switching and information transfer, via optical means, between IC's, PC boards and displays in a computer. The method essentially includes electrochemically etching a silicon wafer to form a porous silicon region therein, depositing a transparent semiconductor layer on the porous silicon region, and forming a back contact on the wafer.
    Type: Grant
    Filed: May 20, 1992
    Date of Patent: December 21, 1993
    Assignee: Spire Corporation
    Inventors: Fereydoon Namavar, Nader M. Kalkhoran, H. Paul Maruska
  • Patent number: 5264710
    Abstract: Amorphous semiconductor thin film is exposed to an atmosphere of hydrogen radical during or after the formation of thin film, or is subject to light irradiation having a density of not less than 10 W/cm.sup.2 at a wavelength of 300 to 700 nm during the formation of the thin film. The obtained thin film has improved, i.e. small, photo deterioration. The semiconductor device using the above thin film is preferably applied to solar cells or thin film transistors.
    Type: Grant
    Filed: April 7, 1992
    Date of Patent: November 23, 1993
    Assignee: Kanegafuchi Kagaku Kogyo Kabushiki Kaisha
    Inventors: Hideo Yamagishi, Akihiko Hiroe, Hitoshi Nishio, Keiko Miki, Kazunori Tsuge, Yoshihisa Tawada
  • Patent number: 5256887
    Abstract: A photovoltaic cell for use in a single junction or multijunction photovoltaic device, which includes a p-type layer of a semiconductor compound including silicon, an i-type layer of an amorphous semiconductor compound including silicon, and an n-type layer of a semiconductor compound including silicon formed on the i-type layer. The i-type layer including an undoped first sublayer formed on the p-type layer, and a boron-doped second sublayer formed on the first sublayer.
    Type: Grant
    Filed: July 19, 1991
    Date of Patent: October 26, 1993
    Assignee: Solarex Corporation
    Inventor: Liyou Yang
  • Patent number: 5252142
    Abstract: A pin junction photovoltaic element having an i-type semiconductor layer formed of a variable band gap semiconductor material, said i-type semiconductor layer being positioned between a p-type semiconductor layer having a band gap wider than that of said i-type semiconductor layer and an n-type semiconductor layer having a band gap wider than that of said i-type semiconductor layer, characterized in that said i-type semiconductor layer contains a first region (a) which is positioned on the side of said p-type semiconductor layer and also has a graded band gap, a second region (b) which is adjacent to said first region (a) and has a graded band gap, and a third region (c) which is positioned on the side of said n-type semiconductor layer and also has a graded band gap; said i-type semiconductor layer having a minimum band gap at the boundary between said first region (a) and said second region (b); the thickness of said first region (a) being less than one-half of the total thickness of said i-type semiconduct
    Type: Grant
    Filed: November 22, 1991
    Date of Patent: October 12, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventors: Jinsho Matsuyama, Tsutomu Murakami, Koichi Matsuda, Hiroshi Yamamoto, Toshihiro Yamashita
  • Patent number: 5242505
    Abstract: Alloys of amorphous silicon with Group VIa elements are disclosed that form high-quality materials for photovoltaic cells that are resistant to Staebler-Wronski photodegradation. Also disclosed are methods for manufacturing the alloys. The alloys can be formed as films on solid-state substrates by reacting silane gas and at least one alloying gas (H.sub.2 M, wherein M is an element from Group VIa of the periodic table), preferably with hydrogen dilution, by a glow-discharge method such as plasma-enhanced chemical vapor deposition. The alloys can have an optical bandgap energy from about 1.0 eV to about 2.3 eV, as determined by selecting one or more different Group VIa elements for alloying or by changing the concentration(s) of the alloying element(s) in the alloy. The alloys exhibit excellent light-to-dark conductivity ratios, excellent structural quality, and resistance to Staebler-Wronski degradation. They can be used as "i" type or doped for use as "p" or "n" type materials.
    Type: Grant
    Filed: December 3, 1991
    Date of Patent: September 7, 1993
    Assignee: Electric Power Research Institute
    Inventors: Guang H. Lin, Mu Z. He, Mridula Kapur, John O'M. Bockris
  • Patent number: 5218213
    Abstract: An SOI wafer is formed having a silicon-germanium layer between the epitaxial layer of the device and the insulative layer. The process includes bonding a second substrate to a silicon-germanium layer on a first substrate by an intermediate insulative layer. The first substrate is removed down to the silicon-germanium layer and the silicon layer is epitaxially formed on the silicon-germanium layer.
    Type: Grant
    Filed: June 1, 1992
    Date of Patent: June 8, 1993
    Assignee: Harris Corporation
    Inventors: Stephen J. Gaul, George V. Rouse
  • Patent number: 5164809
    Abstract: Hydrogenated amorphous silicon radiation detector devices having enhanced signal are disclosed. Specifically provided are transversely oriented electrode layers and layered detector configurations of amorphous silicon, the structure of which allow high electric fields upon application of a bias thereby beneficially resulting in a reduction in noise from contact injection and an increase in signal including avalanche multiplication and gain of the signal produced by incoming high energy radiation. These enhanced radiation sensitive devices can be used as measuring and detection means for visible light, low energy photons and high energy ionizing particles such as electrons, x-rays, alpha particles, beta particles and gamma radiation. Particular utility of the device is disclosed for precision powder crystallography and biological identification.
    Type: Grant
    Filed: April 21, 1989
    Date of Patent: November 17, 1992
    Assignee: The Regents of the University of Calif.
    Inventors: Robert A. Street, Victor Perez-Mendez, Selig N. Kaplan
  • Patent number: 5162885
    Abstract: An Acoustic Charge Transport Imager, suitable for use as a High Definition Television (HDTV) camera element, is disclosed in which an array of amorphous hydrogenated silicon based avalanche photodiodes are combined with acoustic charge transport channels in a GaAs substrate, to achieve very high speed read out of photogenerated charge. High speed read out allows the fabrication of detector arrays large enough to meet the resolution requirements of HDTV while ensuring operation within the timing constraints of the HDTV frame rate.
    Type: Grant
    Filed: September 7, 1990
    Date of Patent: November 10, 1992
    Assignee: Georgia Tech Research Corporation
    Inventors: William D. Hunt, Kevin F. Brennan, Christopher J. Summers
  • Patent number: 5121182
    Abstract: In an integrated optical semiconductor device having an InGaAsP optical waveguide and an InGaAs light absorption layer integrated together therein, the light absorption layer is formed to become gradually thicker in a traveling direction of light in the optical waveguide so that the effective absorption coefficient of the light absorption layer with respect to the optical waveguide can be set to become gradually larger in the traveling direction in the optical waveguide.
    Type: Grant
    Filed: March 7, 1991
    Date of Patent: June 9, 1992
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumihiko Kuroda, Nobuo Suzuki
  • Patent number: 4835586
    Abstract: A dual-gate vertical field effect transistor comprises an N+ substrate (102) which serves as a drain, and N-epitaxial layer (104) formed on the N+ substrate, and an N+ layer (106) formed at the surface of the epitaxial layer which serves as a source. A plurality of grooves (108a, 108b) extends through the N+ region and a portion of the N-layer. The grooves are lined with an insulating layer (110a, 110b) and filled with a conductive polysilicon gate (112a, 112b). Underneath each of the grooves is a P+ region (116a, 116b) which serves as a second gate. Thus, the transistor in accordance with the present invention includes a set of polysilicon gates and a set of P+ gates for independently modulating the current permitted to flow between the transistor source and drain.
    Type: Grant
    Filed: September 21, 1987
    Date of Patent: May 30, 1989
    Assignee: Siliconix Incorporated
    Inventors: Adrian I. Cogan, Richard A. Blanchard
  • Patent number: RE34658
    Abstract: A semiconductor device which has a non-single crystal semiconductor layer formed on a substrate and in which the non-single crystal semiconductor layer is composed of a first semiconductor region formed primarily of non-single crystal semiconductor and a second semi-conductor region formed primarily of semi-amorphous semiconductor. The second semi-conductor region has a higher degree of conductivity than the first semiconductor region so that a semi-conductor element may be formed.
    Type: Grant
    Filed: January 27, 1992
    Date of Patent: July 12, 1994
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Yujiro Nagata