Abstract: A nonlinear resistance element of this invention comprises a first conductive layer, an insulating layer, and a second conductive layer stacked in sequence on a substrate, wherein: the first conductive layer is a metal film whose main component is a metal to which is added a chemical element having a valence 1 or 2 greater than that of the main component metal, in a concentration of 0.2% to 6 atom %, and the insulating layer is an anodized layer of the first conductive layer. This nonlinear resistance element is particularly suitable for use as a switching element for an active matrix type of liquid crystal display device.

Abstract: A semiconductor device comprising a silicon-series material layer and a laminate structure formed on the silicon-series material layer, the laminate structure being composed of a refractory metal thin film and/or a refractory metal silicide thin film, wherein a content of a halogen atom in each of the refractory metal thin film and/or the refractory metal silicide thin film is 1% by weight or less based on an amount of each of the refractory metal thin film and/or the refractory metal silicide thin film. In accordance with the present invention, there is also provided a process of producing such a semiconductor device.

Abstract: A semiconductor device comprising an electrode formed on a semiconductor diamond. The electrode includes a first metal section which is in contact with a surface of the semiconductor diamond and which has a thickness of 100 nm or smaller, and further including a second metal section which is in contact with the first metal section and which has a thickness of equal to or larger than four times the thickness of the first metal section. The second metal section is made of a metal having a melting point of 1000.degree. C. or higher.

Abstract: The present invention provides a method of manufacturing a semiconductor device, including the steps of forming a metal oxide film made of a metal oxide having a decrease in standard free energy smaller than a decrease in standard free energy of hydrogen oxide or of carbon oxide, on an insulating film formed on a semiconductor substrate, forming a metal oxide film pattern by subjecting a treatment to the metal oxide film, and converting said metal oxide pattern into at least one of an electrode and a wiring made of a metal which is a main component constituting the metal oxide, by reducing the metal oxide film pattern at a temperature of 80.degree. to 500.degree. C.

Abstract: Novel metal-alloy interconnections for integrated circuits. The metal-alloy interconnections of the present invention comprise a substantial portion of either copper or silver alloyed with a small amount of an additive having a low residual resistivity and solid solubility in either silver or copper such that the resultant electrical resistivity is less than 3 .mu..OMEGA.-cm.

Abstract: There is disclosed a structure of and a method for fabricating a ferroelectric film on a non-conductive substrate. An adhesion layer, e.g., a layer of silicon dioxide and a layer of zirconium oxide, is deposited over a substrate. A conductive layer, e.g., a noble metal, a non-noble metal, or a conductive oxide, is deposited over the adhesion layer. A seed layer, e.g., a compound containing lead, lanthanum, titanium, and oxygen, with a controlled crystal lattice orientation, is deposited on the conductive layer. This seed layer has ferroelectric properties. Over the seed layer, another ferroelectric material, e.g., lead zirconium titanate, can be deposited with a tetragonal or rhombohedral crystalline lattice structure with predetermined and controlled crystal orientation.

Abstract: In a semiconductor device having a wiring groove in alignment with a contact hole, a wiring structure includes a diffusion preventing film formed on the bottom and side walls of the wiring groove, the diffusion preventing film being composed of a barrier metal for preventing diffusion of Cu and an element which cooperates with Cu so as to form a eutectic Cu-alloy having a eutectic temperature of not higher than 850.degree. C. A Cu film is formed on the diffusion preventing film so as to fill up the wiring groove, so that Cu and the above mentioned element actually form the eutectic Cu-alloy having the eutectic temperature of not higher than 850.degree. C.

Abstract: An ohmic electorde of the present invention comprises a contact electrode layer formed on a p-type diamond semiconductor layer formed on a substrate so as to be in ohmic contact with the p-type diamond semiconductor layer and to have low contact resistance and high heat resistance, and a lead electrode layer formed on the contact electrode layer so as to have low lead wire resistance and high heat resistance. Specifically, the contact electrode layer is made of either a carbide of at least one metal selected from a metal group comprising Ti, Zr, and Hf, or a carbide of an alloy containing at least one metal selected from the metal group. Since the carbide of the metal or alloy forming the contact electrode layer is stabler in respect of energy because of reduced formation enthalpy than the metal or alloy itself, it is very unlikely to diffuse.

Abstract: A structure and method for making HEMTs with a gate metal having a layer comprising titanium, a layer comprising vanadium over the layer comprising titanium, and a layer comprising gold over the layer comprising vanadium. Such HEMTs are insensitive to hydrogen.

Abstract: An integrated circuit for implementing a resistor network on a die of the integrated circuit. The integrated circuit includes a common conductor, which is disposed on a first side of the die and coupled to resistors of the resistor network. The integrated circuit further includes a substantially conductive substrate through the die. There is further included a conductive back side contact coupled to the substantially conductive substrate. The conductive back side contact is disposed on a second side of the die opposite the first side, whereby the common conductor, the substantially conductive substrate, and the conductive back side contact form a common conducting bus from the common conductor to the conductive back side contact through the die.

Abstract: On a metallic wiring substrate, a first metallic layer is connected to a second metallic layer at a non-anodic-oxide section of the first metallic layer exposed at a bottom of a contact hole. The surface of the first metallic layer is anodically oxidized except for the non-anodic-oxide section. After resist is patterned so as to be entirely positioned on the surface of the first metallic layer, the first metallic layer is anodically oxidized, and the resist is removed therefrom. In such a manner, the non-anodic oxide section and the anodic oxide section are formed. This method makes it possible to produce the metallic wiring substrate having good insulation properties between layers easier than a method for forming the non-anodic-oxide section by etching the anodic oxide section.

Abstract: A semiconductor having multi-layer metalization which has a metal layer between aluminum alloy and metal nitride layers, that prevents failure of interconnects when electromigration causes a discontinuity in the aluminum alloy layer. In a one embodiment, the metal of the metal layer and the metal of the nitride layer are both the same metal, such as titanium. In a method of manufacturing the semiconductor device, an insulating layer is formed on a surface of a semiconductor substrate, and in vacuum chambers, the alloy layer is formed on the insulating layer, a metal layer is formed on the alloy layer, and a metal nitride layer is formed on the metal layer in an nitrogen atmosphere. Sputtering, such as DC magnetron sputtering, RF-bias sputtering, or thermal evaporation deposition, may be used to apply the respective nitride, metal and alloy layers.

Abstract: A semiconductor device includes an insulating substrate; and an electrode wiring provided on an area of the insulating substrate. The electrode wiring is formed of a material selected from the group consisting of an alloy of Ta and Nb, Nb, and a metal mainly including Nb. A method for producing a semiconductor device includes the steps of forming a layer including Nb doped with nitrogen on an insulating substrate by a sputtering method in an atmosphere of an inert gas including nitrogen, and then patterning the layer to form an electrode wiring on an area of the insulating substrate; and forming an oxide film at a portion of the electrode wiring by anodization, the portion including at least a surface thereof.

Abstract: A II-VI group compound semiconductor device having a p-type Zn.sub.x Mg.sub.1-x S.sub.y Se.sub.1-y (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) semiconductor layer, on which an electrode layer is formed with at least metallic nitride layer lying between the semiconductor layer and the electrode layer.

Abstract: The invention provides an interconnect line which comprises a metallization layer and a plurality of transverse diffusion barriers spaced within said metallization layer. The transverse diffusion barriers separate the length of metallization of the line into discrete sections, such that each section is only 20-50 microns in length. The diffusion barriers reduce electromigration and metal creep within the metal line, each of which can cause failure of the line. The invention further provides such an interconnect line formed within an insulator layer, for use in multi-level interconnect structures.

Abstract: A multilayer structure having an oxygen or dopant diffusion barrier fabricated of an electrically conductive, thermally stable material of refractory metal-silicon-nitrogen which is resistant to oxidation, prevents out-diffusion of dopants from silicon and has a wide process window wherein the refractory metal is selected from Ta, W, Nb, V, Ti, Zr, Hf, Cr and Mo.

Abstract: A method for manufacturing an ohmic contact on a semiconductor device, as disclosed herein, includes a first step of etching a via through a non-conductive layer formed over a partially fabricated version of the semiconductor device. This step exposes a region of a device element such as a source, gate electrode, etc. Next, an ohmic contact layer including tantalum and silicon is deposited over the partially fabricated device and in the vias by sputtering in an argon atmosphere. Thereafter, and in the same processing apparatus, a barrier layer including a tantalum silicon nitride is deposited over the ohmic contact layer. Then an aluminum alloy metallization layer is directly deposited on the partially fabricated device at a temperature of at least 650.degree. C. At this deposition temperature, the metallization layer conformally fills the via, thereby producing a stable, uniform contact.

Abstract: An interconnection structure for semiconductor integrated circuits and the method for manufacturing of the same are provided. The interconnection structure has a low electric resistance and a good electromigration resistance and can prevent the atoms in wire materials from diffusing into insulating films or substrates. More particularly, an insulating film 12 is formed on a silicon substrate 10, on which a tungsten 14 is formed. The tungsten film 14 is subjected to plasma irradiation on the surface thereof to form an amorphous W--N film 16. A copper wire pattern 20 is formed on the amorphous W--N film 16.

Abstract: A method of forming a contact diffusion barrier in a thin geometry integrated circuit device involves implanting a second material into a low resistivity material that overlies the semiconductor to which contact is desired. The low resistivity and implanted materials are selected to intereact with each other and form a contact diffusion barrier. Both materials may include transition metals, in which case the diffusion barrier is a composite transition metal. Alternately, the low resistivity material may include a transition metal, while implantation is performed with nitrogen. The implantation is performed by plasma etching, preferably with active cooling, which can be combined in a continuous step with the etching of the contact opening. The resulting contact diffusion barrier is self-aligned with the contact opening, and is established only in the immediate vicinity of the opening.

Abstract: The present invention relates to a high performance, high reliability antifuse using conductive electrodes. The problem of switch-off of the programmed antifuses is solved by reducing the thermal conductivity of the conductive electrodes. This is achieved by using lower thermal conductivity conductors for the electrodes or by using thinner electrodes to increase thermal resistance. According to a first aspect of the present invention, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing conductive electrode materials having a relatively lower thermal conductivity than prior art electrode materials. According to a second aspect of the present invention, the problem of switch-off in conductor-to-conductor antifuses is solved by utilizing relatively thin electrodes, thus increasing their thermal resistance.

Abstract: A metallization composite comprises a refractory metal, nickel, and copper. The refractory metal is preferably titanium (Ti), but other suitable refractory metals such as zirconium and hafnium can also be utilized. An additional optional layer of gold can overlie the copper. The metallization composite is used to connect a solder contact to a semiconductor substrate.

Abstract: A ferroelectric thin film element 1 constructed by forming a MgO thin film 3 oriented in the direction (100), a lower electrode 4 composed of an alloy thin film of a Ni--Cr--Al system oriented in the direction (100), a ferroelectric thin film 5 composed of a PbTiO.sub.3 thin film oriented in the direction (111), and an upper electrode 6 in this order on a substrate composed of (100) silicon 2.

Abstract: A method of fabricating a high-density multilayer copper/polyimide interconnect structure utilizing a blanket tantalum/tantalum oxide layer that electrically connects all of the electroplating seed layers to the edge of the substrate; upon completion of the electroplating process, the excess tantalum/tantalum oxide layer is etched off to produce isolated conductor lines. A multilayer copper/polyimide interconnect structure may be fabricated by repeating this fabrication sequence for each layer.

Abstract: The line material is of a laminated structure consisting of: a Ta containing N alloy layer (lower layer) which is a first metal layer made of at least an alloy selected from the group consisting of a TaN alloy, a Ta--Mo--N alloy, a Ta--Nb--N alloy and a Ta--W--N alloy; a second metal layer (upper layer) formed integrally with the first metal layer and made of at least an alloy selected from the group consisting of Ta, a Ta--Mo alloy, a Ta--Nb alloy, a Ta--W alloy, a TaN alloy, a Ta--Mo--N alloy, a Ta--Nb--N alloy and a Ta--W--N alloy; and/or a pin hole-free oxide film. The line material of the laminated structure is to be applied to the formation of signal lines and electrodes of, e.g., a liquid crystal display. The line material has a low resistance and the insulating film formed by anodization and the like exhibits excellent insulation and thermal stability. Therefore, when the line material is applied to signal lines of various devices, it exhibits excellent characteristics.

Abstract: An ohmic contact electrode formed on an n-type semiconductor cubic boron nitride by using a IVa metal or an alloy with a IVa metal or a layer of Au or Ag.

Abstract: Disclosed is an active-matrix addressed TFT substrate using a thin film transistor, a manufacturing method and an anodic oxidation method thereof, a liquid crystal display panel using the TFT substrate and a liquid crystal display equipment using the liquid crystal display panel. In the TFT substrate, Cr or Ta is used for gate terminals, aluminum or a metal mainly composed of aluminum is used for gate bus-lines extending therefrom, for gate electrodes, and for electrodes of thin film capacitors (additional capacitance, storage capacitance), and an anodic oxidized film composed of the metal and free from defect is used for at least one of gate insulators, dielectric films of the thin film capacitances and interlayer insulating films for the intersections between the bus-lines. Also disclosed is a method of selectively forming an anodic oxidized film on an aluminum pattern.

Abstract: A thin-film transistor includes a gate electrode and a semiconductor film consisting of amorphous silicon, formed on an insulating substrate to oppose each other through a gate insulating film, ohmic contact layers composed of n-type amorphous silicon doped with an impurity, electrically insulated from each other on the semiconductor film, and electrically connected to the semiconductor film, and source and drain electrodes arranged on the semiconductor film with a predetermined gap to form a channel portion, and electrically connected to the semiconductor film through the ohmic contact layers. The gate electrode and a portion surrounding the gate electrode are entirely formed into a continuous metal oxide film by a chemical reaction.

Abstract: A semiconductor device having an electrode wiring which prevents generation of hillock and has good stress migration capability is disclosed. A multi layer film including at least two Al-Si-Cu alloy films and at least two titanium nitride films formed by reactive sputtering laminated alternately with the Al-Si-Cu alloy films has a high mechanical strength against deformation and can effectively prevent generation of hillock. Ti-Al intermetallic compounds are formed in grain boundaries and in interfaces, which is effective to restrict generation of a void. Propagation of a void can be prevented by the intermediate titanium nitride film. Further, the formation of the Ti-Al compounds is restricted and an increase of resistance is negligible.

Abstract: There is provided a lead frame with enhanced adhesion to a polymer resin. The lead frame is coated with a thin layer of containing a mixture of chromium and zinc. A mixture of chromium and zinc with the zinc-to-chromium ratio in excess of about 4:1 is most preferred. The coated lead frames exhibit improved adhesion to a polymeric resin.

Abstract: An IC package and LSI package having a lead frame of a copper alloy that contains 0.1 to 1% by weight of chromium, 0.01 to 0.5% by weight of zirconium and that has partial discolored regions caused by unbalanced precipitation of the zirconium distributed thereon at a rate of 2 grains/100 cm.sup.2 or less is disclosed. The lead frame is, for example, obtained from an alloy that contains 0,005% by weight of sulfur or less. The lead frame has high reliability, can be produced in high yield and has high electrical conductivity.

Abstract: A process and structure for improving the conductive capacity of a polycrystalline silicon (poly) structure, such as a bit line. The inventive process allows for the formation of a refractory metal silicide layer on the top and sidewalls of a poly structure, thereby increasing the conductive capacity. To form the titanium silicide layer over the poly feature, the refractory metal is sputtered on the poly, which reacts to form the refractory metal silicide. A second embodiment is described whereby an isotropic etch of the poly feature slopes the sidewalls; then, the refractory metal is sputtered onto the polycrystalline silicon. This allows for the formation of a thicker layer of refractory metal silicide on the sidewalls, thereby further increasing the conductive capacitance of the poly structure. Suggested refractory metals include titanium, cobalt, tungsten, and tantalum.

Abstract: A method of enhancing the specific contact resistivity in InP semiconductor devices and improved devices produced thereby are disclosed. Low resistivity values are obtained by using gold ohmic contacts that contain small amounts of gallium or indium and by depositing a thin gold phosphide interlayer between the surface of the InP device and the ohmic contact. When both the thin interlayer and the gold-gallium or gold-indium contact metallizations are used, ultra low specific contact resistivities are achieved. Thermal stability with good contact resistivity is achieved by depositing a layer of refractory metal over the gold phosphide interlayer.

Abstract: An ohmic contact electrode formed on an n-type semiconductor cubic boron nitride by using a IVa metal; an alloy with a IVa metal; a metal with Si or S; an alloy with Si or S; a metal with B, Al, Ga, or In; an alloy with B, Al, Ga, or In; a Va metal; or an alloy with a Va metal.

Abstract: According to the present invention, there is provided a matrix array substrate for a liquid crystal display device comprising a transparent substrate, a plurality of picture element electrodes formed on said transparent substrate and made of a transparent conductive material, and non-linear resistive devices formed on said transparent substrate, and each connected to each of the picture element electrodes. Each of said non-linear resistive devices includes a Ta first electrode formed on said transparent substrate, a second electrode, and an insulating layer located between the first and second electrodes, and the first electrode is connected to another non-linear resistive device via a Ta interconnecting layer. Further, a transparent conductive layer is formed between said transparent substrate and interconnecting layer and is not formed between the transparent substrate and the first electrode.

Abstract: A liquid crystal display includes an insulating substrate, a first metal layer formed on the substrate, a first insulating layer including an oxide of tantalum nitride with high ratio of nitrization formed on the first metal layer, a second insulating layer including an oxide of tantalum nitride with low ratio of nitrization formed on the first insulating layer, and a second metal layer formed on the second insulating layer.

Abstract: The line material is of a laminated structure consisting of: a Ta containing N alloy layer (lower layer) which is a first metal layer made of at least an alloy selected from the group consisting of a TaN alloy, a Ta-Mo-N alloy, a Ta-Nb-N alloy and a Ta-W-N alloy; a second metal layer (upper layer) formed integrally with the first metal layer and made of at least an alloy selected from the group consisting of Ta, a Ta-Mo alloy, a Ta-Nb alloy, a Ta-W alloy, a TaN alloy, a Ta-Mo-N alloy, a Ta-Nb-N alloy and a Ta-W-N alloy; and/or a pin hole-free oxide film. The line material of the laminated structure is to be applied to the formation of signal lines and electrodes of, e.g., a liquid crystal display. The line material has a low resistance and the insulating film formed by anodization and the like exhibits excellent insulation and thermal stability. Therefore, when the line material is applied to signal lines of various devices, it exhibits excellent characteristics.

Abstract: In an ohmic contact electrode for the p-type semiconductor diamond, the electrode is formed of metals or metallic compounds containing boron on a p-type semiconductor diamond, so as to obtain a decreased contact resistance.

Abstract: This is a highly purified metal comprising one metal selected from the group consisted of titanium, zirconium and hafnium. The highly purified metal has an Al content of not more than 10 ppm. It also has an oxygen content of not more than 250 ppm, each of Fe, Ni and Cr contents not more than 10 ppm and each of Na and K contents not more than 0.1 ppm. The highly purified metal is obtained by either purifying crude metal by the iodide process or surface treating crude metal to remove a contaminated layer existing on the surface thereof and then melting the surface treated material with electron beam in a high vacuum.

Abstract: There is provided a semiconductor device using a molybdenum-tantalum alloy having a tantalum composition ratio of 30 to 84 atomic percent. Using this Mo-Ta alloy, there is provided an electrode interconnection material comprising a multi-layered structure having an underlying metal film having a crystalline form of a body-centered cubic system and overlying a molybdenum-tantalum alloy film having a tantalum composition ratio of above 84 atomic percent.