With Heterojunction Patents (Class 257/94)
  • Patent number: 9331240
    Abstract: An ultraviolet light emitting semiconductor chip, its use in a LED, and methods of its fabrication are disclosed. The semiconductor chip can include a buffer layer of AlxGa1-xN, where 0<x?1 having a thickness from about 10 ?m to about 3 mm and defining apertures in the thickness of the buffer layer formed due to lateral overgrowth of the buffer layer over a grooved basal substrate. A n-junction LED layer overlying the buffer layer, a multiple quantum well LED layer overlying the n-junction LED layer, and a p-junction LED layer overlying the multiple quantum well LED layer are also included in the chip, where all of the LED layers comprise AlxGa1-xN, where 0<x?1.
    Type: Grant
    Filed: June 8, 2009
    Date of Patent: May 3, 2016
    Assignee: University of South Carolina
    Inventors: M. Asif Khan, Qhalid Fareed, Vinod Adivarahan
  • Patent number: 9324918
    Abstract: A semiconductor light emitting device includes: a stacked structure unit including first and second semiconductor layers and a light emitting layer between the first and second semiconductor layers; a first electrode on a first major surface of the stacked structure unit on the second semiconductor layer side to connect to the first semiconductor layer; and a second electrode on the first major surface of the stacked structure unit to connect to the second semiconductor layer. The second electrode includes: a first film on the second semiconductor layer and a second film on a rim of the first film. The first film has a relatively lower contact resistance with the second semiconductor layer, compared to the second film. A distance from an outer edge of the second film to the first film is smaller at a central portion than at a peripheral portion of the first major surface.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: April 26, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Katsuno, Yasuo Ohba, Kei Kaneko, Mitsuhiro Kushibe
  • Patent number: 9318327
    Abstract: Semiconductor device structures are provided that are suitable for use in the fabrication of electronic devices such as light emitting diodes. The semiconductor device structures include a substrate having a roughened growth surface suitable for supporting the growth of an epitaxial region thereon. The device structure can include an epitaxial region having reduced defects and/or improved radiation extraction efficiency on the roughened growth surface of the substrate. The roughened growth surface of the substrate can have an average roughness Ra of at least about 1 nanometer (nm) and an average peak to valley height Rz of at least about 10 nanometers (nm).
    Type: Grant
    Filed: November 28, 2006
    Date of Patent: April 19, 2016
    Assignee: CREE, INC.
    Inventors: Michael John Bergmann, Jason Hansen, David Todd Emerson, Kevin Ward Haberern
  • Patent number: 9315920
    Abstract: A growth substrate including a substrate having a growth surface including a plurality of steps inclining in a first direction; a first layer disposed on the growth surface, the first layer including an A-plane or an M-plane in an upper part thereof, a plurality of protrusions having an inclined surface on an upper surface thereof, and nitride; a mask layer including a dielectric material and having at least a portion disposed on the protrusions; and a second layer disposed on the mask layer and including nitride.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: April 19, 2016
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyunggu Kim, Hwankuk Yuh, Hyosang Yu
  • Patent number: 9318560
    Abstract: According to one exemplary embodiment, a group III-V semiconductor device includes at least one transition layer situated over a substrate. The group III-V semiconductor device further includes a first strain-relieving interlayer situated over the at least one transition layer and a second strain-relieving interlayer situated over the first strain-relieving interlayer. The group III-V semiconductor device further includes a first group III-V semiconductor body situated over the second strain-relieving interlayer. The first and second strain-relieving interlayers comprise different semiconductor materials so as to reduce a strain in the first group III-V semiconductor body. The second strain-relieving interlayer can be substantially thinner than the first strain-relieving interlayer.
    Type: Grant
    Filed: October 31, 2013
    Date of Patent: April 19, 2016
    Assignee: Infineon Technologies Americas Corp.
    Inventors: Scott Nelson, Ronald Birkhahn, Brett Hughes
  • Patent number: 9312450
    Abstract: Disclosed are a light emitting device and a light emitting device package. The light emitting device includes a first electrode, a light emitting structure including a first semiconductor layer, an active layer, and a second semiconductor layer on the first electrode, a nano-tube layer including a plurality of carbon nano tubes on the light emitting structure, and a second electrode on the light emitting structure.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: April 12, 2016
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Ki Choi, Hwan Hee Jeong, Sang Youl Lee, June O Song, Ji Hyung Moon
  • Patent number: 9312453
    Abstract: The present disclosure relates to a semiconductor light emitting device, which comprises a plurality of semiconductor layers; a contact area where a first semiconductor layer is exposed as a result of the partial removal of a second semiconductor layer and an active layer; a non-conductive reflective film adapted to cover the second semiconductor layer and the contact area, such that light from the active layer is reflected towards the first semiconductor layer on the side of a growth substrate; a finger electrode extending between the non-conductive reflective film and the plurality of semiconductor layers; an electrical connection adapted to pass through the non-conductive reflective film and be electrically connected with the finger electrode; and a direct-connection type electrical connection adapted to pass through the non-conductive reflective film and be electrically connected with the plurality of semiconductor layers.
    Type: Grant
    Filed: April 30, 2014
    Date of Patent: April 12, 2016
    Assignee: SEMICON LIGHT CO., LTD.
    Inventors: Eun Hyun Park, Soo Kun Jeon
  • Patent number: 9299903
    Abstract: According to one embodiment, a semiconductor light emitting element includes a semiconductor layer, a first conductive layer, and a second conductive layer. The second conductive layer is provided between the semiconductor layer and the first conductive layer. A light transmittance of the second conductive layer is higher than a light transmittance of the first conductive layer. An extinction coefficient of the second conductive layer is 0.005 or less.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: March 29, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satoshi Mitsugi, Toshihide Ito
  • Patent number: 9299886
    Abstract: An LED semiconductor component having an n-doped substrate layer and a first, n-doped cladding layer, wherein the cladding layer is located on the substrate layer, and having an active layer, wherein the active layer comprises a light-emitting layer and is located on the first cladding layer, and having a second, p-doped cladding layer, wherein the second cladding layer is located on the active layer, and having a p-doped current spreading layer, wherein the current spreading layer is located on the second cladding layer, and having a p-doped contact layer, wherein the p-doped contact layer is located on the current spreading layer, wherein the p-doped contact layer is made of an aluminiferous layer and has carbon as dopant.
    Type: Grant
    Filed: January 30, 2015
    Date of Patent: March 29, 2016
    Assignee: Azur Space Solar Power GmbH
    Inventors: Daniel Fuhrmann, Florian Dunzer
  • Patent number: 9281448
    Abstract: A light emitting device including a contact layer, a blocking layer over the contact layer, a protection layer adjacent the blocking layer, a light emitter over the blocking layer, and an electrode layer coupled to the light emitter. The electrode layer overlaps the blocking layer and protection layer, and the blocking layer has an electrical conductivity that substantially blocks flow of current from the light emitter in a direction towards the contact layer. In addition, the protection layer may be conductive to allow current to flow to the light emitter or non-conductive to block current from flowing from the light emitter towards the contact layer.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: March 8, 2016
    Assignee: LG Innotek Co., Ltd.
    Inventors: Kwang Ki Choi, Hwan Hee Jeong, Sang Youl Lee, June O Song
  • Patent number: 9276145
    Abstract: An array-type light-receiving device includes a semiconductor substrate having a cleavage direction; a light-receiving surface disposed on the semiconductor substrate; and a plurality of pixels two-dimensionally arranged on the light-receiving surface in a first array direction and a second array direction, each of the pixels including a staked semiconductor layer including an optical absorption layer. The first and second array directions are tilted relative to the cleavage direction of the semiconductor substrate at a predetermined angle ?, as viewed from above the light-receiving surface. In addition, the first and second array directions and the cleavage direction extend along the light-receiving surface.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: March 1, 2016
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD
    Inventor: Yasuhiro Iguchi
  • Patent number: 9276176
    Abstract: A light-emitting device comprises: a light-emitting stack having an active layer; a transparent insulating layer on the light-emitting stack; and an electrode structure having a first electrode on the transparent insulating layer; wherein a surface area of a surface of the first electrode distal from the transparent insulating layer is smaller than a surface area of a surface of the transparent insulating layer distal from the light-emitting stack, the refractive index of the transparent insulating layer is between 1 and 3.4 both inclusive, and the transmittance of the transparent insulating layer is greater than 80%.
    Type: Grant
    Filed: October 15, 2014
    Date of Patent: March 1, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Wen-Luh Liao, Hung-Ta Cheng, Yao-Ru Chang, Shih-I Chen, Chia-Liang Hsu
  • Patent number: 9269853
    Abstract: A luminescent device including an upper electrode layer, a lower electrode layer and an active layer provided between these electrode layers, the device having such a structure that at least one electrode layer of the upper electrode layer and the lower electrode layer is provided in an in-plane direction of the active layer being divided into plural electrodes, current is injected into plural different regions of the active layer by the plural electrodes to cause emission in plural luminescent regions, and light emitted from one luminescent region of the plural luminescent regions enters in another luminescent region and exits. The device further includes a light receiving portion for detecting light that is emitted from one luminescent region of the plural luminescent regions and does not go through another luminescent region.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: February 23, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takako Suga, Mamoru Uchida
  • Patent number: 9252324
    Abstract: A method for forming a light emitting device includes forming a monocrystalline III-V emissive layer on a monocrystalline substrate and forming a first doped layer on the emissive layer. A first contact is deposited on the first doped layer. The monocrystalline substrate is removed from the emissive layer by a mechanical process. A second doped layer is formed on the emissive layer on a side from which the substrate has been removed. The second doped layer has a dopant conductivity opposite that of the first doped layer. A second contact is deposited on the second doped layer.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: February 2, 2016
    Assignee: GLOBALFOUNDRIES INC
    Inventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 9240519
    Abstract: A light-emitting element, comprises: a substrate; a light-emitting semiconductor stack over the substrate and comprising an active layer; and a Distributed Bragg reflective unit under the substrate comprising a first Distributed Bragg reflective structure under the substrate and comprising a first number of pairs of alternately stacked first sub-layers and second sub-layers, and a second Distributed Bragg reflective structure under the first Distributed Bragg reflective structure and comprising a second number of pairs of alternately stacked third sub-layers and fourth sub-layers, wherein the first number is different from the second number.
    Type: Grant
    Filed: January 23, 2014
    Date of Patent: January 19, 2016
    Assignee: EPISTAR CORPORATION
    Inventors: Keng-Lin Chuang, Chun-Lung Tseng, Chih-Tsung Su, Ching-Hsing Shen, Chih-Hui Alston Liu, Yu-Ming Kun
  • Patent number: 9236531
    Abstract: Disclosed are a light emitting device, a method of fabricating a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer (112), an InxGa1-xN layer (where, 0<x?1) (151) on the first conductive semiconductor layer (112), a GaN layer (152) on the InxGa1-xN layer (151), a first Aly1Ga1-y1N layer (where, 0<y1?1) (153) on the GaN layer (152), an active layer (114) on the first Aly1Ga1-y1N layer (153), and a second conductive semiconductor layer (116) on the active layer (114).
    Type: Grant
    Filed: June 18, 2014
    Date of Patent: January 12, 2016
    Assignee: LG Innotek Co., Ltd.
    Inventors: Eun Sil Choi, Dong Wook Kim
  • Patent number: 9236526
    Abstract: A light emitting structure includes lower and upper semiconductor layers having different conductive types, and an active layer disposed between the lower and upper semiconductor layers. The light emitting structure is provided on the substrate. A first electrode layer provided on the upper semiconductor layer includes a first adhesive layer and a first bonding layer overlapping each other. A reflective layer is not provided between the first adhesive layer and the first bonding layer.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: January 12, 2016
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Byung Yeon Choi, Hee Young Beom, Yong Gyeong Lee, Ji Hwan Lee, Hyun Seoung Ju, Gi Seok Hong
  • Patent number: 9209361
    Abstract: The present invention improves luminous efficiency of a nitride semiconductor light-emitting element. In the nitride semiconductor light-emitting element, a non-polar or semi-polar Alx2Iny2Gaz2N layer having a thickness of t1 is interposed between the Alx1Iny1Gaz1N layer included in the p-type nitride semiconductor layer and the active layer (0<x2?1, 0?y2<1, 0<z2<1, x2+y2+z2=1). The Alx2Iny2Gaz2N layer has first and second interfaces located close to or in contact with the active layer and the Alx1Iny1Gaz1N layer, respectively. The Alx2Iny2Gaz2N layer has a hydrogen concentration distribution along its thickness direction in the inside thereof in such a manner that the hydrogen concentration is increased from the first interface to a thickness t2 (t2<t1), reaches a peak at the thickness t2, and is decreased from the thickness t2 to the second interface. Magnesium contained in the Alx1Iny1Gaz1N layer is prevented from being diffused into the active layer to improve the luminous efficiency.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: December 8, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Akio Ueta, Masaaki Yuri, Toshiya Yokogawa, Ryou Kato
  • Patent number: 9202978
    Abstract: A radiation-emitting semiconductor chip having a semiconductor layer sequence based on a nitride compound semiconductor material and having a pn junction includes a first protective layer having deliberately introduced crystal defects, a second protective layer having a higher doping than the first protective layer, wherein the first protective layer protects the semiconductor chip against electrostatic discharge pulses, an active zone that generates radiation disposed downstream of the first protective layer in a growth direction, wherein during operation of the semiconductor chip, a breakdown behavior of the semiconductor layer sequence in a reverse direction in regions having crystal defects differs from regions without crystal defects, and wherein in the event of electrostatic discharge pulses, electrical charge is dissipated in a homogeneously distributed manner via the regions having crystal defects.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: December 1, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Andreas Löffler, Christian Leirer, Rainer Butendeich, Tobias Meyer, Matthias Peter
  • Patent number: 9202983
    Abstract: A light-emitting device comprises a substrate; a semiconductor stack comprising a first type semiconductor layer, a second type semiconductor layer and an active layer formed between the first type semiconductor layer and the second type semiconductor layer; a bonding layer formed between the substrate and the semiconductor stack; and a plurality of buried electrodes physically buried in the first type semiconductor layer.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: December 1, 2015
    Assignee: EPISTAR CORPORATION
    Inventors: Ching-Huai Ni, Chia-Liang Hsu, Yi-Ming Chen
  • Patent number: 9196487
    Abstract: According to an example embodiment, a method includes forming a nitrogen vacancy surface layer by treating a surface of an n-type nitride semiconductor with inert gas plasma, and forming an oxygen-added nitride film by treating a surface of the nitrogen vacancy surface layer with oxygen-containing gas plasma, and forming an electrode on the oxygen-added nitride film. The nitrogen vacancy surface layer lacks a nitrogen element.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: November 24, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae Hun Kim, Sung Joon Kim, Young Kyu Sung, Wan Ho Lee, Tae Sung Jang, Tae Young Park, Wan Tae Lim
  • Patent number: 9190567
    Abstract: Provided is a nitride semiconductor light emitting device including: a first nitride semiconductor layer; an active layer formed above the first nitride semiconductor layer; and a delta doped second nitride semiconductor layer formed above the active layer. According to the present invention, the optical power of the nitride semiconductor light emitting device is enhanced, optical power down phenomenon is improved and reliability against ESD (electro static discharge) is enhanced.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: November 17, 2015
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Suk Hun Lee
  • Patent number: 9171993
    Abstract: An LED die includes a substrate, a light emitting structure, electrodes, a first transparent protecting layer, a reflection layer, and a second transparent protecting layer. The light emitting structure includes a first semiconductor layer, an active layer, a second semiconductor layer successively formed on the substrate. A part of first semiconductor layer being exposed. A first electrode is formed the first semiconductor layer. A second electrode is formed on the second semiconductor layer. The first transparent protecting layer, the reflection layer, and the second transparent protecting layer successively formed on the first electrode. The present disclosure also provides a method of manufacturing the LED die.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: October 27, 2015
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Chien-Chung Peng, Tzu-Chien Hung, Chia-Hui Shen, Chih-Jung Liu
  • Patent number: 9166099
    Abstract: A graphene light-emitting device and a method of manufacturing the same are provided. The graphene light-emitting device includes a p-type graphene doped with a p-type dopant; an n-type graphene doped with an n-type dopant; and an active graphene that is disposed between the type graphene and the n-type graphene and emits light, wherein the p-type graphene, the n-type graphene, and the active graphene are horizontally disposed.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: October 20, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung-won Hwang, Geun-woo Ko, Sung-hyun Sim, Hun-jae Chung, Han-kyu Seong, Cheol-soo Sone, Jin-hyun Lee, Hyung-duk Ko, Suk-ho Choi, Sung Kim
  • Patent number: 9166101
    Abstract: The present invention provides a light-emitting element comprising: a carbon layer comprising a graphene; a plurality of fine structures having grown toward the upper side of the carbon layer; a thin film layer for coating the fine structures; and a light-emitting structure layer formed on the thin film layer.
    Type: Grant
    Filed: October 7, 2011
    Date of Patent: October 20, 2015
    Assignee: SNU R&DB FOUNDATION
    Inventors: Gyuchul Yi, Kunook Chung, Chulho Lee
  • Patent number: 9166098
    Abstract: There is provided a nitride semiconductor light emitting device including an active layer of a multi quantum well structure, the nitride semiconductor light emitting device including: a substrate; and a buffer layer, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer sequentially stacked on the substrate, wherein the active layer is formed of a multi quantum well structure where a plurality of barrier layers and a plurality of well layers are arranged alternately with each other, and at least one of the plurality of barrier layers includes a first barrier layer including a p-doped barrier layer doped with a p-dopant and an undoped barrier layer.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: October 20, 2015
    Assignees: Samsung Electronics Co., Ltd., Gwangju Institute of Science and Technology
    Inventors: Sang Won Kang, Seong Ju Park, Min Ki Kwon, Sang Jun Lee, Joo Young Cho, Yong Chun Kim, Sang Heon Han, Dong Ju Lee, Jeong Tak Oh, Je Won Kim
  • Patent number: 9159882
    Abstract: A semiconductor light-emitting device includes a first conductive type semiconductor layer having a main surface, a plurality of vertical type light-emitting structures protruding upward from the first conductive type semiconductor layer; a transparent electrode layer covering the plurality of vertical type light-emitting structures; and an insulation-filling layer disposed on the transparent electrode layer. The insulation-filling layer extends parallel to the first conductive type semiconductor layer so as to cover the plurality of vertical type light-emitting structures. A selected one of the first conductive type semiconductor layer and the insulation-filling layer, which is disposed on a light transmission path through which light generated from the plurality of vertical type light-emitting structures is radiated externally, has an uneven outer surface.
    Type: Grant
    Filed: September 30, 2014
    Date of Patent: October 13, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyung-Wook Hwang, Ju-Bin Seo, Ji-Hye Yeon, Geon-Wook Yoo, Dong-hoon Lee
  • Patent number: 9147807
    Abstract: In a nitride semiconductor light-emitting diode having a shape of an isosceles triangle in a top view, either Group Aa consisting of the following two mathematical formulae (Ia) and (IIa) or Group Ab consisting of the following two mathematical formulae (Ib) and (IIb) is satisfied: Group Aa: 20 degrees?Angle degree ??40 degrees (Ia) and 0 degrees?Angle degree ??40 degrees (IIa) Group Ab: 90 degrees?Angle degree ??130 degrees (Ib) and 50 degrees?Angle degree ??90 degrees (IIb).
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: September 29, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Atsushi Yamada, Akira Inoue
  • Patent number: 9147733
    Abstract: A method for the reuse of gallium nitride (GaN) epitaxial substrates uses band-gap-selective photoelectrochemical (PEC) etching to remove one or more epitaxial layers from bulk or free-standing GaN substrates without damaging the substrate, allowing the substrate to be reused for further growth of additional epitaxial layers. The method facilitates a significant cost reduction in device production by permitting the reuse of expensive bulk or free-standing GaN substrates.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: September 29, 2015
    Assignee: The Regents of the University of California
    Inventors: Casey O. Holder, Daniel F. Feezell, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 9142725
    Abstract: A light emitting element includes a first semiconductor layer of a first conductive type, a second semiconductor layer of a second conductive type, a light emitting layer. The light emitting layer is between the first semiconductor layer and the second semiconductor layer. A first electrode layer is on a first side of the second semiconductor layer. A second electrode layer is on the first side of the first semiconductor layer. Am insulation layer is between the first electrode layer and the second electrode layer. A first metal layer is between a substrate and the insulation layer and between the substrate and the second electrode layer. The second electrode layer includes a first portion contacting the first semiconductor layer and a second portion which spaced from the first semiconductor layer.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: September 22, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takeyuki Suzuki
  • Patent number: 9142619
    Abstract: [Problem] To provide a group III nitride semiconductor device and a method for manufacturing the same in which dislocation density in a semiconductor layer can be precisely reduced. [Solution] In manufacturing a group III nitride semiconductor device 1, a mask layer 40 is formed on a substrate 20, followed by selectively growing nanocolumns 50 made of a group III nitride semiconductor through a pattern 44 of the mask layer 40 in order to grow a group III nitride semiconductor layer 10 on the mask layer 40.
    Type: Grant
    Filed: November 25, 2011
    Date of Patent: September 22, 2015
    Assignee: EL-SEED CORPORATION
    Inventors: Tsukasa Kitano, Koichi Naniwae, Masayoshi Koike, Fumiharu Teramae, Toshiyuki Kondo, Atsushi Suzuki, Tomohiko Maeda, Midori Mori
  • Patent number: 9142722
    Abstract: There is provided a light emitting device including a plurality of nanoscale light emitting structures spaced apart from one another on a first conductivity-type semiconductor base layer, the plurality of nanoscale light emitting structures each including a first conductivity-type semiconductor core, an active layer and a second conductivity-type semiconductor layer, and an electrode connected to the second conductivity-type semiconductor layer. The electrode is disposed between a first nanoscale light emitting structure and a second nanoscale light emitting structure among the plurality of nanoscale light emitting structures, and the electrode has a height lower than a height of the plurality of nanoscale light emitting structures.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: September 22, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Woong Kim, Kyung Wook Hwang
  • Patent number: 9130087
    Abstract: A light emitting diode includes a substrate, an un-doped GaN layer, a plurality of carbon nanotubes, an N-type GaN layer, an active layer formed on the N-type GaN layer, and a P-type GaN layer formed on the active layer. The substrate includes a first surface and a second surface opposite and parallel to the first surface. A plurality of convexes is formed on the first surface of the substrate. The un-doped GaN layer is formed on the first surface of the substrate. The plurality of carbon nanotubes is formed on an upper surface of the un-doped GaN layer. The plurality of carbon nanotubes is spaced from each other to expose a portion of the upper surface of the un-doped GaN layer. The N-type GaN layer is formed on the exposed portion of the upper surface of the un-doped GaN layer and covering the carbon nanotubes therein.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: September 8, 2015
    Assignee: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: Ya-Wen Lin, Ching-Hsueh Chiu, Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9130126
    Abstract: The semiconductor light emitting device includes: a substrate; a first cladding layer disposed on the substrate; an emitting layer disposed on the first cladding layer; a second cladding layer disposed on the emitting layer; a contact layer disposed at a predetermined region on the second cladding layer; an optically transmissive electrode layer disposed on the contact layer; a surface electrode layer disposed on the optically transmissive electrode layer; and an aperture formed by opening a region corresponding to the predetermined region of the surface electrode layer. There is provided a semiconductor light emitting device of which the light extracting efficiency can be improved to achieve high luminance.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: September 8, 2015
    Assignee: ROHM CO., LTD.
    Inventors: Shigefumi Ikeda, Yasutomo Ochiai
  • Patent number: 9123862
    Abstract: A semiconductor light emitting device is provided. The semiconductor light emitting device includes a first nitride layer, an active layer, and a second nitride layer. The first nitride layer includes an irregular, uneven surface, and the active layer is formed on the irregular, uneven surface. The second nitride layer is formed on the active layer. A plurality of quantum dots are formed at the active layer.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: September 1, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventor: Dae Sung Kang
  • Patent number: 9117968
    Abstract: A light-emitting diode structure includes an AuSn or AuIn-containing bonding layer over a substrate, a metal layer disposed over the bonding layer, a p-type doped gallium nitride (p-GaN) layer disposed over the metal layer, a n-type doped gallium nitride (n-GaN) layer approximate the p-GaN layer, a multiple quantum well structure disposed between the n-GaN and p-GaN layers, and a conductive contact disposed on the n-GaN layer. The n-GaN layer includes a rough surface with randomly distributed dips. The nano-sized dips have diameters distributed between about 100 nm and about 600 nm, have a dip density ranging from about 107 grains/cm2 to about 109 grains/cm2, and are spaced from each other with an average spacing S, average diameter D, and a ratio S/D that ranges between about 1.1 and about 1.5. The conductive contact is disposed on some of the nano-sized dips of the rough surface.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: August 25, 2015
    Assignee: TSMC SOLID STATE LIGHTING LTD.
    Inventors: Hsing-Kuo Hsia, Ching-Hua Chiu
  • Patent number: 9112083
    Abstract: A semiconductor device is provided that includes a Group III nitride based superlattice and a Group III nitride based active region comprising at least one quantum well structure on the superlattice. The quantum well structure includes a well support layer comprising a Group III nitride, a quantum well layer comprising a Group III nitride on the well support layer and a cap layer comprising a Group III nitride on the quantum well layer. A Group III nitride based semiconductor device is also provided that includes a gallium nitride based superlattice having at least two periods of alternating layers of InXGa1-XN and InYGa1-YN, where 0?X<1 and 0?Y<1 and X is not equal to Y. The semiconductor device may be a light emitting diode with a Group III nitride based active region. The active region may be a multiple quantum well active region.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: August 18, 2015
    Assignee: Cree, Inc.
    Inventors: David Todd Emerson, James Ibbetson, Michael John Bergmann, Kathleen Marie Doverspike, Michael John O'Loughlin, Howard Dean Nordby, Jr., Amber Christine Abare
  • Patent number: 9087890
    Abstract: A semiconductor device comprising: an active layer, which has a composition represented by the formula: AlxMyGa1-x-yN, wherein x satisfies 0?x?1, wherein y satisfies 0?y?1, wherein x+y satisfies 0?x+y?1, and wherein M contains at least one of In and B; a substrate containing GaN; and a buffer layer provided between the active layer and the substrate, wherein the semiconductor device is operated by electrical current flowing through the active layer in a direction parallel to a face of the substrate, wherein the buffer layer has a composition represented by the formula: AlpIn1-pN, wherein p satisfies 0?p<1, and wherein the buffer layer, which has a band gap energy wider than that of the substrate, and which is lattice-matched to the substrate.
    Type: Grant
    Filed: August 20, 2010
    Date of Patent: July 21, 2015
    Assignee: Sanken Electric Co., LTD.
    Inventor: Ken Sato
  • Patent number: 9076921
    Abstract: A method of fabricating a large area photodiode is provided. The method includes providing a substrate having a first contact layer formed thereon. Also, the method includes forming a dielectric layer on the first contact layer and patterning selective areas of the dielectric layer to form a plurality of dielectric windows. Each of the dielectric windows has an open region exposing the first contact layer. Furthermore, the method includes epitaxially growing photodiode material(s) in the dielectric windows, wherein each of the dielectric windows are individualized photodiode structures.
    Type: Grant
    Filed: July 20, 2009
    Date of Patent: July 7, 2015
    Assignee: Massachusetts Institute of Technology
    Inventor: Jurgen Michel
  • Patent number: 9041045
    Abstract: A transparent LED wafer module and a method for manufacturing the same are provided. In a conductor LED device epitaxial process, the conductor LED device is grown on a transparent material wafer, where both surfaces of the conductor LED device are entirely grown on the transparent material, and then a transparent glass substrate is restacked, thereby securing a high amount of light.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: May 26, 2015
    Inventor: Sung-Bok Shin
  • Patent number: 9041027
    Abstract: A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a spinel substrate using a sacrificial buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The sacrificial buffer material and semiconductor materials may be deposited using lattice-matching epitaxy or coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The sacrificial buffer layer may be dissolved using an epitaxial liftoff technique in order to separate the semiconductor device from the spinel substrate, and the spinel substrate may be reused in the subsequent fabrication of other semiconductor devices.
    Type: Grant
    Filed: December 1, 2010
    Date of Patent: May 26, 2015
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Aaron Joseph Ptak, Yong Lin, Andrew Norman, Kirstin Alberi
  • Publication number: 20150137156
    Abstract: A semiconductor light emitting device including: a substrate made of GaAs; and a semiconductor layer formed on the substrate, in which part of the substrate on a side opposite to the semiconductor layer is removed by etching so that the semiconductor light emitting device has a thickness of not more than 60 ?m.
    Type: Application
    Filed: January 23, 2015
    Publication date: May 21, 2015
    Inventors: Tadahiro HOSOMI, Kentaro MINESHITA
  • Patent number: 9035336
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: May 19, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Koichi Tachibana, Chie Hongo, Hajime Nago, Shinya Nunoue
  • Publication number: 20150129911
    Abstract: Tunable p-i-n diodes comprising Ge heterojunction structures are provided. Also provided are methods for making and using the tunable p-i-n diodes. Tunability is provided by adjusting the tensile strain in the p-i-n heterojunction structure, which enables the diodes to emit radiation over a range of wavelengths.
    Type: Application
    Filed: November 8, 2013
    Publication date: May 14, 2015
    Applicant: Wisconsin Alumni Research Foundation
    Inventors: Max G. Lagally, José Roberto Sánchez Pérez
  • Patent number: 9029908
    Abstract: A photonic device comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The device further includes a top diode material and an active diode region between the top and bottom diode materials.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 9024338
    Abstract: The present invention relates to the growing of nitride semiconductors, applicable for a multitude of semiconductor devices such as diodes, LEDs and transistors. According to the method of the invention nitride semiconductor nanowires are grown utilizing a CVD based selective area growth technique. A nitrogen source and a metal-organic source are present during the nanowire growth step and at least the nitrogen source flow rate is continuous during the nanowire growth step. The V/III-ratio utilized in the inventive method is significantly lower than the V/III-ratios commonly associated with the growth of nitride based semiconductor.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: May 5, 2015
    Assignee: QuNano AB
    Inventors: Werner Seifert, Damir Asoli, Zhaoxia Bi, Jonas Ohlsson, Lars Ivar Samuelson
  • Publication number: 20150115298
    Abstract: According to one embodiment, the fluorescer layer is provided on the first surface side. The fluorescer layer has a side surface provided at an obtuse angle with respect to the first surface. The fluorescer layer includes a plurality of fluorescers and a binder. The plurality of fluorescers is configured to be excited by light emitted from the light emitting layer to emit light of a wavelength different from a wavelength of the light emitted from the light emitting layer. The binder is configured to combine the plurality of fluorescers in a single body and transmit the light emitted from the light emitting layer and light emitted from the fluorescers.
    Type: Application
    Filed: February 28, 2014
    Publication date: April 30, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Hideyuki Tomizawa, Miyoko Shimada, Akihiro Kojima, Yosuke Akimoto, Miyuki Shimojuku, Hideto Furuyama, Yoshiaki Sugizaki
  • Patent number: 9018641
    Abstract: A method for manufacturing a radiation-emitting component (1) in which a field distribution of a near field (101, 201) in a direction perpendicular to a main emission axis of the component is specified. From the field distribution of the near field, an index of refraction profile (111, 211, 511) along this direction is determined. A structure is determined for the component such that the component will have the previously determined index of refraction profile. The component is constructed according to the previously determined structure. A radiation-emitting component is also disclosed.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: April 28, 2015
    Assignee: CSRAM Opto Semiconductors GmbH
    Inventors: Peter Brick, Uwe Strauss
  • Patent number: 9018650
    Abstract: A high luminance semiconductor light emitting device including a metallic reflecting layer formed using a non-transparent semiconductor substrate is provided. The device includes a GaAs substrate; a metal layer disposed on the GaAs substrate; and a light emitting diode structure. The light emitting diode structure includes a patterned metal contact layer and a patterned insulating layer disposed on the metal layer, a p type cladding layer disposed on the patterned metal contact layer and the patterned insulating layer, a multi-quantum well layer disposed on the p type cladding layer, an n type cladding layer disposed on the multi-quantum well layer, and a window layer disposed on the n type cladding layer. The GaAs substrate and the light emitting diode structure are bonded by using the metal layer.
    Type: Grant
    Filed: September 12, 2013
    Date of Patent: April 28, 2015
    Assignee: Rohm Co., Ltd.
    Inventors: Masakazu Takao, Mitsuhiko Sakai, Kazuhiko Senda
  • Patent number: 9018652
    Abstract: Disclosed are a light emitting device, a method of manufacturing the same, a light emitting device package, and a lighting system. The light emitting device includes: a substrate; a first conductive semiconductor layer on the substrate; an active layer on the first conductive semiconductor layer; a second conductive semiconductor layer; and a nitride semiconductor layer having a refractive index less than a refractive index of the second conductive semiconductor layer on the second conductive semiconductor layer.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: April 28, 2015
    Assignee: LG Innotek Co., Ltd.
    Inventors: Jong Pil Jeong, Jung Hyun Hwang, Chong Cook Kim