With Heterojunction Patents (Class 257/94)
  • Patent number: 10982823
    Abstract: A lighting system that is part of a headlight module of a motor vehicle includes an array of LED light sources that include no organic materials. Each light source includes a glass lens attached to a phosphor glass converter plate, which itself is attached to an LED die that is flip-chip mounted on a mounting substrate. The converter plate includes phosphor particles embedded in glass. Each lens is disposed laterally over a single LED die. The converter plate is attached to the LED die by a first bonding layer, and the lens is attached to the converter plate by a second bonding layer. Both bonding layers are made of a metal oxide and are thinner than the converter plate. Either each lens does not extend horizontally outside the lateral boundary of each converter plate, or the lens portions centered on each LED die are part of a unitary lens array.
    Type: Grant
    Filed: February 3, 2019
    Date of Patent: April 20, 2021
    Assignee: Bridgelux, Inc.
    Inventor: Tao Xu
  • Patent number: 10985306
    Abstract: A semiconductor chip includes an electrically insulating layer including a first opening and a second opening, an electrically conductive first connection point, and an electrically conductive second connection point, wherein a carrier mechanically connects to a semiconductor body, the active region electrically connects to a first conductor body and a second conductor body, the electrically insulating layer covers the carrier on a side thereof facing away from the semiconductor body, the first connection point electrically connects to the first conductor body through the first opening, the second connection point electrically connects to the second conductor body through the second opening, the first conductor body is at a first distance from a second conductor body, the first connection point is at a second distance from the second connection point, and the first distance is less than the second distance.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: April 20, 2021
    Assignee: OSRAM OLED GmbH
    Inventors: Korbinian Perzlmaier, Christian Leirer
  • Patent number: 10978569
    Abstract: A process of forming a nitride semiconductor device is disclosed. The process first deposits a silicon nitride (SiN) film on a semiconductor layer by the lower pressure chemical vapor deposition (LPCVD) technique at a temperature, then, forming an opening in the SiN film for an ohmic electrode. Preparing a photoresist on the SiN film, where the photoresist provides an opening that fully covers the opening in the SiN film, the process exposes a peripheral area around the opening of the SiN film to chlorine (Cl) plasma that may etch the semiconductor layer to form a recess therein. Metals for the ohmic electrode are filled within the recess in the semiconductor layer and the peripheral area of the SiN film. Finally, the metals are alloyed at a temperature lower than the deposition temperature of the SiN film.
    Type: Grant
    Filed: October 12, 2018
    Date of Patent: April 13, 2021
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventor: Takuma Nakano
  • Patent number: 10971475
    Abstract: A semiconductor package structure includes a plurality of first dies spaced from each other, a molding layer between the first dies, a second die over the plurality of first dies and the molding layer, and an adhesive layer between the plurality of first dies and the second die, and between the molding layer and the second die. A first interface between the adhesive layer and the molding layer and a second interface between the adhesive layer and the plurality of first dies are at different levels.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: April 6, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Jeng-Nan Hung, Chun-Hui Yu, Kuo-Chung Yee, Yi-Da Tsai, Wei-Hung Lin, Ming-Da Cheng, Ching-Hua Hsieh
  • Patent number: 10950781
    Abstract: Disclosed are a method of manufacturing a piezoelectric thin film and a piezoelectric sensor manufactured using the piezoelectric thin film. A piezoelectric sensor according to an embodiment of the present disclosure includes a substrate; a lower electrode formed on the substrate; a two-dimensional perovskite nanosheet seed layer formed on the lower electrode; a ceramic piezoelectric thin film formed on the two-dimensional perovskite nanosheet seed layer; and an upper electrode formed on the ceramic piezoelectric thin film, wherein each of the two-dimensional perovskite nanosheet seed layer and the ceramic piezoelectric thin film has a crystal structure.
    Type: Grant
    Filed: August 1, 2019
    Date of Patent: March 16, 2021
    Assignee: Korea University Research and Business Foundation
    Inventors: Sahn Nahm, Jong Hyun Kim, Sang Hyo Kweon, Woong Hee Lee
  • Patent number: 10937928
    Abstract: To provide a nitride semiconductor element having a better contact resistance reduction effect also in the case of a light emitting element containing AlGaN having a high Al composition. The nitride semiconductor element has a substrate 1, a first conductivity type first nitride semiconductor layer 2 formed on the substrate 1, and a first electrode layer 4 formed on the first nitride semiconductor layer 2. The first electrode layer 4 contains aluminum and nickel, and both aluminum and an alloy containing aluminum and nickel are present in a contact surface to the first nitride semiconductor layer 2 or in the vicinity of the contact surface.
    Type: Grant
    Filed: November 8, 2018
    Date of Patent: March 2, 2021
    Assignee: ASAHI KASEI KABUSHIKI KAISHA
    Inventors: Aya Yokoyama, Yoshihito Hagihara, Ryosuke Hasegawa, Akira Yoshikawa, Ziyi Zhang, Tomohiro Morishita
  • Patent number: 10931083
    Abstract: An optical apparatus includes a cooling device with a lower clad disposed thereon; a waveguide disposed on the lower clad and including an active waveguide to define a gain section and a passive waveguide to define a wavelength-tunable section; gratings disposed in the lower clad of the wavelength-tunable section; an upper clad disposed on the waveguide; a first upper electrode disposed on the upper clad of the gain section; and a second upper electrode disposed on the upper clad of the wavelength-tunable section. The lower clad of the wavelength-tunable section has a recess region to expose an upper surface of the cooling device, the recess region forming an air gap-having a height of 10 ?m to 80 ?m from the upper surface of the cooling device. The gratings are formed in a depth of at least 5 ?m from a bottom surface of the lower clad of the recess region.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: February 23, 2021
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Oh Kee Kwon, Su Hwan Oh, Chul-Wook Lee, Kisoo Kim
  • Patent number: 10910518
    Abstract: A semiconductor device is provided. The semiconductor device includes a first semiconductor layer; a second semiconductor layer on the first semiconductor layer; an active region between the second semiconductor layer and the first semiconductor layer; an electron blocking structure between the active region and the second semiconductor layer; a first In-containing layer between the active region and the electron blocking structure; and a second In-containing layer between the electron blocking structure and the second semiconductor layer; wherein the first In-containing layer and the second In-containing layer each includes indium, aluminum and gallium, the first In-containing layer has a first aluminum content, the second In-containing layer has a second aluminum content, and the second aluminum content is less than the first aluminum content.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: February 2, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Huan-Yu Lai, Li-Chi Peng
  • Patent number: 10895800
    Abstract: A segmented light or optical power emitting device and an illumination device are described. The segmented device includes a die having a light or optical power emitting semiconductor structure that includes an active layer disposed between an n-layer and a p-layer. Trenches are formed in at least the semiconductor structure and separate the die into individually addressable segments. The active layer emits light or optical power having a first color point or spectrum. At least one wavelength converting layer is adjacent the die and converts the light or optical power to light or optical power having at least one second color point or spectrum and limits an energy ratio of the pump light or optical power that passes through the at least one wavelength converting layer unconverted to total light or optical power emitted by the light or optical power emitting device to less than 10%.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: January 19, 2021
    Assignee: Lumileds LLC
    Inventors: Arjen Gerben Van Der Sijde, Quint Van Voorst Vader, Nicola Pfeffer
  • Patent number: 10825993
    Abstract: An organic light-emitting device includes a first electrode, a second electrode, and an organic layer between the first and second electrodes and including an emission layer, wherein the emission layer comprises a first host represented by Formula 1 and a second host represented by Formula 2:
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: November 3, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun-Jee Park, Ji-Hyun Seo
  • Patent number: 10818825
    Abstract: Provided are a method for manufacturing wavelength conversion members that enables manufacturing of wavelength conversion members having a high light extraction efficiency and suppression of material loss, a wavelength conversion member obtained by the method, and a light-emitting device.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: October 27, 2020
    Assignee: NIPPON ELECTRIC GLASS CO., LTD.
    Inventors: Tomomichi Kunimoto, Hideki Asano
  • Patent number: 10811255
    Abstract: Methods of forming semiconductor devices are provided. One of the methods includes following steps. A plurality of hard mask patterns is formed around a region of a substrate, wherein an imaginary connecting line is formed between corners of two of the plurality of hard mask patterns at the same side of the region, and the imaginary connecting line is substantially parallel to or perpendicular to a horizontal direction. A semiconductor layer is formed on the substrate by a selective epitaxial growth process.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: October 20, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pei-Wei Lee, Pang-Yen Tsai, Tsung-Yu Hung
  • Patent number: 10797198
    Abstract: Provided is an infrared light emitting device with high emission intensity. The infrared light emitting device includes: a semiconductor substrate; a first compound semiconductor layer; a light emitting layer containing at least In and Sb and having a predetermined range(s) of Al or Al and Ga proportion(s); a third compound semiconductor layer; and a second compound semiconductor layer containing at least In, Al, and Sb and having a predetermined range(s) of Al or Al and Ga proportion(s), in which the first compound semiconductor layer includes, in the stated order, a first A layer, a first B layer, and a first C layer, each containing at least In and Sb and having a predetermined range(s) of Al or Al and Ga proportion(s), and the proportion(s) of the Al composition or the Al composition and the Ga composition of each layer satisfy a predetermined relation(s).
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: October 6, 2020
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Yoshiki Sakurai, Osamu Morohara, Hiromi Fujita
  • Patent number: 10790412
    Abstract: A manufacturing method of a light-emitting device includes steps of: providing a substrate with a top surface, wherein the top surface comprises a plurality of concavo-convex structures; forming a semiconductor stack on the top surface; forming a trench in the semiconductor stack to define a plurality of second semiconductor stacks and expose a first upper surface; forming a scribing region which extends from the first upper surface into the semiconductor stack and exposes a side surface of the semiconductor stack to define a plurality of first semiconductor stacks; removing a portion of the plurality of first semiconductor stacks and a portion of the concavo-convex structures trough the region to form a first side wall of each of the first semiconductor stack; and dividing the substrate along the region; wherein the first side wall and the top surface form an acute angle ? between thereof, 30°???80°.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: September 29, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Yen-Tai Chao, Sen-Jung Hsu, Tao-Chi Chang, Wei-Chih Wen, Ou Chen, Chun-Hsiang Tu, Yu-Shou Wang, Jing-Feng Huang
  • Patent number: 10784398
    Abstract: A vertical current mode solid state device comprising a connection pad and side walls comprising a metal-insulator-semiconductor (MIS) structure, wherein leakage current effect of the vertical device is limited through the side walls by biasing the MIS structure.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: September 22, 2020
    Assignee: VUEREAL INC.
    Inventors: Gholamreza Chaji, Ehsanollah Fathi, Hossein Zamani Siboni
  • Patent number: 10746926
    Abstract: An optical waveguide substrate 1 includes an optical waveguide 9 composed of a multi-layered film 4 of a plurality of optical material films 5, 6 and having end faces onto which a light is made incident or from which the light is emitted. The end face is an etched surface, and it is provided, on the end face, an unevenness 7 corresponding to a difference of etching rates of the optical material films.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: August 18, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Keiichiro Asai, Shoichiro Yamaguchi
  • Patent number: 10734225
    Abstract: A nitride semiconductor substrate includes a sapphire substrate and a nitride semiconductor layer formed thereon and containing a group III element including Al and nitrogen as a main component. A surface of the sapphire substrate where the nitride semiconductor layer is formed includes recesses having a maximum opening size of from 2 nm to 60 nm in an amount of from 1×109 pieces to 1×1011 pieces per cm2. The recesses and surfaces immediately above the recesses form spaces. Of a surface of the nitride semiconductor layer on the sapphire substrate side, a height difference ?H between a surface immediately above of each recess and a surface in contact with a flat surface is 10 nm or less. A portion of the nitride semiconductor layer above each recess has a crystalline structure produced by growth along a polar plane of the group III element.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: August 4, 2020
    Assignee: ASAHI KASEI KABUSHIKI KAISHA
    Inventors: Akira Yoshikawa, Tomohiro Morishita, Motoaki Iwaya
  • Patent number: 10714655
    Abstract: LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: July 14, 2020
    Assignee: Apple Inc.
    Inventors: David P. Bour, Kelly McGroddy, Daniel Arthur Haeger, James Michael Perkins, Arpan Chakraborty, Jean-Jacques P. Drolet, Dmitry S. Sizov
  • Patent number: 10707379
    Abstract: An optoelectronic device with a multi-layer contact is described. The optoelectronic device can include an n-type semiconductor layer having a surface. A mesa can be located over a first portion of the surface of the n-type semiconductor layer and have a mesa boundary, which has a shape including a plurality of interconnected fingers. The n-type semiconductor layer can have a shape at least partially defined by the mesa boundary. A first n-type contact layer can be located adjacent to another portion of the n-type semiconductor contact layer, where the first n-type contact layer forms an ohmic contact with the n-type semiconductor layer. A second contact layer can be located over a second portion of the n-type semiconductor contact layer, where the second contact layer is formed of a reflective material.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: July 7, 2020
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Alexander Dobrinsky, Maxim S. Shatalov, Mikhail Gaevski, Michael Shur
  • Patent number: 10670941
    Abstract: Provided are an optical modulation device and a method of operating the same. The optical modulation device may include a nano-antenna, a conductor, and an active layer located between the nano-antenna and the conductor. The optical modulation device may further include a first dielectric layer located between the active layer and the conductor and a second dielectric layer located between the active layer and the nano-antenna. The optical modulation device may further include a signal applying unit configured to independently apply an electrical signal to at least two of the nano-antenna, the active layer, and the conductor.
    Type: Grant
    Filed: May 4, 2018
    Date of Patent: June 2, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junghyun Park, Jisoo Kyoung, Sunil Kim, Changgyun Shin, Byunggil Jeong, Byounglyong Choi
  • Patent number: 10665755
    Abstract: A method for manufacturing a light emitting device is provided. The method includes: preparing a growth substrate with at least one dislocation-controlling feature thereon; sequentially growing a second type semiconductor layer, an active layer, and a first type semiconductor layer on the dislocation-controlling feature, wherein the active layer has a first region and at least one second region, and the dislocation-controlling feature causes a threading dislocation density of the first region to be greater than a threading dislocation density of the second region; and modifying a resistivity of the first type semiconductor layer, so that the resistivity of the first type semiconductor layer increases from a plurality of low resistance portions toward a high resistance portion of the first type semiconductor layer.
    Type: Grant
    Filed: May 19, 2019
    Date of Patent: May 26, 2020
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventor: Li-Yi Chen
  • Patent number: 10644194
    Abstract: Disclosed in an embodiment are a light emitting device, and a light emitting device package and a light emitting module having the same. According to an embodiment, the light emitting device comprises: a first superlattice layer arranged on an AlN template layer, and a first semiconductor layer, a second superlattice layer, and a first conductive semiconductor layer; an active layer having a quantum well layer and a quantum wall layer arranged on the first conductive semiconductor layer; and an electron blocking layer arranged on the active layer and a second conductive semiconductor layer. A first and second layers of the first superlattice layer, the first semiconductor layer, and third and fourth layers of the second superlattice layer include AlGaN-based semiconductors, and an aluminum composition of the third layer is higher than an aluminum composition of the fourth layer and has the same composition range as that of an aluminum composition of the first semiconductor layer.
    Type: Grant
    Filed: April 14, 2017
    Date of Patent: May 5, 2020
    Assignee: LG Innotek Co., Ltd.
    Inventors: Myung Hee Kim, Jung Yeop Hong
  • Patent number: 10636663
    Abstract: A technique that recovers from degradation in crystalline nature in an ion-implanted region is provided. A method of manufacturing a semiconductor device, includes: an ion implantation step of ion-implanting p-type impurities by a cumulative dose D into an n-type semiconductor layer containing n-type impurities; and a thermal annealing step of annealing an ion-implanted region of the n-type semiconductor layer where the p-type impurities are ion-implanted, in an atmosphere containing nitrogen, at a temperature T for a time t, wherein the cumulative dose D, the temperature T, and the time t satisfy a predetermined relationship.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: April 28, 2020
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Takahiro Fujii, Masayoshi Kosaki, Takaki Niwa
  • Patent number: 10612161
    Abstract: A disk-shaped GaN substrate has a diameter of 2 inches or more has a front surface tilted with a tilt angle of 45° or more and 135° or less relative to the (0001) plane in a tilt direction within a range of ±5° around the <10-10> direction, and a back surface which is a main surface opposite to the front surface. The GaN substrate has a first point positioned in a direction perpendicular to the c-axis when viewed from the center thereof, on the side surface thereof. A single diffraction peak appears in an X-ray diffraction pattern obtained by ? scan in which an X-ray (CuK?1: wavelength: 0.1542 nm) is incident to the first point and the incident angle ? of the incident X-ray is varied while the 2? angle of the diffracted X-ray is fixed to twice the Bragg angle of 28.99° of the {11-20} plane.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: April 7, 2020
    Assignee: MITSUBISHI CHEMICAL CORPORATION
    Inventors: Tetsuharu Kajimoto, Yusuke Tsukada, Masayuki Tashiro
  • Patent number: 10593901
    Abstract: A process for improving the external quantum efficiency of a light emitting diode (LED) is provided by exposing one or more components of an LED, a partially assembled LED, or a completely assembled LED to an amount of hydrogen or hydrogen gas, or to an atmosphere containing higher quantities of hydrogen or hydrogen gas for a period of exposure time. Kits and processes for constructing a light emitting diode having an improved external quantum efficiency is further provided, which includes exposing one or more components of an LED, a partially assembled LED, or a completely assembled LED to an amount of hydrogen or hydrogen gas, or to an atmosphere containing higher quantities of hydrogen or hydrogen gas for a period of exposure time.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: March 17, 2020
    Assignee: NanoPhotonica, Inc.
    Inventors: Paul H. Holloway, Jake Hyvonen, Jesse R. Manders, Alexandre Titov, Jean Tokarz, Krishna Acharya
  • Patent number: 10587096
    Abstract: A solid-state light source with built-in access resistance modulation is described. The light source can include an active region configured to emit electromagnetic radiation during operation of the light source. The active region can be formed at a p-n junction of a p-type side with a p-type contact and a n-type side with a n-type contact. The light source includes a control electrode configured to modulate an access resistance of an access region located on the p-type side and/or an access resistance of an access region located on the n-type side of the active region. The solid-state light source can be implemented in a circuit, which includes a voltage source that supplies a modulation voltage to the control electrode to modulate the access resistance(s).
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: March 10, 2020
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Grigory Simin
  • Patent number: 10586902
    Abstract: A light-emitting device includes a light-emitting structure with a side surface, and a reflective layer covering the side surface. The light-emitting structure has a first light-emitting angle and a second light-emitting angle. The difference between the first light-emitting angle and the second light-emitting angle is larger than 15°.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: March 10, 2020
    Assignee: EPISTAR CORPORATION
    Inventors: Chien-Liang Liu, Ming-Chi Hsu, Shih-An Liao, Chun-Hung Liu, Zhi-Ting Ye, Cheng-Teng Ye, Po-Chang Chen, Sheng-Che Chiou
  • Patent number: 10573626
    Abstract: The present disclosure can provide a display device, including a substrate, semiconductor light emitting devices having a first conductive electrode disposed on the substrate and formed in a ring shape on an upper edge thereof and a second conductive electrode formed on an upper central portion of the semiconductor light emitting device and surrounded by the first conductive electrode, a passivation layer formed to cover a side surface of the semiconductor light emitting device, and cover part of an upper surface of the semiconductor light emitting device, a first wiring electrode electrically connected to the first conductive electrode, and a second wiring electrode extended from an edge of the semiconductor light emitting device in a central direction of the semiconductor light emitting device to be electrically connected to the second conductive electrode, wherein part of the second wiring electrode overlaps with part of the first conductive electrode with the passivation layer interposed therebetween.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: February 25, 2020
    Assignee: LG ELECTRONICS INC.
    Inventors: Junghoon Kim, Byoungkwon Cho
  • Patent number: 10535717
    Abstract: A plurality of light emitters emitting different colors of light in a light-emitting device is provided on a surface of a substrate along two dimensions. Each light emitter includes a first electrode, a first charge injection/transport layer, a light-emitting layer, an intermediate layer, a second charge injection/transport layer, and a second electrode. The intermediate layer includes a fluoride of an alkali metal or an alkaline earth metal. Among the first electrode and the second electrode, one electrode is light reflective and another electrode is light transmissive. Among the first charge injection/transport layer and the second charge injection/transport layer, one charge injection/transport layer is disposed between the light-emitting layer and the light reflective electrode, and thickness of the one charge injection/transport layer included in the first light emitter is different from thickness of the one charge injection/transport layer included in the second light emitter.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: January 14, 2020
    Assignee: JOLED INC.
    Inventor: Takahiro Komatsu
  • Patent number: 10534204
    Abstract: Aspects of the present disclosure are directed to a photorefractive layer stack. A plurality of layers are stacked along in a stacking direction and designed so as to enable a photorefractive response. That is, a refractive index of the plurality of layers modulates in response to illuminating the plurality of layers with an optical pattern of modulated intensity. A plurality of electrically insulated areas are arranged in a plane perpendicular to the stacking direction. The plurality of electrically insulated areas are optically homogenous and prevent lateral diffusion between any two electrically insulated areas of the plurality of electrically insulated areas.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: January 14, 2020
    Assignee: International Business Machines Corporation
    Inventor: Folkert Horst
  • Patent number: 10504977
    Abstract: An organic light-emitting circuit structure having a temperature function includes an organic light-emitting diode which has an anode and a cathode opposite to each other; a driving transistor including a first electrode and a second electrode; the first electrode is a source electrode, the second electrode is a drain electrode; or, the first electrode is the drain electrode, the second electrode is the source electrode; a temperature sensitive resistor, which is electrically connected between the driving transistor and the light-emitting device or between the driving transistor and the voltage source. The temperature sensitive resistor increases a resistance value at sensing a temperature increase or decreases the resistance value at sensing a temperature decrease. As a result a current through the organic light-emitting diode stays compensated and stable, thereby ensuring that the organic light-emitting diode keeps emitting light normally under various temperature conditions.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 10, 2019
    Assignee: SHANGHAI TIANMA AM-OLED CO., LTD.
    Inventors: Zhiyong Xiong, Duzen Peng, Jianjie Zhu
  • Patent number: 10497836
    Abstract: A light-emitting diode is provided to include: a transparent substrate having a first surface, a second surface, and a side surface; a first conductive semiconductor layer positioned on the first surface of the transparent substrate; a second conductive semiconductor layer positioned on the first conductive semiconductor layer; an active layer positioned between the first conductive semiconductor layer and the second conductive semiconductor layer; a first pad electrically connected to the first conductive semiconductor layer; and a second pad electrically connected to the second conductive semiconductor layer, wherein the transparent substrate is configured to discharge light generated by the active layer through the second surface of the transparent substrate, and the light-emitting diode has a beam angle of at least 140 degrees or more. Accordingly, a light-emitting diode suitable for a backlight unit or a surface lighting apparatus can be provided.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: December 3, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Jong Hyeon Chae, Joon Sup Lee, Won Young Roh, Min Woo Kang, Jong Min Jang, Hyun A. Kim, Daewoong Suh
  • Patent number: 10475887
    Abstract: An object is to provide a nonpolar or semipolar GaN substrate having improved size and crystal quality. A self-standing GaN substrate has an angle between the normal of the principal surface and an m-axis of 0 degrees or more and 20 degrees or less, wherein: the size of the projected image in a c-axis direction when the principal surface is vertically projected on an M-plane is 10 mm or more; and when an a-axis length is measured on an intersection line between the principal surface and an A-plane, a low distortion section with a section length of 6 mm or more and with an a-axis length variation within the section of 10.0×10?5 ? or less is observed.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: November 12, 2019
    Assignee: Mitsubishi Chemical Corporation
    Inventors: Satoru Nagao, Yusuke Tsukada, Kazunori Kamada, Shuichi Kubo, Hirotaka Ikeda, Kenji Fujito, Hideo Fujisawa, Yutaka Mikawa, Tae Mochizuki
  • Patent number: 10446712
    Abstract: LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: October 15, 2019
    Assignee: Apple Inc.
    Inventors: David P. Bour, Kelly McGroddy, Daniel Arthur Haeger, James Michael Perkins, Arpan Chakraborty, Jean-Jacques P. Drolet, Dmitry S. Sizov
  • Patent number: 10431716
    Abstract: A light-emitting diode includes a first-type nitride region, a light-emitting region and a second-type nitride region, wherein the first-type nitride region includes a plurality of alternating first nitride layers and second nitride layers. The second nitride layers have high-doped emitting points pointing to the corresponding first nitride layer. The second-type nitride region includes a plurality of alternating third nitride layers and fourth nitride layers, wherein doping concentration of the fourth nitride layer is higher than that of the third nitride layer, and the fourth nitride layer has high-doped emitting points pointing to the third nitride layer.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: October 1, 2019
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Liming Shu, Da-qian Ye, Liangjun Wang, Xiaofeng Liu, Chaoyu Wu, Duxiang Wang, Dongyan Zhang, Sha-sha Chen
  • Patent number: 10422499
    Abstract: A reflective laser activated remote phosphor (LARP) package comprising: a phosphor platelet oriented in a first plane defined by an x-y plane; a laser diode (LD) positioned to be offset along the x-axis from the phosphor platelet and above the first plane along a z-axis perpendicular to the x-y plane, the LD comprising: an output facet configured for emitting a laser beam (LB), the LB comprising: a slow axis oriented in a first direction along which the LB diverges at a first angle; and a fast axis oriented in a second direction along which the LB diverges at a second angle greater than the first angle; wherein the LD is oriented such that: the LB is bisected by the phosphor platelet such that the slow axis of the LB lies in an x-z plane and the fast axis of the LB is perpendicular to an x-z plane.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: September 24, 2019
    Assignees: OSRAM GmbH., OSRAM SYLVANIA Inc.
    Inventors: Alan L. Lenef, Joerg Sorg, Jan Oliver Drumm, Sergey Kudaev
  • Patent number: 10418274
    Abstract: Methods of increasing the optical path length and bandwidth of a Ge-based photodiode while reducing the diode area and capacitance without compromising the optical responsivity and the resulting devices are provided. Embodiments include providing a Si substrate having a BOX layer over the Si substrate and a Si layer over the BOX layer; forming an oxide layer over the Si layer; forming a trench in the oxide layer, the trench having a center strip and a plurality of opposing fins; epitaxially growing Ge in the trench and above the oxide layer; and removing the oxide layer, a Ge center strip and a plurality of opposing fins remaining.
    Type: Grant
    Filed: July 24, 2017
    Date of Patent: September 17, 2019
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventor: Sandeep Seema Saseendran
  • Patent number: 10411171
    Abstract: A Light Emitting Device (LED) that has increased reliability and efficiency. Specifically, the LED may be formed using Atomic Layer Deposition to improve the thermal conductivity between the ceramic plate and the LED, decrease the amount of organic contamination, and increase the efficiency of the optical output of the LED.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: September 10, 2019
    Assignee: LUMILEDS LLC
    Inventors: Ken T. Shimizu, Hisashi Masui, Daniel B. Roitman
  • Patent number: 10381509
    Abstract: The present embodiments relate a light emitting device.
    Type: Grant
    Filed: February 24, 2016
    Date of Patent: August 13, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jung Yeop Hong, Myung Hee Kim
  • Patent number: 10361343
    Abstract: The invention provides ultraviolet (UV) light-emitting diodes (LEDs). The UV LEDs can comprise abase layer including p-type SiC or p-type AlGaN, an active layer, and an n-AlGaN layer, wherein the active layer is disposed between the base layer and the n-AlGaN layer. In some embodiments, the absorption losses in p-SiC can be decreased or prevented by incorporating a conductive AlGaN Distributed Bragg Reflector (DBR) between the p-type SiC layer and the active layer. In some embodiments, the n-AlGaN layer can be textured to increase the extraction efficiency (EE). In some embodiments, the external quantum efficiency of the LEDs can be 20-30% or more.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: July 23, 2019
    Assignee: Trustees of Boston University
    Inventors: Gordon C. Brummer, Denis M. Nothern, Theodore D. Moustakas
  • Patent number: 10355120
    Abstract: A method for making a multilayered device on an engineered substrate having a substrate coefficient of thermal expansion includes growing a buffer layer on the engineered substrate, and growing a first epitaxial layer on the buffer layer. The first epitaxial layer is characterized by an epitaxial coefficient of thermal expansion substantially equal to the substrate coefficient of thermal expansion.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: July 16, 2019
    Assignee: Qromis, Inc.
    Inventors: Vladimir Odnoblyudov, Steve Lester, Ozgur Aktas
  • Patent number: 10347734
    Abstract: A semiconductor device includes a nitride semiconductor layer, a first electrode and second electrode on the nitride semiconductor layer, a gate electrode, and a gate insulating layer between the nitride semiconductor layer and the gate electrode. The gate insulating layer has a first oxide region containing at least any one element of aluminum and boron, gallium, and silicon. When a distance between the first end portion and the second end portion of the first oxide region is defined as d1, and a position separated by d1/10 from the first end portion toward the second end portion is defined as a first position, an atomic concentration of gallium at the first position is 80% or more and 120% or less of that of the at least any one element.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: July 9, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tatsuo Shimizu, Hisashi Saito, Hiroshi Ono, Toshiya Yonehara
  • Patent number: 10340139
    Abstract: Disclosed are methods and mask structures for epitaxially growing substantially defect-free semiconductor material. In some embodiments, mask structure includes a first level defining a first trench extending through the first level, wherein a bottom of the first trench is defined by a semiconductor substrate, and a second level on top of the first level, wherein the second level defines a plurality of second trenches positioned at a non-zero angle with respect to the first trench.
    Type: Grant
    Filed: October 25, 2016
    Date of Patent: July 2, 2019
    Assignee: IMEC
    Inventors: Benjamin Vincent, Voon Yew Thean, Liesbeth Witters
  • Patent number: 10290773
    Abstract: A light-emitting device is disclosed and comprises: a substrate; a light-emitting stack comprising a first conductivity type semiconductor layer, an active layer over the first conductivity type semiconductor layer, and a second conductivity type semiconductor layer over the active layer; a transparent conductive layer over the a light-emitting stack; a first trench dividing the transparent conductive layer into a first block and a second block; a connecting layer electrically connecting the two blocks of the transparent conductive layer; a first conductivity type contact layer between the substrate and the first conductivity type semiconductor layer, wherein the conductivity of the first conductivity type contact layer is greater than the conductivity of the first conductivity type semiconductor layer.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: May 14, 2019
    Assignee: EPISTAR CORPORATION
    Inventors: Chen Ou, Liang Sheng Chi, Chun Wei Chang, Chih-Wei Wu
  • Patent number: 10283681
    Abstract: A phosphor-converted light emitting device includes a light emitting diode (LED) on a substrate, where the LED comprises a stack of epitaxial layers comprising a p-n junction. A wavelength conversion material is in optical communication with the LED. According to one embodiment of the phosphor-converted light emitting device, a selective filter is adjacent to the wavelength conversion material, and the selective filter comprises a plurality of nanoparticles for absorbing light from the LED not down-converted by the wavelength conversion material. According to another embodiment of the phosphor-converted light emitting device, a perpendicular distance between a perimeter of the LED on the substrate and an edge of the substrate is at least about 24 microns. According to another embodiment of the phosphor-converted light emitting device, the LED comprises a mirror layer on one or more sidewalls thereof for reducing light leakage through the sidewalls.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: May 7, 2019
    Assignee: Cree, Inc.
    Inventors: Brian T. Collins, Matthew Donofrio, Kevin W. Haberern, Bennett Langsdorf, Anoop Mathew, Harry A. Seibel, Iliya Todorov, Bradley E. Williams
  • Patent number: 10263136
    Abstract: A semiconductor film includes a two-dimensional (2D) material layer having a hexagonal in-plane lattice structure, and a substantially planar Group IV semiconductor layer having a direct band gap on the 2D material layer. A method of fabricating a semiconductor material includes growing a Group IV semiconductor material on a two-dimensional material having a hexagonal in-plane lattice structure. This growth process results in the Group IV semiconductor material having a direct band gap. The semiconductor films may be used in any optoelectronic device, including flexible devices.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: April 16, 2019
    Assignee: Triad National Security, LLC
    Inventor: Jinkyoung Yoo
  • Patent number: 10263192
    Abstract: An organic electroluminescent device including: an anode, a cathode, an emitting layer formed of an organic compound and interposed between the cathode and the anode, and two or more layers provided in a hole-injecting/hole-transporting region between the anode and the emitting layer; of the layers which are provided in the hole-injecting/hole-transporting region, a layer which is in contact with the emitting layer containing a compound represented by the formula (1); and of the layers which are provided in the hole-injecting/hole-transporting region, a layer which is interposed between the anode and the layer which is in contact with the emitting layer containing an amine derivative represented by the formula (2).
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: April 16, 2019
    Assignees: IDEMITSU KOSAN CO., LTD., JOLED Inc.
    Inventors: Masahiro Kawamura, Emiko Kambe, Akifumi Nakamura, Yasunori Kijima, Tadahiko Yoshinaga, Shigeyuki Matsunami
  • Patent number: 10242958
    Abstract: A fabrication method of a high-voltage light-emitting diode includes the steps of providing a substrate, and forming a light-emitting epitaxial laminated layer on the substrate; patterning the light-emitting epitaxial laminated layer and fabricating a channel that exposes the substrate surface so as to divide the light-emitting epitaxial laminated layer into a plurality of light-emitting diode units, and the light-emitting diode units at least constitute two rows; fabricating an electrode interconnection line crossing the channel, wherein, two adjacent light-emitting diode units are connected by the electrode interconnection line; fabricating an electrode bonding pad over the outmost light-emitting diode unit of the high-voltage light-emitting diode; and fabricating an insulating protective layer opening at the channel where the potential difference of any two adjacent light-emitting diodes is ?3 times of the forward voltage of a single light-emitting diode to avoid breakdown of the light-emitting epitaxial l
    Type: Grant
    Filed: November 12, 2017
    Date of Patent: March 26, 2019
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Gaolin Zheng, Ling-yuan Hong, Xiaoxiong Lin, Feng Wang, Su-hui Lin, Chia-hung Chang
  • Patent number: 10224455
    Abstract: A light-emitting device includes a transparent substrate, a transparent adhesive layer on the transparent substrate, a first transparent conductive layer on the transparent adhesive layer, a multi-layer epitaxial structure and a first electrode on the transparent conductive layer, and a second electrode on the multi-layer epitaxial structure. The multi-layer epitaxial structure includes a light-emitting layer. The transparent substrate has a first surface facing the transparent adhesive layer and a second surface opposite to the first surface, wherein the area of the second surface is larger than that of the light-emitting layer, and the area ratio thereof is not less than 1.6.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: March 5, 2019
    Assignee: Epistar Corporation
    Inventors: Min-Hsun Hsieh, Chih-Chiang Lu, Ching-Pu Tai
  • Patent number: 10224457
    Abstract: Embodiments of the invention are directed to structures in a vertical light emitting device that prevent light from being generated beneath absorbing structures, and/or direct light away from absorbing structures. Embodiments of the invention include a semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A bottom contact is disposed on a bottom surface of the semiconductor structure. The bottom contact is electrically connected to one of the n-type region and the p-type region. A top contact is disposed on a top surface of the semiconductor structure. The top contact is electrically connected to the other of the n-type region and the p-type region. The top contact includes a first side and a second side opposite the first side. A first trench is formed in the semiconductor structure beneath the first side of the top contact. A second trench is formed in the seminconductor structure beneath the second side of the top contact.
    Type: Grant
    Filed: November 5, 2015
    Date of Patent: March 5, 2019
    Assignee: Lumileds LLC
    Inventor: Boris Kharas