Abstract: Methods for treating a thin film made from a conductive or semiconductive material may improve the crystalline quality thereof. Such methods may include: supplying a substrate including, on one of the faces thereof, a thin film of the material; and biased plasma treating the assembly formed by the substrate and the thin film at a given temperature and for a given time, so as to obtain a crystalline reorganization over a depth of the thin film, the biased plasma treatment including an electrical biasing of the thin film and an exposure of the film thus biased to a hydrogen plasma, the biased plasma treatment being implemented at a temperature that is below the melting points of the thin film and of the substrate.

Abstract: A method of manufacturing a semiconductor device includes: providing a substrate; and forming a film on the substrate by supplying a silicon hydride and a halogen element-free catalyst containing one of a group III element or a group V element to the substrate, under a condition that the silicon hydride is not thermally decomposed when the silicon hydride is present alone.

Abstract: To give favorable electrical characteristics to a semiconductor device. The semiconductor device includes an insulating layer, a semiconductor layer over the insulating layer, a pair of electrodes over the semiconductor layer and each electrically connected to the semiconductor layer, a gate electrode over the semiconductor layer, and a gate insulating layer between the semiconductor layer and the gate electrode. The insulating layer includes an island-shaped projecting portion. A top surface of the projecting portion of the insulating layer is in contact with a bottom surface of the semiconductor layer, and is positioned on an inner side of the semiconductor layer when seen from above. The pair of electrodes covers part of a top surface and part of side surfaces of the semiconductor layer. Furthermore, the gate electrode and the gate insulating layer cover side surfaces of the projecting portion of the insulating layer.

Abstract: In a base material with a single-crystal silicon carbide film according to an embodiment of the invention, a plurality of recessed portions is formed on the surface of a silicon substrate, an insulating film including silicon oxide is formed across the surface of the silicon substrate including the inner surfaces of the recessed portions, the top surfaces of side wall portions of recessed portions of the insulating film form flat surfaces, a single-crystal silicon carbide film is joined on the flat surfaces, and the recessed portions below the single-crystal silicon carbide film form holes.

Abstract: A microcrystalline semiconductor film having a high crystallinity is formed. Further, a thin film transistor having preferable electric characteristics and high reliability and a display device including the thin film transistor are manufactured with high mass productivity. A step in which a deposition gas containing silicon or germanium is introduced at a first flow rate and a step in which the deposition gas containing silicon or germanium is introduced at a second flow rate are repeated while hydrogen is introduced at a fixed rate, so that the hydrogen and the deposition gas containing silicon or germanium are mixed, and a high-frequency power is supplied. Therefore, a microcrystalline semiconductor film is formed over a substrate.

Abstract: A method of synthesizing a nanowire. The method includes disposing a first oxide layer including germanium (Ge) on a substrate, forming a second oxide layer including a nucleus by annealing the first oxide layer, and growing a nanowire including Ge from the nucleus by a chemical vapor deposition (“CVD”) method.

Abstract: A method for forming a conductor structure is provided. The method comprises: (1) providing a substrate; (2) forming a patterned dielectric layer with a first opening which exposes a portion of the substrate; forming a patterned organic material layer on the dielectric layer with a second opening which corresponds to the first opening and expose the exposed portion of the substrate; (3) forming a first barrier layer on the organic material layer and the exposed portion of the substrate; (4) forming a metal layer on the first barrier layer; and (5) removing the organic material layer, the first barrier layer thereon and the metal layer thereon.

Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.

Abstract: A semiconductor device has a planarizing layer that is made of an inorganic film, and has a recessed portion formed in a region thereof in which a conductive film is disposed. A first contact hole penetrating through at least an interlayer insulating film is formed on a first wiring layer, while a second contact hole penetrating through at least the interlayer insulating film is formed on the conductive film so as to run through the inside of the recessed portion.

Abstract: An insulating film provided between adjacent pixels is referred to as a bank, a partition, a barrier, an embankment or the like, and is provided above a source wiring or a drain wiring for a thin film transistor, or a power supply line. In particular, at an intersection portion of these wirings provided in different layers, a larger step is formed there than in other portions. Even in a case that the insulating film provided between adjacent pixels is formed by a coating method, there is a problem that thin portions are partially formed due to this step and the withstand pressure is reduced. In the present invention, a dummy material is arranged near the large step portion, particularly, around the intersection portion of wirings, so as to alleviate unevenness formed thereover. The upper wring and the lower wiring are arranged in a misaligned manner so as not to align the end portions.

Abstract: Provided are a wire structure, a method of forming a wire, a thin film transistor (TFT) substrate, and a method of manufacturing the TFT substrate. The wire structure includes a barrier layer disposed on a lower structure, a copper conductive layer comprising copper or copper alloy disposed on the barrier layer, an intermediate layer comprising copper nitride disposed on the copper conductive layer, and a capping layer disposed on the intermediate layer.

Abstract: A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.

Abstract: A seed crystal including mixed phase grains having high crystallinity at a low density is formed under a first condition over an insulating film, and then a first microcrystalline semiconductor film is formed over the seed crystal under a second condition that allows the mixed phase grains to grow and a space between the mixed phase grains to be filled. Then, a second microcrystalline semiconductor film is formed over the first microcrystalline semiconductor film under a third condition that allows formation of a microcrystalline semiconductor film having high crystallinity without increasing the space between the mixed phase grains included in the first microcrystalline semiconductor film.

Abstract: An electronic device includes a first electrode, a second electrode and an insulating layer between the first and second electrodes, which insulating layer may be susceptible to reduction by H2. A gettering layer is provided on and in contact with the first electrode, the gettering layer acting as a protective layer for substantially avoiding reduction of the insulating layer by capturing and immobilizing H2. A glue layer may be provided between the gettering layer and first electrode. An additional gettering layer may be provided on and in contact with the second electrode, and a glue layer may be provided between the second electrode and additional gettering layer.

Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.

Abstract: A method for manufacturing a thin-film device includes forming a separation layer on a substrate, forming a base insulating layer on the separation layer, forming a thin-film device layer on the base insulating layer, bonding a transfer layer including the base insulating layer and the thin-film device layer to a transfer body with an adhesive, causing intralayer delamination or interfacial delamination in the separation layer, and removing the transfer layer from the substrate. The thin-film device layer includes a first wiring sublayer which is located at the bottom of the thin-film device layer and which is in contact with the base insulating layer, a dielectric sublayer which is in contact with a surface of the first wiring sublayer, a semiconductor sublayer electrically insulated from the first wiring sublayer with the dielectric sublayer, and a second wiring sublayer formed subsequently to the semiconductor sublayer.

Abstract: Systems, methods, and products of processes consistent with the innovations herein relate to aspects involving crystallization of layers on substrates. In one exemplary implementation, there is provided a method of fabricating a device. Moreover, such method may include placing a seed layer on a base substrate, covering the seed layer with an amorphous/poly material, and heating the seed layer/material to transform the material into crystalline form.

Abstract: A first passive ferroelectric memory element comprising a first electrode system and a second electrode system, wherein said first electrode system is at least partly insulated from said second electrode system by an element system comprising at least one ferroelectric element, wherein said first electrode system is a conductive surface, or a conductive layer; wherein said second electrode system is an electrode pattern or a plurality of isolated conductive areas in contact with, for read-out or data-input purposes only, a plurality of conducting pins isolated from one another.

Abstract: A thin film transistor (TFT) and a method of manufacturing the same, and more particularly, a TFT for reducing leakage current and a method of manufacturing the same are provided. The TFT includes a flexible substrate, a diffusion preventing layer formed on the flexible substrate, a buffer layer formed of at least two insulated materials on the diffusion preventing layer, a semiconductor layer formed on a region of the buffer layer to include a channel layer and a source and drain region, a gate insulating layer formed on the buffer layer including the semiconductor layer, a gate electrode formed on the gate insulating layer in a region corresponding to the channel layer, an interlayer insulating layer formed on the gate insulating layer including the gate electrode, and source and drain electrodes formed in the interlayer insulating layer to include a predetermined contact hole that exposes at least a region of the source and drain region and to be connected to the source and drain region.

Abstract: There are provided a substrate processing method and apparatus adapted to prevent deterioration of film thickness uniformity while maintaining the film forming rate. The substrate processing method comprises: (a) accommodating a plurality of substrates in a process chamber by carrying and stacking the substrates in the process chamber, (b) forming first amorphous silicon films to a predetermined thickness by heating at least the substrates and supplying first gas, and (c) forming second amorphous silicon films to a predetermined thickness by heating at least the substrates and supplying second gas different from the first gas. The first gas is higher order gas than the second gas.

Abstract: Methods and apparatus for processing a substrate are provided herein. In some embodiments, a method of processing a substrate may include providing a substrate having at least one of a defect or a contaminant disposed on or near a surface of the substrate; and selectively annealing a portion of the substrate with a laser beam in the presence of a process gas comprising hydrogen. The laser beam may be moved over the substrate or continuously, or in a stepwise fashion. The laser beam may be applied in a continuous wave or pulsed mode. The process gas may further comprise an inert gas, such as, at least one of helium, argon, or nitrogen. A layer of material may be subsequently deposited atop the annealed substrate.

Abstract: Methods for forming a microcrystalline silicon layer in a thin film transistor structure are provided. In one embodiment, a method for forming a microcrystalline silicon layer includes providing a substrate in a processing chamber, supplying a gas mixture having a hydrogen-based gas, a silicon-based gas and an argon gas into the processing chamber, the gas mixture having a volumetric flow ratio of the hydrogen-based gas to the silicon-based gas greater than about 100:1, wherein a volumetric flow ratio of the argon gas to the total combined flow of hydrogen-based gas and the silicon-based gas is between about 5 percent and about 40 percent, and maintaining a process pressure of the gas mixture within the processing chamber at greater than about 3 Torr while depositing a microcrystalline silicon layer on the substrate.

Abstract: A liquid crystal display device includes a gate line and a data line crossing each other to define a pixel region on a substrate, a gate electrode connected to the gate line, a gate insulating layer on the gate electrode, an active layer on the gate insulating layer, source and drain electrodes on the active layer, spaced apart from each other and each having inner sides that face each other, wherein the source electrode is connected to the data line, ohmic contact layers between the active layer and each of the source and drain electrodes, a shielding pattern over the active layer and having outer sides, wherein at least one of the outer sides faces at least one of the inner sides of the source and drain electrodes, and a pixel electrode in the pixel region and connected to the drain electrode.

Abstract: A nitride semiconductor light-emitting device includes a substrate, a nitride semiconductor layer incorporating therein a first electroconductive semiconductor layer, a light-emitting layer and a second electroconductive semiconductor layer, a transparent electrode contiguous to at least part of a first surface of the second electroconductive semiconductor layer, and a second electrode contiguous to the first electroconductive semiconductor layer; wherein the substrate has a first surface thereof provided with a first region exposed by removal of a first part of the nitride semiconductor layer in a peripheral part of the device and a second region exposed by removal of at least a second part of the nitride semiconductor layer contiguous to the transparent electrode except the peripheral part of the device till the substrate.

Abstract: A nitride-based light emitting device is manufactured by using a single-crystal nitride-based semiconductor substrate. A seed material layer is deposited on a first substrate where organic residues including a natural oxide layer are removed from an upper surface of the first substrate. A multifunctional substrate is grown from the seed material layer. The single-crystal nitride-based semiconductor layer including a nitride-based buffer layer is formed on the multifunctional substrate. The seed material layer primarily assists the growth of the multifunctional substrate, which is essentially required for the growth of the single-crystal nitride-based semiconductor substrate. The multifunctional substrate is prepared in the form of a single-crystal layer or a poly-crystal layer having a hexagonal crystalline structure.

Abstract: To provide a method for producing a high-performance semiconductor device by a simple and low-temperature process. The method for producing a semiconductor device, in accordance with the present invention, is a production method of a semiconductor device including a first insulating film, a semiconductor layer, and a second insulating film in this order on a substrate, the method including the steps of: forming a first insulating film including a hydrogen barrier layer; forming a semiconductor layer on a region where the hydrogen barrier layer of the first insulating film is formed; injecting hydrogen into the semiconductor layer; forming a second insulating film, the second insulating film including a hydrogen barrier layer on at least a region where the semiconductor layer is formed; and subjecting the semiconductor layer to hydrogenation annealing.

Abstract: A phase change memory cell and methods of fabricating the same are presented. The memory cell includes a variable resistance region and a top and bottom electrode. The shapes of the variable resistance region and the top electrode are configured to evenly distribute a current with a generally hemispherical current density distribution around the first electrode.

Abstract: An object is to provide an element structure of a semiconductor device for increasing an etching margin for various etching steps and a method for manufacturing the semiconductor device having the element structure. An island-shaped semiconductor layer is provided over an insulator having openings. The island-shaped semiconductor layer includes embedded semiconductor layers and a thin film semiconductor layer. The embedded semiconductor layers have a larger thickness than that of the thin film semiconductor layer.

Abstract: A multilayer structure, comprises a substrate and a layer of silicon and germanium (SiGe layer) deposited heteroepitaxially thereon having the composition Si1-xGex and having a lattice constant which differs from the lattice constant of silicon, and a thin interfacial layer deposited on the SiGe layer and having the composition Si1-yGey, which thin interfacial layer binds threading dislocations, and at least one further layer deposited on the interfacial layer.

Abstract: A method of manufacturing a silicon layer includes pretreating a surface of a silicon nitride layer formed on a substrate through a plasma enhanced chemical vapor deposition method using a first reaction gas including at least one of silicone tetrafluoride (SiF4) gas, a nitrogen trifluoride (NF3) gas, SiF4—H2 gas and a mixture thereof. Then, a silicon layer is formed on the pretreated silicon nitride layer through the plasma enhanced chemical vapor deposition method using a second reaction gas including a mixture of gas including silicon tetrafluoride (SiF4), hydrogen (H2) and argon (Ar).

Abstract: A thin film transistor array substrate including an insulating substrate, a first metallic pattern formed on the insulating substrate, and an insulating film provided on the first metallic pattern. A semiconductor pattern is provided on the insulating film, and a second metallic pattern is provided on the semiconductor pattern. The second metallic pattern is surrounded by the semiconductor pattern.

Abstract: A method for manufacturing a thin film transistor (“TFT”) array includes providing a substrate, a patterned first metal layer on the substrate including a plurality of first conductive lines and a plurality of second conductive lines disposed orthogonal to the first conductive lines, an insulating layer over the patterned first metal layer, a patterned silicon layer, a patterned passivation layer over the patterned silicon layer, and a patterned doped silicon layer and a patterned second metal layer over the patterned passivation layer, filling exposed portions of the patterned silicon layer and exposed portions of the first conductive lines and the second conductive lines, where the patterned second metal layer includes a plurality of third conductive lines and a plurality of fourth conductive lines, each of which corresponding respectively to one of the plurality of first conductive lines and the plurality of second conductive lines.

Abstract: It is an object of the present invention to provide a method for forming a layer having functionality including a conductive layer and a colored layer and a flexible substrate having a layer having functionality with a high yield. Further, it is an object of the present invention to provide a method for manufacturing a semiconductor device that is small-sized, thin, and lightweight. After coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, after attaching an adhesive to the layer having functionality, the layer having functionality is peeled from the substrate. Further, after coating a substrate having heat resistance with a silane coupling agent, a layer having functionality is formed. Then, an adhesive is attached to the layer having functionality. Thereafter, the layer having functionality is peeled from the substrate, and a flexible substrate is attached to the layer having functionality.

Abstract: An exemplary method for fabricating a thin film transistor (TFT) array substrate includes: providing an insulating substrate; forming a plurality of gate electrodes and a plurality of reflective patterns on the insulating substrate using a first photo-mask process; forming a gate insulating layer, an amorphous silicon layer, a doped amorphous silicon layer, and a source/drain metal layer on the insulating substrate having the gate electrodes and the reflective patterns; forming a plurality of source electrodes and a plurality of drain electrodes on the doped amorphous silicon layer; depositing a passivation layer on the source electrodes, the drain electrodes and the gate insulating layer; and forming a pixel electrode on the passivation layer.

Abstract: A thin film transistor array panel includes an insulating substrate, a gate wire formed on the insulating substrate. A gate insulating layer covers the gate wire. A semiconductor pattern is formed on the gate insulating layer. A data wire having source electrodes, drain electrodes and data lines is formed on the gate insulating layer and the semiconductor pattern. A protective layer is formed on the data wire. Pixel electrodes connected to the drain electrode via contact holes are formed on the protective layer. The gate wire and the data wire are made of Ag alloy containing Ag and an additive including at least one selected from Zn, In, Sn and Cr.

Abstract: A semiconductor structure of a liquid crystal display and the manufacturing method thereof are described. The manufacturing method includes the following steps. A patterned polysilicon layer and a first dielectric layer are formed on a substrate. A first patterned metal layer is formed to construct a gate electrode and a capacitor electrode. An ion implantation is conducted on the polysilicon layer to form drain and source electrodes. A second dielectric layer and a second patterned metal layer are formed thereon. Sequentially, a third dielectric layer is formed thereon. A plurality of via openings are formed by a patterned photoresist layer, and a third metal layer is formed thereon and filled into the via openings. The patterned photoresist layer and the redundant third metal layer are stripped from the substrate to form via plugs in the via openings. A patterned transparent conductive layer is formed thereon to connect the via plugs.

Abstract: A liquid crystal display device includes a gate line and a data line crossing each other to define a pixel region on a substrate, a gate electrode connected to the gate line, a gate insulating layer on the gate electrode, an active layer on the gate insulating layer, source and drain electrodes on the active layer, spaced apart from each other and each having inner sides that face each other, wherein the source electrode is connected to the data line, ohmic contact layers between the active layer and each of the source and drain electrodes, a shielding pattern over the active layer and having outer sides, wherein at least one of the outer sides faces at least one of the inner sides of the source and drain electrodes, and a pixel electrode in the pixel region and connected to the drain electrode.

Abstract: It is made possible to provide a method for manufacturing a semiconductor device that has a high-quality insulating film in which defects are not easily formed, and experiences less leakage current. A method for manufacturing a semiconductor device, includes: forming an amorphous silicon layer on an insulating layer; introducing oxygen into the amorphous silicon layer; and forming a silicon oxynitride layer by nitriding the amorphous silicon layer having oxygen introduced thereinto.

Abstract: Methods of fabricating a semiconductor structure with a non-epitaxial thin film disposed on a surface of a substrate of the semiconductor structure; and semiconductor structures formed thereof are disclosed. The methods provide selective non-epitaxial growth (SNEG) or deposition of amorphous and/or polycrystalline materials to form a thin film on the surface thereof. The surface may be a non-crystalline dielectric material or a crystalline material. The SNEG on non-crystalline dielectric further provides selective growth of amorphous/polycrystalline materials on nitride over oxide through careful selection of precursors-carrier-etchant ratio. The non-epitaxial thin film forms resultant and/or intermediate semiconductor structures that may be incorporated into any front-end-of-the-line (FEOL) fabrication process.

Abstract: An object is to provide a film deposition apparatus in which the amount of leakage from the outside of the chamber to the inside of the chamber is reduced. Even if leakage occurs from the outside of the chamber to the inside of the chamber, oxygen and nitrogen included in an atmosphere that surrounds the outer wall of the chamber are reduced as much as possible and the atmosphere is filled with a noble gas or hydrogen, whereby the inside of the chamber is kept cleaner at 1/100 or less, preferably, 1/1000 or less of oxygen concentration and nitrogen concentration than those in the air. Since the space with high airtightness is provided adjacent to the outside of the chamber, the chamber is covered with a bag and a high-purity argon gas is supplied to the bag.

Abstract: Reducing defects in semiconductor quantum well structures is generally described. In one example, an apparatus includes a semiconductor substrate including silicon, a buffer film epitaxially grown on the semiconductor substrate, the buffer film comprising silicon, germanium, and an impurity, and a first semiconductor film epitaxially grown on the buffer film wherein a lattice mismatch exists between the semiconductor substrate and the first semiconductor film and wherein the impurity disrupts lattice structure dislocation gliding in at least the first semiconductor film.

Abstract: A nitride-based light emitting device is manufactured by using a single-crystal nitride-based semiconductor substrate. A seed material layer is deposited on a first substrate where organic residues including a natural oxide layer are removed from an upper surface of the first substrate. A multifunctional substrate is grown from the seed material layer. The single-crystal nitride-based semiconductor layer including a nitride-based buffer layer is formed on the multifunctional substrate. The seed material layer primarily assists the growth of the multifunctional substrate, which is essentially required for the growth of the single-crystal nitride-based semiconductor substrate. The multifunctional substrate is prepared in the form of a single-crystal layer or a poly-crystal layer having a hexagonal crystalline structure.

Abstract: The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.

Abstract: A process for fabricating a highly stable and reliable semiconductor, comprising: coating the surface of an amorphous silicon film with a solution containing a catalyst element capable of accelerating the crystallization of the amorphous silicon film, and heat treating the amorphous silicon film thereafter to crystallize the film.

Abstract: The present invention provides a SOI substrate that can realize a composite device formed of a MOS integrated circuit and a passive device and can reduce a size and a manufacturing cost of a semiconductor device. There is provided a fiber SOI substrate 5 comprising a fiber 1 with a polygonal cross section, and a semiconductor thin film 3 crystallized after film formation on at least one surface of the fiber 1, and a plurality of grooves 8 that extend in a linear direction of the fiber 1 and are a ranged at intervals in a width direction are formed on a surface of the fiber 1.

Abstract: A method of producing a thin film transistor array substrate which includes an insulating substrate, a display pixel having a pixel electrode connected to a drain electrode, a gate wiring, and a source wiring perpendicular to the gate wiring, comprising forming a first thin metal multi-layer film an upper layer of which includes aluminum, and spreading a photo-resist, forming the photo-resist to a thickness less in an area connected to a second thin metal film than other area, patterning the first thin metal film, reducing a thickness of the photo-resist layer and removing the photo-resist in the area, removing the upper layer in the area to expose a lower layer, forming an interlayer insulating film and patterning it to expose the lower layer in the area, and patterning the second thin metal film to include the area, to connect the lower layer to the second thin metal film.

Abstract: Described is a Schottky diode using semi-conducting single-walled nanotubes (s-SWNTs) with titanium Schottky and platinum Ohmic contacts for high-frequency applications. The diodes are fabricated using angled evaporation of dissimilar metal contacts over an s-SWNT. The devices demonstrate rectifying behavior with large reverse-bias breakdown voltages of greater than ?15 V. In order to decrease the series resistance, multiple SWNTs are grown in parallel in a single device, and the metallic tubes are burnt-out selectively. At low biases, these diodes showed ideality factors in the range of 1.5 to 1.9. Modeling of these diodes as direct detectors at room temperature at 2.5 terahertz (THz) frequency indicates noise equivalent powers (NEP) comparable to that of the state-of-the-art gallium arsenide sold-state Schottky diodes, in the range of 10-13 W/square-root (?) Hz.

Abstract: In a display device such as a liquid crystal display device, a large-sized display screen is realized under low power consumption. A surface of a source wiring line of a pixel portion employed in an active matrix type liquid crystal display device is processed by way of a plating process operation so as to lower a resistance value of this source wiring line. The source wiring line of the pixel portion is manufactured at a step different from a step for manufacturing a source wiring line of a drive circuit portion. Further, electrodes of a terminal portion are processed by a plating process operation so as to reduce a resistance value thereof.

Abstract: A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors.

Abstract: The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.