In Group Iii-v Compound (epo) Patents (Class 257/E21.34)
  • Patent number: 8933489
    Abstract: An AlGaN/GaN.HEMT includes, a compound semiconductor lamination structure; a p-type semiconductor layer formed on the compound semiconductor lamination structure; and a gate electrode formed on the p-type semiconductor layer, in which Mg being an inert element of p-GaN is introduced into both sides of the gate electrode at the p-type semiconductor layer, and introduced portions of Mg are inactivated.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: January 13, 2015
    Assignee: Transphorm Japan, Inc.
    Inventor: Toshihide Kikkawa
  • Patent number: 8586402
    Abstract: The invention relates to a method for the precision processing of substrates, in particular for the microstructuring of thin layers, local dopant introduction and also local application of a metal nucleation layer in which a liquid-assisted laser, i.e. laser irradiation of a substrate which is covered in the regions to be processed by a suitable reactive liquid, is implemented.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: November 19, 2013
    Assignees: Fraunhofer-Gesellschaft zur föderung der angewandten Forschung e.V., Albert-Ludwigs-Universität Freiburg
    Inventors: Kuno Mayer, Monica Aleman, Daniel Kray, Stefan Glunz, Ansgar Mette, Ralf Preu, Andreas Grohe
  • Patent number: 8546247
    Abstract: A method of manufacturing a semiconductor device, in which an amorphous silicon layer is formed into a shape of a gate electrode of a MOS transistor, and then impurity is implanted to a surface of a silicon substrate from a diagonal direction using the amorphous silicon layer as a mask.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: October 1, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Hidenobu Fukutome, Youichi Momiyama
  • Publication number: 20130075748
    Abstract: A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer.
    Type: Application
    Filed: September 22, 2011
    Publication date: March 28, 2013
    Applicant: EPOWERSOFT, INC.
    Inventors: David P. Bour, Richard J. Brown, Isik C. Kizilyalli, Thomas R. Prunty, Linda Romano, Andrew P. Edwards, Hui Nie, Mahdan Raj
  • Publication number: 20120190172
    Abstract: A method for making a GaN substrate for growth of nitride semiconductor is provided. The method first provides a GaN single crystal substrate. Then an ion implanting layer is formed inside the GaN single crystal substrate, which divides the GaN single crystal substrate into a first section and a second section. After that, the GaN single crystal substrate is connected with an assistant substrate through a connecting layer. Thereafter, the GaN single crystal substrate is heated whereby the ion implanting layer is decompounded. Finally, the second section is separated from the first section. The first section left on a surface of the assistant substrate is provided for growth of nitride semiconductor thereon.
    Type: Application
    Filed: March 17, 2011
    Publication date: July 26, 2012
    Inventor: JIAN-SHIHN TSANG
  • Patent number: 8211719
    Abstract: A substrate processing method includes preparing a substrate, a first mask adjacent to a first surface of the substrate and including a first light transmitting portion allowing light to be transmitted therethrough, a condenser adjacent to the first surface, a second mask including a second light transmitting portion, and a photo detecting member including a photo detecting portion detecting light having passed through the second light transmitting portion, the condenser condensing light having passed through the first light transmitting portion toward the second light transmitting portion, the second light transmitting portion allowing the light condensed by the condenser to be transmitted therethrough, and forming a recess in the substrate by laser beam irradiation from a direction opposite to the first surface. When an intensity of the laser beam detected by the photo detecting portion is at or above a specific intensity, the irradiation of the laser beam is stopped.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: July 3, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Hiroyuki Morimoto, Masahiko Kubota
  • Patent number: 8207503
    Abstract: A detector of periodic packets of X photons, each packet having a duration shorter than 0.1 nanosecond, comprising a sensor comprising a semiconductor element of type III-V biased in a negative differential resistance region, said sensor being arranged in a resonant cavity tuned to a multiple of the packet repetition frequency.
    Type: Grant
    Filed: August 13, 2009
    Date of Patent: June 26, 2012
    Assignee: European Synchrotron Radiation Facility
    Inventors: José Goulon, Gérard Goujon, Andrei Rogalev, Fabrice Wilhelm
  • Publication number: 20110248386
    Abstract: The method for forming wavelike coherent nanostructures by irradiating a surface of a material by a homogeneous flow of ions is disclosed. The rate of coherency is increased by applying preliminary preprocessing steps.
    Type: Application
    Filed: June 20, 2011
    Publication date: October 13, 2011
    Applicant: Wostec, Inc.
    Inventors: Valery K. Smirnov, Dmitry S. Kibalov
  • Publication number: 20110195583
    Abstract: A layer of wavelength converting material is formed by supplying energy to a particle of wavelength converting material and causing the particle to contact a surface such that the energy causes the particle to adhere to the surface. In some embodiments, the wavelength converting material is a phosphor and the surface is a surface of a semiconductor light emitting device.
    Type: Application
    Filed: February 11, 2010
    Publication date: August 11, 2011
    Inventor: Jeffrey D. KMETEC
  • Patent number: 7977224
    Abstract: A method of preventing the escape of nitrogen during the activation of ion implanted dopants in a Group III-nitride semiconductor compound without damaging the Group III-nitride semiconductor comprising: depositing a first layer of another Group III-nitride that acts as an adhesion layer; depositing a second layer of a Group III-nitride that acts as a mechanical supporting layer; said first and second layers forming an annealing cap to prevent the escape of the nitrogen component of the Group III-nitride semiconductor; annealing the Group III-nitride semiconductor at a temperature in the range of approximately 1100-1250° C.; and removing the first and second layers from the Group III-nitride semiconductor.
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: July 12, 2011
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Carl Emmett Hager, IV, Michael Andrew Derenge, Kenneth Andrew Jones
  • Publication number: 20110092057
    Abstract: Fabrication of a Group III-nitride transistor device can include implanting dopant ions into a stacked Group III-nitride channel layer and Group III-nitride barrier layer to form source/drain regions therein with a channel region therebetween. The channel layer has a lower bandgap energy than the barrier layer along a heterojunction interface between the channel layer and the barrier layer. The source/drain regions have a lower defect centers energy than the channel region. The source/drain regions and the channel region are exposed to a laser beam with a wavelength having a photon energy that is less than the bandgap energy of the channel region and higher than the defect centers energy of the source/drain regions to locally heat the source/drain regions to a temperature that anneals the source/drain regions.
    Type: Application
    Filed: October 16, 2009
    Publication date: April 21, 2011
    Inventor: Alexander V. Suvorov
  • Patent number: 7867880
    Abstract: The present invention provides metal precursors for low temperature deposition. The metal precursors include a metal ring compound including at least one metal as one of a plurality of elements forming a ring. Methods of forming a metal thin layer and manufacturing a phase change memory device including use of the metal precursors is also provided.
    Type: Grant
    Filed: July 2, 2007
    Date of Patent: January 11, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hye-young Park, Sung-lae Cho, Byoung-jae Bae, Jin-il Lee, Ji-eun Lim, Young-lim Park
  • Patent number: 7842576
    Abstract: The invention provides a method of manufacturing a semiconductor device including a non-volatile memory with high yield, and a semiconductor device manufactured by the method. A method of manufacturing a semiconductor device includes a process of forming a second side wall such that the width of the second side wall, which is formed on the side of a portion of a second gate electrode that does not face dummy gates on a drain forming region side, in a gate length direction is larger than that of the second side wall, which is formed on the side of the second gate electrode on a source forming region side, in the gate length direction, in a non-volatile memory forming region.
    Type: Grant
    Filed: November 3, 2009
    Date of Patent: November 30, 2010
    Assignee: NEC Electronics Corporation
    Inventor: Yoshitaka Kubota
  • Patent number: 7772595
    Abstract: There is provided a method of forming a nitride semiconductor layer, including the steps of firstly providing a substrate on which a patterned epitaxy layer with a pier structure is formed. A protective layer is then formed on the patterned epitaxy layer, exposing a top surface of the pier structure. Next, a nitride semiconductor layer is formed over the patterned epitaxy layer connected to the nitride semiconductor layer through the pier structure, wherein the nitride semiconductor layer, the pier structure, and the patterned epitaxy layer together form a space exposing a bottom surface of the nitride semiconductor layer. Thereafter, a weakening process is performed to remove a portion of the bottom surface of the nitride semiconductor layer and to weaken a connection point between the top surface of the pier structure and the nitride semiconductor layer. Finally, the substrate is separated from the nitride semiconductor layer through the connection point.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: August 10, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Yih-Der Guo, Chih-Ming Lai, Jenq-Dar Tsay, Po-Chun Liu
  • Publication number: 20080311686
    Abstract: A method of making a semiconductor thin film bonded to a handle substrate includes implanting a semiconductor substrate with a light ion species while cooling the semiconductor substrate, bonding the implanted semiconductor substrate to the handle substrate to form a bonded structure, and annealing the bonded structure, such that the semiconductor thin film is transferred from the semiconductor substrate to the handle substrate.
    Type: Application
    Filed: August 2, 2006
    Publication date: December 18, 2008
    Inventors: Anna Fontcuberta i Morral, Sean M. Olson