Abstract: A type IV semiconductor substrate having a main surface is provided. A type III-V semiconductor channel region that includes a two-dimensional carrier gas is formed over the type IV semiconductor substrate. A type III-V semiconductor lattice transition region that is configured to alleviate mechanical stress arising from lattice mismatch is formed between the type IV semiconductor substrate and the type III-V semiconductor channel region. Forming the type III-V semiconductor lattice transition region includes forming a first lattice transition layer having a first metallic concentration over the type IV semiconductor substrate, forming a third lattice transition layer having a third metallic concentration that is higher than the first metallic concentration over the first lattice transition layer, and forming a fourth lattice transition layer having a fourth metallic concentration that is lower than the first metallic concentration over the third lattice transition layer.

Abstract: There are disclosed herein various implementations of semiconductor structures including III-Nitride interlayer modules. One exemplary implementation comprises a substrate and a first transition body over the substrate. The first transition body has a first lattice parameter at a first surface and a second lattice parameter at a second surface opposite the first surface. The exemplary implementation further comprises a second transition body, such as a transition module, having a smaller lattice parameter at a lower surface overlying the second surface of the first transition body and a larger lattice parameter at an upper surface of the second transition body, as well as a III-Nitride semiconductor layer over the second transition body. The second transition body may consist of two or more transition modules, and each transition module may include two or more interlayers. The first and second transition bodies reduce strain for the semiconductor structure.

Abstract: A method of producing an inorganic thin film dielectric material layer includes providing a substrate. A first inorganic thin film dielectric material layer is deposited on the substrate using an atomic layer deposition process. The first inorganic thin film dielectric material layer is treated after its deposition. A patterned deposition inhibiting material layer is provided on the substrate. A second inorganic thin film dielectric material layer is selectively deposited on a region of the substrate where the deposition inhibiting material layer is not present using an atomic layer deposition process.

Abstract: This invention relates to silicon precursor compositions for forming silicon-containing films by low temperature (e.g., <550° C.) chemical vapor deposition processes for fabrication of ULSI devices and device structures. Such silicon precursor compositions comprise at least a silane or disilane derivative that is substituted with at least one alkylhydrazine functional groups and is free of halogen substitutes.

Abstract: Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.

Abstract: Novel silicon precursors for low temperature deposition of silicon films are described herein. The disclosed precursors possess low vaporization temperatures, preferably less than about 500° C. In addition, embodiments of the silicon precursors incorporate a —Si—Y—Si— bond, where Y may comprise an amino group, a substituted or unsubstituted hydrocarbyl group, or oxygen. In an embodiment a silicon precursor has the formula: where Y is a hydrocarbyl group, a substituted hydrocarbyl group, oxygen, or an amino group; R1, R2, R3, and R4 are each independently a hydrogen group, a hydrocarbyl group, a substituted hydrocarbyl group, a heterohydrocarbyl group, wherein R1, R2, R3, and R4 may be the same or different from one another; X1, X2, X3, and X4 are each independently, a hydrogen group, a hydrocarbyl group, a substituted hydrocarbyl group, or a hydrazine group, wherein X1, X2, X3, and X4 may be the same or different from one another.

Abstract: A method forms a first inorganic dielectric layer having a first concentration of defects and a second inorganic dielectric layer in contact with a first layer and having a second lesser concentration of defects.

Abstract: A plasma processing apparatus includes a process chamber configured to be vacuum-exhausted; a worktable configured to place a target substrate thereon inside the process chamber; a microwave generation source configured to generate microwaves; a planar antenna including a plurality of slots and configured to supply microwaves generated by the microwave generation source through the slots into the process chamber; a gas supply mechanism configured to supply a film formation source gas into the process chamber; and an RF power supply configured to apply an RF power to the worktable. The apparatus is preset to turn a nitrogen-containing gas and a silicon-containing gas supplied in the process chamber into plasma by the microwaves, and to deposit a silicon nitride film on a surface of the target substrate by use of the plasma, while applying the RF power to the worktable.

Abstract: Methods of manufacturing semiconductor devices including multilayer dielectric layers are disclosed. The methods include forming a multilayer dielectric layer including metal atoms and silicon atoms on a semiconductor substrate. The multilayer dielectric layer includes at least two crystalline metal silicate layers having different silicon concentrations. The multilayer dielectric layer may be used, for example, as a dielectric layer for a capacitor, or as a blocking layer for a nonvolatile memory device.

Abstract: This invention relates to silicon precursor compositions for forming silicon-containing films by low temperature (e.g., <550° C.) chemical vapor deposition processes for fabrication of ULSI devices and device structures. Such silicon precursor compositions comprise at least a silane or disilane derivative that is substituted with at least one alkylhydrazine functional groups and is free of halogen substitutes.

Abstract: A vertical plasma processing apparatus for a semiconductor process includes a process container having a process field configured to accommodate a plurality of target substrates at intervals in a vertical direction, and a marginal space out of the process field. In processing the target substrates, a control section simultaneously performs supply of a process gas to the process field from a process gas supply circuit and supply of a blocking gas to the marginal space from a blocking gas supply circuit to inhibit the process gas from flowing into the marginal space.

Abstract: A neutral beam-assisted atomic layer chemical vapor deposition (ALCVD) apparatus is provided for uniformly depositing an oxide layer filling a planarization layer or a trench to increase uniformity and density of the oxide layer using neutral beams generated by a neutral beam generator without a seam or void occurring in an atomic layer deposition (ALD) or ALD-like chemical vapor deposition (CVD) process, thereby solving problems on the void or seam and low density occurring when a high-density planarization layer or a shallow trench having a width of 65 nm or less is formed, and improving a next generation oxide layer isolation process.

Abstract: Various apparatus and methods of monitoring endcap pullback are disclosed. In one aspect, an apparatus is provided that includes a substrate that has a plurality of semiconductor regions. Each of the plurality of semiconductor regions has a border with an insulating structure. A transistor is positioned in each of the plurality of semiconductor regions. Each of the transistors includes a gate that has a first lateral dimension and an end that has a position relative to its border. A voltage source is electrically coupled to the transistors whereby levels of currents flowing through the transistors are indicative of the positions of the ends of the gates relative to their borders.

Abstract: Methods of making a silicon oxide layer on a substrate are described. The methods may include forming the silicon oxide layer on the substrate in a reaction chamber by reacting an atomic oxygen precursor and a silicon precursor and depositing reaction products on the substrate. The atomic oxygen precursor is generated outside the reaction chamber. The methods also include heating the silicon oxide layer at a temperature of about 600° C. or less, and exposing the silicon oxide layer to an induced coupled plasma. Additional methods are described where the deposited silicon oxide layer is cured by exposing the layer to ultra-violet light, and also exposing the layer to an induced coupled plasma.

Abstract: An object to provide an insulating film for a semiconductor device, which has characteristics of low permittivity, a low leak current, and high mechanical strength, undergoes small time-dependent change of these characteristics, and has excellent water resistance, and to provide a manufacturing apparatus of the same, and a manufacturing method of the semiconductor device using the insulating film.

Abstract: A plasma CVD apparatus including a reaction chamber including an inlet for supplying a compound including a borazine skeleton, a feeding electrode, arranged within the reaction chamber, for supporting a substrate and being applied with a negative charge, and a plasma generating mechanism, arranged opposite to the feeding electrode via the substrate, for generating a plasma within the reaction chamber. A method forms a thin film wherein a thin film is formed by using a compound including a borazine skeleton as a raw material, and a semiconductor device includes a thin film formed by such a method as an insulating film. The apparatus and method enable to produce a thin film wherein low dielectric constant and high mechanical strength are stably maintained for a long time and insulating characteristics are secured.

Abstract: One aspect of the invention provides a method of forming a semiconductor device (100). One aspect includes forming transistors (120, 125) on a semiconductor substrate (105), forming a first interlevel dielectric layer (165) over the transistors (120, 125), and forming metal interconnects (170, 175) within the first interlevel dielectric layer (165). A carbon-containing gas is used to form a silicon carbon nitride (SiCN) layer (180) over the metal interconnects (170, 175) and the first interlevel dielectric layer (165) within a deposition tool. An adhesion layer (185) is formed on the SiCN layer (180), within the deposition tool, by discontinuing a flow of the carbon-containing gas within the deposition chamber. A second interlevel dielectric layer (190) is formed over the adhesion layer (185).

Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.

Abstract: A method of manufacturing a semiconductor device has: carrying a substrate into a process chamber; depositing a thin film on the substrate by supplying inside the process chamber a first film deposition gas including at least one element among plural elements forming a thin film to be deposited and capable of accumulating a film solely and a second film deposition gas including at least another element among the plural elements and incapable of accumulating a film solely; carrying the substrate on which is deposited the thin film out from inside the process chamber; and removing a first sediment adhering to an interior of the process chamber and a second sediment adhering to an interior of the supply portion and having a chemical composition different from a chemical composition of the first sediment by supplying cleaning gases inside the process chamber and inside a supply portion that supplies the first film deposition gas while changing at least one of a supply flow rate, a concentration, and a type betwee

Abstract: A method of forming a porous film on a semiconductor substrate includes: supplying a silicon compound containing at least one Si—O bond in its molecule in a gaseous phase into a reaction chamber; forming a siloxane oligomer through plasma reaction of the silicon compound; and supplying an organic amine in a gaseous phase into the reaction chamber and reacting the organic amine with the siloxane oligomer, thereby forming a porous film on the semiconductor substrate.

Abstract: A plasma processing apparatus includes a process chamber configured to be vacuum-exhausted; a worktable configured to place a target substrate thereon inside the process chamber; a microwave generation source configured to generate microwaves; a planar antenna including a plurality of slots and configured to supply microwaves generated by the microwave generation source through the slots into the process chamber; a gas supply mechanism configured to supply a film formation source gas into the process chamber; and an RF power supply configured to apply an RF power to the worktable. The apparatus is preset to turn a nitrogen-containing gas and a silicon-containing gas supplied in the process chamber into plasma by the microwaves, and to deposit a silicon nitride film on a surface of the target substrate by use of the plasma, while applying the RF power to the worktable.

Abstract: Embodiments relate to a semiconductor device and a method of manufacturing a semiconductor device having a pre-metal dielectric liner. In embodiments, method for forming a semiconductor device may include forming a pre-metal dielectric liner, which has a multi-layer structure including a plurality of interfacial surfaces, on an entire surface of a semiconductor substrate formed with a transistor, and forming a boron phospho silicate glass (BPSG) oxide layer on the pre-metal dielectric liner. Since the pre-metal dielectric liner is formed in a multi-layer structure having a plurality of interfacial surfaces, boron (B) of an upper BPSG oxide layer is not penetrated into the semiconductor substrate.

Abstract: Embodiments of the invention generally relate to semiconductor devices, and more specifically to interconnecting semiconductor devices. A silicide layer may be formed on selective areas of a fin structure connecting one or more semiconductor devices or semiconductor device components. By providing silicided fin structures to locally interconnect semiconductor devices, the use of metal contacts and metal layers may be obviated, thereby allowing formation of smaller, less complex circuits.

Abstract: Semiconductor wiring structures including a dielectric layer having a metal wiring line therein, a via extending downwardly from the metal wiring line, a metal cap layer over the metal wiring line, and a local dielectric cap positioned within a portion of the metal cap layer and in contact with the metal wiring line and a related method are disclosed. The local dielectric cap represents an intentionally created weak point in the metal wiring line of a dual-damascene interconnect, which induces electromigration (EM) voiding in the line, rather than at the bottom of a via extending downwardly from the metal wiring line. Since the critical void size in line fails, especially with metal cap layer (liner) redundancy, is much larger than that in via fails, the EM lifetime can be significantly increased.

Abstract: A method for forming an interconnect, comprising (a) providing a substrate (203) with a via (205) defined therein; (b) forming a seed layer (211) such that a first portion of the seed layer extends over a surface of the via, and a second portion of the seed layer extends over a portion of the substrate; (c) removing the second portion of the seed layer; and (d) depositing a metal (215) over the first portion of the seed layer by an electroless process.

Abstract: A silicon-on-insulator (SOI) structure is provided for forming through vias in a silicon wafer carrier structure without backside lithography. The SOI structure includes the silicon wafer carrier structure bonded to a silicon substrate structure with a layer of buried oxide and a layer of nitride lo separating these silicon structures. Vias are formed in the silicon carrier structure and through the oxide layer to the nitride layer and the walls of the via are passivated. The vias are filled with a filler material of either polysilicon or a conductive material. The substrate structure is then etched back to the nitride layer and the nitride layer is etched back to the filler material. Where the filler material is polysilicon, the polysilicon is etched away forming an open via to the top surface of the carrier wafer structure. The via is then backfilled with conductive material.

Abstract: Various apparatus and methods of monitoring endcap pullback are disclosed. In one aspect, an apparatus is provided that includes a substrate that has a plurality of semiconductor regions. Each of the plurality of semiconductor regions has a border with an insulating structure. A transistor is positioned in each of the plurality of semiconductor regions. Each of the transistors includes a gate that has a first lateral dimension and an end that has a position relative to its border. A voltage source is electrically coupled to the transistors whereby levels of currents flowing through the transistors are indicative of the positions of the ends of the gates relative to their borders.

Abstract: The manufacturing method of a substrate having a conductive layer has the steps of: forming an inorganic insulating layer over a substrate; forming an organic resin layer with a desired shape over the inorganic insulating layer; forming a low wettability layer with respect to a composition containing conductive particles on a first exposed portion of the inorganic insulating layer; removing the organic resin layer; and coating a second exposed portion of the inorganic insulating layer with a composition containing conductive particles and baking, thereby forming a conductive layer.

Abstract: Provided is a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, without limitation, includes forming a first semiconductor layer over a substrate, and forming a second semiconductor layer over the first semiconductor layer, wherein an amorphous nitrided silicon adhesion layer is located between and adheres the first and second semiconductor layers.

Abstract: Metalorganic precursors of the formula: (R1R2N)a?bMXb wherein: M is the precursor metal center, selected from the group of Ta, Ti, W, Nb, Si, Al and B; a is a number equal to the valence of M; 1?b?(a?1); R1 and R2 can be the same as or different from one another, and are each independently selected from the group of H, C1–C4 alkyl, C3–C6 cycloalkyl, and R03Si, where each R0 can be the same or different and each R0 is independently selected from H and C1–C4 alkyl; and X is selected from the group of chlorine, fluorine, bromine and iodine. Precursors of such formula are useful for chemical vapor deposition (MOCVD) of conductive barrier materials in the manufacture of microelectronic device structures, e.g., by atomic layer chemical vapor deposition on a substrate bearing nitrogen-containing surface functionality. Further described is a method of forming Si3N4 on a substrate at low temperature, e.g., using atomic layer chemical vapor deposition (ALCVD).