Acting In Response To Ongoing Measurement Without Interruption Of Processing, E.g., Endpoint Detection, In-situ Thickness Measurement (epo) Patents (Class 257/E21.528)
  • Patent number: 11867643
    Abstract: The present invention relates to a planar-type plasma diagnosis apparatus comprising: a transmission antenna for applying a frequency-variable microwave to plasma; a reception antenna for receiving the microwave from the plasma; and a body part encompassing the transmission antenna and the reception antenna so that same are insulated from each other, wherein the upper surface of the transmission antenna for applying the microwave and the upper surface of the reception antenna for receiving the microwave are planar, and side surfaces of the upper surfaces of the transmission antenna and the reception antenna face each other.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: January 9, 2024
    Assignee: KOREA RESEARCH INSTITUTE OF STANDARDS AND SCIENCE
    Inventors: Hyo Chang Lee, Jung Hyung Kim, Dae Jin Seong, Hee Jung Yeom
  • Patent number: 11759913
    Abstract: A substrate polishing method capable of reducing an influence of variation in spectrum of reflected light from a substrate, such as a wafer, and determining an accurate film thickness is disclosed. The method includes: polishing a surface of a substrate by pressing the substrate against a polishing pad on a rotating polishing table; producing a spectrum of reflected light from the surface of the substrate each time the polishing table makes one rotation; creating a three-dimensional data containing a plurality of spectra arranged along polishing time; and determining a film thickness of the substrate based on the three-dimensional data.
    Type: Grant
    Filed: December 3, 2020
    Date of Patent: September 19, 2023
    Assignee: EBARA CORPORATION
    Inventors: Keita Yagi, Yoichi Shiokawa, Toshimitsu Sasaki, Yuki Watanabe, Nachiketa Chauhan
  • Patent number: 11651587
    Abstract: Various embodiments include a method for product quality inspection on a group of products. The method may include: getting for each product in the group of products: image, value for each known fabrication parameter affecting quality of the group of products, and quality evaluation result; training a neural network. A layer of the neural network comprises at least one first neuron and at least one second neuron; each first neuron represents a known fabrication parameter affecting quality of the group of products and each second neuron represents an unknown fabrication parameter affecting quality of the group of products; and the images of the group of products are input to the neural network, the quality evaluation results are output of the neural network, and the value of each first neuron is set to the value for the known fabrication parameter the first neuron representing.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: May 16, 2023
    Assignee: SIEMENS AKTIENGESELLSCHAFT
    Inventors: Chang Wei Loh, Jing Wen Zhu, Wei Yu Chen, Yue Yu, Cong Chao Li, Li Qun Ding
  • Patent number: 11587763
    Abstract: A substrate processing system includes a substrate processing apparatus and a switching timing creation support device, wherein the switching timing creation support device includes: an acquisition part configured to acquire, for each of a plurality of properties of particles contained in a gas in the substrate processing apparatus during a processing for a substrate, a measured value of an amount of the particles from a measuring device; a selection part configured to select properties of a predetermined number of the particles in descending order of temporal variations in the amount of the particles; a determination part configured to determine an operation expression and a switching condition for determining a switching timing based on a temporal change in the amount of the particles for each of the selected properties of the particles; and an output part configured to output the operation expression and the switching condition to the substrate processing apparatus.
    Type: Grant
    Filed: February 25, 2021
    Date of Patent: February 21, 2023
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Takeshi Akimoto
  • Patent number: 11476255
    Abstract: A method used in forming an array of vertical transistors comprises forming pillars individually comprising an upper source/drain region, a channel region vertically below the upper source/drain region, and sacrificial material above the upper source/drain region. Intervening material is about the sacrificial material of individual of the pillars. The intervening material and the sacrificial material comprise different compositions relative one another. Horizontally-elongated and spaced conductive gate lines are formed individually operatively aside the channel region of the individual pillars. The sacrificial material is removed to expose the upper source/drain region of the individual pillars and thereby form an opening in the intervening material directly above the upper source/drain region of the individual pillars.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: October 18, 2022
    Assignee: Micron Technology, Inc.
    Inventor: Guangjun Yang
  • Patent number: 11421977
    Abstract: A method is disclosed for operating an endpoint detection system of a processing chamber having a ceiling formed therein, a substrate support located internal to the processing chamber, and a substrate resting on the substrate support. A transparent panel is located in the ceiling of the processing chamber, the panel oriented at a first acute angle relative to the substrate and the substrate support. The transparent panel receives an incident light beam from the endpoint detection system at a second acute angle relative to the panel. The transparent panel transmits the incident light beam to the substrate within the processing chamber at an angle perpendicular to the substrate and the substrate support.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: August 23, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Lei Lian, Pengyu Han
  • Patent number: 11295954
    Abstract: Polysilicon films (P1,P2) are simultaneously formed on a wafer (W1) and a monitor wafer (W2) under the same growth condition in a wafer process. At least one of a film thickness and phosphorus concentration of the polysilicon film (P2) formed on the monitor wafer (W2) is measured to obtain a measured value. One of a plurality of mask patterns (A,B,C) is selected based on the measured value. The polysilicon film (P1) formed on the wafer (W1) is etched using the selected mask pattern to form the polysilicon resistor (5).
    Type: Grant
    Filed: July 4, 2016
    Date of Patent: April 5, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yasushi Takaki, Eisuke Suekawa, Chihiro Tadokoro
  • Patent number: 11284018
    Abstract: Embodiments disclosed herein include a diagnostic substrate, comprising a baseplate, and a first plurality of image sensors on the baseplate, where the first plurality of image sensors are oriented horizontal to the baseplate. In an embodiment, the diagnostic substrate further comprises a second plurality of image sensors on the baseplate, where the second plurality of image sensors are oriented at a non-orthogonal angle to the baseplate. In an embodiment, the diagnostic substrate further comprises a printed circuit board (PCB) on the baseplate, and a controller on the baseplate, where the controller is communicatively coupled to the first plurality of image sensors and the second plurality of image sensors by the PCB. In an embodiment, the diagnostic substrate further comprises a diffuser lid over the baseplate, the PCB, and the controller.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: March 22, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Upendra Ummethala, Philip Kraus, Keith Berding, Blake Erickson, Patrick Tae, Devendra Channappa Holeyannavar, Shivaraj Manjunath Nara, Anandakumar Parameshwarappa, Sivasankar Nagarajan, Dhirendra Kumar
  • Patent number: 11247468
    Abstract: A liquid discharge head includes a nozzle configured to discharge a liquid, a dummy nozzle configured not to discharge the liquid, a nozzle plate including the nozzle and the dummy nozzle, an individual channel communicating with the nozzle, a dummy channel communicating with the dummy nozzle, and a channel plate bonded to the nozzle plate. The dummy channel includes a lateral channel along an in-plane direction of the nozzle plate, the nozzle plate forms a wall of the lateral channel of the dummy channel, and the wall of the lateral channel is transmittable of at least one of infrared ray and visible light.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: February 15, 2022
    Assignee: RICOH COMPANY, LTD.
    Inventor: Yuu Sugioka
  • Patent number: 11107738
    Abstract: Controlling an etch process applied to a multi-layered structure, by calculating a spectral derivative of reflectance of an illuminated region of interest of a multi-layered structure during an etch process applied to the multi-layered structure, identifying in the spectral derivative a discontinuity that indicates that an edge of a void formed by the etch process at the region of interest has crossed a layer boundary of the multi-layered structure, determining that the crossed layer boundary corresponds to a preselected layer boundary of the multi-layered structure, and applying a predefined control action to the etch process responsive to determining that the crossed layer boundary corresponds to the preselected layer boundary of the multi -layered structure.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: August 31, 2021
    Assignee: Nova Ltd.
    Inventors: Gil Loewenthal, Shay Yogev, Yoav Etzioni
  • Patent number: 11056098
    Abstract: Embodiments describe a method for speech endpoint detection including receiving identification data for a first state associated with a first frame of speech data from a WFST language model, determining that the first frame of the speech data includes silence data, incrementing a silence counter associated with the first state, copying a value of the silence counter of the first state to a corresponding silence counter field in a second state associated with the first state in an active state list, and determining that the value of the silence counter for the first state is above a silence threshold. The method further includes, determining that an endpoint of the speech has occurred in response to determining that the silence counter is above the silence threshold, and outputting text data representing a plurality of words determined from the speech data that was received prior to the endpoint.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: July 6, 2021
    Assignee: Amazon Technologies, Inc.
    Inventor: Pushkaraksha Gejji
  • Patent number: 11022877
    Abstract: Embodiments include wafer and photomask processing equipment. An etch processing system including an endpoint detection system having a light source and a photodetector is described. In an example, the light source emits light toward an alignment region over a substrate support member of an etch chamber, and the photodetector receives a reflection of the light from the alignment region. The reflection is monitored for endpoint and process control. A second light source emits light toward the alignment region, and a camera receives the light to image the alignment region. The image can be used to align the light emitted by the endpoint detection system to a spot location within the alignment region, e.g., within an alignment opening of a substrate mounted on the substrate support member.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: June 1, 2021
    Assignee: Applied Materials, Inc.
    Inventors: Michael N. Grimbergen, Khiem K. Nguyen
  • Patent number: 11001535
    Abstract: Embodiments of the present disclosure generally relate to methods of forming optical devices comprising nanostructures disposed on transparent substrates. A substrate, such as a silicon wafer, is provided as a base for forming an optical device. A transparent layer is disposed on a first surface of the substrate, and a structure layer is disposed on the transparent surface. An etch mask layer is disposed on a second surface of the substrate opposite the first surface, and a window or opening is formed in the etch mask layer to expose a portion of the second surface of the substrate. A plurality of nanostructures is then formed in the structure layer, and a portion of the substrate extending from the window to the transparent layer is removed. A portion of the transparent layer having nanostructures disposed thereon is then detached from the substrate to form an optical device.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: May 11, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Tapashree Roy, Rutger Meyer Timmerman Thijssen
  • Patent number: 10916472
    Abstract: This disclosure relates to a high volume manufacturing system for processing and measuring workpieces in a semiconductor processing sequence without leaving the system's controlled environment (e.g., sub-atmospheric pressure). The system includes an active interdiction control system to implement corrective processing within the system when a non-conformity is detected. The corrective processing can include a remedial process sequence to correct the non-conformity or compensate for the non-conformity during subsequent process. The non-conformity may be associated with fabrication measurement data, process parameter data, and/or platform performance data.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: February 9, 2021
    Assignee: Tokyo Electron Limited
    Inventors: Robert Clark, Jeffrey Smith, Kandabara Tapily, Angelique Raley, Qiang Zhao
  • Patent number: 10891725
    Abstract: An inspection apparatus configured to inspect a target for defects, including: an image capturing unit capable of capturing an image of the target as image information having color information including RGB values; and a determination unit configured to determine presence or absence of defects in the target based on the color information of the image information of the image captured by the image capturing unit, wherein the determination unit is configured to define, for each pixel, criteria for determining presence or absence of defects in each pixel of the image information, based on the color information in a defect-free region of the target captured by the image capturing unit, and to filter all pixels in the image information of the image captured by the image capturing unit so as to determine presence or absence of defects in each pixel, based on the defined criteria.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: January 12, 2021
    Assignee: NITTO DENKO CORPORATION
    Inventor: Yoichi Kigawa
  • Patent number: 10853697
    Abstract: A method and system for monitoring an e-commerce platform using artificial intelligence and fixing malfunctions on the e-commerce platform. The method includes: receiving, by a computing device, a feedback submitted by a user through the e-commerce platform; generating a vector based on content of the feedback, context of the feedback and profile of the user using AI processors; and classifying the vector to determine function corresponding to the feedback and status of the function using AI classifiers. The content includes text, voice, image and video; the context includes time, location and submission channel of the feedback; the profile includes attributes, history and preference of the user. Dimensions of the vector respectively corresponding to the text, voice, image, video, time, location, submission channel, attributes, history, and preference of the user.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: December 1, 2020
    Assignees: Beijing Jingdong Shangke Information Technology Co., Ltd., JD.com American Technologies Corporation
    Inventors: Li Chen, Shizhu Liu, Kailin Huang, Shanglin Yang, Hui Zhou
  • Patent number: 10692705
    Abstract: An advanced optical sensor and method for detection of optical events in a plasma processing system. The method includes detecting at least one light emission signal in a plasma processing chamber. The at least one detected light emission signal including light emissions from an optical event. The method further includes processing the at least one light emission signal and detecting a signature of the optical event from the processed light emission signal.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: June 23, 2020
    Assignee: Tokyo Electron Limited
    Inventors: Mihail Mihaylov, Xinkang Tian, Ching-Ling Meng, Jason Ferns, Joel Ng, Badru D. Hyatt, Zheng Yan, Vi Vuong
  • Patent number: 10651017
    Abstract: Provided are methods and systems for operation instability detection in a surface wave plasma source. In an embodiment a system for plasma processing may include a surface wave plasma source configured to generate a plasma field. The system may also include an optical sensor configured to generate information characteristic of optical energy collected in a region proximate to the surface wave plasma source. Additionally, the system may include a sensor logic unit configured to detect a region of instability proximate to the surface wave plasma source in response to the information generated by the optical sensor.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: May 12, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Sergey Voronin, Jason Marion, Alok Ranjan
  • Patent number: 10566176
    Abstract: Disclosed herein are a microwave probe capable of precisely detecting a plasma state in a plasma process, a plasma monitoring system including the probe, and a method of fabricating a semiconductor device using the system. The microwave probe includes a body extending in one direction and a head which is connected to one end of the body and has a flat plate shape. In addition, in the plasma process, the microwave probe is non-invasively coupled to a chamber such that a surface of the head contacts an outer surface of a viewport of the chamber, and the microwave probe applies a microwave into the chamber through the head and receives signals generated inside the chamber through the head.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: February 18, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Se-jin Oh, Woong Ko, Vasily Pashkovskiy, Doug-yong Sung, Ki-ho Hwang
  • Patent number: 10534275
    Abstract: A method and system are presented for use in controlling a multiple patterning process of n patterning stages subsequently applied to a sample to produce a target pattern thereon. The method comprises: providing intermediate measured data indicative of an optical response of the sample after being patterned by m-th patterning stage, 1?m<n; processing said intermediate measured data, determining at least a location parameter of a predetermined feature of the pattern, and generating measured data indicative of said at least one selected parameter; utilizing said at least location parameter of the predetermined feature for optimizing a data interpretation model for interpretation of measured data indicative of an optical response from the sample being patterned by k-th subsequent patterning stage, m<k?n.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: January 14, 2020
    Assignee: NOVA MEASURING INSTRUMENTS LTD.
    Inventors: Cornel Bozdog, Aron Cepler, Paul Isbester
  • Patent number: 10520368
    Abstract: An electronic apparatus includes a housing, a substrate in the housing, components on the substrate, a reference temperature sensor, temperature sensors for the respective components, and an arithmetic processing unit. The arithmetic processing unit estimates an outside air temperature by using a reference temperature, temperatures acquired by the temperature sensors, first transfer functions, second transfer functions, and third transfer functions, and estimates a surface temperature of the housing based on the outside air temperature. Each first transfer function is defined based on a thermal resistance and a thermal time constant from a component to the reference temperature sensor. Each second transfer function is defined based on a thermal resistance and a thermal time constant from a component to an individual temperature sensor. Each third transfer function is defined based on a thermal resistance and a thermal time constant from a component to a surface of the housing.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: December 31, 2019
    Assignee: FUJITSU LIMITED
    Inventor: Masatoshi Ishii
  • Patent number: 10482000
    Abstract: Described herein is a system and method for determining whether a detected issue in a computing system is a bug introduced by a developer or an intermittent issue. When an issue is detected, information about the issue is received. A determination is then made as to whether the issue is a new issue or whether it has been previously detected. When it is determined that the issue is a new issue, information about the issue is stored in a storage device. A feature vector is generated for the issue and is analyzed to determine a probability that the issue is a bug. When it is determined that the issue is a bug, the occurrence of the issue is reported to a user of the system that can correct the bug. Once the bug is corrected, the correction is provided back to the system and is used to train the system.
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: November 19, 2019
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Vidar V. Vikjord, Jan-Ove Karlberg
  • Patent number: 10360671
    Abstract: Systems and methods for tool health monitoring and matching through integrated real-time data collection, event prioritization, and automated determination of matched states through image analysis are disclosed. Data from the semiconductor production tools can be received in real-time. A control limit impact (CLI) of the parametric data and the defect attributes data can be determined and causation factors can be prioritized. Image analysis techniques can compare images and can be used to judge tool matching, such as by identifying one of the states at which the two or more of the semiconductor manufacturing tools match.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: July 23, 2019
    Assignee: KLA-Tencor Corporation
    Inventors: Ravichander Rao, Gary Taan, Andreas Russ, Bjorn Brauer, Roger Davis, Bryant Mantiply, Swati Ramanathan, Karen Biagini
  • Patent number: 10290525
    Abstract: Disclosed is a method for marking, by using a laser marker, a plurality of wafer dice divided by a wafer dicing process. The disclosed marking method for wafer dice comprises the steps of: setting a plurality of scan regions having a mutually overlapping portion on a wafer including the wafer dice; scanning the scan regions of the wafer a plurality of times by using a line scan camera; collecting position information of each of wafer dice located in regions in which the scan regions do not overlap; collecting, through image synthesis, position information of each of wafer dice located in regions in which the scan regions overlap; and marking, by using the laser marker, each of all the wafer dice of which the position information has been collected.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: May 14, 2019
    Assignee: EO TECHNICS CO., LTD.
    Inventors: Sun Jung Kim, Jae Man Choi, Sung Beom Jung, Jung Jin Seo
  • Patent number: 10236223
    Abstract: Disclosed is a substrate processing method. The substrate processing method includes: a first acquisition step of acquiring a first processing condition in a first processing performed using a first number of monitor substrates and a first processing result related to the monitor substrates; a second acquisition step of acquiring a second processing condition in a second processing performed using a second number of monitor substrates and a second processing result related to the monitor substrates; a first calculation step of calculating a processing condition difference between the first processing condition and the second processing condition; and a second calculation step of calculating a processing result of substrates at slot positions where no monitor substrate is placed in the first processing, based on the first processing result, the second processing result, the processing condition difference, and a process model representing a relationship between a processing condition and a processing result.
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: March 19, 2019
    Assignee: Tokyo Electron Limited
    Inventors: Yuichi Takenaga, Takanori Saito
  • Patent number: 10209300
    Abstract: Methods and systems for manufacturing and analyzing interconnect structures in integrated circuit (IC) devices. The methods include forming an interconnect structure, such as a pillar, in an IC device. The pillar is analyzed using an opto-acoustic sensor to quantify physical characteristics used to determine whether the pillar satisfies predetermined quality criterion. The analysis includes capturing an opto-acoustic signal from the pillar and estimating optical parameters for a number of local maxima of the signal. A mode may then be fitted for each of the identified local maxima based on the optical characteristics. The modes and estimated optical parameters may then be iteratively corrected in an order from strongest to weakest local maximum. The corrected values may then be compared to a predicted physical model to identify the physical characteristics of the pillar. If the physical characteristics fall outside of the quality criterion, manufacturing processes may be altered.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: February 19, 2019
    Assignee: Rudolph Technologies, Inc.
    Inventors: Michael Kotelyanskii, Roman Basistyy
  • Patent number: 10203596
    Abstract: A method of filtering overlay data by field is provided in the present invention. The method includes the following steps. A minimum number of measure points per field on a semiconductor substrate is decided. Field data filtering rules are set. Overlay raw data is inputted. A raw data filtration is performed to the overlay raw data by field according to the field data filtering rules. Modified exposure parameters are generated for each field according to overlay data of remaining measure points per field after the raw data filtration when the number of the remaining measure points per field is larger than or equal to the minimum number of the measure points per field. Accordingly, the modified exposure parameters will be more effective in reducing the overlay error because more outliers may be filtered out before generating the modified exposure parameters.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: February 12, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: En-Chiuan Liou, Che-Yi Lin
  • Patent number: 10114368
    Abstract: Inspection apparatus includes an imaging module, which is configured to capture images of defects at different, respective locations on a sample. A processor is coupled to process the images so as to automatically assign respective classifications to the defects, and to autonomously control the imaging module to continue capturing the images responsively to the assigned classifications.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: October 30, 2018
    Assignee: APPLIED MATERIALS ISRAEL LTD.
    Inventors: Gadi Greenberg, Idan Kaizerman, Zeev Zohar
  • Patent number: 9996647
    Abstract: Disclosed are methods of optimizing a computer model which relates the etch profile of a feature on a semiconductor substrate to a set of independent input parameters (A), via the use of a plurality of model parameters (B). In some embodiments, the methods may include modifying one or more values of B so as to reduce a metric indicative of the differences between computed reflectance spectra generated from the model and corresponding experimental reflectance spectra with respect to one or more sets of values of A. In some embodiments, calculating the metric may include an operation of projecting the computed and corresponding experimental reflectance spectra onto a reduced-dimensional subspace and calculating the difference between the reflectance spectra as projected onto the subspace. Also disclosed are etch systems implementing such optimized computer models.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: June 12, 2018
    Assignee: Lam Research Corporation
    Inventors: Mehmet Derya Tetiker, Saravanapriyan Sriraman, Andrew D. Bailey, III, Alex Paterson, Richard A. Gottscho
  • Patent number: 9911577
    Abstract: An arrangement for controlling a plasma processing system is provided. The arrangement includes an RF sensing mechanism for obtaining an RF voltage signal. The arrangement also includes a voltage probe coupled to the RF sensing mechanism to facilitate acquisition of the signal while reducing perturbation of RF power driving a plasma in the plasma processing system. The arrangement further includes a signal processing arrangement configured for receiving the signal, split the voltage signals into a plurality of channels, convert the signals into a plurality of direct current (DC) signals, convert the DC signals into digital signals and process the digital signal in a digital domain to generate a transfer function output. The arrangement moreover includes an ESC power supply subsystem configured to receive the transfer function output as a feedback signal to control the plasma processing system.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: March 6, 2018
    Assignee: Lam Research Corporation
    Inventors: John C. Valcore, Jr., Henry S. Povolny
  • Patent number: 9846135
    Abstract: A moisture sensor arrangement including a plate-like semiconductor substrate and an integrated signal processing component disposed on a first side of the semiconductor substrate. The moisture sensor arrangement including a capacitive moisture sensor connected electrically conductively to the integrated signal processing component, wherein the capacitive moisture sensor is disposed on either the first side or a second side of the semiconductor substrate that is opposite the first side of the semiconductor substrate. In addition, the plate-like semiconductor substrate includes 1) plated through-holes, by way of which elements on the first side and the second side of the semiconductor substrate are electrically connectable to one another; and 2) a temperature sensor integrated with the integrated signal processing component.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: December 19, 2017
    Assignee: E+E ELEKTRONIK GES.M.B.H
    Inventors: Elmar Mayer, Georg Niessner, Joachim Runck
  • Patent number: 9818629
    Abstract: Provided is a substrate processing apparatus capable of efficiently resuming processing of unprocessed substrates after an error occurs during processing of substrates. In the substrate processing apparatus that executes a recipe defining an order of processing substrates and manages process status of the substrates, the process status are changed to a processing state so as to execute the recipe, are changed to a paused state when unprocessed substrates are present among the substrates to be processed according to the recipe, due to an error occurring during the execution of the recipe, and are changed from the paused state to the processing state to resume the execution of the recipe so as to process the unprocessed substrates when the error is canceled and a operation is performed to resume the execution of the recipe.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: November 14, 2017
    Assignee: Hitachi Kokusai Electric, Inc.
    Inventor: Makoto Shirakawa
  • Patent number: 9792393
    Abstract: Disclosed are methods of optimizing a computer model which relates the etch profile of a feature on a semiconductor substrate to a set of independent input parameters (A), via the use of a plurality of model parameters (B). In some embodiments, the methods may include modifying one or more values of B so as to reduce a metric indicative of the differences between computed reflectance spectra generated from the model and corresponding experimental reflectance spectra with respect to one or more sets of values of A. In some embodiments, calculating the metric may include an operation of projecting the computed and corresponding experimental reflectance spectra onto a reduced-dimensional subspace and calculating the difference between the reflectance spectra as projected onto the subspace. Also disclosed are etch systems implementing such optimized computer models.
    Type: Grant
    Filed: February 8, 2016
    Date of Patent: October 17, 2017
    Assignee: Lam Research Corporation
    Inventors: Mehmet Derya Tetiker, Saravanapriyan Sriraman, Andrew D. Bailey, III, Alex Paterson, Richard A. Gottscho
  • Patent number: 9767997
    Abstract: A plasma processing apparatus includes: a detector configured to detect a change in an intensity of light emission from plasma formed inside a processing chamber; and a unit configured to adjust conditions for forming the plasma or processing a wafer arranged inside the processing chamber using an output from the detector, wherein the detector detects a signal of the intensity of light emission at plural time instants before an arbitrary time instant during processing, and wherein the adjusting unit removes the component of a temporal change of a long cycle of the intensity of light emission from this detected signal and detects the component of a short temporal change of the intensity of light emission, and adjusts the conditions for forming the plasma or processing a wafer arranged inside the processing chamber based on the short temporal change of the detected intensity of light emission.
    Type: Grant
    Filed: July 16, 2014
    Date of Patent: September 19, 2017
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Masahito Togami, Tatehito Usui, Kosa Hirota, Satomi Inoue, Shigeru Nakamoto
  • Patent number: 9714473
    Abstract: Some embodiments of the present invention provide processes and apparatus for electrochemically fabricating multilayer structures (e.g. mesoscale or microscale structures) with improved endpoint detection and parallelism maintenance for materials (e.g. layers) that are planarized during the electrochemical fabrication process. Some methods involve the use of a fixture during planarization that ensures that planarized planes of material are parallel to other deposited planes within a given tolerance. Some methods involve the use of an endpoint detection fixture that ensures precise heights of deposited materials relative to an initial surface of a substrate, relative to a first deposited layer, or relative to some other layer formed during the fabrication process. In some embodiments planarization may occur via lapping while other embodiments may use a diamond fly cutting machine.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: July 25, 2017
    Assignee: Microfabrica Inc.
    Inventors: Uri Frodis, Adam L. Cohen, Michael S. Lockard
  • Patent number: 9673113
    Abstract: Systems and methods are provided for controlling a polishing process in real-time. First and second characteristics are identified in first and second data sets, respectively, with each data set corresponding to a real-time wafer polishing data. A time delta is computed between the times at which the first and second characteristics occur within their respective data sets, and polishing parameters are then updated in real-time based on the computed time delta.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: June 6, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jamie S. Leighton, Yee Sheen Pong
  • Patent number: 9590151
    Abstract: A method is provided for producing a plurality of radiation-emitting semiconductor chips, having the following steps: providing a plurality of semiconductor bodies (1) which are suitable for emitting electromagnetic radiation from a radiation exit face (3), applying the semiconductor bodies (1) to a carrier (2), applying a first mask layer (4) to regions of the carrier (2) between the semiconductor bodies (1), applying a conversion layer (5) to the entire surface of the semiconductor bodies (1) and the first mask layer (4) using a spray coating method, and removing the first mask layer (4), such that in each case a conversion layer (5) arises on the radiation exit faces (3) of the semiconductor bodies (1).
    Type: Grant
    Filed: April 14, 2014
    Date of Patent: March 7, 2017
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Markus Richter, Alexander Baumgartner, Hans-Christoph Gallmeier, Tony Albrecht
  • Patent number: 9583405
    Abstract: Methods and apparatus for spectrum-based endpointing. An endpointing method includes selecting a reference spectrum. The reference spectrum is a spectrum of white light reflected from a film of interest on a first substrate and has a thickness greater than a target thickness. The reference spectrum is empirically selected for particular spectrum-based endpoint determination logic so that the target thickness is achieved when endpoint is called by applying the particular spectrum-based endpoint logic. The method includes obtaining a current spectrum. The current spectrum is a spectrum of white light reflected from a film of interest on a second substrate when the film of interest is being subjected to a polishing step and has a current thickness that is greater than the target thickness. The method includes determining, for the second substrate, when an endpoint of the polishing step has been achieved. The determining is based on the reference and current spectra.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: February 28, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Dominic J. Benvegnu, Jeffrey Drue David, Boguslaw A. Swedek
  • Patent number: 9482519
    Abstract: The present invention relates generally to metrology, and more particularly, to an apparatus and method of measuring multiple parameters of a structure or feature of a semiconductor device using a combination of stepwise optical metrology and a linear system of equations to generate an output as function of position. In an embodiment, a light beam having a width greater than the features to be measured may be shined on a first area of the semiconductor device to calculate a first average. The light beam may then be shined on a second area that overlaps the first area by at least one individual feature to calculate a second average. The averages may be entered into a system of linear equations which may then be solved to calculate an overall average.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: November 1, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventor: Yunlin Zhang
  • Patent number: 9390323
    Abstract: Methods, systems, and computer program products relate to recommending sites including identifying a location associated with a computing device, analyzing metadata of geotagged image data, the image data including blocked image data, and suggesting sites near the identified location based on the results of the metadata analysis.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: July 12, 2016
    Assignee: International Business Machines Corporation
    Inventors: Michael T. Peters, Dana L. Price, James C. Riordan, Belinda M. Vennam, Ramratan Vennam
  • Patent number: 9368941
    Abstract: A device includes an array of optical transmitters having first and second temperature sensors each disposed at or near a first and second end of the array of the transmitters. The device includes a controller in communication with the temperature sensors and the transmitters. The controller receives temperature measurements from the temperatures sensors and determines a temperature difference between a first temperature measurement of the first temperature sensor and a second temperature measurement of the second temperature sensor. The controller determines a compensation for each transmitter within the transmitter array based on the temperature difference and a transmitter position within the array of transmitters. The compensation causes the corresponding transmitter to transmit at a wavelength associated with that transmitter. The controller executes the compensations for the transmitters.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: June 14, 2016
    Assignee: Google Inc.
    Inventors: Pedram Zare Dashti, Changhong Joy Jiang, Jun Zheng, Yi Wang
  • Patent number: 8986560
    Abstract: A method for producing an optical semiconductor device includes the steps of determining a wafer size to make a section arrangement including a plurality of sections in each of which the optical semiconductor device including a semiconductor mesa is formed; obtaining an in-plane distribution of a thickness of a resin layer on a wafer; obtaining a correlation between a thickness of a resin layer and a trench width; forming a trench width map using the in-plane distribution of the thickness and the correlation; preparing an epitaxial substrate by forming a stacked semiconductor layer; forming, on the epitaxial substrate, a mask based on the trench width map; forming a trench structure including the semiconductor mesa by etching the stacked semiconductor layer using the mask; forming a resin layer on the trench structure; and forming an opening on the semiconductor mesa by etching the resin layer.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: March 24, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takamitsu Kitamura, Hideki Yagi
  • Patent number: 8936948
    Abstract: A hard mask, a protective film, which protects the hard mask film from oxidation, a first mask film and a first organic film are sequentially stacked. The first organic film is processed into a first pattern, and the first mask film is etched using the patterned first organic film as a mask. After the first organic film is removed, a second organic film is formed. The second organic film is processed into a second pattern. The first mask film is secondary etched using the patterned second organic film as a mask so that the surface of the first mask film is exposed but the surface of the protective film is not exposed, thereby selectively patterning only the first mask film. After that, when removing the residual second organic film by ashing, it is possible to ensure the function of the protective film that protects the hard mask film from oxidation.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: January 20, 2015
    Assignee: PS4 Luxco S.A.R.L.
    Inventor: Osamu Fujita
  • Patent number: 8916874
    Abstract: Sacrificial optical test structures are constructed upon a wafer of pre-cleaved optical chips for testing the optical functions of the pre-cleaved optical chips. The sacrificial optical structures are disabled upon the cleaving the optical chips from the wafer and the cleaved optical chips can be used for their desired end functions. The test structures may remain on the cleaved optical chips or they may be discarded.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: December 23, 2014
    Assignee: Oclaro Technology Limited
    Inventors: Neil David Whitbread, Lloyd Nicholas Langley, Andrew Cannon Carter
  • Patent number: 8900886
    Abstract: A method of semiconductor processing comprises providing a semiconductor wafer in a processing chamber; feeding at least one tungsten-containing precursor in a gas state into the processing chamber for atomic layer deposition (ALD) of tungsten; feeding at least one reducing chemical in a gas state into the processing chamber; and monitoring a concentration of at least one gaseous byproduct in the chamber; and providing a signal indicating concentration of the at least one gaseous byproduct in the chamber. The byproduct is produced by a reaction between the at least one tungsten-containing precursor and the at least one reducing chemical during the ALD.
    Type: Grant
    Filed: June 1, 2012
    Date of Patent: December 2, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kun-Ei Chen, Jen-Yi Chen, Yi-Chung Lin, Chen-Chieh Chiang, Ling-Sung Wang
  • Patent number: 8877655
    Abstract: The present invention relates to a process and system for depositing a thin film onto a substrate. One aspect of the invention is depositing a thin film metal oxide layer using atomic layer deposition (ALD).
    Type: Grant
    Filed: May 6, 2011
    Date of Patent: November 4, 2014
    Assignee: ASM America, Inc.
    Inventors: Eric J. Shero, Petri I. Raisanen, Sung-Hoon Jung, Chang-Gong Wang
  • Patent number: 8846417
    Abstract: An optoelectronic device including at least one of a solar device, a semiconductor device, and an electronic device. The device includes a semiconductor unit. A plurality of metal fingers is disposed on a surface of the semiconductor unit for electrical conduction. Each of the metal fingers includes a pad area for forming an electrical contact. The optoelectronic device includes a plurality of pad areas that is available for connection to a bus bar, wherein each of the metal fingers is connected to a corresponding pad area for forming an electrical contact.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: September 30, 2014
    Assignee: Alta Devices, Inc.
    Inventor: Andreas Hegedus
  • Patent number: 8841146
    Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of coating a transparent substrate with a wavelength conversion material, continuously evaluating a correlated color temperature (CCT) of the output electromagnetic radiation produced by the wavelength conversion material and comparing the correlated color temperature (CCT) to a target correlated color temperature (CCT), and controlling the coating step responsive to feedback from the evaluating and comparing step to adjust the correlated color temperature (CCT) to achieve the target correlated color temperature (CCT). A system for fabricating light emitting diode (LED) dice includes a coating system, a monitoring system, and a control system configured to control the coating system to adjust the correlated color temperature (CCT) of the wavelength conversion material on the transparent substrate to achieve the target correlated color temperature (CCT).
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: September 23, 2014
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Jui-Kang Yen, Georg Soerensen, Mark Ewing Tuttle
  • Patent number: 8809075
    Abstract: The method for filling a liquid material, and the apparatus and the program make it possible, without changing a moving speed of an ejection device, to correct a change in ejection amount and to stabilize an application shape. The method fills a liquid material into a gap between a substrate and a work by using the capillary action. The method includes the steps of: generating an application pattern consisting of a plurality of application areas continuous to one another; assigning a plurality of ejection cycles, each obtained by combining the number of ejection pulses and the number of pause pulses at a predetermined ratio therebetween, to each of the application areas; and measuring an ejection amount at correction intervals and calculating a correction amount for the ejection amount.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: August 19, 2014
    Assignee: Musashi Engineering, Inc.
    Inventor: Kazumasa Ikushima
  • Patent number: 8753901
    Abstract: The invention relates to an arrangement of contact areas and test areas on patterned semiconductor chips. The contact areas and the test areas are electrically connected to one another via a conduction web. Whereas the contact areas are arranged in a first region, which has no components of an integrated circuit, the test areas lie in a second region of the top side of the semiconductor chip, which region has components of an integrated circuit.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: June 17, 2014
    Assignee: Infineon Technologies AG
    Inventors: Ertle Werner, Bernd Goller, Michael Horn, Bernd Kothe