Abstract: Sacrificial optical test structures are constructed upon a wafer (100) of pre-cleaved optical chips (10) for testing the optical functions of the pre-cleaved optical chips (10). The sacrificial optical structures are disabled upon the cleaving the optical chips (10) from the wafer (100) and the cleaved optical chips (10) can be used for their desired end functions. The test structures may remain on the cleaved optical chips (10) or they may be discarded.

Abstract: Systems and methods for forming a time-average line image are disclosed. The method includes forming a line image with a first amount of intensity non-uniformity. The method also includes forming and scanning a secondary image over at least a portion of the line image to form a time-averaged modified line image having a second amount of intensity non-uniformity that is less than the first amount. Wafer emissivity is measured in real time to control the intensity of the secondary image. Temperature is also measured in real time based on the wafer emissivity and reflectivity of the secondary image, and can be used to control the intensity of the secondary image.

Abstract: For providing control of two-step or a multi-step deposition process, a method and a corresponding deposition system is provided comprising providing a deposition process having at least two sub-processes employing different sets of process parameters, wherein each set of process parameters comprises at least one process parameter. The method comprises controllably generating an actual value for at least one first process parameter by taking into account at least one previous value of the respective first process parameter, wherein each first process parameter is a process parameter of said at least two sets of process parameters.

Abstract: A method of processing semiconductor wafers includes applying reactive gas through a plurality of inlets to the semiconductor wafers. The method further includes removing exhaust gas resulting from the step of applying reactive gas. The removing of the exhaust gas is through a plurality of outlets coupled to a manifold. The manifold combines the exhaust gas from the plurality of outlets. The method further includes measuring a pressure in each outlet of the plurality of outlets during the step of removing.

Abstract: A pumping and valve control device can be used in an atomic layer deposition system.

Abstract: A manufacturing method for a semiconductor device, comprising: performing first processing on a plurality of wafers in a first processing order in a first processing apparatus; obtaining a processed amount with respect to each of the plurality of wafers in the first processing; obtaining a processed amount with respect to each of the plurality of wafers by second processing in a second processing apparatus after the first processing; deciding a second processing order, which is different from the first processing order, from the processed amount with respect to each of the plurality of wafers by the first processing and the processed amount with respect to each of the plurality of wafers by the second processing; and performing the second processing on the plurality of wafers in the second processing order in the second processing apparatus.

Abstract: An integrated circuit wafer system includes an integrated circuit wafer, measuring thicknesses of the integrated circuit wafer, calculating a change in temperature ramp rates and thickness offsets for subsequent processing based on the temperature ramp rates for prior processing and the resultant thicknesses, and calculating an average temperature and deposition time for subsequent processing based on calculated changes in temperature ramp rates, coupled with the average temperature, deposition time for prior processing, and the resultant thicknesses.

Abstract: Apparatuses are provided for controlling flow conductance of plasma formed in a plasma processing apparatus that includes an upper electrode opposite a lower electrode to form a gap therebetween. The lower electrode is adapted to support a substrate and coupled to a RF power supply. Process gas injected into the gap is excited into the plasma state during operation. The apparatus includes a ground ring that concentrically surrounds the lower electrode and has a set of slots formed therein, and a mechanism for controlling gas flow through the slots.

Abstract: A method and related system are provided for depositing a dielectric material into voids in one or more of the semiconductor material layers of a photovoltaic (PV) module substrate. A first side of the substrate is exposed to a light source such that light is transmitted through the substrate and any voids in the semiconductor material layers on the opposite side of the substrate. The light transmitted through the voids is detected and a printer is registered to the pattern of detected light to print a dielectric material and fill the voids.

Abstract: There is provided a plasma processing method performing a plasma etching process on an oxide film of a target substrate through one or more steps by using a processing gas including a CF-based gas and a COS gas. The plasma processing method includes: performing a plasma etching process on the oxide film of the target substrate according to a processing recipe; measuring a concentration of sulfur (S) remaining on the target substrate (residual S concentration) after the plasma etching process is performed according to the processing recipe; adjusting a ratio of a COS gas flow rate with respect to a CF-based gas flow rate (COS/CF ratio) so as to allow the residual S concentration to become equal to or smaller than a predetermined value; and performing an actual plasma etching process according to a modified processing recipe storing the adjusted COS/CF ratio.

Abstract: (a) A recess is formed through an insulating film formed over a semiconductor substrate. (b) After the recess is formed, a temperature of the substrate is raised to 300° C. or higher at a temperature rising rate of 10° C./s or slower and a first degassing process is executed. (c) After the first degassing process, a conductive film is deposited on the insulating film, the conductive film being embedded in the recess. (d) The deposited conductive film is polished until the insulating film is exposed. It is possible to suppress occurrence of defects during CMP to be performed after a conductive member is deposited on the surface of the insulating film having a recess formed therethrough.

Abstract: Methods for matching semiconductor processing chambers using a calibrated spectrometer are disclosed. In one embodiment, plasma attributes are measured for a process in a reference chamber and a process in an aged chamber. Using a calibrated light source, an optical path equivalent to an optical path in a reference chamber and an optical path in an aged chamber can be compared by determining a correction factor. The correction factor is applied to adjust a measured intensity of plasma radiation through the optical path in the aged chamber. Comparing a measured intensity of plasma radiation in the reference chamber and the adjusted measured intensity in the aged chamber provide an indication of changed chamber conditions. A magnitude of change between the two intensities can be used to adjust the process parameters to yield a processed substrate from the aged chamber which matches that of the reference chamber.

Abstract: The present disclosure provides a system for in-situ spectrometry. The system includes a wafer-cleaning machine that cleans a surface of a semiconductor wafer using a cleaning solution. The system also includes a spectrometry machine that is coupled to the wafer-cleaning machine. The spectrometry machine receives a portion of the cleaning solution from the wafer-cleaning machine. The portion of the cleaning solution collects particles from the wafer during the cleaning. The spectrometry machine is operable to analyze a particle composition of a portion of the wafer based on the portion of the cleaning solution, while the wafer remains in the wafer-cleaning machine during the particle composition analysis.

Abstract: An ion implantation system and method are disclosed in which glitches in voltage are minimized by modifications to the power system of the implanter. These power supply modifications include faster response time, output filtering, improved glitch detection and removal of voltage blanking. By minimizing glitches, it is possible to produce solar cells with acceptable dose uniformity without having to pause the scan each time a voltage glitch is detected. For example, by shortening the duration of a voltage to about 20-40 milliseconds, dose uniformity within about 3% can be maintained.

Abstract: A module substrate may include a substrate body on which a plurality of chip mounting regions having connection pads are defined. Repair structures may be respectively formed, or placed, in the chip mounting regions. Each repair structure includes conductive layer patterns formed over the connection pads in each chip mounting region, an insulation layer pattern formed over the substrate body in each chip mounting region in such a way as to expose the conductive layer patterns, plastic conductive members formed between the connection pads and the conductive layer patterns, and a plastic insulation member formed between the substrate body and the insulation layer pattern in each chip mounting region.

Abstract: A method of manufacturing an MEMS device includes: forming a covering structure having an MEMS structure and a hollow portion, which is located on a periphery of the MEMS structure and is opened to an outside, on a substrate; and performing surface etching for the MEMS structure in a gas phase by supplying an etching gas to the periphery of the MEMS structure from the outside.

Abstract: A system and method for measuring the velocity of gas flow between multiple plasma deposition chambers is provided. A passage atmospherically linking two plasma processing chambers conducts a gas flow therebetween due to differential pressures within the respective chambers. The gas flow velocity is measured by a linear or non-linear ultrasonic energy acoustic path between two transducers located exteriorly to the chambers using the difference in transit time in a forward and reverse direction due to the velocity of gas in the passage. The pressure of process gas in one or more chambers is adjustable based on the measured velocity of gas flow in the passage.

Abstract: The present invention relates to a process and system for depositing a thin film onto a substrate. One aspect of the invention is depositing a thin film metal oxide layer using atomic layer deposition (ALD).

Abstract: A method of optically monitoring a substrate during polishing includes receiving an identification of a selected spectral feature and a characteristic of the selected spectral feature to monitor during polishing, measuring a first spectrum from the substrate during polishing, the first spectrum measured within an initial time following initiation of polishing, measuring a sequence of second spectra from the substrate during polishing, the sequence of second spectra measured after the initial time, for each second spectrum in the sequence of second spectra, removing the first spectrum from the second spectrum to generate a sequence of modified third spectra, determining a value of a characteristic of the selected spectral feature for each third spectrum in the sequence of third spectra to generate a sequence of values for the characteristic, and determining a polishing endpoint or an adjustment for a polishing rate based on the sequence of values.

Abstract: A one-step CMP process for polishing three or more layer film stacks on a wafer having a multilayer film stack thereon including a silicon nitride (SiNx) layer on its semiconductor surface, and a silicon oxide layer on the SiNx layer, wherein trench access vias extend through the silicon oxide layer and SiNx layer to trenches formed into the semiconductor surface, and wherein a polysilicon layer fills the trench access vias, fills the trenches, and is on the silicon oxide layer. CMP polishes the multilayer film stack with a slurry including slurry particles including at least one of silica and ceria. The CMP provides a removal rate (RR) for the polysilicon layer>a RR for the silicon oxide layer>a RR for the SiNx layer. The CMP process is continued to remove the polysilicon layer, silicon oxide layer and a portion of the SiNx layer to stop on the SiNx layer. Optical endpointing during CMP can provide a predetermined remaining thickness range for the SiNx layer.

Abstract: The present invention relates to a method of performing a variable film etch using a variable thickness photomask material. Essentially, a thickness of an adjustable film layer is measured and converted into a contour map of film thickness over a region of a semiconductor body (e.g., wafer). An etch mask layer (e.g., photoresist) is then formed above the adjustable film layer and is selectively patterned by a reticleless exposure system (e.g., DMD exposure system). The selective patterning subjects different regions of the etch mask layer to varying exposure times dependent upon the thickness of the underlying adjustable film. The more etching needed to provide the underlying film to a nominal thickness, the longer the exposure of the etch mask. Therefore, the resultant etch mask, after exposure, comprises a topology allowing for various degrees of selective etching of the underlying film resulting in a uniform film.

Abstract: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed around a plurality of mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.

Abstract: In one embodiment a method is provided for maintaining a substrate processing surface. The method generally includes performing a set of measurements on the substrate processing surface, wherein the set of measurements are taken using a displacement sensor coupled to a processing surface conditioning arm, determining a processing surface profile based on the set of measurements, comparing the processing surface profile to a minimum profile threshold, and communicating a result of the profile comparison.

Abstract: Techniques for low temperature ion implantation are provided to improve throughput. Specifically, the pressure of the backside gas may temporarily, continually or continuously increase before the starting of the implant process, such that the wafer may be quickly cooled down from room temperature to be essentially equal to the prescribed implant temperature. Further, after the vacuum venting process, the wafer may wait an extra time in the load lock chamber before the wafer is moved out the ion implanter, in order to allow the wafer temperature to reach a higher temperature quickly for minimizing water condensation on the wafer surface. Furthermore, to accurately monitor the wafer temperature during a period of changing wafer temperature, a non-contact type temperature measuring device may be used to monitor wafer temperature in a real time manner with minimized condensation.

Abstract: A semiconductor growth system includes a chamber and a source of electromagnetic radiation. A detector is arranged to detect absorption of radiation from the source by a chloride- based chemical of the reaction chamber. A control system controls the operation of the chamber in response to the absorption of radiation by the chloride-based chemical. The control system controls the operation of the chamber by adjusting a parameter of the reaction chamber.

Abstract: A method of manufacturing an integrated circuit, IC, package comprising radio frequency, RF, components, the method comprising: electrically connecting a printed circuit pattern on an external major surface of an IC assembly to an RF testing motherboard by bringing them together with an interposed adaptor layer, the adaptor layer comprising a double-sided PCB, printed circuit board, with conductive vias between its printed circuit layers; RF testing the IC assembly using the RF testing motherboard, whilst RF tuning components of the IC assembly; and separating the IC assembly and connecting its major surface to a solder ball grid array, BGA, which has substantially the same RF impedance as the adaptor at RF signal paths from the IC assembly to the BGA.

Abstract: A plasma reactor includes a vacuum enclosure including a side wall and a ceiling defining a vacuum chamber, and a workpiece support within the chamber and facing the ceiling for supporting a planar workpiece, the workpiece support and the ceiling together defining a processing region between the workpiece support and the ceiling. Process gas inlets furnish a process gas into the chamber. A plasma source power electrode is connected to an RF power generator for capacitively coupling plasma source power into the chamber for maintaining a plasma within the chamber. The reactor further includes at least a first overhead solenoidal electromagnet adjacent the ceiling, the overhead solenoidal electromagnet, the ceiling, the side wall and the workpiece support being located along a common axis of symmetry.

Abstract: A computer-implemented method for process control in chemical mechanical polishing in which an initial pre-polishing thickness of a substrate is measured at a metrology station, a parameter of an endpoint algorithm is determined from the initial thickness of the substrate, a substrates is polished at a polishing station, and polishing stops when an endpoint criterion is detected using the endpoint algorithm.

Abstract: The invention can provide apparatus and methods for processing substrates and/or wafers in real-time using at least one Direct Current (DC)/Radio Frequency (RF) Hybrid (DC/RFH) processing system and associated Direct Current/Radio Frequency Hybrid (DC/RFH) procedures and DC/RFH process parameters and/or DC/RFH models.

Abstract: A process system adapted for processing of or with a material therein. The process system includes: a sampling region for the material; an infrared photometric monitor constructed and arranged to transmit infrared radiation through the sampling region and to responsively generate an output signal correlative of the material in the sampling region, based on its interaction with the infrared radiation; and process control means arranged to receive the output of the infrared photometric monitor and to responsively control one or more process conditions in and/or affecting the process system.

Abstract: Embodiments of the present invention relate to the analysis of the components of one or more gases, for example a gas mixture sampled from a semiconductor manufacturing process such as plasma etching or plasma enhanced chemical vapor deposition (PECVD). Particular embodiments provide sufficient power to a plasma of the sample, to dissociate a large number of the molecules and molecular fragments into individual atoms. With sufficient power (typically a power density of between 3-40 W/cm3) delivered into the plasma, most of the emission peaks result from emission of individual atoms, thereby creating spectra conducive to simplifying the identification of the chemical composition of the gases under investigation. Such accurate identification of components of the gas may allow for the precise determination of the stage of the process being performed, and in particular for detection of process endpoint.

Abstract: An arrangement and method for managing the tribology associated with a chemical mechanical planarization (CMP) process continuously monitors and modifies the properties of a polishing slurry in order to assist in controlling the removal rate associated with the CMP process. The viscosity of slurry as it leaves the CMP system (“spent slurry”) and the material removal rate associated with the semiconductor wafer are measured, and then the viscosity of the incoming slurry is adjusted if the measured material removal rate differs from a desired removal rate. If the removal rate is considered to be too fast, the viscosity of the fresh slurry being dispensed onto polishing pad is decreased; alternatively, if the removal rate is too slow, the viscosity is increased. As an alternative to modifying the viscosity of the slurry (or, perhaps in addition to modifying the viscosity), a lubricant may be added to the slurry to slow down the removal rate.

Abstract: Data from the piezo-electric sensors in the mounts for the projection system can be used in the control loops for other parts of the lithographic apparatus, for example the mask table, the substrate table or the air mounts for the frame bearing the projection system. Information from, for example, a geophone, which is used to measure the absolute velocity of the frame bearing the projection system, can be used in the control loop for the piezo-electric actuator in the mount for the projection system.

Abstract: Embodiments of the invention generally provide methods for end point detection at predetermined dopant concentrations during plasma doping processes. In one embodiment, a method includes positioning a substrate within a process chamber, generating a plasma above the substrate and transmitting a light generated by the plasma through the substrate, wherein the light enters the topside and exits the backside of the substrate, and receiving the light by a sensor positioned below the substrate. The method further provides generating a signal proportional to the light received by the sensor, implanting the substrate with a dopant during a doping process, generating multiple light signals proportional to a decreasing amount of the light received by the sensor during the doping process, generating an end point signal proportional to the light received by the sensor once the substrate has a final dopant concentration, and ceasing the doping process.

Abstract: Improved methods and apparatus for forming thin-film layers of semiconductor material absorber layers on a substrate web. According to the present teachings, a semiconductor layer may be formed in a multi-zone process whereby various layers are deposited sequentially onto a moving substrate web.

Abstract: A process of forming an electronic device can include providing a workpiece. The workpiece can include a substrate, an interlevel dielectric overlying the substrate, a refractory-metal-containing layer over the interlevel dielectric, and a first metal-containing layer over the refractory-metal-containing layer. The first metal-containing layer can include a metal element other than a refractory metal element. The process further includes polishing the first metal-containing layer and the refractory-metal-containing layer as a continuous action to expose the interlevel dielectric. In one embodiment, the metal element can include copper, nickel, or a noble metal. In another embodiment, polishing can be performed using a selectivity agent to reduce the amount of the interlevel dielectric removed.

Abstract: Embodiments of the present invention generally provide a method for detecting the position of a substrate within a processing chamber. Embodiments of the present invention are particularly useful for the detection of a mis-positioned solar cell substrate during photoabsorber layer deposition processes within a solar cell production line. Reflected power is measured during processing of a substrate and communicated to a system controller. The system controller compares the measured reflected power with an established range of reflected power. If the measured reflected power is substantially out of range, the system controller signals for the chamber to be taken offline for inspection, maintenance, and/or repair. The system controller may further divert the flow of substrates within the production line around the offline chamber without shutting down the entire solar cell production line.

Abstract: A photoelectric conversion apparatus (100) having a photovoltaic layer (3) comprising a crystalline silicon i-layer (42) formed on a large surface area substrate (1) of not less than 1 m2, wherein the crystalline silicon i-layer comprises regions in which the Raman peak ratio, which is the ratio, within the substrate (1) plane, of the Raman peak intensity of the crystalline silicon phase relative to the Raman peak intensity of the amorphous silicon phase, is within a range from not less then 3.5 to not more than 8.0, and the surface area proportion for those regions within the substrate (1) plane having a Raman peak ratio of not more than 2.5 is not more than 3%.

Abstract: The invention can provide apparatus and methods for processing substrates and/or wafers in real-time using at least one Direct Current (DC)/Radio Frequency (RF) Hybrid (DC/RFH) processing system and associated Direct Current/Radio Frequency Hybrid (DC/RFH) procedures and DC/RFH process parameters and/or DC/RFH models.

Abstract: A reusable transfer substrate member for forming a tiled substrate structure. The member including a transfer substrate, which has a surface region. The surface region comprises a plurality of donor substrate regions. Each of the donor substrate regions is characterized by a donor substrate thickness and a donor substrate surface region. Each of the donor substrate regions is spatially disposed overlying the surface region of the transfer substrate. Each of the donor substrate regions has the donor substrate thickness without a definable cleave region.

Abstract: A transparent conductive laminate for a semiconductor device includes a substrate, first and second refracting films, and a transparent conductive film formed on the second refracting film and having a pattern defined by etched and non-etched regions. The optical thicknesses of the first and second refracting films are controlled to reduce a difference between CIE b* color values produced in the etched and non-etched regions. The CIE b* color values are smaller than 1.15, and the differential value therebetween is less than 0.35 so that the pattern of the transparent conductive film can be obscured or hidden, thereby improving color homogeneity. A method of improving color homogeneity of the laminate is also disclosed.

Abstract: A method for forming a semiconductor laser chip is provided that can suppress layer discontinuity and simultaneously reduce fabrication variations in the light radiation angle in the horizontal direction. The method includes a step of forming, on an n-type GaAs substrate, a semiconductor element layer composed of a plurality of semiconductor layers including an etching marker layer, a step of forming, in a contact layer in the semiconductor element layer, a depressed portion having a depth not reaching the etching marker layer, and a step of forming a ridge portion by etching the semiconductor element layer by dry etching while monitoring, with laser light, the etching depth in the bottom region of the depressed portion.

Abstract: The invention can provide apparatus and methods of processing a substrate using plasma generation by gravity-induced gas-diffusion separation techniques. By adding or using gases including inert and process gases with different gravities (i.e., ratio between the molecular weight of a gaseous constituent and a reference molecular weight), a two-zone or multiple-zone plasma can be formed, in which one kind of gas can be highly constrained near a plasma generation region and another kind of gas can be largely separated from the aforementioned gas due to differential gravity induced diffusion and is constrained more closer to a wafer process region than the aforementioned gas.

Abstract: The present invention generally provides methods and apparatus for monitoring ion dosage during a plasma process. One embodiment of the present invention provides a method for processing a substrate comprising generating a correlation between the at least one attribute of optical emissions of the plasma and a dosage quantity. In one embodiment, the attribute of optical emissions of the plasma is optical emission intensity of an ion species in the plasma.

Abstract: A method for automatically identifying an optimal endpoint algorithm for qualifying a process endpoint during substrate processing within a plasma processing system is provided. The method includes receiving sensor data from a plurality of sensors during substrate processing of at least one substrate within the plasma processing system, wherein the sensor data includes a plurality of signal streams from a plurality of sensor channels. The method also includes identifying an endpoint domain, wherein the endpoint domain is an approximate period within which the process endpoint is expected to occur. The method further includes analyzing the sensor data to generate a set of potential endpoint signatures. The method yet also includes converting the set of potential endpoint signatures into a set of optimal endpoint algorithms. The method yet further includes importing one optimal endpoint algorithm of the set of optimal endpoint algorithms into production environment.

Abstract: To provide an ion implantation device capable of correcting the temperature of the wafer. The ion implantation device of the present invention has: an irradiation means that radiates ions; a retention means that includes a disk 112 that retains at least one wafer W; a thermopile 122 that detects, in a noncontact manner, temperature information for a wafer W retained on disk 112; a cooling medium supply unit that enables heat exchange for a wafer W retained on disk 112; and a control unit that calculates the surface temperature of a wafer W retained on disk 112 based on the temperature information detected by thermopile 122 and that determines whether the calculated surface temperature for the wafer is within a permissible temperature range.

Abstract: The present invention is to provide a laser irradiation method for performing homogeneous laser irradiation to the irradiation object even when the thickness of the irradiation object is not even. In the case of irradiating the irradiation object having uneven thickness, the laser irradiation is performed while keeping the distance between the irradiation object and the lens for condensing the laser beam on the surface of the irradiation object constant by using an autofocusing mechanism. In particular, when the irradiation object is irradiated with the laser beam by moving the irradiation object relative to the laser beam in the first direction and the second direction of the beam spot formed on the irradiation surface, the distance between the irradiation object and the lens is controlled by the autofocusing mechanism before the irradiation object is moved in the first and second directions.

Abstract: A method for manufacturing MEMS structures having at least one functional layer of silicon that contains structures that are exposed by removing a sacrificial layer, at least one sacrificial layer and at least one functional layer being deposited such that they grow in a monocrystalline manner, and the sacrificial layer is made up of a silicon-germanium mixed layer.

Abstract: A method of forming a conformal amorphous hydrogenated carbon layer on an irregular surface of a semiconductor substrate includes: vaporizing a hydrocarbon-containing precursor; introducing the vaporized precursor and an argon gas into a CVD reaction chamber inside which the semiconductor substrate is placed; depositing a conformal amorphous hydrogenated carbon layer on the irregular surface of the semiconductor substrate by plasma CVD; and controlling the deposition of the conformal ratio of the depositing conformal amorphous hydrogenated carbon layer. The controlling includes (a) adjusting a step coverage of the conformal amorphous hydrogenated carbon layer to about 30% or higher as a function of substrate temperature, and (b) adjusting a conformal ratio of the conformal amorphous hydrogenated carbon layer to about 0.9 to about 1.

Abstract: Rapid thermal processing systems and associated methods are disclosed herein. In one embodiment, a method for heating a microelectronic substrate include generating a plasma, applying the generated plasma to a surface of the microelectronic substrate, and raising a temperature of the microelectronic substrate with the generated plasma applied to the surface of the microelectronic substrate. The method further includes continuing to apply the generated plasma until the microelectronic substrate reaches a desired temperature.