Abstract: The semiconductor device having the structure which laminated the chip in many stages is made thin. A reforming area is formed by irradiating a laser beam, where a condensing point is put together with the inside of the semiconductor substrate of a semiconductor wafer. Then, after applying the binding material of liquid state to the back surface of a semiconductor wafer by a spin coating method, this is dried and a solid-like adhesive layer is formed. Then, a semiconductor wafer is divided into each semiconductor chip by making the above-mentioned reforming area into a division origin. By pasting up this semiconductor chip on the main surface of an other semiconductor chip by the adhesive layer of the back surface, the semiconductor device having the structure for which the semiconductor chip was laminated by many stages is manufactured.

Abstract: A method is described for the manufacture of structured flexible metallic patterns in which a metallic layer on a flexible substrate is structured using laser ablation. The flexible patterns manufactured in this fashion may be used as interposers (strap) for RFID tags or RFID antennas.

Abstract: In a dicing method, a dicing is performed in such a way that in such a way that a device substrate, on which two or more devices and alignment marks for positioning are formed, is positioned in accordance with the alignment mark. The dicing method comprises: a substrate fixing step of fixing the device substrate on a fixed stand in a state that the device substrate is covered with coagulant and the coagulant is coagulated; a positioning step of performing a positioning based on the alignment mark in such a manner that a partial area, in which the alignment mark on the device substrate fixed on the fixed stand is formed, is locally heated to melt the coagulant at the partial area, so that the alignment mark is observed through the melted coagulant; and a dicing step of dicing the device substrate and separating the device substrate into the individual device elements.

Abstract: A method and apparatus of fabricating a semiconductor device by back grinding and dicing is disclosed. The method may include at least adhering a protection tape for back grinding on a front surface of a semiconductor wafer, back grinding a rear surface of the semiconductor wafer while the protection tape faces downward, loading the semiconductor wafer to dicing equipment when the front surface having the protection tape faces downward, detecting a dicing position formed on the front surface of the semiconductor wafer, and dicing the semiconductor wafer with the protection tape adhering thereon into individual semiconductor chips in accordance with the detected dicing position. The dicing equipment may have a transparent aligning part for aligning the semiconductor wafer and a chuck part for supporting the semiconductor wafer.

Abstract: In embodiments, a method for manufacturing a semiconductor device may include forming a diffusion preventing layer on a semiconductor substrate having a conductive layer, forming an intermetallic insulating layer on the diffusion preventing layer, forming a trench photo resist layer formed above the intermetallic insulating layer of a first photo resist material, forming a via hole photo resist layer of a second photo resist material at an upper portion and a sidewall in a contact hole of the trench photo resist layer, etching the intermetallic insulating layer and the diffusion preventing layer using the via hole photo resist layer and the trench photo resist layer to substantially simultaneously form a via hole and a trench, and filling the via hole and the trench with a metal thin film to form a metal line.

Abstract: A semiconductor device and method of fabricating the same are provided. The method includes: depositing a silicon layer containing amorphous silicon on a substrate; partially crystallizing the amorphous silicon by applying an annealing process to the silicon layer under an atmosphere of H2O at a predetermined temperature; forming a polycrystalline silicon layer by applying an laser annealing process to the partially crystallized amorphous silicon layer; forming a gate insulating layer on the polycrystalline silicon layer; and forming a gate electrode on the gate insulating layer, so that a substrate is prevented from being bent due to high temperature crystallization while the amorphous silicon is crystallized through an SPC process, thereby reducing defects of the thin film transistor.

Abstract: The semiconductor device of the present invention and the method of the present invention, for forming the semiconductor device, form: a penetrating hole in a semiconductor wafer which has a first insulating film and an electrode pad formed on a first face of the semiconductor wafer, the penetrating hole being immediately below the electrode pad; and a second insulating film on an inner wall of the penetrating hole and on a second face of the semiconductor wafer. In forming the second insulating film, electrodeposition using the semiconductor wafer as a cathode is used. After the second insulating film is formed, the first insulating film is etched using the second insulating film as a mask, the back face of the electrode pad is exposed, and a conductor layer, acting as a penetrating electrode, is formed in the penetrating hole.

Abstract: A CMOS image sensor includes a substrate including a sensing part and a peripheral driving part; a first insulating interlayer formed over an entire surface of the substrate; a first metal line formed on the first insulating interlayer in each of the sensing and peripheral driving parts; a second insulating interlayer formed over the entire surface of the substrate including the first metal line; a second metal line formed on the second insulating interlayer in each of the sensor and peripheral drive parts; an etch-stop layer formed over the entire surface of the substrate including the second metal line; a third insulating interlayer formed on the peripheral driving part of the etch-stop layer; a third metal line formed on the third insulating interlayer; a fourth insulating interlayer formed on the third insulating interlayer including the third metal line, to be disposed in the peripheral driving part; and a fourth metal line formed on the fourth insulating interlayer.

Abstract: A method for producing a semiconductor entity is described. The method includes providing a donor substrate having a zone of weakness at a predetermined depth to define a thin layer, and the donor substrate includes a bonding interface. A receiver substrate is also provided that includes at least one motif on its surface. The technique further includes bonding the donor substrate at the bonding interface to the at least one motif on the receiver substrate, and supplying sufficient energy to detach a portion of the thin layer from the donor substrate located at the at least one motif and to rupture bonds within the thin layer. The energy thus supplied is insufficient to rupture the bond at the bonding interface. Also described is fabrication of a wafer and the use of the method to produce chips suitable for use in electronics, optics, or optoelectronics applications.

Abstract: Techniques for electronic device fabrication are provided. In one aspect, an electronic device is provided. The electronic device comprises at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein, the at least one interposer structure being configured to allow for one or more of the plurality of decoupling capacitors to be selectively deactivated. In another aspect, a method of fabricating an electronic device comprising at least one interposer structure having one or more vias and a plurality of decoupling capacitors integrated therein comprises the following step. One or more of the plurality of decoupling capacitors are selectively deactivated.

Abstract: A dicing die-bonding film has a supporting substrate, an adhesive layer formed on the supporting substrate, and a die-bonding adhesive layer formed on the adhesive layer, and further has a mark for recognizing the position of the die-bonding adhesive layer. It is possible to provide a dicing die-bonding film in which in the case a semiconductor wafer and the dicing die-bonding film are stuck onto each other, the position of the die-bonding adhesive layer in the film can be recognized.

Abstract: A semiconductor device may be created using multiple metal layers and a layer including programmable vias that may be used to form various patterns of interconnections among segments of metal layers. The programmable vias may be formed of materials whose resistance is changeable between a high-resistance state and a low-resistance state.

Abstract: A package includes a sensor die with a micro component, such as a MEMS device, coupled to an integrated circuit which may include, for example, CMOS circuitry, and one or more electrically conductive bond pads near the periphery of the sensor die. A semiconductor cap structure is attached to the sensor die. The front side of the cap structure is attached to the sensor die by a seal ring to hermetically encapsulate an area of the sensor die where the micro component is located. The bond pads on the sensor die are located outside the area encapsulated by the seal ring. Electrical leads, which extend along outer side edges of the semiconductor cap structure from its front side to its back side, are coupled to the micro component via the bond pads.

Abstract: A method for depositing a seed layer for a controllable electric pathway on a substrate includes selectively dispensing a seed material from an inkjet material dispenser onto said substrate.

Abstract: A method of dividing a wafer having a plurality of devices, which are formed in a plurality of areas sectioned by streets formed in a lattice pattern on the front surface, and having test metal patterns which are formed on the streets, comprising the steps of: a laser beam application step for carrying out laser processing to form a dividing start point along a street on both sides of the test metal patterns by applying a laser beam along the street on both sides of the test metal patterns in the street formed on the wafer; and a dividing step for dividing the wafer which has been laser processed to form dividing start points along the dividing start points by exerting external force to the wafer, resulting in leaving the streets having the test metal patterns formed thereon behind.

Abstract: A thermally conductive protective film or layer is applied to the backside surface of a semiconductor wafer prior to a subsequent dicing operation performed on the wafer to singulate the wafer into diced semiconductor chips, during which the thin thermally conductive film minimizes and prevents chipping and cracking damage to the wafer and diced chips. During subsequent electrical operation of a diced chip, the thin thermally conductive film functions as a thermal conductor to dissipate and conduct away to a heat sink any heat generated during operation of the chip.

Abstract: A thin film transistor array substrate and method for repairing the same are provided. Repairing lines are formed when the data lines on the thin film transistor array substrate are defined. Furthermore, the protruding portions and branches of common lines overlap with the repairing lines and the data lines respectively. The repairing method includes performing a laser welding operation to connect the common line with the data line, the repairing line or a scan line as well as removing a portion of the lines by laser. Thus, the thin film transistor array substrate and repairing method thereof can repair line defects and increase the manufacturing yield.

Abstract: A process is disclosed for creating semiconductor devices such as RFID assemblies wherein an array of dies mounted to a substrate is spaced apart at a first pitch, and the substrate is removed after the positions of the dies in the array is fixed by a solidifiable substance. The solidifiable substance is then removed without changing the relative positions of the dies in the array. All or a selected portion of the array of dies is then electrically attached to a plurality of straps or interposers arranged in a corresponding array. The spacing, or pitch, between the dies in the die array may be changed before or after the substrate is removed to match the pitch of the straps or interposers in the corresponding array. An RFID device created using the process inventive is also disclosed.

Abstract: A laser beam processing method comprising the step of processing-feeding a wafer having devices which are formed in a large number of areas sectioned by streets arranged in a lattice pattern on the front surface while a laser beam capable of passing through the wafer is applied to the wafer to form deteriorated layers along the streets in the inside of the wafer, wherein the laser beam is applied at a predetermined angle toward a direction intersecting at right angles to the processing-feed direction relative to a direction perpendicular to the laser beam applied surface of the wafer.

Abstract: A plurality of semiconductor chips is mounted on a surface of a substrate to be used for manufacturing semiconductor devices. The semiconductor chips are collectively sealed with resin, thereby forming resin-sealed sections. A plurality of solder balls are formed on the back surface of the substrate such that an interval A between the corresponding solder balls of adjacent semiconductor chips becomes “n” times (“n” is an integer greater than 1) an interval B between the solder balls on the semiconductor chip. After the semiconductor chips have been subjected to an electrical test, the resin-sealed sections and the substrate are sliced, thus breaking the semiconductor chips into pieces.

Abstract: A separation method by which a semiconductor package assemblage is cut in a predetermined width W1 along streets arranged in a lattice pattern to separate the semiconductor package assemblage into a plurality of semiconductor packages, the semiconductor package assemblage including a metallic frame having metallic die pads of a predetermined thickness placed in a plurality of rectangular regions defined by the streets, and metallic electrodes of a predetermined thickness placed in the streets and extending in the width direction of the streets, one surface of each die pad and one surface of each electrode being exposed on one surface of the semiconductor package assemblage, whereby each electrode has an intermediate portion in the extending direction removed, and has opposite end portions annexed to the adjacent semiconductor packages.

Abstract: A method of dividing a wafer having a plurality of first dividing lines and a plurality of second dividing lines perpendicular to the plurality of first dividing lines formed on the front surface, into individual chips along the plurality of first dividing lines and the plurality of second dividing lines, comprising the steps of a deteriorated layer forming step for applying a laser beam capable of passing through the wafer along the first and second dividing lines to form a deteriorated layer in the inside of the wafer; an expansion sheet affixing step for putting the wafer on the surface of an expandable expansion sheet having an adhesive which is cured by applying an external stimulus on the surface; a first sheet expanding step for dividing the wafer into a plurality of belt-like pieces along the first dividing lines by expanding the expansion sheet in direction perpendicular to the first dividing lines and forming a space between adjacent belt-like pieces; an adhesive curing step for curing the adhesive

Abstract: A method for producing an electronic component, especially a memory chip, using a laser-induced correction to equalize an integrated circuit by means of at least one laser via in a layer at least partially covering the circuit. The component comprises a rewiring of the contact pads. The inventive method comprises the following steps: each laser via is closed by means of a separate covering layer which is to be applied locally; a rewiring extending between the local covering layers is created; the local covering layers are removed; and the laser-induced correction is carried out by means of the open laser vias.

Abstract: A method and apparatus of fabricating a semiconductor device by back grinding and dicing is disclosed. The method may include at least adhering a protection tape for back grinding on a front surface of a semiconductor wafer, back grinding a rear surface of the semiconductor wafer while the protection tape faces downward, loading the semiconductor wafer to dicing equipment when the front surface having the protection tape faces downward, detecting a dicing position formed on the front surface of the semiconductor wafer, and dicing the semiconductor wafer with the protection tape adhering thereon into individual semiconductor chips in accordance with the detected dicing position. The dicing equipment may have a transparent aligning part for aligning the semiconductor wafer and a chuck part for supporting the semiconductor wafer.

Abstract: A dicing die-bonding film has a supporting substrate, an adhesive layer formed on the supporting substrate, and a die-bonding adhesive layer formed on the adhesive layer, and further has a mark for recognizing the position of the die-bonding adhesive layer. It is possible to provide a dicing die-bonding film in which in the case a semiconductor wafer and the dicing die-bonding film are stuck onto each other, the position of the die-bonding adhesive layer in the film can be recognized.

Abstract: In a production method of an electron source wherein a plurality of electron-emitting devices are connected by and driven by matrix wirings, the upper wiring of the matrix wiring is partially removed at a short circuit region at a cross portion between the matrix wirings, thereby removing the short circuit and effectively repairing an electrical connecting relation of the matrix wirings.

Abstract: Methods for repairing an electrical circuit; compositions, inks and equipment for making such repairs; and repair structures formed by the methods. The method generally includes the steps of: (a) depositing a composition comprising nanoparticles of an electrically functional material such that it contacts first and second elements of the circuit; and (b) sufficiently irradiating at least part of the composition with light to fuse or bind the nanoparticles to each other. The composition and ink generally comprise such nanoparticles and a sensitizer having a light absorption maximum at a wavelength different from that of the nanoparticles. The apparatus comprises: (1) a deposition apparatus configured to deposit a liquid film of an electrically functional material on the circuit; (2) a light source configured to irradiate at least part of the thin film; and (3) a table configured to secure the substrate.

Abstract: A thin film transistor array substrate and method for repairing the same are provided. Repairing lines are formed when the data lines on the thin film transistor array substrate are defined. Furthermore, the protruding portions and branches of common lines overlap with the repairing lines and the data lines respectively. The repairing method includes performing a laser welding operation to connect the common line with the data line, the repairing line or a scan line as well as removing a portion of the lines by laser. Thus, the thin film transistor array substrate and repairing method thereof can repair line defects and increase the manufacturing yield.

Abstract: An anti-warpage backgrinding tape (11) is secured to the circuit side (12) of a semiconductor wafer (14). The backside (16) of the wafer is background. The backside of the wafer is secured to dicing tape (18) so that the anti-warpage backgrinding tape is exposed. The wafer is diced to create individual die structure (34). The die structure comprises semiconductor die (22) with anti-warpage tape elements (36) on circuit sides of the semiconductor die. A die structure is removed from the dicing tape. The backside of the die of the die structure is adhered to a substrate (24). The anti-warpage tape element is removed from the die. The anti-warpage backgrinding tape is preferably partially or fully transparent to permit sensing of guide markings on the wafer during wafer dicing. The adhesive is preferably a curable adhesive. The adhesion between the anti-warpage tape element and the chosen die may be reduced by the application of heat (38).

Abstract: The present invention relates to a method for dividing a substrate into a number of individual chip parts, comprising the steps of: forming a number of chip parts in the substrate, comprising, for each chip part, of arranging recesses in the substrate for containing fluid; arranging one or more breaking grooves in the substrate along individual chip parts; applying mechanical force to the substrate to break the substrate along the breaking grooves. The invention also relates to a substrate as well as a chip part.

Abstract: A method of manufacturing a hybrid integrated circuit device includes the steps of forming a plurality of units each including a conductive pattern on a surface of a board made of metal, forming grooves along boundaries of the respective units of the board, electrically connecting circuit elements to the conductive patterns in the respective units, separating the respective circuit boards by dividing the board along the grooves, and flattening side surfaces of the circuit boards by pressing the side surfaces.

Abstract: The present invention provides to a substrate for a semiconductor device, in which electric characteristics to high-speed signals are enhanced by facilitating the mounting of a circuit component, such as a decoupling capacitor, fabricated separately from the substrate. The substrate (30) for a semiconductor device, on which the circuit component (50), such as a decoupling capacitor, can be mounted, is counterbored from the mounting surface side thereof, and a component mounting hole (32) where a connection terminal (23a), which will be electrically connected to the circuit component (50), is exposed in the inner bottom face is made by counterboring. The circuit component (50) is mounted and electrically connected to the connection terminal (23a), and a semiconductor element (10) is mounted on the substrate by flip-chip connection.

Abstract: A method and system for locally processing a predetermined microstructure formed on a substrate without causing undesirable changes in electrical or physical characteristics of the substrate or other structures formed on the substrate are provided. The method includes providing information based on a model of laser pulse interactions with the predetermined microstructure, the substrate and the other structures. At least one characteristic of at least one pulse is determined based on the information. A pulsed laser beam is generated including the at least one pulse. The method further includes irradiating the at least one pulse having the at least one determined characteristic into a spot on the predetermined microstructure. The at least one determined characteristic and other characteristics of the at least one pulse are sufficient to locally process the predetermined microstructure without causing the undesirable changes.

Abstract: A method of forming an ultra-thin wafer level stack package and structure thereof are provided. The method includes providing a first wafer having a plurality of base chips thereon, selectively binding the first wafer to a second substrate, lapping the first wafer to reduce its thickness, dicing the lapped first wafer, bonding a plurality stack chips to each base chip and packaging the base chip with the bonded stack chips to form an IC package. Thus, each IC package comprises at least a base chip and a stack chip. The IC package has a size almost identical to the base chip and a thickness a little larger than the combined thickness of the base chip and the stack chip. If a known good die inspection of the base chips and stack chips are carried out prior to wafer level packaging, overall yield of the IC package is increased.

Abstract: A manufacturing method for a crystalline semiconductor material including a plurality of semiconductor crystal grains is provided. The manufacturing method includes forming an amorphous or polycrystalline semiconductor layer on a substrate having a flat surface; forming a plurality of projections each having a side wall surface substantially perpendicular to the flat surface of the substrate, a height set in the range of about 1 nm to less than or equal to about ¼ of the thickness of the semiconductor layer, and a lateral dimension set in the range of about 3 ?m to about 18 ?m in a direction parallel to the flat surface of the substrate; and heating the semiconductor layer a number of times by using a pulsed laser thereby forming the crystalline semiconductor material including the crystal grains each having a specific plane orientation with respect to a direction perpendicular to the flat surface of the substrate so that the crystal grains respectively correspond to the projections.

Abstract: Embodiments of methods, apparatuses, devices, and/or systems for forming an interconnect are described.

Abstract: A method for producing a semiconductor entity is described. The method includes providing a donor substrate having a zone of weakness at a predetermined depth to define a thin layer, and the donor substrate includes a bonding interface. A receiver substrate is also provided that includes at least one motif on its surface. The technique further includes bonding the donor substrate at the bonding interface to the at least one motif on the receiver substrate, and supplying sufficient energy to detach a portion of the thin layer from the donor substrate located at the at least one motif and to rupture bonds within the thin layer. The energy thus supplied is insufficient to rupture the bond at the bonding interface. Also described is fabrication of a wafer and the use of the method to produce chips suitable for use in electronics, optics, or optoelectronics applications.

Abstract: To provide a pattern forming method enabling a thin film to be patterned with high precision by easy and low cost techniques. A thin film 2 is provided on a base material 1 containing a sublimable dyestuff, light is irradiated to the base material 1, and heat generated by the light irradiation sublimates the sublimable dyestuff in a desired region, thereby removing the thin film 2 corresponding to an irradiation region where the light is irradiated to thereby pattern this thin film 2.

Abstract: An apparatus for cutting at least one thin layer from a substrate or ingot forming element for an electronic or optoelectronic or optical component or sensor. This apparatus includes a device for directing a pulse of energy into the substrate or forming element wherein the pulse has a duration shorter than or of the same order as that needed by a sound wave to pass through the thickness of the weakened zone, and the energy of the pulse is sufficient to cause cleavage to take place in the weakened zone as the energy of the pulse is absorbed therein. The apparatus also includes an assembly for holding or orienting the substrate or ingot forming element so that the energy pulse is completely uniformly directed over the entire surface, through the face and into the substrate or ingot forming element to cause cleavage to take place in the weakened zone as the energy of the pulse is absorbed therein.

Abstract: An array test is performed during the process of panel formation, such as at a stage where a driving TFT which supplies a drive current for an organic EL element is completed and an anode of the organic EL element has been formed on the TFT. Then, with regard to a defective pixel, a line connecting the driving TFT and the anode is disconnected using a laser. After the line has been thus disconnected, a planarization insulating film is formed, and this film fills the holes caused by the laser irradiation. It is thus possible to suppress deterioration of pixels and also effectively darken a defective pixel using laser.

Abstract: To provide a pattern forming method enabling a thin film to be patterned with high precision by easy and low cost techniques. A thin film 2 is provided on a base material 1 containing a sublimable dyestuff, light is irradiated to the base material 1, and heat generated by the light irradiation sublimates the sublimable dyestuff in a desired region, thereby removing the thin film 2 corresponding to an irradiation region where the light is irradiated to thereby pattern this thin film 2.

Abstract: In a thin film transistor (TFT) including an insulating substrate and a polycrystalline silicon island formed on the insulating layer, a grain size of the polycrystalline silicon island is elongated along one direction. A source region, a channel region and a drain region are arranged in the polycrystalline silicon island in parallel with the direction.

Abstract: A method is described for repairing failure points, regions or locations in an electronic device to have a perfect function when a semiconductor device including an LCD of other electronic device has defects. Described is a method of transferring a single or multi-layer thin film piece into a recess with the physical properties of the thin film piece unchanged. An electronic device is described incorporating a substrate; and a plurality of thin films laminated on the substrate and part of the thin films are formed on a predetermined circuit pattern, wherein a transfer film for repairing a defect is fitted into a recess where the low layers of the thin films are exposed by removing part of a single or multi-layer thin films covering a defective portion included on the thin films and its surrounding portion.

Abstract: A patterned, multi-layered thin film structure is patterned using ultra-fast lasers and absorption spectroscopy without damaging underlying layers of the layered structure. The structure is made by selecting ablatable layers based on their thermal, strength and absorption spectra and by using an ultra-fast laser programmed with the appropriate wavelength (?), pulse width (?), spectral width (??), spot size, bite size and fluence. The end structure may have features (such as vias, insulating areas, or inkjet printed areas) patterned in the last (top) layer applied or at deeper layers within the layered structure, and can be used as components of organic light emitting didoes (OLEDs) and organic thin film transistors (OTFTs). The method of the present invention includes determining the product's specifications, providing a substrate, selecting a layer, applying the layer, patterning the layer and determining if more layers need to be added to the multi-layered thin film structure.

Abstract: Embodiments of the invention use silicon on porous silicon wafers to produce a reduced-thickness IC device wafers. After device manufacturing, a temporary support is bonded to the device layer. The uppermost silicon layer is then separated from the silicon substrate by splitting the porous silicon layer. The porous silicon layer and temporary support are then removed and packaging is completed. Embodiments of the invention provide reliable, low cost methods and apparatuses for producing reduced-thickness IC device wafers to substantially increase thermal conductivity between the device layer of an IC device and a heat sink. In alternative embodiments, the layered silicon substrate includes an insulator layer on a layer of porous silicon and a silicon layer on the insulator layer.

Abstract: A semiconductor chip is formed by dividing a semiconductor wafer by use of the laser dicing technique. The semiconductor chip has a laser dicing region on the side surface thereof. A dummy wiring layer is formed along the laser dicing region on the surface layer of the laser dicing region. A laser beam is applied to the dummy wiring layer to divide the semiconductor wafer.