Abstract: A polysilicon thin film transistor device includes a gate metal pattern including a gate electrode and a gate line formed on a substrate, the gate metal pattern having a stepped portion, a gate insulating film formed on the gate metal pattern, a polysilicon semiconductor layer formed on the gate insulating film, the polysilicon semiconductor layer including an active region, lightly doped drain regions, a source region, and a drain region, a source electrode connected to the source region and a drain electrode connected to the drain region on the polysilicon semiconductor layer, and a pixel electrode connected with the drain electrode.

Abstract: A thin film transistor (TFT) and a flat panel display device including the same. The TFT includes a substrate, a gate electrode formed over the substrate, the gate electrode formed with silicon doped with impurities, a gate wiring connected to the gate electrode, an active layer formed over the gate electrode, and source and drain electrodes connected to the active layer. According to such a structure, since heat flow to the gate electrode during crystallization of the active layer may be prevented, stable crystallization of the active layer may be performed, and thus an error rate of a product may be decreased.

Abstract: A thin film transistor, a display device and a liquid crystal display device are provided. The thin film transistor includes a gate electrode film onto which light from a light source is irradiated, a semiconductor film formed on the gate electrode film and on an opposite side to the light source side through an insulating film, first and second electrode films formed to be in electrical contact with the semiconductor film, and a first shielding film formed in a same layer as the gate electrode film and electrically isolated from the gate electrode film, wherein the first shielding film overlaps a part of the semiconductor film as seen from the light irradiation direction and also overlaps at least a part of the first electrode film as seen from the light irradiation direction.

Abstract: A method of forming a polycrystalline silicon layer includes forming a first amorphous silicon layer and forming a second amorphous silicon layer such that the first amorphous silicon layer and the second amorphous silicon layer have different film qualities from each other, and crystallizing the first amorphous silicon layer and the second amorphous silicon layer using a metal catalyst to form a first polycrystalline silicon layer and a second polycrystalline silicon layer. A thin film transistor includes the polycrystalline silicon layer formed by the method and an organic light emitting device includes the thin film transistor.

Abstract: To reduce parasitic capacitance between a gate electrode and a source electrode or drain electrode of a dual-gate transistor. A semiconductor device includes a first insulating layer covering a first conductive layer; a first semiconductor layer, second semiconductor layers, and an impurity semiconductor layer sequentially provided over the first insulating layer; a second conductive layer over and at least partially in contact with the impurity semiconductor layer; a second insulating layer over the second conductive layer; a third insulating layer covering the three semiconductor layers, the second conductive layer, and the second insulating layer; and a third conductive layer over the third insulating layer. The third conductive layer overlaps with a portion of the first semiconductor layer, which does not overlap with the second semiconductor layers, and further overlaps with part of the second conductive layer.

Abstract: An array substrate includes a substrate, an organic layer, a via hole, an inorganic layer, and a patterned transparent pixel electrode layer. The thin film transistor is disposed on the substrate, and the thin film transistor comprises a drain electrode. The organic material layer covers the substrate and the thin film transistor. The via hole penetrates the organic material layer and exposes the drain electrode. The inorganic material layer covers at least a sidewall of the via hole and a part of the organic material layer, and exposes the drain electrode through the via hole. The patterned transparent pixel electrode layer is disposed on the first inorganic material layer and in the via hole, and the patterned transparent pixel electrode layer contacts the drain electrode.

Abstract: The present invention has an object to provide an active-matrix liquid crystal display device that realizes the improvement in productivity as well as in yield. In the present invention, a laminate film comprising the conductive film comprising metallic material and the second amorphous semiconductor film containing an impurity element of one conductivity type and the amorphous semiconductor film is selectively etched with the same etching gas to form a side edge of the first amorphous semiconductor film 1001 into a taper shape. Thereby, a coverage problem of a pixel electrode 1003 can be solved and an inverse stagger type TFT can be completed with three photomask. Selected figure is FIG. 15.

Abstract: Disclosed is a semiconductor device provided with the following: an active layer 6 formed on a substrate 1 having a channel region 6c, a first region 6a located on one side of the channel region 6c, and a second region 6b located on the other side of the channel region 6c; a contact formation layer 8 that is formed on the active layer 6 and that has a separation region 9, a first contact region 8a, and a second contact region 8b, the latter two of which are located on the first region 6a and the second region 6b of the active layer, respectively; a first electrode 10 electrically connected to the first region 6a through the first contact region 8a; a second electrode 11 electrically connected to the second region 6b through the second contact region 8b; and a gate electrode 2 provided with respect to the active layer 6 through a gate insulating layer 4.

Abstract: A method of fabricating a TFT includes providing a substrate where a gate, an insulating layer, and a channel layer are formed. A conductive layer is formed on the substrate to cover the channel layer and the insulating layer. A photoresist layer is formed on the conductive layer. A photo mask is placed above the photoresist layer and has a data line pattern, a source pattern, and a drain pattern. A first width (W1) between the source pattern and the drain pattern and a second width (W2) of the data line pattern satisfy the following: if W1?1(um), then W2+a(um), and 0.3<a<0.7. An exposing process is performed by using the photo mask, and a development process is performed to pattern the photoresist layer. The conductive layer is patterned by using the photoresist layer as an etching mask to form a source, a drain, and a data line.

Abstract: Disclosed is a transistor structure including: a first thin film transistor including, a first gate electrode; a first insulating film which covers the first gate electrode; and a first semiconductor film formed on the first insulating film in a position corresponding to the first gate electrode; and a second thin film transistor including, a second semiconductor film formed on the first insulating film; a second insulating film which covers the second semiconductor film; and a second gate electrode formed in a position corresponding to a channel portion of the second semiconductor film on the second insulating film, wherein the first semiconductor film and the second semiconductor film include a first portion on the first insulating film side and a second portion on the opposite surface side, and one of the first portion or the second portion has a higher degree of crystallization of silicon compared to the other.

Abstract: The invention provides a thin film transistor that can improve its operating speed by improving crystallinity near a bottom surface of a channel layer. Of laser light irradiated onto an amorphous silicon layer, light transmitted through the amorphous silicon layer is absorbed by a gate electrode 130 and thereby produces heat. Since the gate electrode 130 is made of a titanium layer 102 with a low thermal conductivity, the produced heat is less likely to be transmitted through a gate wiring line 110 and dissipated and thus increases the temperature of the gate electrode 130. Radiant heat from the gate electrode 130 is provided to a bottom surface of the amorphous silicon layer and thus the amorphous silicon layer is also heated from its bottom surface. As a result, an amorphous silicon layer 106a melts not only from its top surface but also from its bottom surface and is solidified, whereby crystallization proceeds, and thus, the amorphous silicon layer 106a turns into a polycrystalline silicon layer 106b.

Abstract: A method of manufacturing a display device includes forming a gate electrode on a substrate, a gate insulating layer on the gate electrode, and an active layer on the gate insulating layer, the gate electrode made of extrinsic polycrystalline silicon, the active layer made of intrinsic polycrystalline silicon; forming an etch stopper on the active layer; forming source and drain electrodes spaced apart from each other on the etch stopper; forming an ohmic contact layer each between a side of the active layer and the source electrode and between an opposing side of the active layer and the drain electrode; forming a gate line connected to the gate electrode; and forming a data line crossing the gate line.

Abstract: Provided are a thin film transistor substrate having a transparent electroconductive film in which residues and so on resulting etching are hardly generated; a process for producing the same; and a liquid crystal display using this thin film transistor substrate. A thin film transistor substrate, comprising a transparent substrate, a source electrode formed over the transparent substrate, a drain electrode formed over the transparent substrate, and a transparent pixel electrode formed over the transparent substrate, wherein the transparent pixel electrode is a transparent electroconductive film which is made mainly of indium oxide, and further comprises one or two or more oxides selected from tungsten oxide, molybdenum oxide, nickel oxide and niobium oxide, and the transparent pixel electrode is electrically connected to the source electrode or the drain electrode; a process for producing the same; and a liquid crystal display using this thin film transistor substrate.

Abstract: The present invention relates to a semiconductor device including a thin film transistor comprising a microcrystalline semiconductor which forms a channel formation region and includes an acceptor impurity element, and to a manufacturing method thereof. A gate electrode, a gate insulating film formed over the gate electrode, a first semiconductor layer which is formed over the gate insulating film and is formed of a microcrystalline semiconductor, a second semiconductor layer which is formed over the first semiconductor layer and includes an amorphous semiconductor, and a source region and a drain region which are formed over the second semiconductor layer are provided in the thin film transistor. A channel is formed in the first semiconductor layer when the thin film transistor is placed in an on state.

Abstract: An object is to reduce off-current of a thin film transistor. Another object is to improve electric characteristics of a thin film transistor. Further, it is still another object to improve image quality of a display device using the thin film transistor. An aspect of the present invention is a thin film transistor including a semiconductor film formed over a gate electrode and in an inner region of the gate electrode which does not reach an end portion of the gate electrode, with a gate insulating film interposed therebetween, a film covering at least a side surface of the semiconductor film, and a pair of wirings over the film covering the side surface of the semiconductor film; in which an impurity element serving as a donor is added to the semiconductor film.

Abstract: A display device includes source/drain electrodes on a substrate, a pixel electrode, an insulating partition wall layer, a channel-region semiconductor layer. The source/drain electrodes and the pixel electrode are formed on the substrate and in contact with each other. The insulating partition wall layer is formed on the substrate and provided with a first opening extending to between the source electrode and the drain electrode and a second opening formed on the pixel electrode and extending to the pixel electrode. The channel-region semiconductor layer is formed on the bottom of the first opening. The insulating film is formed on the partition wall layer so as to cover the first opening including the channel-region semiconductor layer. The oriented film covers the first opening from above the insulating film and the second opening from the pixel electrode.

Abstract: A thin film transistor has a gate electrode; a gate insulating layer provided so as to cover the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions which is provided so that at least part of each of them overlaps the gate electrode layer and which are provided with a space therebetween; a microcrystalline semiconductor layer provided over the gate insulating layer in part of a channel length; a semiconductor layer provided over the gate insulating layer so as to cover at least the microcrystalline semiconductor layer; and an amorphous semiconductor layer provided between the semiconductor layer and the pair of impurity semiconductor layers. An impurity element which reduces the coordination number of silicon and generates dangling bonds is made to exist in the semiconductor layer.

Abstract: Provided is a metallic wiring film which is not peeled away even when exposed to a hydrogen plasma. A metallic wiring film is constituted by an adhesion layer containing copper, Ca, and oxygen and a low-resistance metal layer (a layer of a copper alloy or pure copper) having a lower resistance than the adhesion layer. When the adhesion layer is composed of a copper alloy, which contains Ca and oxygen, and a source electrode film and a drain electrode film adhering to an ohmic contact layer are constituted by the adhesion layer, even if the adhesion layer is exposed to the hydrogen plasma, a Cu-containing oxide formed at an interface between the adhesion layer and the ohmic contact layer is not reduced, so that no peeling occurs between the adhesion layer and a silicon layer.

Abstract: In an inverted staggered thin film transistor, a microcrystalline silicon film and a silicon carbide film are provided between a gate insulating film and wirings serving as a source wiring and a drain wiring. The microcrystalline silicon film is formed on the gate insulating film side and the silicon carbide film is formed on the wiring side. In such a manner, a semiconductor device having favorable electric characteristics can be manufactured with high productivity.

Abstract: An electric-field blocking film is provided between a BL insulation film and BL insulation film of a transistor, and a blocking film includes those three layers. The electric-field blocking film blocks an electric field produced by a drain electrode, a source electrode, and an n+-Si film. Even if misalignment of the drain electrode, the source electrode, and the n+-Si film in each drive transistor varies to make a portion overlying an i-Si film larger, therefore, the electric field at this portion is blocked by the electric-field blocking film, thereby making a variation in characteristic smaller.

Abstract: A gate electrode is formed by forming a first conductive layer containing aluminum as its main component over a substrate, forming a second conductive layer made from a material different from that used for forming the first conductive layer over the first conductive layer; and patterning the first conductive layer and the second conductive layer. Further, the first conductive layer includes one or more selected from carbon, chromium, tantalum, tungsten, molybdenum, titanium, silicon, and nickel. And the second conductive layer includes one or more selected from chromium, tantalum, tungsten, molybdenum, titanium, silicon, and nickel, or nitride of these materials.

Abstract: It is an object to provide a liquid crystal display device including a thin film transistor with high electric characteristics and high reliability. As for a liquid crystal display device including an inverted staggered thin film transistor of a channel stop type, the inverted staggered thin film transistor includes a gate electrode, a gate insulating film over the gate electrode, a microcrystalline semiconductor film including a channel formation region over the gate insulating film, a buffer layer over the microcrystalline semiconductor film, and a channel protective layer which is formed over the buffer layer so as to overlap with the channel formation region of the microcrystalline semiconductor film.

Abstract: A thin film transistor (TFT), a method of fabricating the same, and an organic light emitting diode (OLED) display device having the TFT, the TFT including a substrate, a gate electrode disposed on the substrate, a gate insulating layer disposed on the gate electrode, a semiconductor layer disposed on the gate insulating layer and crystallized using a metal catalyst, and source and drain electrodes disposed on the semiconductor layer and electrically connected to source and drain regions of the semiconductor layer. A second metal is diffused into a surface region of the semiconductor layer, to getter the metal catalyst from a channel region of the semiconductor layer. The second metal can have a lower diffusion coefficient in silicon than the metal catalyst.

Abstract: A thin film transistor includes a gate electrode, a gate insulation layer on the gate electrode, source and drain electrodes formed on the gate insulation layer, a polysilicon channel layer overlapping the ohmic contact layers and on the gate insulation layer between the source and drain electrodes, ohmic contact regions over the source and drain electrodes for contacting the polysilicon channel to the source and drain electrodes, and doping layers over the source and drain electrodes.

Abstract: This thin-film transistor includes adhesive strength enhancing films between a barrier film and electrode films. Each of the adhesive strength enhancing film is composed of two zones including (a) a pure copper zone that is formed on the electrode film side, and (b) a component concentrated zone that is formed in an interface portion contact with the barrier film, and that includes Cu, Ca, oxygen, and Si as constituents. In concentration distributions of Ca and oxygen in a thickness direction of the component concentrated zone, a maximum content of Ca of a Ca-containing peak is in a range of 5 to 20 at %, and a maximum content of oxygen of an oxygen-containing peak is in a range of 30 to 50 at %, respectively.

Abstract: The present invention discloses a method for manufacturing a display device comprising the steps of forming a first film pattern using a photosensitive material over a substrate, forming a second film pattern in such a way that the first film pattern is exposed by being irradiated with a laser beam, modifying a surface of the second film pattern into a droplet-shedding surface, forming a source electrode and a drain electrode by discharging a conductive material to an outer edge of the droplet-shedding surface by a droplet-discharging method, and forming a semiconductor region, a gate-insulating film, and a gate electrode over the source electrode and the drain electrode.

Abstract: A semiconductor device can easily reduce a leak current which flows when a reversely-staggered-type TFT element in which an active layer is made of polycrystalline semiconductor is turned off. The semiconductor device includes a reversely-staggered-type TFT element in which a semiconductor layer, a source electrode and a drain electrode are arranged on a surface of an insulation film, and a portion of the source electrode and a portion of the drain electrode respectively get over the semiconductor layer.

Abstract: A method of manufacturing a thin film transistor and a thin film transistor, the method including sequentially forming a gate insulating layer, an amorphous silicon layer and an insulating layer on an entire top surface of a substrate having a gate electrode; patterning the insulating layer to form an etch stopper; and patterning the amorphous silicon layer to form a semiconductor layer.

Abstract: In a thin film transistor, a gate insulating layer is formed on a gate electrode formed on an insulating substrate. Formed on the gate insulating layer is a semiconductor layer. Formed on the semiconductor layer are a source electrode and a drain electrode. A protective layer covers them, so that the semiconductor layer is blocked from an atmosphere. The semiconductor layer (active layer) is made of, e.g., a semiconductor containing polycrystalline ZnO to which, e.g., a group V element is added. This allows practical use of a semiconductor device which has an active layer made of zinc oxide and which includes an protective layer for blocking the active layer from an atmosphere.

Abstract: A thin film transistor substrate, wherein the moving area of electrons between source and drain electrodes of a thin film transistor (TFT) is minimized, the moving distance of electrons is increased, and the sizes of capacitors defined by a gate electrode together with the respective source and drain electrodes are identical to each other so that an off current generated when the TFT is off can be minimized; a method of manufacturing the thin film transistor substrate; and a mask for manufacturing the thin film transistor substrate. Accordingly, it is possible to minimize an off current induced due to a phenomenon of electron trapping by light.

Abstract: A method for making a semiconductor apparatus including the steps of: forming a laminate structure of an insulating film made of a metal oxide and a semiconductor thin film on a substrate; forming a light absorption layer on top of the laminate structure; and irradiating an energy beam of a wavelength capable of being absorbed by the light absorption layer on the light absorption layer and simultaneously crystallizing the insulating film and the semiconductor thin film by means of heat generated in the light absorption layer.

Abstract: Embodiments of the present invention relate to methods for depositing an amorphous film that may be suitable for using in a NIP photodiode in display applications. In one embodiment, the method includes providing a substrate into a deposition chamber, supplying a gas mixture having a hydrogen gas to silane gas ratio by volume greater than 4 into the deposition chamber, maintaining a pressure of the gas mixture at greater than about 1 Torr in the deposition chamber, and forming an amorphous silicon film on the substrate in the presence of the gas mixture, wherein the amorphous silicon film is configured to be an intrinsic-type layer in a photodiode sensor.

Abstract: Provided are a display device, a thin-film transistor (TFT) substrate, and a method of fabricating the TFT substrate. The method includes: forming a gate electrode on a pixel region of a substrate; forming a gate insulating film on the gate electrode; forming a semiconductor layer on the gate insulating film to overlap the gate electrode; forming a source electrode and a drain electrode to overlap the semiconductor layer and thus form a channel region; and forming a data insulating film on the source electrode and the drain electrode and patterning the data insulating film such that part of a contact hole formed in the data insulating film overlaps the channel region.

Abstract: It is an object of the present invention to provide a liquid crystal display device which has a wide viewing angle and less color-shift depending on an angle at which a display screen is seen and can display an image favorably recognized both outdoors in sunlight and dark indoors (or outdoors at night). The liquid crystal display device includes a first portion where display is performed by transmission of light and a second portion where display is performed by reflection of light. Further, a liquid crystal layer includes a liquid crystal molecule which rotates parallel to an electrode plane when a potential difference is generated between two electrodes of a liquid crystal element provided below the liquid crystal layer.

Abstract: A thin film transistor array panel includes: a substrate; a signal line disposed on the substrate and including copper (Cu); a passivation layer disposed on the signal line and having a contact hole exposing a portion of the signal line; and a conductive layer disposed on the passivation layer and connected to the portion of the signal line through the contact hole, wherein the passivation layer includes an organic passivation layer including an organic insulator that does not include sulfur, and a method of manufacturing the thin film transistor prevents formation of foreign particles on the signal line.

Abstract: A thin film transistor (TFT) and a method of fabricating the same are disclosed. The TFT includes a substrate, a gate electrode disposed over the substrate, a gate insulating layer disposed over the gate electrode, a semiconductor layer disposed over the gate insulating layer and including a polycrystalline silicon (poly-Si) layer, an ohmic contact layer disposed over a predetermined region of the semiconductor layer, an insulating interlayer disposed over substantially an entire surface of the substrate including the ohmic contact layer, and source and drain electrodes electrically connected to the ohmic contact layer through contact holes formed in the interlayer insulating layer. A barrier layer is interposed between the semiconductor layer and the ohmic contact layer. Thus, when an off-current of a bottom-gate-type TFT is controlled, degradation of characteristics due to a leakage current may be prevented using a simple process.

Abstract: A semiconductor device having a pair of impurity doped second semiconductor layers, formed on a first semiconductor layer having a channel formation region therein, an outer edge of the first semiconductor film being at least partly coextensive with an outer edge of the impurity doped second semiconductor layers. The semiconductor device further includes source and drain electrodes formed on the pair of impurity doped second semiconductor layers, wherein the pair of impurity doped second semiconductor layers extend beyond inner sides edges of the source and drain electrodes so that a stepped portion is formed from an upper surface of the source and drain electrodes to a surface of the first semiconductor film.

Abstract: A metallic wiring film, which is not exfoliated even when exposed to plasma of hydrogen, is provided. A metallic wiring film is constituted by an adhesion layer in which Al is added to copper and a metallic low-resistance layer which is disposed on the adhesion layer and made of pure copper. When a copper alloy including Al and oxygen are included in the adhesion layer and a source electrode and a drain electrode are formed from it, copper does not precipitate at an interface between the adhesion layer and the silicon layer even when being exposed to the hydrogen plasma, which prevents the occurrence of exfoliation between the adhesion layer and the silicon layer. If the amount of Al increases, since widths of the adhesion layer and the metallic low-resistance layer largely differ after etching, the maximum addition amount for permitting the etching to be performed is the upper limit.

Abstract: Provided is a display device including a thin-film transistor and a capacitor element, the thin-film transistor includes: a first insulating film (IN1) which is formed to cover an area where a gate electrode (GT) is formed; a second insulating film (IN2) which is formed on the first insulating film, the second insulating film having an opening (OP) formed in the area in plan view; a semiconductor layer (SCLt) which is formed on the second insulating film to cross the opening, the semiconductor layer including high concentration areas (CN); a third insulating film (IN3) which is formed on the semiconductor layer to expose apart of each of the high concentration areas; and a pair of electrodes (DT, ST) each having electrical connection to the part; and the capacitor element includes a dielectric film which is formed of the same layer and the same material as the third insulating film.

Abstract: A thin film transistor includes a first insulating layer covering the gate electrode layer; source and drain regions which at least partly overlaps with the gate electrode layer; a pair of second insulating layers which is provided apart from each other in a channel length direction over the first insulating layer and which at least partly overlaps with the gate electrode layer and the pair of impurity semiconductor layers; a pair of microcrystalline semiconductor layers provided apart from each other on and in contact with the second insulating layers; and an amorphous semiconductor layer covering the first insulating layer, the pair of second insulating layers, and the pair of microcrystalline semiconductor layers and which extends to exist between the pair of microcrystalline semiconductor layers. The first insulating layer is a silicon nitride layer and each of the pair of the second insulating layers is a silicon oxynitride layer.

Abstract: A distance (d1) from an edge of a first region (R) at places (D) where branch electrodes (4b) extending, which branch off from an electrode line (4a) of a second source/drain electrode (4), start to overlap with a first region (R) to the electrode line (4a) is 5 ?m or more. This realizes a TFT including a comb-shaped source/drain structure that enables easy repair of a source-drain leakage.

Abstract: A transistor for active matrix display and a method for producing the transistor (1). The transistor (1) includes a microcrystalline silicon film (5) and an insulator (3). The crystalline fraction of the microcrystalline silicon film (5) is above 80%. According to the invention, the transistor (1) includes a plasma treated interface (4) located between the insulator (3) and the microcrystalline silicon film (5) so that the transistor (1) has a linear mobility equal or superior to 1.5 cm2V?1s?1, shows threshold voltage stability and wherein the microcrystalline silicon film (5) includes grains (6) whose size ranges between 10 nm and 400 nm. The invention concerns as well a display unit having a line-column matrix of pixels that are actively addressed, each pixel comprising at least a transistor as described above.

Abstract: A thin film transistor array panel includes a substrate; a first gate line disposed on the substrate and including a gate electrode; a storage electrode disposed in a layer which is the same layer as a layer of the first gate line; a gate insulating layer disposed on the first gate line and the storage electrode; a semiconductor disposed on the gate insulating layer and including a channel portion; a data line disposed on the semiconductor and including a source electrode; a drain electrode disposed on the semiconductor and facing the source electrode; a passivation layer disposed on the gate insulating layer, the data line, and the drain electrode, the passivation layer including a contact hole which exposes a portion of the drain electrode; and a pixel electrode disposed on the passivation layer and electrically connected to the drain electrode through the contact hole, wherein the gate insulating layer and the passivation layer are interposed between the pixel electrode and the substrate except for a regio

Abstract: An electronic apparatus having a substrate with a bottom gate p-channel type thin film transistor; a resist pattern over the substrate; and a light shielding film operative to block light having a wavelength shorter than 260 nm over at least a channel part of said thin film transistor.

Abstract: Thin film transistors and circuits having improved mobility and stability are disclosed in this invention to have metal oxynitrides as the active channel layers. In one embodiment, the charge carrier mobility in the thin film transistors is increased by using the metal oxynitrides as the active channel layers. In another embodiment, a thin film transistor having a p-type metal oxynitride active channel layer and a thin film transistor having an n-type metal oxynitride active channel layer are fabricated to forming a CMOS circuit. In yet another embodiment, thin film transistor circuits having metal oxynitrides as the active channel layers are provided.

Abstract: Thin film transistors and arrays having controlled threshold voltage and improved ION/IOFF ratio are provided in this invention. In one embodiment, a thin film transistor having a first gate insulator of high breakdown field with positive fixed charges and a second gate insulator with negative fixed charges is provided; said negative fixed charges substantially compensate said positive fixed charges in order to reduce threshold voltage and OFF state threshold voltage of said transistor. In another embodiment, a thin film transistor having a first passivation layer with negative fixed charges is provided, the negative charges reduce substantially unwanted negative charges in the adjacent active channel and hence reduce the OFF state current and increase ION/IOFF ratio, which in turn reduce the threshold voltage of the transistor.

Abstract: A thin film transistor in which an effect of photo current is small and an On/Off ratio is high is provided. In a bottom-gate bottom-contact (coplanar) thin film transistor, a channel formation region overlaps with a gate electrode, a first impurity semiconductor layer is provided between the channel formation region and a second impurity semiconductor layer which is in contact with a wiring layer. A semiconductor layer which serves as the channel formation region and the first impurity semiconductor layer preferably overlap with each other in a region where they overlap with the gate electrode. The first impurity semiconductor layer and the second impurity semiconductor layer preferably overlap with each other in a region where they do not overlap with the gate electrode.

Abstract: A method of fabricating an array substrate includes forming a buffer layer; forming a gate electrode on the buffer layer, a gate insulating layer on the gate electrode and an active layer on the gate insulating layer, the gate electrode including a bottom pattern, a middle pattern and a top pattern; forming an interlayer insulating layer, the first and second contact holes respectively exposing both sides of the active layer; forming first and second barrier patterns, first and second ohmic contact patterns, a source electrode, a drain, and a data line; forming a first passivation layer including a gate contact hole exposing the gate electrode; forming a gate line on the first passivation layer and contacting the gate electrode through the gate contact hole; forming a second passivation layer on the gate line; and forming a pixel electrode on the second passivation layer and contacting the drain electrode.

Abstract: Provided are a method of fabricating a polycrystalline silicon thin film using high temperature heat generated by Joule heating induced by application of an electrical field to a conductive layer, which can ensure process stability at high temperature and thus processing time can be reduced and a polycrystalline silicon thin film having excellent crystallinity can be obtained, a polycrystalline thin film using the method and a thin film transistor including the polycrystalline thin film.

Abstract: An object is to obtain a semiconductor device with improved characteristics by reducing contact resistance of a semiconductor film with electrodes or wirings, and improving coverage of the semiconductor film and the electrodes or wirings. The present invention relates to a semiconductor device including a gate electrode over a substrate, a gate insulating film over the gate electrode, a first source or drain electrode over the gate insulating film, an island-shaped semiconductor film over the first source or drain electrode, and a second source or drain electrode over the island-shaped semiconductor film and the first source or drain electrode. Further, the second source or drain electrode is in contact with the first source or drain electrode, and the island-shaped semiconductor film is sandwiched between the first source or drain electrode and the second source or drain electrode. Moreover, the present invention relates to a manufacturing method of the semiconductor device.