Comprising Group Iii-v Or Ii-vi Compound, Or Of Se, Te, Or Oxide Semiconductor (epo) Patents (Class 257/E29.296)
  • Publication number: 20100038639
    Abstract: To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.
    Type: Application
    Filed: October 27, 2009
    Publication date: February 18, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Kengo AKIMOTO
  • Publication number: 20100032664
    Abstract: An oxide semiconductor thin film transistor substrate includes a gate line and a gate electrode disposed on an insulating substrate, an oxide semiconductor pattern disposed adjacent to the gate electrode, a data line electrically insulated from the gate line, the data line and the gate line defining a display region, a first opening exposing a surface of the data line, a second opening exposing a surface of the oxide semiconductor pattern, and a drain electrode disposed on the first opening and a drain electrode pad, the drain electrode extending from the first opening to the second opening and electrically connecting the drain electrode pad and the oxide semiconductor pattern.
    Type: Application
    Filed: July 14, 2009
    Publication date: February 11, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Young-Wook LEE, Hong-Suk YOO, Jean-Ho SONG, Jae-Hyoung YOUN, Jong-In KIM
  • Publication number: 20100032665
    Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 11, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Akiharu MIYANAGA, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Publication number: 20100032668
    Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. A metal oxide layer having higher carrier concentration than the semiconductor layer is provided intentionally as the buffer layer between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.
    Type: Application
    Filed: August 5, 2009
    Publication date: February 11, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Patent number: 7659185
    Abstract: Disclosed are a method for forming a silicon thin-film on a substrate, and more particularly a method for forming a polycrystalline silicon thin-film of good quality on a flexible metal substrate. A metal substrate (110) is prepared and a surface of the metal substrate (110) is flattened. An insulation film (120) is formed on the metal substrate (110). An amorphous silicon layer (130) is formed on the insulation film (120). A metal layer (140) is formed on the amorphous silicon layer (130). A sample on the metal substrate (110) is heated and crystallized.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: February 9, 2010
    Assignee: Kyunghee University Industrial & Academic Collaboration Foundation
    Inventors: Jin Jang, Jong-Hyun Choi, Seung-Soo Kim, Jae-Hwan Oh, Jun-Hyuk Chon
  • Publication number: 20100025676
    Abstract: To offer a semiconductor device including a thin film transistor having excellent characteristics and high reliability and a method for manufacturing the semiconductor device without variation. The summary is to include an inverted-staggered (bottom-gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used for a semiconductor layer and a buffer layer is provided between the semiconductor layer and source and drain electrode layers. An ohmic contact is formed by intentionally providing a buffer layer containing In, Ga, and Zn and having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrode layers.
    Type: Application
    Filed: July 29, 2009
    Publication date: February 4, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Akiharu MIYANAGA, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Publication number: 20100025677
    Abstract: To provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability and a manufacturing method of the semiconductor device with high mass productivity. The summary is that an inverted-staggered (bottom-gate) thin film transistor is included in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, a channel protective layer is provided in a region that overlaps a channel formation region of the semiconductor layer, and a buffer layer is provided between the semiconductor layer and source and drain electrodes. An ohmic contact is formed by intentionally providing the buffer layer having a higher carrier concentration than the semiconductor layer between the semiconductor layer and the source and drain electrodes.
    Type: Application
    Filed: July 29, 2009
    Publication date: February 4, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hidekazu MIYAIRI, Kengo AKIMOTO, Kojiro SHIRAISHI
  • Publication number: 20100025680
    Abstract: In a thin-film transistor comprising respective elements of: three electrodes of a source electrode, a drain electrode and a gate electrode; a channel layer; and a gate insulating film, at least the channel layer is formed by a metal oxide film including indium. Therefore, it is possible to obtain the thin-film transistor, which can manufacture an element to a polymer substrate without using a high temperature process and which can achieve a high performance and a high reliability at low cost.
    Type: Application
    Filed: January 30, 2008
    Publication date: February 4, 2010
    Applicant: BRIDGESTONE CORPORATION
    Inventors: Osamu Shino, Yoshinori Iwabuchi, Ryo Sakurai, Tatsuya Funaki
  • Publication number: 20100019239
    Abstract: Provided are a method of fabricating a zinc-tin-oxide (ZTO) thin film, a thin film transistor employing the same, and a method of fabricating a thin film transistor. The method of fabricating a ZTO thin film includes depositing zinc oxide and tin oxide at a deposition temperature of 450° C. or lower so that a zinc-to-tin atomic ratio is 4:1 or greater, to form an amorphous ZTO thin film. In the thin film transistor, the ZTO thin film is used as a channel layer.
    Type: Application
    Filed: January 23, 2009
    Publication date: January 28, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Woo Seok Cheong, Sung Min Yoon, Jae Heon Shin, Chi Sun Hwang
  • Publication number: 20100019240
    Abstract: A resistive memory device includes: a bottom electrode formed over a substrate; and an insulation layer having a hole structure formed over the substrate structure. Herein, the hole structure exposes the bottom electrode, has sidewalls of positive slope, and has a bottom width equal to or smaller than a width of the bottom electrode; a resistive layer formed over the hole structure; and an upper electrode formed over the resistive layer.
    Type: Application
    Filed: March 26, 2009
    Publication date: January 28, 2010
    Inventors: Yu-Jin LEE, Hwang Yun-Taek
  • Publication number: 20100012932
    Abstract: A fabrication method is used in conjunction with a semiconductor device having a metal oxide active layer less than 100 nm thick and the upper major surface and the lower major surface have material in abutting engagement to form underlying interfaces and overlying interfaces. The method of fabrication includes controlling interfacial interactions in the underlying interfaces and the overlying interfaces to adjust the carrier density in the adjacent metal oxide by selecting a metal oxide for the metal oxide active layer and by selecting a specific material for the material in abutting engagement. The method also includes one or both steps of controlling interactions in underlying interfaces by surface treatment of an underlying material forming a component of the underlying interface and controlling interactions in overlying interfaces by surface treatment of the metal oxide film performed prior to deposition of material on the metal oxide layer.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 21, 2010
    Inventors: Chan-Long Shieh, Gang Yu
  • Publication number: 20100006835
    Abstract: A display substrate includes; a substrate, a gate electrode arranged on the substrate, a semiconductor pattern arranged on the gate electrode, a source electrode arranged on the semiconductor pattern, a drain electrode arranged on the semiconductor pattern and spaced apart from the source electrode, an insulating layer arranged on, and substantially covering, the source electrode and the drain electrode to cover the source electrode and the drain electrode, a conductive layer pattern arranged on the insulating layer and overlapped aligned with the semiconductor pattern, a pixel electrode electrically connected to the drain electrode, and a storage electrode arranged on the substrate and overlapped overlapping with the pixel electrode, the storage electrode being electrically connected to the conductive layer pattern.
    Type: Application
    Filed: June 17, 2009
    Publication date: January 14, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD
    Inventors: Kap-Soo YOON, Sung-Hoon YANG, Sung-Ryul KIM, O-Sung SEO, Hwa-Yeul OH, Jae-Ho CHOI, Seong-Hun KIM, Yong-Mo CHOI
  • Publication number: 20100006837
    Abstract: Provided are a composition for an oxide semiconductor thin film, a field effect transistor using the same and a method of fabricating the field effect transistor. The composition includes an aluminum oxide, a zinc oxide, an indium oxide and a tin oxide. The thin film formed of the composition is in amorphous phase. The field effect transistor having an active layer formed of the composition can have an improved electrical characteristic and be fabricated by a low temperature process.
    Type: Application
    Filed: July 1, 2009
    Publication date: January 14, 2010
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Doo Hee Cho, Sang Hee Park, Chi Sun Hwang, Hye Yong Chu, Kyoung Ik Cho, Shin Hyuk Yang, Chun Won Byun, Eun Suk Park, Oh Sang Kwon, Min Ki Ryu, Jae Heon Shin, Woo Seok Cheong, Sung Mook Chung, Jeong Ik Lee
  • Publication number: 20090315026
    Abstract: A thin film transistor, a method of manufacturing the same, and a flat panel display device having the same use an oxide semiconductor as an active layer, wherein the thin film transistor includes: an oxide semiconductor layer formed on a substrate and having a channel region, a source region, and a drain region; a gate electrode insulated from the oxide semiconductor layer by a gate insulating layer; an ohmic contact layer formed on the source region and the drain region of the oxide semiconductor layer; and a source electrode and a drain electrode coupled to the source region and the drain region through the ohmic contact layer, the ohmic contact layer being formed of a metal having a lower work function lower than work functions of the source electrode and the drain electrode.
    Type: Application
    Filed: January 13, 2009
    Publication date: December 24, 2009
    Applicant: Samsung Mobile Display Co., Ltd.
    Inventors: Jae-Kyeong JEONG, Hyun-Soo Shin, Yeon-gon Mo
  • Publication number: 20090309096
    Abstract: A thin-film transistor including a channel layer being formed of an oxide semiconductor transparent to visible light and having a refractive index of nx, a gate-insulating layer disposed on one face of the channel layer, and a transparent layer disposed on the other face of the channel layer and having a refractive index of nt, where there is a relationship of nx>nt. A thin-film transistor including a substrate having a refractive index of no, a transparent layer disposed on the substrate and having a refractive index of nt, and a channel layer disposed on the transparent layer and having a refractive index of nx, where there is a relationship of nx>nt>no.
    Type: Application
    Filed: October 31, 2008
    Publication date: December 17, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: TATSUYA IWASAKI
  • Publication number: 20090302316
    Abstract: A thin film transistor array panel includes a substrate, a gate line formed on the substrate and including a gate electrode, a gate insulating layer formed on the gate line, a semiconductor formed on the gate insulating layer and including a channel of a thin film transistor, a data line formed on the semiconductor and including a source electrode and a drain electrode formed on the semiconductor and opposite to the source electrode with respect to the channel of the thin film transistor, wherein the channel of the thin film transistor covers both side surfaces of the gate electrode.
    Type: Application
    Filed: May 13, 2009
    Publication date: December 10, 2009
    Inventors: Woo-Geun LEE, Jae-Hyoung YOUN, Ki-Won KIM, Young-Wook LEE, Jong-In KIM
  • Publication number: 20090294764
    Abstract: Provided are oxide semiconductors and thin film transistors of the same. An oxide semiconductor includes Zn, In and Hf. The amount of Hf is in the range of about 2-16 at %, inclusive, based on the total amount of Zn, In, and Hf. A thin film transistor includes a gate and a gate insulating layer arranged on the gate. A channel corresponding to the gate is formed on the gate insulating layer. The channel includes an oxide semiconductor. The semiconductor oxide includes Zn, In and Hf. The amount of Hf is in the range of about 2-16 at %, inclusive, based on the total amount of Zn, In, and Hf. A source and a drain contact respective sides of the channel.
    Type: Application
    Filed: June 19, 2008
    Publication date: December 3, 2009
    Inventors: Chang-jung Kim, Sang-wook Kim, Sun-il Kim
  • Publication number: 20090294765
    Abstract: A gate electrode, a gate insulation film and an inorganic oxide film are formed in this order on a substrate, and a source electrode and a drain electrode are formed to partially cover the inorganic oxide film. Then, oxidation treatment is applied to reduce the carrier density at a region of the inorganic oxide film which is not covered by the electrodes and is used as a channel region of a semiconductor device.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 3, 2009
    Applicant: FUJIFILM Corporation
    Inventors: Atsushi Tanaka, Kenichi Umeda, Kohei Higashi, Maki Nangu
  • Publication number: 20090283763
    Abstract: A transistor having a self-align top gate structure and methods of manufacturing the same are provided. The transistor includes an oxide semiconductor layer having a source region, a drain region, and a channel region between the source region and the drain region. The transistor further includes a gate insulating layer and a gate electrode, which are sequentially stacked on the channel region. Semiconductor devices including at least one transistor and methods of manufacturing the same are also provided.
    Type: Application
    Filed: May 14, 2009
    Publication date: November 19, 2009
    Inventors: Jaechul Park, Keewon Kwon
  • Publication number: 20090283739
    Abstract: There is provided a nonvolatile storage device including a plurality of component memory layers. The plurality of component memory layers are stacked In a direction perpendicular to a layer surface. Each of the plurality of component memory layers includes a first wiring, a second wiring provided non-parallel to the first wiring and a stacked structure unit provided between the first wiring and the second wiring and including a recording layer. At least one of the first wiring and the second wiring includes a protruding portion provided on a portion opposed to the recording layer and protruding toward the recording layer side.
    Type: Application
    Filed: March 20, 2009
    Publication date: November 19, 2009
    Inventor: Masahiro Kiyotoshi
  • Publication number: 20090278120
    Abstract: There is provided a thin film transistor (TFT) capable of improving electron mobility and minimizing the occurrence of hysteresis due to traps. The TFT includes a channel layer and a gate insulating layer, wherein the channel layer is made of an oxide semiconductor. In the TFT, the gate insulating layer includes one or more first dielectric layer and a second dielectric layer, and the first dielectric layer has a dielectric constant different from that of the second dielectric layer.
    Type: Application
    Filed: November 5, 2008
    Publication date: November 12, 2009
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Sang Yeol LEE, Seongpil CHANG
  • Publication number: 20090272970
    Abstract: Provided is a field-effect transistor including an active layer and a gate insulating film, wherein the active layer includes an amorphous oxide layer containing an amorphous region and a crystalline region, and the crystalline region is in the vicinity of or in contact with an interface between the amorphous oxide layer and the gate insulating film.
    Type: Application
    Filed: November 1, 2006
    Publication date: November 5, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Toshiaki Aiba, Masafumi Sano, Nobuyuki Kaji
  • Publication number: 20090261325
    Abstract: A metallic oxide semiconductor device with high performance and small variations. It is a field effect transistor using a metallic oxide film for the channel, which includes a channel region and a source region and comprises a drain region with a lower oxygen content than the channel region in the metallic oxide, in which the channel region exhibits semiconductor characteristics and the oxygen content decreases with depth below the surface.
    Type: Application
    Filed: April 14, 2009
    Publication date: October 22, 2009
    Inventors: Tetsufumi Kawamura, Takeshi Sato, Mutsuko Hatano, Hiroyuki Uchiyama
  • Publication number: 20090256147
    Abstract: A thin film transistor, including a transparent channel pattern, a transparent gate insulating layer in contact with the channel pattern, a passivation film pattern disposed on the channel pattern, a source/drain coupled to the channel pattern through a via hole in the passivation film pattern, and a gate facing the channel pattern, the gate insulating layer interposed between the gate and the channel pattern, wherein the passivation film pattern includes at least one of polyimide, photoacryl, and spin on glass (SOG).
    Type: Application
    Filed: March 13, 2009
    Publication date: October 15, 2009
    Inventors: Min-Kyu Kim, Tae-Kyung Ahn, Jae-Kyeong Jeong
  • Publication number: 20090250695
    Abstract: A semiconductor device includes a substrate and a semiconductor layer having a channel region, the channel region is made from an oxide semiconductor which satisfies Vc/Va>4 where Vc is a volume ratio of a crystalline component and Va is a volume ratio of a non-crystalline component.
    Type: Application
    Filed: April 6, 2009
    Publication date: October 8, 2009
    Applicant: FUJIFILM Corporation
    Inventors: Atsushi TANAKA, Ken-ichi Umeda, Kohei Higashi, Maki Nangu
  • Publication number: 20090250694
    Abstract: A semiconductor device includes a substrate and a channel region which is formed above the substrate by printing, wherein a relationship L?2a is satisfied where L is a channel length of the channel region and a is a minimum dimension among pattern dimensions and inter-pattern dimensions in the same layer as patterns that define the channel length L; and a relationship W?2b is satisfied where W is a channel width of the channel region and b is a minimum dimension among pattern dimensions and inter-pattern dimensions in the same layer as a pattern that defines the channel width W.
    Type: Application
    Filed: April 6, 2009
    Publication date: October 8, 2009
    Applicant: FUJIFILM Corporation
    Inventors: Atsushi TANAKA, Ken-ichi UMEDA, Kohei HIGASHI, Maki NANGU
  • Publication number: 20090236597
    Abstract: The present invention generally relates to thin film transistors (TFTs) and methods of making TFTs. The active channel of the TFT may comprise one or more metals selected from the group consisting of zinc, gallium, tin, indium, and cadmium. The active channel may also comprise nitrogen and oxygen. To protect the active channel during source-drain electrode patterning, an etch stop layer may be deposited over the active layer. The etch stop layer prevents the active channel from being exposed to the plasma used to define the source and drain electrodes. The etch stop layer and the source and drain electrodes may be used as a mask when wet etching the active material layer that is used for the active channel.
    Type: Application
    Filed: March 17, 2009
    Publication date: September 24, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventor: YAN YE
  • Publication number: 20090236596
    Abstract: A TFT is provided which includes, on a substrate, at least a gate electrode, a gate insulating layer, an active layer containing an amorphous oxide semiconductor, a source electrode and a drain electrode, wherein a resistance layer containing an amorphous oxide and having a thickness of more than 3 nm is disposed between the active layer and at least one of the source electrode or the drain electrode, and a band gap of the active layer is smaller than a band gap of the resistance layer. Also, a display using the TFT is provided.
    Type: Application
    Filed: March 4, 2009
    Publication date: September 24, 2009
    Applicant: FUJIFILM CORPORATION
    Inventor: Yuichiro Itai
  • Publication number: 20090236595
    Abstract: The present invention discloses structures to increase carrier mobility using engineered substrate technologies for a solid state device. Structures employing rare-earth compounds enable heteroepitaxy of different semiconductor materials of different orientations.
    Type: Application
    Filed: October 16, 2007
    Publication date: September 24, 2009
    Applicant: TRANSLUCENT PHOTONICS, INC.
    Inventor: Petar B. Atanackovic
  • Publication number: 20090230390
    Abstract: A thin film transistor capable of reliably preventing the entry of light into an active layer, and a display including the thin film transistor are provided. A thin film transistor includes: a gate electrode; an active layer; and a gate insulating film arranged between the gate electrode and the active layer, the gate insulating film including a first insulating film, a first light-absorbing layer and a second insulating film, the first insulating film arranged in contact with the gate electrode, the first light-absorbing layer arranged in contact with the first insulating film and made of a material absorbing light of 420 nm or less, the second insulating film arranged between the first light-absorbing layer and the active layer.
    Type: Application
    Filed: February 25, 2009
    Publication date: September 17, 2009
    Applicant: SONY CORPORATION
    Inventors: Dharam Pal Gosain, Tsutomu Tanaka, Narihiro Morosawa
  • Publication number: 20090230389
    Abstract: Embodiments of a thin film transistor with an atomic layer deposition gate dielectric layer having a high dielectric constant and a zinc indium oxide channel are disclosed.
    Type: Application
    Filed: October 14, 2008
    Publication date: September 17, 2009
    Inventors: Zhizhang Chen, Thomas H. Dukes
  • Publication number: 20090224238
    Abstract: A transistor according to example embodiments may include a channel layer, a source and a drain respectively contacting ends of the channel layer, a gate electrode separated from the channel layer, a gate insulating layer interposed between the channel layer and the gate electrode, and/or an insertion layer that is formed between the channel layer and the gate insulating layer. The insertion layer may have a work function different from that of the channel layer.
    Type: Application
    Filed: October 23, 2008
    Publication date: September 10, 2009
    Inventors: Sun-il Kim, Young-soo Park, I-hun Song, Chang-jung Kim, Jae-chul Park, Sang-wook Kim
  • Patent number: 7579210
    Abstract: An electronic device including a planar segmented contact. A method for forming the device includes depositing a first insulator on a substrate, forming an opening in the first insulator, disposing a conductive material in the opening where the conductive material defines two or more conductive regions, forming a second insulator over the conductive layer, removing a portion of the second insulator to expose less than all of the conductive regions, recessing at least one of the exposed conductive regions, forming a third insulator over the recessed conductive region, and planarizing to expose at least one of the non-recessed conductive regions without exposing a recessed conductive region. An electrically stimulable material may then be formed over an exposed non-recessed conductive region.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: August 25, 2009
    Assignee: Ovonyx, Inc.
    Inventor: Guy Wicker
  • Publication number: 20090206333
    Abstract: A ZnO based semiconductor device includes: a lamination structure including a first semiconductor layer containing ZnO based semiconductor of a first conductivity type and a second semiconductor layer containing ZnO based semiconductor of a second conductivity type opposite to the first conductivity type, formed above the first semiconductor layer and forming a pn junction together with the first semiconductor layer; and a Zn—Si—O layer containing compound of Zn, Si and O and covering a surface exposing the pn junction of the lamination structure.
    Type: Application
    Filed: February 17, 2009
    Publication date: August 20, 2009
    Applicant: Stanley Electric Co., Ltd.
    Inventors: Hiroshi Kotani, Michihiro Sano, Hiroyuki Kato, Naochika Horio, Akio Ogawa, Tomofumi Yamamuro
  • Publication number: 20090206332
    Abstract: An oxide semiconductor thin film transistor (TFT) and a method of manufacturing the oxide semiconductor TFT. The oxide semiconductor TFT includes a first gate insulating layer arranged between an oxide semiconductor channel layer and a first gate and a second gate insulating layer arranged between the channel layer and a second gate. The first and second gate insulating layers are made out of different materials and have different thicknesses. Preferably, the second gate insulating layer is silicon oxide and is thinner than the first gate insulating layer which is preferably silicon nitride. Oxide semiconductor refers to an oxide material such as Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide, In—Sn Oxide, and one of Zinc Oxide, Tin Oxide, Ga—In—Zn Oxide, In—Zn Oxide and In—Sn Oxide.
    Type: Application
    Filed: February 2, 2009
    Publication date: August 20, 2009
    Inventors: Kyoung-Seok Son, Tae-Sang Kim, Jang-Yeon Kwon, Ji-Sim Jung, Sang-Yoon Lee, Myung-Kwan Ryu, Kyung-Bae Park, Byung-Wook Yoo
  • Publication number: 20090194766
    Abstract: A thin film transistor (TFT) using an oxide semiconductor layer as an active layer, a method of manufacturing the TFT, and a flat panel display (FPD) including the TFT are taught. The TFT includes a gate electrode formed on a substrate, an oxide semiconductor layer electrically insulated from the gate electrode by a gate insulating layer, and the oxide semiconductor layer including a channel region, a source region, and a drain region, and a source electrode and a drain electrode respectively electrically contacting the source region and the drain region. The oxide semiconductor layer is formed of an InZnO or IZO layer (indium zinc oxide layer) including Zr. The carrier density of the IZO layer is controlled to be 1×1013 to 1×1018 #cm?3 by controlling an amount of Zr.
    Type: Application
    Filed: February 4, 2009
    Publication date: August 6, 2009
    Inventors: Jin-Seong Park, Kwang-Suk Kim, Jong-Han Jeong, Jae-Kyeong Jeong, Steve Y.G. Mo
  • Publication number: 20090189156
    Abstract: To provide a semiconductor device in which a defect or fault is not generated and a manufacturing method thereof even if a ZnO semiconductor film is used and a ZnO film to which an n-type or p-type impurity is added is used for a source electrode and a drain electrode. The semiconductor device includes a gate insulating film formed by using a silicon oxide film or a silicon oxynitride film over a gate electrode, an Al film or an Al alloy film over the gate insulating film, a ZnO film to which an n-type or p-type impurity is added over the Al film or the Al alloy film, and a ZnO semiconductor film over the ZnO film to which an n-type or p-type impurity is added and the gate insulating film.
    Type: Application
    Filed: April 3, 2009
    Publication date: July 30, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Kengo AKIMOTO
  • Publication number: 20090184315
    Abstract: A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon.
    Type: Application
    Filed: January 16, 2009
    Publication date: July 23, 2009
    Inventors: Je-Hun Lee, Kap-Soo Yoon, Kyung-Seok Son, Do-Hyun Kim, Chang-Oh Jeong
  • Publication number: 20090159880
    Abstract: A method of manufacturing an electronic device comprising the subsequent steps of: providing a thermal conversion material or an area comprising the thermal conversion material and, in an adjoining area or in a vicinity of the thermal conversion material or the area comprising the thermal conversion material, a material having an electromagnetic wave absorbing function or an area comprising the material having the electromagnetic wave absorbing function, in at least a portion on a substrate; and irradiating the substrate with an electromagnetic wave to transform the thermal conversion material into a functional material using a heat generated by the material having the electromagnetic wave absorbing function.
    Type: Application
    Filed: December 16, 2008
    Publication date: June 25, 2009
    Applicant: KONICA MINOLTA HOLDINGS, INC.
    Inventors: Makoto HONDA, Katsura HIRAI
  • Patent number: 7550781
    Abstract: A III-nitride based integrated semiconductor device which includes at least two III-nitride based semiconductor devices formed in a common die.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: June 23, 2009
    Assignee: International Rectifier Corporation
    Inventors: Daniel M. Kinzer, Robert Beach
  • Publication number: 20090146141
    Abstract: The present invention provides a doped homojunction chalcogenide thin film transistor and a method of fabricating the same, comprising forming an N-type chalcogenide layer constituting a channel layer on a substrate, forming and patterning a diffusion prevention layer on the upper part of the N-type chalcogenide layer, and forming a P-type chalcogenide layer constituting source and drain regions by depositing and diffusing Te alloy on the N-type chalcogenide layer. With the present invention, a thin film transistor can be fabricated using chalcogenide material having N-type conductivity and chalcogenide material having P-type conductivity.
    Type: Application
    Filed: December 5, 2008
    Publication date: June 11, 2009
    Inventors: Kibong SONG, Sangsu LEE
  • Publication number: 20090114910
    Abstract: In the present invention, a thin film transistor is formed on a plastic film substrate (1) having anisotropy of thermal shrinkage rate or coefficient of thermal expansion in in-plane directions of the substrate. A channel is formed such thatthe direction (7) in which the thermal shrinkage rate or the coefficient of thermal expansion of the substrate is largest is nonparallel tothe direction (8) of a current flowing through the channel of the thin film transistor. Then, a thin film transistor having stable and uniform electrical characteristics, which is formed on the plastic film substrate, is provided.
    Type: Application
    Filed: August 24, 2006
    Publication date: May 7, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Chienliu Chang
  • Publication number: 20090072232
    Abstract: The thin-film transistor of the present invention has at least a semiconductor layer including: on a substrate, a source electrode, a drain electrode, and a channel region; a gate insulating film; and a gate electrode, wherein the semiconductor layer is an oxide semiconductor layer, and wherein the gate insulating film is amorphous silicon including at least O and N, and the gate insulating film has a distribution of an oxygen concentration in a thickness direction so that the oxygen concentration is high in the side of an interface with an oxide semiconductor layer and the oxygen concentration decreases toward the side of the gate electrode.
    Type: Application
    Filed: February 23, 2007
    Publication date: March 19, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Ryo Hayashi, Katsumi Abe, Masafumi Sano
  • Publication number: 20090065771
    Abstract: The present invention provides a field effect transistor including an oxide film as a semiconductor layer, wherein the oxide film includes one of a source part and a drain part to which one of hydrogen and deuterium is added.
    Type: Application
    Filed: August 3, 2007
    Publication date: March 12, 2009
    Applicant: CANON KABUSHIKI KAISHA
    Inventors: Tatsuya Iwasaki, Hideya Kumomi
  • Publication number: 20090057663
    Abstract: An oxide thin film transistor and a method of manufacturing the oxide TFT are provided. The oxide thin film transistor (TFT) including: a gate; a channel formed to correspond to the gate, and a capping layer having a higher work function than the channel; a gate insulator disposed between the gate and the channel; and a source and drain respectively contacting either side of the capping layer and the channel and partially on a top surface of the capping layer.
    Type: Application
    Filed: March 19, 2008
    Publication date: March 5, 2009
    Inventors: Sun-il Kim, Jae-cheol Lee, I-hun Song, Young-soo Park, Chang-jung Kim, Jae-chul Park
  • Publication number: 20080315194
    Abstract: Oxide semiconductors and thin film transistors (TFTs) including the same are provided. An oxide semiconductor includes Zn atoms and at least one of Ta and Y atoms added thereto. A thin film transistor (TFT) includes a channel including an oxide semiconductor including Zn atoms and at least one of Ta and Y atoms added thereto.
    Type: Application
    Filed: June 19, 2008
    Publication date: December 25, 2008
    Inventors: Chang-jung Kim, Sang-wook Kim, Sun-il Kim
  • Publication number: 20080308797
    Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.
    Type: Application
    Filed: August 1, 2008
    Publication date: December 18, 2008
    Inventors: Kengo Akimoto, Tatsuya Honda, Norihito Sone
  • Publication number: 20080308796
    Abstract: An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.
    Type: Application
    Filed: August 1, 2008
    Publication date: December 18, 2008
    Inventors: Kengo Akimoto, Tatsuya Honda, Norihito Sone
  • Publication number: 20080296569
    Abstract: A compound semiconductor material for forming an active layer of a thin film transistor device is disclosed, which has a group II-VI compound doped with a dopant ranging from 0.1 to 30 mol %, wherein the dopant is selected from a group consisting of alkaline-earth metals, group IIIA elements, group IVA elements, group VA elements, group VIA elements, and transitional metals. The method for forming an active layer of a thin film transistor device by using the compound semiconductor material of the present invention is disclosed therewith.
    Type: Application
    Filed: April 28, 2008
    Publication date: December 4, 2008
    Applicant: Industrial Technology Research Institute
    Inventors: Jia-Chong Ho, Jen-Hao Lee, Cheng-Chung Lee, Yu-Wu Wang, Chun-Tao Lee, Pang Lin
  • Publication number: 20080277657
    Abstract: Thin film transistors and organic light emitting displays using the same are provided. The thin film transistor may include a substrate, a semiconductor layer, a gate electrode, and source/drain electrodes on the substrate. The semiconductor layer is composed of a P-type semiconductor layer obtained by diffusing phosphorus into a zinc oxide semiconductor. The phosphorus is doped in the semiconductor layer to a concentration ranging from about 1×1014 to about 1×1018 cm?3.
    Type: Application
    Filed: May 9, 2008
    Publication date: November 13, 2008
    Inventors: Jae-kyeong Jeong, Yeon-gon Mo, Jin-seong Park, Hyun-soo Shin, Hun-jung Lee, Jong-han Jeong