Multiple Quantum Well Structure (epo) Patents (Class 257/E33.008)
  • Patent number: 10320153
    Abstract: Provided herein are systems and methods for switching the generation of light emissions using charge separation in a gain medium to manipulate carrier lifetimes. For a given output pulse energy, extended carrier lifetimes may allow carrier generation powers to be reduced and/or carrier generation times to be extended. L-switching of light output from a gain medium may be combined with other switching schemes utilizing different approaches to control lasing, such as Q-switching.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: June 11, 2019
    Inventors: Rudolf Heinrich Binder, Nai-Hang Kwong, Paul Bryan Lundquist
  • Patent number: 10164148
    Abstract: Provided is a semiconductor layer light-emitting element having tunneling blocking layers interposed between adjacent active regions, wherein the tunneling blocking layers are semiconductor layers, which do not allow the movement of an electron or a hole at an applied voltage sufficient to activate only one active region among all active regions, and independently separate two adjacent active regions in a quantum region range, so that the semiconductor light-emitting element comprises multiple independent active regions in a vertical direction in a single chip and thus can be driven at high voltages.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: December 25, 2018
    Assignee: CONSTANTEC CO., LTD.
    Inventor: Woon Yong Choi
  • Patent number: 10141465
    Abstract: There is disclosed a method of preparing a photovoltaic device. In particular, the method comprises making thin-film GaAs solar cells integrated with low-cost, thermoformed, lightweight and wide acceptance angle mini-CPCs. The fabrication combines ND-ELO thin film cells that are cold-welded to a foil substrate, and subsequently attached to the CPCs in an adhesive-free transfer printing process. There is also disclosed an improved photovoltaic device made by the disclosed method. The improved photovoltaic device comprises a thin-film solar integrated with non-tracking mini-compound parabolic concentrators, wherein the plastic compound parabolic concentrator comprise two parabolas tilted at an angle equal to the acceptance angle of the compound parabolic concentrator.
    Type: Grant
    Filed: April 6, 2015
    Date of Patent: November 27, 2018
    Assignee: The Regents of the University of Michigan
    Inventors: Kyusang Lee, Stephen R. Forrest
  • Patent number: 10014664
    Abstract: A broad area semiconductor diode laser device includes a multimode high reflector facet, a partial reflector facet spaced from said multimode high reflector facet, and a flared current injection region extending and widening between the multimode high reflector facet and the partial reflector facet, wherein the ratio of a partial reflector facet width to a high reflector facet width is n:1, where n>1. The broad area semiconductor laser device is a flared laser oscillator waveguide delivering improved beam brightness and beam parameter product over conventional straight waveguide configurations.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: July 3, 2018
    Assignee: nLIGHT, Inc.
    Inventor: Manoj Kanskar
  • Patent number: 9525100
    Abstract: Provided is a nano-structured light-emitting device including: a first type semiconductor layer; a plurality of nanostructures which are formed on the first type semiconductor layer and include nanocores, and active layers and second type semiconductor layers that enclose surfaces of the nanocores; an electrode layer which encloses and covers the plurality of nanostructures; and a plurality of resistant layers which are formed on the electrode layer and respectively correspond to the plurality of nanostructures.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: December 20, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Geon-Wook Yoo, Nam-goo Cha, Dong-kuk Lee, Dong-hoon Lee
  • Patent number: 9041045
    Abstract: A transparent LED wafer module and a method for manufacturing the same are provided. In a conductor LED device epitaxial process, the conductor LED device is grown on a transparent material wafer, where both surfaces of the conductor LED device are entirely grown on the transparent material, and then a transparent glass substrate is restacked, thereby securing a high amount of light.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: May 26, 2015
    Inventor: Sung-Bok Shin
  • Patent number: 9024342
    Abstract: A semiconductor light emitting element includes a semiconductor multilayer structure including a first conductive type layer, a second conductive type layer, and a light emitting layer sandwiched between the first conductive type layer and the second conductive type layer, and a reflecting layer formed on the second conductive type layer for reflecting the light emitted from the light emitting layer. The light is extracted in a direction from the light emitting layer toward the first conductive type layer. The first conductive type layer includes a concavo-convex region on a surface thereof not opposite to the light emitting layer, for changing a path of light, and at least a part of the reflecting layer is formed extending to right above an edge of the concavo-convex region.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: May 5, 2015
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masao Kamiya, Masashi Deguchi
  • Patent number: 9024294
    Abstract: There are disclosed a group III nitride nanorod light emitting device and a method of manufacturing thereof. The group III nitride nanorod light emitting device includes a substrate, an insulating film formed on the substrate, and including a plurality of openings exposing parts of the substrate and having different diameters, and first conductive group III nitride nanorods having different diameters, respectively formed in the plurality of openings, wherein each of the first conductive group III nitride nanorods has an active layer and a second conductive semiconductor layer sequentially formed on a surface thereof.
    Type: Grant
    Filed: April 9, 2014
    Date of Patent: May 5, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han Kyu Seong, Hun Jae Chung, Jung Ja Yang, Cheol Soo Sone
  • Patent number: 9018618
    Abstract: There is provided a semiconductor light emitting device including: an n-type semiconductor layer; a p-type semiconductor layer; and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer, and including a plurality of alternately stacked quantum barrier layers and quantum well layers, wherein at least a portion of the plurality of quantum well layers has different thicknesses, wherein a thickness of a first quantum well layer most adjacent to the p-type semiconductor layer is less than a thickness of a second quantum well layer adjacent thereto and greater than a thickness of a third quantum well layer, other than the first and second quantum well layers.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: April 28, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Hyun Lee, Ki Ho Park, Suk Ho Yoon, Sang Heon Han, Jae Sung Hyun
  • Patent number: 9018619
    Abstract: A solid state light emitting device according to the present invention comprises an emitter structure having an active region of semiconductor material and a pair of oppositely doped layers of semiconductor material on opposite sides of said active region. The active region emits light at a first wavelength in response to an electrical bias across said doped layers. A quantum well structure is included that is integral to the emitter structure and has a plurality of layers having a composition and thickness such that the quantum well structure absorbs at least some of the light emitted from the active region and re-emits light of at least one different wavelength of light from said first wavelength.
    Type: Grant
    Filed: October 9, 2006
    Date of Patent: April 28, 2015
    Assignee: Cree, Inc.
    Inventor: Adam W. Saxler
  • Patent number: 9012951
    Abstract: A radiation-emitting component including a semiconductor chip having a semiconductor body with an active region that generates a primary radiation, and including a conversion element that at least partly converts the primary radiation, wherein the conversion element is fixed to the semiconductor chip with a connecting layer and a radiation conversion substance is formed in the connecting layer.
    Type: Grant
    Filed: August 9, 2011
    Date of Patent: April 21, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventor: Stephan Preuss
  • Patent number: 9012886
    Abstract: According to one embodiment, a semiconductor light emitting device includes: a first semiconductor layer; a second semiconductor layer; and a light emitting layer provided between the first and the second semiconductor layers. The first semiconductor layer includes a nitride semiconductor, and is of an n-type. The second semiconductor layer includes a nitride semiconductor, and is of a p-type. The light emitting layer includes: a first well layer; a second well layer provided between the first well layer and the second semiconductor layer; a first barrier layer provided between the first and the second well layers; and a first Al containing layer contacting the second well layer between the first barrier layer and the second well layer and containing layer containing Alx1Ga1-x1N (0.1?x1?0.35).
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Jongil Hwang, Shinji Saito, Rei Hashimoto, Shinya Nunoue
  • Patent number: 8993994
    Abstract: A light emitting device includes: a substrate; a first electrode on the substrate, the first electrode including a light-transmissive material having a refractive index greater than a refractive index of the substrate; a refraction conversion layer between the substrate and the first electrode, the refraction conversion layer including a first layer having a refractive index greater than the refractive index of the first electrode, a second layer having a refractive index smaller than the refractive index of the first layer, and a third layer having a refractive index smaller than the refractive index of the second layer, wherein the first layer, the second layer, and the third layer are sequentially formed in a direction from the first electrode toward the substrate; a second electrode facing the first electrode; and an organic emissive layer between the first electrode and the second electrode.
    Type: Grant
    Filed: June 28, 2012
    Date of Patent: March 31, 2015
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jung-Bae Song, Sang-Pil Lee, Young-Rok Song
  • Patent number: 8993993
    Abstract: Provided are a semiconductor light emitting device and a method for fabricating the same. The semiconductor light emitting device includes a light emitting structure and a pattern. The light emitting structure includes a first-conductivity-type semiconductor layer, an active layer, and a second-conductivity-type semiconductor layer. The pattern is formed on at least one light emitting surface among the surfaces of the light emitting structure. The pattern has a plurality of convex or concave parts that are similar in shape. The light emitting surface with the pattern formed thereon has a plurality of virtual reference regions that are equal in size and are arranged in a regular manner. The convex or concave part is disposed in the reference regions such that a part of the edge thereof is in contact with the outline of one of the plurality of virtual reference regions.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: March 31, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung Duk Ko, Jung Ja Yang, Yu Seung Kim, Youn Joon Sung, Soo Jin Jung, Dae Cheon Kim, Byung Kwun Lee
  • Patent number: 8987704
    Abstract: A semiconductor light emitting structure including an n-type semiconductor layer, a p-type semiconductor layer and an active layer is provided. The active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer is a multi-quantum well structure consisting of well layers and barrier layers interlaced and stacked to each other. The well layers near the n-type semiconductor layer at least include a first well layer having a first thickness, and the well layers near the p-type semiconductor layer at least include a second well layer having a second thickness smaller than the first thickness, so that the ability to restrict electrons within the area of the active layer near the n-type semiconductor layer is increased, and the conversion efficiency of the active layer is enhanced. There is a differential ?d1 between the first thickness and the second thickness, wherein 0 nm<?d1?10 nm.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 24, 2015
    Assignee: Lextar Electronics Corporation
    Inventor: Chuan-Yu Luo
  • Patent number: 8981398
    Abstract: Certain embodiments provide a semiconductor light emitting device including: a first metal layer; a stack film including a p-type nitride semiconductor layer, an active layer, and an n-type nitride semiconductor layer; an n-electrode; a second metal layer; and a protection film protecting an outer circumferential region of the upper face of the n-type nitride semiconductor layer, side faces of the stack film, a region of an upper face of the second metal layer other than a region in contact with the p-type nitride semiconductor layer, and a region of an upper face of the first metal layer other than a region in contact with the second metal layer. Concavities and convexities are formed in a region of the upper face of the n-type nitride semiconductor layer, the region being outside the region in which the n-electrode is provided and being outside the regions covered with the protection film.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 8981343
    Abstract: A semiconductor device includes a p-type semiconductor layer, an n-type semiconductor layer, a pn junction portion at which the p-type semiconductor layer and the n-type semiconductor layer are joined to each other, and a multiple quantum barrier structure or a multiple quantum well structure that is provided in at least one of the p-type semiconductor layer and the n-type semiconductor layer and functions as a barrier against at least one of electrons and holes upon biasing in a forward direction. Upon biasing in a reverse direction, a portion that allows band-to-band tunneling of electrons is formed at the pn junction portion.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: March 17, 2015
    Assignee: Fujitsu Limited
    Inventor: Tsuyoshi Takahashi
  • Patent number: 8937325
    Abstract: According to one embodiment, a semiconductor device includes a first layer of n-type including a nitride semiconductor, a second layer of p-type including a nitride semiconductor, a light emitting unit, and a first stacked body. The light emitting unit is provided between the first and second layers. The first stacked body is provided between the first layer and the light emitting unit. The first stacked body includes a plurality of third layers including AlGaInN, and a plurality of fourth layers alternately stacked with the third layers and including GaInN. The first stacked body has a first surface facing the light emitting unit. The first stacked body has a depression provided in the first surface. A part of the light emitting unit is embedded in a part of the depression. A part of the second layer is disposed on the part of the light emitting unit.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: January 20, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Kushibe, Yasuo Ohba, Hiroshi Katsuno, Kei Kaneko, Shinji Yamada
  • Patent number: 8933433
    Abstract: A method and structure for receiving a micro device on a receiving substrate are disclosed. A micro device such as a micro LED device is punched-through a passivation layer covering a conductive layer on the receiving substrate, and the passivation layer is hardened. In an embodiment the micro LED device is punched-through a B-staged thermoset material. In an embodiment the micro LED device is punched-through a thermoplastic material.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: January 13, 2015
    Assignee: Luxvue Technology Corporation
    Inventors: John A. Higginson, Andreas Bibl, Hsin-Hua Hu
  • Patent number: 8927959
    Abstract: A light emitting diode is provided, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer. The light generating structure includes a set of quantum wells. The contact layer and light generating structure can be configured so that a difference between an energy of the n-type contact layer and an electron ground state energy of a quantum well is greater than an energy of a polar optical phonon in a material of the light generating structure. Additionally, the light generating structure can be configured so that its width is comparable to a mean free path for emission of a polar optical phonon by an electron injected into the light generating structure.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: January 6, 2015
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Remigijus Gaska, Maxim S Shatalov, Michael Shur, Alexander Dobrinsky
  • Patent number: 8921169
    Abstract: For forming a gate electrode, a conductive film with low resistance including Al or a material containing Al as its main component and a conductive film with low contact resistance for preventing diffusion of Al into a semiconductor layer are laminated, and the gate electrode is fabricated by using an apparatus which is capable of performing etching treatment at high speed.
    Type: Grant
    Filed: May 9, 2013
    Date of Patent: December 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yoshihiro Kusuyama
  • Patent number: 8916458
    Abstract: An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer. A method for manufacturing the III-nitride quantum well structure and a light-emitting unit having a plurality of III-nitride quantum well structures are also proposed.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: December 23, 2014
    Assignee: National Sun Yat-Sen University
    Inventors: I-Kai Lo, Yu-Chi Hsu, Cheng-Hung Shih, Wen-Yuan Pang, Ming-Chi Chou
  • Patent number: 8912559
    Abstract: A Group III nitride semiconductor light-emitting device, includes a groove having a depth extending from the top surface of a p-type layer to an n-type layer is provided in a region overlapping (in plan view) with the wiring portion of an n-electrode or the wiring portion of a p-electrode. An insulating film is provided so as to continuously cover the side surfaces and bottom surface of the groove, the p-type layer, and an ITO electrode. The insulating film incorporates therein reflective films in regions directly below the n-electrode and the p-electrode (on the side of a sapphire substrate). The reflective films in regions directly below the wiring portion of the n-electrode and the wiring portion of the p-electrode are located at a level lower than that of a light-emitting layer. The n-electrode and the p-electrode are covered with an additional insulating film.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: December 16, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Shingo Totani, Masashi Deguchi, Naoki Nakajo
  • Patent number: 8907322
    Abstract: A light emitting diode is provided, which includes an n-type contact layer and a light generating structure adjacent to the n-type contact layer. The light generating structure includes a set of quantum wells. The contact layer and light generating structure can be configured so that a difference between an energy of the n-type contact layer and an electron ground state energy of a quantum well is greater than an energy of a polar optical phonon in a material of the light generating structure. Additionally, the light generating structure can be configured so that its width is comparable to a mean free path for emission of a polar optical phonon by an electron injected into the light generating structure. The diode can include a blocking layer, which is configured so that a difference between an energy of the blocking layer and the electron ground state energy of a quantum well is greater than the energy of the polar optical phonon in the material of the light generating structure.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: December 9, 2014
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Remigijus Gaska, Maxim S. Shatalov, Michael Shur
  • Patent number: 8901600
    Abstract: The invention relates to light-emitting devices; in particular, to highly effective light-emitting diodes on the base of nitrides of III group elements of the periodic system. The light-emitting device includes a substrate, a buffer layer formed on the substrate, a first layer from n-type semiconductor formed on the buffer layer, a second layer from p-type semiconductor and an active layer arranged between the first and second layers. The first, second and active layers form interlacing of the layers with zinc blend phase structure and layers with wurtzite phase structure forming heterophase boundaries therebetween. Technical result of the invention is increasing the effectiveness (efficiency) of the light-emitting device at the expense of heterophase boundaries available in the light-emitting device which allow to eliminate formation of the potential wells for holes, to increase the uniformity of the hole distribution in the active layer and to ensure suppression of nonradiative Auger recombination.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: December 2, 2014
    Inventors: Yuri Georgievich Shreter, Yuri Toomasovich Rebane, Aleksey Vladimirovich Mironov
  • Patent number: 8895958
    Abstract: Disclosed is a light emitting element, which emits light with small power consumption and high luminance. The light emitting element has: a IV semiconductor substrate; two or more core multi-shell nanowires disposed on the IV semiconductor substrate; a first electrode connected to the IV semiconductor substrate; and a second electrode, which covers the side surfaces of the core multi-shell nanowires, and which is connected to the side surfaces of the core multi-shell nanowires. Each of the core multi-shell nanowires has: a center nanowire composed of a first conductivity type III-V compound semiconductor; a first barrier layer composed of the first conductivity type III-V compound semiconductor; a quantum well layer composed of a III-V compound semiconductor; a second barrier layer composed of a second conductivity type III-V compound semiconductor; and a capping layer composed of a second conductivity type III-V compound semiconductor.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: November 25, 2014
    Assignees: National University Corporation Hokkaido University, Sharp Kabushiki Kaisha
    Inventors: Takashi Fukui, Katsuhiro Tomioka
  • Patent number: 8890113
    Abstract: A light-emitting device epitaxially-grown on a GaAs substrate which contains an active region composed of AlxGa1-xAs alloy or of related superlattices of this materials system is disclosed. This active region either includes tensile-strained GaP-rich insertions aimed to increase the forbidden gap of the active region targeting the bright red, orange, yellow, or green spectral ranges, or is confined by regions with GaP-rich insertions aimed to increase the barrier height for electrons in the conduction band preventing the leakage of the nonequilibrium carriers outside of the light-generation region.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: November 18, 2014
    Inventors: Nikolay Ledentsov, James Lott, Vitaly Shchukin
  • Patent number: 8889450
    Abstract: The disclosed light emitting diode includes a substrate provided, at a surface thereof, with protrusions, a buffer layer formed over the entirety of the surface of the substrate, a first semiconductor layer formed over the buffer layer, an active layer formed on a portion of the first semiconductor layer, a second semiconductor layer formed over the active layer, a first electrode pad formed on another portion of the first semiconductor layer, except for the portion where the active layer is formed, and a second electrode pad formed on the second semiconductor layer. Each protrusion has a side surface inclined from the surface of the substrate at a first angle, and another side surface inclined from the surface of the substrate at a second angle different from the first angle.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: November 18, 2014
    Assignee: LG Display Co., Ltd.
    Inventor: Su-Hyoung Son
  • Patent number: 8883266
    Abstract: A method of fabricating quantum confinements is provided. The method includes depositing, using a deposition apparatus, a material layer on a substrate, where the depositing includes irradiating the layer, before a cycle, during a cycle, and/or after a cycle of the deposition to alter nucleation of quantum confinements in the material layer to control a size and/or a shape of the quantum confinements. The quantum confinements can include quantum wells, nanowires, or quantum dots. The irradiation can be in-situ or ex-situ with respect to the deposition apparatus. The irradiation can include irradiation by photons, electrons, or ions. The deposition is can include atomic layer deposition, chemical vapor deposition, MOCVD, molecular beam epitaxy, evaporation, sputtering, or pulsed-laser deposition.
    Type: Grant
    Filed: June 11, 2013
    Date of Patent: November 11, 2014
    Assignees: The Board of Trustees of the Leland Stanford Junior University, Honda Patents & Technologies North America, LLC
    Inventors: Timothy P. Holme, Andrei Iancu, Hee Joon Jung, Michael C Langston, Munekazu Motoyama, Friedrich B. Prinz, Takane Usui, Hitoshi Iwadate, Neil Dasgupta, Cheng-Chieh Chao
  • Patent number: 8884269
    Abstract: A nitride-based semiconductor light emitting device includes an anti-bowing layer having a composition of AlxGa1-xN (0.01?x?0.04), and a light emitting structure formed on the anti-bowing layer and including a first conductivity-type nitride semiconductor layer, an active layer, and a second conductivity-type nitride semiconductor layer.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: November 11, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Sun Maeng, Bum Joon Kim, Ki Sung Kim, Suk Ho Yoon, Sung Tae Kim
  • Patent number: 8872158
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, and a light emitting part. The n-type semiconductor layer includes a nitride semiconductor. The p-type semiconductor layer includes a nitride semiconductor. The light emitting part is provided between the n-type and the p-type semiconductor layers and includes an n-side barrier layer and a first light emitting layer. The first light emitting layer includes a first barrier layer, a first well layer, and a first AIGaN layer. The first barrier layer is provided between the n-side barrier layer and the p-type semiconductor layer. The first well layer contacts the n-side barrier layer between the n-side and the first barrier layer. The first AIGaN layer is provided between the first well layer and the first barrier layer. A peak wavelength ?p of light emitted from the light emitting part is longer than 515 nanometers.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: October 28, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomonari Shioda, Hisashi Yoshida, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 8866125
    Abstract: Various embodiments provide materials and methods for integrating exemplary heterostructure field-effect transistor (HFET) driver circuit or thyristor driver circuit with LED structures to reduce or eliminate resistance and/or inductance associated with their conventional connections.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: October 21, 2014
    Assignee: STC.UNM
    Inventor: Stephen D. Hersee
  • Patent number: 8847197
    Abstract: In various embodiment, a primary particle includes a primary matrix material containing a population of semiconductor nanoparticles, with each primary particle further comprising an additive to enhance the physical, chemical and/or photo-stability of the semiconductor nanoparticles. A method of preparing such particles is described. Composite materials and light-emitting devices incorporating such primary particles are also described.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: September 30, 2014
    Assignee: Nanoco Technologies Ltd.
    Inventors: Nigel Pickett, Imad Naasani, James Harris
  • Patent number: 8847199
    Abstract: A nanorod light emitting device includes at least one nitride semiconductor layer, a mask layer, multiple light emitting nanorods, nanoclusters, a filling layer disposed on the nanoclusters, a first electrode and connection parts. The mask layer is disposed on the nitride semiconductor layer and has through holes. The light emitting nanorods are disposed in and extend vertically from the through holes. The nanoclusters are spaced apart from each other. Each of the nanoclusters has a conductor and covers a group of light emitting nanorods, among the multiple light emitting nanorods, with the conductor. The first electrode is disposed on the filling layer and has a grid pattern. The connection parts connect the conductor and the first electrode.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: September 30, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Nam-Go Cha, Geon-Wook Yoo, Han-Kyu Seong, Sam-Mook Kang, Hun-Jae Chung
  • Patent number: 8829652
    Abstract: A light emitting device with graded composition hole tunneling layer is provided. The device comprises a substrate and an n-type semiconductor layer is disposed on the substrate, in which the n-type semiconductor layer comprises a first portion and a second portion. A graded composition hole tunneling layer is disposed on the first portion of the n-type semiconductor layer. An electron blocking layer is disposed on the graded composition hole tunneling layer. A p-type semiconductor layer is disposed on the electron blocking layer. A first electrode is disposed on the p-type semiconductor layer, and a second electrode is disposed on the second portion of the n-type semiconductor layer and is electrical insulated from the first portion of the n-type semiconductor. The graded composition hole tunneling layer is used as the quantum-well to improve the transport efficiency of the holes to increase the light emitting efficiency of the light emitting device.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: September 9, 2014
    Assignee: National Chiao Tung University
    Inventors: Chao-Hsun Wang, Hao-Chung Kuo
  • Patent number: 8829486
    Abstract: A light-emitting device comprises a substrate, and a light-emitting structure formed on the substrate. The light-emitting structure comprises a first active layer emitting the light with a first wavelength, and a second active layer emitting the light with a second wavelength. The light-emitting structure is formed by the first active layer and the second active layer stacked alternately.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: September 9, 2014
    Assignee: Epistar Corporation
    Inventors: Rong-Ren Lee, Shih-Chang Lee, Chien-Fu Huang, Tsen-Kuei Wang
  • Patent number: 8815622
    Abstract: Light-emitting devices, and related components, systems, and methods associated therewith are provided.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: August 26, 2014
    Assignee: Luminus Devices, Inc.
    Inventor: Feng Yun
  • Patent number: 8816321
    Abstract: A nitride semiconductor light-emitting device includes an n-type nitride semiconductor layer, a V pit generation layer, an intermediate layer, a multiple quantum well light-emitting layer, and a p-type nitride semiconductor layer provided in this order. The multiple quantum well light-emitting layer is a layer formed by alternately stacking a barrier layer and a well layer having a bandgap energy smaller than that of the barrier layer. A V pit is partly formed in the multiple quantum well light-emitting layer, and an average position of starting point of the V pit is located in the intermediate layer.
    Type: Grant
    Filed: August 13, 2012
    Date of Patent: August 26, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tadashi Takeoka, Yoshihiko Tani, Kazuya Araki, Yoshihiro Ueta
  • Patent number: 8796665
    Abstract: Solid state radiation transducer (SSRT) assemblies and method for making SSRT assemblies. In one embodiment, a SSRT assembly comprises a first substrate having an epitaxial growth material and a radiation transducer on the first substrate. The radiation transducer can have a first semiconductor material grown on the first substrate, a second semiconductor material, and an active region between the first and second semiconductor materials. The SSRT can also have a first contact electrically coupled to the first semiconductor material and a second contact electrically coupled to the second semiconductor material. The first substrate has an opening through which radiation can pass to and/or from the first semiconductor material.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: August 5, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Scott E. Sills, Anton J. De Villiers
  • Patent number: 8796705
    Abstract: A light emitting device is provided. The light emitting device includes a first conductive type semiconductor layer, an active layer including a plurality of well layers and a plurality of barrier layers on the first conductive type semiconductor layer, and a second conductive type semiconductor layer on the active layer. An upper surface of at least first barrier layer among the barrier layers includes an uneven surface. The first barrier layer is disposed more closely to the second conductive type semiconductor layer than to the first conductive type semiconductor layer.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: August 5, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Oh Min Kwon, Jong Pil Jeong
  • Patent number: 8772801
    Abstract: An active layer having a type 2 multi-quantum well structure includes a plurality of pair thickness groups having different thicknesses, including a first pair thickness group and a second pair thickness group. The first pair thickness group g1 includes 10 to 100 pairs, each monolayer of the pairs having a thickness of 1.5 nm or more and less than 3.5 nm. The second pair thickness group g2 includes 10 to 100 pairs, each monolayer of the pairs having a thickness of the minimum thickness (a second group minimum thickness) or more and 7 nm or less, the minimum thickness being larger than the maximum monolayer thickness 3.5 nm of the first pair thickness group.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: July 8, 2014
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi Inada, Sundararajan Balasekaran
  • Patent number: 8759853
    Abstract: Disclosed is a light emitting device including a substrate, a first buffer layer disposed on the substrate, the first buffer layer comprising aluminum nitride (AlN), an insertion layer disposed on the first buffer layer, the insertion layer comprising aluminum (Al), and a light emitting structure disposed on the insertion layer, the light emitting structure comprising a first semiconductor layer, a second semiconductor layer, and an active layer interposed between the first semiconductor layer and the second semiconductor layer.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: June 24, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Seungkeun Nam, Junghun Jang, Jeongsik Lee
  • Patent number: 8759813
    Abstract: An Al0.95Ga0.05N:Mg (25 nm) single electron barrier can stop electrons having energy levels lower than the barrier height. Meanwhile, a 5-layer Al0.95Ga0.05N (4 nm)/Al0.77Ga0.23N (2 nm) MQB has quantum-mechanical effects so as to stop electrons having energy levels higher than the barrier height. Thus, electrons having energy levels higher than the barrier height can be blocked by making use of multiquantum MQB effects upon electrons. The present inventors found that the use of an MQB allows blocking of electrons having higher energy levels than those blocked using an SQB. In particular, for InAlGaN-based ultraviolet elements, AlGaN having the composition similar to that of AlN is used; however, it is difficult to realize a barrier having the barrier height exceeding that of AlN. Therefore, MQB effects are very important.
    Type: Grant
    Filed: November 25, 2010
    Date of Patent: June 24, 2014
    Assignee: RIKEN
    Inventor: Hideki Hirayama
  • Patent number: 8754425
    Abstract: Electrically pixelated luminescent devices, methods for forming electrically pixelated luminescent devices, systems including electrically pixelated luminescent devices, and methods for using electrically pixelated luminescent devices are described. More specifically, electrically pixelated luminescent devices that have inner and outer semiconductor layers and a continuous light emitting region, as well as individually addressable electrodes are described.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: June 17, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: James E. Anderson, Nicole J. Wagner, Tommie W. Kelley, Andrew J. Ouderkirk, Craig R. Schardt, Catherine A. Leatherdale, Philip E. Watson
  • Patent number: 8742394
    Abstract: A semiconductor light-emitting element includes a support substrate, a semiconductor film including a light-emitting layer provided on the support substrate, a surface electrode provided on a light-extraction-surface-side surface of the semiconductor film, and a light-reflecting layer provided between the support substrate and the semiconductor film, forming a light-reflecting surface. The surface electrode includes a first electrode piece and a second electrode piece. The light-reflecting layer includes a reflection electrode including a third electrode piece and a fourth electrode piece. The first electrode piece and the third electrode piece are arranged so as to not overlap when projected onto a projection surface parallel to a principal surface of the semiconductor film, and the shortest distance between the first electrode piece and the fourth electrode piece, is greater than the shortest distance between the first electrode piece and the third electrode piece.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: June 3, 2014
    Assignee: Stanley Electric Co., Ltd.
    Inventor: Takuya Kazama
  • Patent number: 8742395
    Abstract: In one embodiment, a semiconductor light emitting device includes a stacked structure, a first electrode and a second electrode. A first semiconductor layer is broken into several pieces. Light is taken out from a light emitting layer side to a third semiconductor layer side. The first electrode includes a first region connected to the first semiconductor layer and a second region directly connected to the second semiconductor layer. The second electrode is connected to the third semiconductor layer, is provided above the second region from an upper direction of view, and has a thin wire shape or a dot shape.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: June 3, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akira Tanaka, Yoko Motojima
  • Patent number: 8735867
    Abstract: There are disclosed a group III nitride nanorod light emitting device and a method of manufacturing thereof. The group III nitride nanorod light emitting device includes a substrate, an insulating film formed on the substrate, and including a plurality of openings exposing parts of the substrate and having different diameters, and first conductive group III nitride nanorods having different diameters, respectively formed in the plurality of openings, wherein each of the first conductive group III nitride nanorods has an active layer and a second conductive semiconductor layer sequentially formed on a surface thereof.
    Type: Grant
    Filed: September 13, 2011
    Date of Patent: May 27, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han Kyu Seong, Hun Jae Chung, Jung Ja Yang, Cheol Soo Sone
  • Patent number: 8735927
    Abstract: The invention provides a Group III nitride semiconductor light-emitting device which has a light extraction face at the n-layer side and which provides high light emission efficiency. The light-emitting device is produced through the laser lift-off technique. The surface of the n-GaN layer of the light-emitting device is roughened. On the n-GaN layer, a transparent film is formed. The transparent film satisfies the following relationship: 0.28?n×d1×2/??0.42 or 0.63?n×d1×2/??0.77, wherein n represents the refractive index of the transparent film, d1 represents the thickness of the transparent film in the direction orthogonal to an inclined face thereof, and ? represents the wavelength of the light emitted from the MQW layer.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: May 27, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yuhei Ikemoto, Naoki Arazoe
  • Patent number: 8735925
    Abstract: Certain embodiments provide a semiconductor light emitting device including: a first metal layer; a stack film including a p-type nitride semiconductor layer, an active layer, and an n-type nitride semiconductor layer; an n-electrode; a second metal layer; and a protection film protecting an outer circumferential region of the upper face of the n-type nitride semiconductor layer, side faces of the stack film, a region of an upper face of the second metal layer other than a region in contact with the p-type nitride semiconductor layer, and a region of an upper face of the first metal layer other than a region in contact with the second metal layer. Concavities and convexities are formed in a region of the upper face of the n-type nitride semiconductor layer, the region being outside the region in which the n-electrode is provided and being outside the regions covered with the protection film.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: May 27, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kotaro Zaima, Toru Gotoda, Toshiyuki Oka, Shinya Nunoue
  • Patent number: 8729579
    Abstract: An illuminating device includes at least first and second nitride-based semiconductor light-emitting elements each having a semiconductor chip with an active layer region. The active layer region is at an angle of 1° or more with an m plane, and an angle formed by a normal line of a principal surface in the active layer region and a normal line of the m plane is 1° or more and 5° or less. The first and second nitride-based semiconductor light-emitting elements have thicknesses of d1 and d2, respectively, and emit the polarized light having wavelengths ?1 and ?2, respectively, where the inequalities of ?1<?2 and d1<d2 are satisfied.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: May 20, 2014
    Assignee: Panasonic Corporation
    Inventors: Toshiya Yokogawa, Akira Inoue, Masaki Fujikane, Mitsuaki Oya, Atsushi Yamada, Tadashi Yano