Including Nitride (e.g., Gan) (epo) Patents (Class 257/E33.025)
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Publication number: 20110220935Abstract: A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate. The light emitting element having a light extraction surface. The first electrode layer on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface of the light emitting element. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, a first conductive type semiconductor layer, and a second conductive type semiconductor layer.Type: ApplicationFiled: September 2, 2010Publication date: September 15, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Toru GOTODA, Toshiyuki Oka, Shinya Nunoue, Kotaro Zaima
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Patent number: 8018029Abstract: A gallium nitride-based epitaxial wafer for a nitride light-emitting device comprises a gallium nitride substrate having a primary surface, a gallium nitride-based semiconductor film provided on the primary surface, and, an active layer provided on the semiconductor film, the active layer having a quantum well structure. A normal line of the primary surface and a C-axis of the gallium nitride substrate form an off angle with each other. The off angle monotonically increases on the line that extends from one point to another point through a center point of the primary surface. The one point and the other point are on an edge of the primary surface, and indium contents of the well layer defined at n points on the line monotonically decrease in a direction from the one point to the other point. The thickness values of the well layer defined at the n points monotonically increase in the direction.Type: GrantFiled: September 23, 2009Date of Patent: September 13, 2011Assignee: Sumitomo Electric Industries, Ltd.Inventors: Yusuke Yoshizumi, Masaki Ueno, Takao Nakamura
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Publication number: 20110215370Abstract: According to one embodiment, a semiconductor light-emitting device having high light extraction efficiency is provided. The semiconductor light-emitting device includes a light transmissive substrate; a nitride semiconductor layer of a first conduction type formed on or above a top face side of the light transmissive substrate; an active layer made of nitride semiconductor formed on a top face of the nitride semiconductor layer of the first conduction type; a nitride semiconductor layer of a second conduction type formed on a top face of the active layer; a dielectric layer formed on a bottom face of the light transmissive substrate and having a refractive index lower than that of the light transmissive substrate; and a metal layer formed on a bottom face of the dielectric layer. And an interface between the light transmissive substrate and the dielectric layer is a uneven face, and an interface between the dielectric layer and the metal layer is a flat face.Type: ApplicationFiled: September 1, 2010Publication date: September 8, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue, Kazufumi Shiozawa, Takayoshi Fujii
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Publication number: 20110215351Abstract: According to one embodiment, a semiconductor light-emitting device includes an n-type semiconductor layer including a nitride semiconductor, a p-type semiconductor layer including a nitride semiconductor, a light-emitting portion and a stacked body. The light-emitting portion is provided between the n-type and p-type semiconductor layers and includes a barrier layer and a well layer. The well layer is stacked with the barrier layer. The stacked body is provided between the light-emitting portion and the n-type semiconductor layer and includes a first layer and a second layer. The second layer is stacked with the first layer. Average In composition ratio of the stacked body is higher than 0.4 times average In composition ratio of the light-emitting portion. The layer thickness tb of the barrier layer is 10 nanometers or less.Type: ApplicationFiled: September 3, 2010Publication date: September 8, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Shigeya Kimura, Hajime Nago, Toshiyuki Oka, Koichi Tachibana, Toshiki Hikosaka, Shinya Nunoue
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Patent number: 8008181Abstract: Misfit dislocations are redirected from the buffer/Si interface and propagated to the Si substrate due to the formation of bubbles in the substrate. The buffer layer growth process is generally a thermal process that also accomplishes annealing of the Si substrate so that bubbles of the implanted ion species are formed in the Si at an appropriate distance from the buffer/Si interface so that the bubbles will not migrate to the Si surface during annealing, but are close enough to the interface so that a strain field around the bubbles will be sensed by dislocations at the buffer/Si interface and dislocations are attracted by the strain field caused by the bubbles and move into the Si substrate instead of into the buffer epi-layer. Fabrication of improved integrated devices based on GaN and Si, such as continuous wave (CW) lasers and light emitting diodes, at reduced cost is thereby enabled.Type: GrantFiled: August 12, 2009Date of Patent: August 30, 2011Assignee: The Regents of The University of CaliforniaInventors: Zuzanna Liliental-Weber, Rogerio Luis Maltez, Hadis Morkoc, Jinqiao Xie
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Publication number: 20110204394Abstract: According to one embodiment, a semiconductor light emitting device includes n-type and p-type semiconductor layers, barrier layers, and a well layer. The n-type and p-type semiconductor layers and the barrier layers include nitride semiconductor. The barrier layers are provided between the n-type and p-type semiconductor layers. The well layer is provided between the barrier layers, has a smaller band gap energy than the barrier layers, and includes InGaN. At least one of the barrier layers includes first, second, and third layers. The second layer is provided closer to the p-type semiconductor layer than the first layer. The third layer is provided closer to the p-type semiconductor layer than the second layer. The second layer includes AlxGa1?xN (0<x?0.05). A band gap energy of the second layer is larger than the first and third layers. A total thickness of the first and second layers is not larger than the third layer.Type: ApplicationFiled: September 3, 2010Publication date: August 25, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Toshiki HIKOSAKA, Tomonari Shioda, Yoshiyuki Harada, Shinya Nunoue
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Publication number: 20110204411Abstract: According to one embodiment, a crystal growth method is disclosed for growing a crystal of a nitride semiconductor on a major surface of a substrate. The major surface is provided with asperities. The method can include depositing a buffer layer on the major surface at a rate of not more than 0.1 micrometers per hour. The buffer layer includes GaxAl1-xN (0.1?x<0.5) and has a thickness of not smaller than 20 nanometers and not larger than 50 nanometers. In addition, the method can include growing the crystal including a nitride semiconductor on the buffer layer at a temperature higher than a temperature of the substrate in the depositing the buffer layer.Type: ApplicationFiled: September 3, 2010Publication date: August 25, 2011Applicant: Kabushiki Kaisha ToshibaInventors: Hajime NAGO, Koichi TACHIBANA, Toshiki HIKOSAKA, Shinya NUNOUE
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Patent number: 8004065Abstract: A nitride semiconductor includes: a substrate having a major surface including a first crystal polarity surface and a second crystal polarity surface different from the first crystal polarity surface; and a single polarity layer provided above the major surface and having a single crystal polarity.Type: GrantFiled: October 14, 2008Date of Patent: August 23, 2011Assignee: Kabushiki Kaisha ToshibaInventor: Hideto Sugawara
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Publication number: 20110198667Abstract: There are provided a vapor deposition system, a method of manufacturing a light emitting device, and a light emitting device. A vapor deposition system according to an aspect of the invention may include: a first chamber having a first susceptor and at least one gas distributor discharging a gas in a direction parallel to a substrate disposed on the first susceptor; and a second chamber having a second susceptor and at least one second gas distributor arranged above the second susceptor to discharge a gas downwards. When a vapor deposition system according to an aspect of the invention is used, a semiconductor layer being thereby grown has excellent crystalline quality, thereby improving the performance of a light emitting device. Furthermore, while the operational capability and productivity of the vapor deposition system are improved, deterioration in an apparatus can be prevented.Type: ApplicationFiled: November 5, 2010Publication date: August 18, 2011Inventors: Dong Ju LEE, Hyun Wook Shim, Heon Ho Lee, Young Sun Kim, Sung Tae Kim
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Publication number: 20110198991Abstract: Disclosed are a light emitting device, a method of manufacturing the same, a light emitting device package, and an illumination system. The light emitting device includes a transmissive substrate, an ohmic layer on the transmissive substrate, a light emitting structure on the ohmic layer and including a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer between the first and second semiconductor layers, a electrode layer on a bottom surface of the transmissive substrate, and a conductive via electrically connecting the light emitting structure with the electrode layer through the transmissive substrate wherein an area of the transmissive substrate is increased toward an upper portion thereof from a lower portion.Type: ApplicationFiled: February 16, 2011Publication date: August 18, 2011Inventors: Hwan Hee Jeong, Sang Youl Lee, Ji Hyung Moon, June O Song, Kwang Ki Choi
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Publication number: 20110198668Abstract: A semi-conductor light emitting device 10 in the present invention comprises an n-type ZnO substrate 3, an emission layer 2, anode 4, and cathode 5. The n-type ZnO substrate 3 has a mounting surface 31 on one of its surfaces. The emission layer 2 is composed of a p-type GaN film 24 and an n-type GaN film 22, and superimposed on the n-type ZnO substrate 3 with the p-type GaN film 24 directly disposed on the mounting surface 31 of the n-type ZnO substrate 3. The anode 4 is disposed directly on the mounting surface 31 of the n-type GaN substrate 3 in an ohmic contact therewith and in a spaced relation from the emission layer. The cathode 4 is disposed on the n-type GaN film 22 in an ohmic contact therewith. The cathode 4 and anode 5 are of the same structure solely composed of a metallic material. The semi-conductor light emitting device in the present invention assures good ohmic contact of both the cathode 4 and the anode 5, and minimizes consumption of metallic materials.Type: ApplicationFiled: October 9, 2009Publication date: August 18, 2011Inventor: Akihiko Murai
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Patent number: 7999272Abstract: There is provided a semiconductor light emitting device having a patterned substrate and a manufacturing method of the same. The semiconductor light emitting device includes a substrate; a first conductivity type nitride semiconductor layer, an active layer and a second conductivity type nitride semiconductor layer sequentially formed on the substrate, wherein the substrate is provided on a surface thereof with a pattern having a plurality of convex portions, wherein out of the plurality of convex portions of the pattern, a distance between a first convex portion and an adjacent one of the convex portions is different from a distance between a second convex portion and an adjacent one of the convex portions.Type: GrantFiled: November 18, 2008Date of Patent: August 16, 2011Assignee: Samsung LED Co., Ltd.Inventors: Sun Woon Kim, Hyun Kyung Kim, Hyung Ky Back, Jae Ho Han
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Patent number: 7998836Abstract: A method of fabricating a gallium nitride-based semiconductor electronic device is provided, the method preventing a reduction in adhesiveness between a gallium nitride-based semiconductor layer and a conductive substrate. A substrate 11 is prepared. The substrate 11 has a first surface 11a and a second surface 11b, the first surface 11a allowing a gallium nitride-based semiconductor to be deposited thereon. The substrate 11 includes a support 13 of a material different from the gallium nitride-based semiconductor. The support is exposed on the second surface 11b of the substrate 11. An array of grooves 15 is provided in the second surface 11b. A semiconductor region including at least one gallium nitride-based semiconductor layer is deposited on the first surface 11a of the substrate 11, and thereby an epitaxial substrate E is fabricated.Type: GrantFiled: October 27, 2010Date of Patent: August 16, 2011Assignee: Sumitomo Electric Industries, Ltd.Inventors: Hiromu Shiomi, Shinsuke Fujiwara, Yu Saitoh, Makoto Kiyama
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Publication number: 20110193093Abstract: Provided is a light emitting device. A light emitting device includes: a conductive support member; a light emitting structure for generating a light on the conductive support member, the light emitting structure comprising a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer; an electrode on the light emitting structure; and an oxide layer between the electrode and the light emitting structure. The light emitting structure includes an oxygen-injected region where oxygen is injected on an upper portion of the light emitting structure.Type: ApplicationFiled: February 8, 2011Publication date: August 11, 2011Inventors: Hyung Jo Park, Hyun Kyong Cho
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Publication number: 20110193060Abstract: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a p-electrode pad formed on the transparent electrode, the p-electrode pad being spaced from the outer edge line of the p-type nitride semiconductor layer by 50 to 200 ?m; and an n-electrode pad formed on the n-type nitride semiconductor layer.Type: ApplicationFiled: April 20, 2011Publication date: August 11, 2011Applicant: SAMSUNG LED CO., LTD.Inventors: Hyuk Min LEE, Hyun Kyung Kim, Dong Joon Kim, Hyoun Soo Shin
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Patent number: 7994525Abstract: A nitride-based semiconductor LED includes a substrate; an n-type nitride semiconductor layer formed on the substrate; an active layer and a p-type nitride semiconductor layer that are sequentially formed on a predetermined region of the n-type nitride semiconductor layer; a transparent electrode formed on the p-type nitride semiconductor layer; a p-electrode pad formed on the transparent electrode, the p-electrode pad being spaced from the outer edge line of the p-type nitride semiconductor layer by 50 to 200 ?m; and an n-electrode pad formed on the n-type nitride semiconductor layer.Type: GrantFiled: December 14, 2010Date of Patent: August 9, 2011Assignee: Samsung LED Co., Ltd.Inventors: Hyuk Min Lee, Hyun Kyung Kim, Dong Joon Kim, Hyoun Soo Shin
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Publication number: 20110186857Abstract: Provided is a light emitting device according to one embodiment including: a substrate which has protrusions on the C-face, and of which unit cells are constructed in a hexagonal structure; a semiconductor layer which is formed on the substrate, in which empty spaces are formed in sides of the protrusions, and of which unit cells are constructed in a hexagonal structure; and a light emitting structure layer comprising a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer formed between the first conductive semiconductor layer and second conductive semiconductor layer which are formed on the semiconductor layer, wherein the A-face of the substrate and the A-face of the semiconductor layer form an angle of greater than zero degree, and the protrusions include the R-faces.Type: ApplicationFiled: February 3, 2011Publication date: August 4, 2011Inventor: Dae Sung KANG
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Publication number: 20110186882Abstract: Provided are a light emitting device, a method of manufacturing the light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a reflective layer including a first GaN-based semiconductor layer having a first refractive index, a second GaN-based semiconductor layer having a second refractive index less than the first refractive index, and a third GaN-based semiconductor layer having a third refractive index less than the second refractive index and a light emitting structure layer including a first conductive type semiconductor layer, a second conductive type semiconductor layer, and an active layer disposed between the first conductive type semiconductor layer and the second conductive type semiconductor layer on the reflective layer.Type: ApplicationFiled: November 17, 2010Publication date: August 4, 2011Applicant: LG INNOTEK CO., LTD.Inventors: Dae Sung KANG, Myung Hoon JUNG
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Publication number: 20110186856Abstract: A method for manufacturing a light emitting element includes providing a substrate, forming a buffer layer on the substrate, forming a GaN layer on the buffer layer, forming a rough layer on the GaN layer at low temperature, and forming an epitaxial layer on the rough layer, wherein a refraction index of the epitaxial layer exceeds a refraction index of the rough layer. Thus, most light scatters at the rough layer, and then emits upwardly to a light emitting surface, enhancing light extraction efficiency thereof. An epitaxial process of the method is processed in situ in an MOCVD reactor.Type: ApplicationFiled: December 13, 2010Publication date: August 4, 2011Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.Inventors: SHIH-CHENG HUANG, PO-MIN TU, PENG-YI WU
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Patent number: 7989235Abstract: A light emitting diode (LED) and a method for fabricating the same, capable of improving brightness by forming a InGaN layer having a low concentration of indium, and whose lattice constant is similar to that of an active layer of the LED, is provided. The LED includes: a buffer layer disposed on a sapphire substrate; a GaN layer disposed on the buffer layer; a doped GaN layer disposed on the GaN layer; a GaN layer having indium disposed on the GaN layer; an active layer disposed on the GaN layer having indium; and a P-type GaN disposed on the active layer. Here, an empirical formula of the GaN layer having indium is given by In(x)Ga(1-x)N and a range of x is given by 0<x<2, and a thickness of the GaN layer having indium is 50-200 ?.Type: GrantFiled: February 5, 2010Date of Patent: August 2, 2011Assignee: LG Innotek Co., LtdInventor: Seong Jae Kim
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Publication number: 20110180805Abstract: A III-nitride semiconductor device has a support base comprised of a III-nitride semiconductor and having a primary surface extending along a first reference plane perpendicular to a reference axis inclined at a predetermined angle ALPHA with respect to the c-axis of the III-nitride semiconductor, and an epitaxial semiconductor region provided on the primary surface of the support base. The epitaxial semiconductor region includes a plurality of GaN-based semiconductor layers. The reference axis is inclined at a first angle ALPHA1 in the range of not less than 10 degrees, and less than 80 degrees from the c-axis of the III-nitride semiconductor toward a first crystal axis, either one of the m-axis and a-axis. The reference axis is inclined at a second angle ALPHA2 in the range of not less than ?0.30 degrees and not more than +0.30 degrees from the c-axis of the III-nitride semiconductor toward a second crystal axis, the other of the m-axis and a-axis.Type: ApplicationFiled: July 14, 2010Publication date: July 28, 2011Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Yohei ENYA, Yusuke YOSHIZUMI, Takashi KYONO, Takamichi SUMITOMO, Katsushi AKITA, Masaki UENO, Takao NAKAMURA
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Publication number: 20110180839Abstract: A light emitting diode structure is disclosed that includes a light emitting active portion formed of epitaxial layers and carrier substrate supporting the active portion. A bonding metal system that predominates in nickel and tin joins the active portion to the carrier substrate. At least one titanium adhesion layer is between the active portion and the carrier substrate and a platinum barrier layer is between the nickel-tin bonding system and the titanium adhesion layer. The platinum layer has a thickness sufficient to substantially prevent tin in the nickel tin bonding system from migrating into or through the titanium adhesion layer.Type: ApplicationFiled: February 25, 2011Publication date: July 28, 2011Inventors: Matthew Donofrio, David B. Slater, JR., John A. Edmond, Hua-Shuang Kong
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Publication number: 20110180781Abstract: A packaged light emitting device. The device has a substrate member comprising a surface region. The device also has two or more light emitting diode devices overlying the surface region. Each of the light emitting diode device is fabricated on a semipolar or nonpolar GaN containing substrate. The two or more light emitting diode devices are fabricated on the semipolar or nonpolar GaN containing substrate emits substantially polarized emission.Type: ApplicationFiled: June 9, 2009Publication date: July 28, 2011Applicant: Soraa, IncInventors: James W. Raring, Daniel F. Feezell
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Publication number: 20110177638Abstract: A semiconductor structure is grown on a top surface of a growth substrate. The semiconductor structure comprises a III-nitride light emitting layer disposed between an n-type region and a p-type region. A curvature control layer is disposed in direct contact with the growth substrate. The growth substrate has a thermal expansion coefficient less than a thermal expansion coefficient of GaN and the curvature control layer has a thermal expansion coefficient greater than the thermal expansion coefficient of GaN.Type: ApplicationFiled: January 15, 2010Publication date: July 21, 2011Applicants: KONINKLIJKE PHILIPS ELECTRONICS N.V., PHILIPS LUMILEDS LIGHTING COMPANY, LLCInventors: Linda T. ROMANO, Byung-kwon HAN, Michael D. CRAVEN
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Publication number: 20110175105Abstract: A plurality of protrusions is formed on the C-plane substrate with a corundum structure. A base film made of a III-V compound semiconductor including Ga and N is formed on the surface of the substrate. The surface of the base film is flatter than the surface of the substrate. A light emitting structure including Ga and N is disposed on the base film. The protrusions are regularly arranged in a first direction that is tilted by less than 15 degrees with respect to the a-axis of the base film and in a second direction that is orthogonal to the first direction. Each protrusion has two first parallel sides tilted by less than 15 degrees relative to an m-axis and two second parallel sides tilted by less than 15 degrees relative to the a-axis. An interval between the two second sides is wider than an interval between the two first sides.Type: ApplicationFiled: January 13, 2011Publication date: July 21, 2011Applicant: STANLEY ELECTRIC CO., LTD.Inventors: Jiro HIGASHINO, Ji-Hao LIANG, Takako CHINONE, Yasuyuki SHIBATA
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Patent number: 7981710Abstract: A light emitting device of the invention includes an electron transporting layer, a hole transporting layer provided mutually facing the electron transporting layer with a distance between the hole transporting layer and the electron transporting layer, a phosphor layer having a layer of a plurality of semiconductor fine particles sandwiched between the electron transporting layer and the hole transporting layer, a first electrode provided facing the electron transporting layer and connected electrically, and a second electrode provided facing the hole transporting layer and connected electrically: in which the semiconductor fine particles composing the phosphor layer have a p-type part and an n-type part inside of the particles and have a pn-junction in the interface of the p-type part and the n-type part and are arranged in a manner that the p type part is partially brought into contact with the hole transporting layer and at the same time, the n type part is partially brought into contact with the electronType: GrantFiled: March 28, 2008Date of Patent: July 19, 2011Assignee: Panasonic CorporationInventors: Eiichi Satoh, Shogo Nasu, Reiko Taniguchi, Masayuki Ono, Masaru Odagiri
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Publication number: 20110169043Abstract: Provided are a light emitting device, a method of manufacturing the light emitting device, a light emitting device package, and a lighting system. The light emitting device comprises a light emitting structure layer including a first conductive type semiconductor layer, a second conductive type semiconductor layer, an active layer between the first conductive type semiconductor layer and the second conductive type layer. At least one lateral surface of the light emitting structure layer has cleavage planes of an A-plane and an M-plane.Type: ApplicationFiled: January 7, 2011Publication date: July 14, 2011Applicant: LG INNOTEK CO., LTD.Inventor: Dae Sung KANG
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Publication number: 20110169023Abstract: A method of making quasi-vertical light emitting devices includes growing semiconductor layers on a growth substrate and etching the semiconductor layers to produce device isolation trenches forming separable semiconductor devices and holes. Blind holes are drilled in the substrate at the location of each of the holes in the semiconductor layers. The drilling of the blind holes defines blind hole walls and a blind hole end in each of the blind holes. N-semiconductor metal is deposited in each of the blind holes. An n-electrode contact is formed in each of the blind holes by plating each of the blind holes with an n-electrode metal connected to the n-semiconductor metal. The substrate is thinned to expose the n-electrode metal as an n-electrode. Bonding metal is deposited to the n-electrode for packaging.Type: ApplicationFiled: March 29, 2011Publication date: July 14, 2011Applicant: Hong Kong Applied Science and Technology Research Institute Co. Ltd.Inventors: Limin Lin, HungShen Chu, Ka Wah Chan
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Patent number: 7977701Abstract: A GaN layer is grown on a sapphire substrate, an SiO2 film is formed on the GaN layer, and a GaN semiconductor layer including an MQW active layer is then grown on the GaN layer and the SiO2 film using epitaxial lateral overgrowth. The GaN based semiconductor layer is removed by etching except in a region on the SiO2 film, and a p electrode is then formed on the top surface of the GaN based semiconductor layer on the SiO2 film, to join the p electrode on the GaN based semiconductor layer to an ohmic electrode on a GaAs substrate. An n electrode is formed on the top surface of the GaN based semiconductor layer.Type: GrantFiled: June 18, 2010Date of Patent: July 12, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Nobuhiko Hayashi, Takashi Kano
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Patent number: 7977703Abstract: A nitride semiconductor device includes a semiconductor substrate; a first nitride semiconductor layer provided on the semiconductor substrate; a mask layer having opening portions, provided on the first nitride semiconductor layer; a second nitride semiconductor layer selectively grown on the mask layer laterally from the opening portions; and a semiconductor lamination portion formed by laminating nitride semiconductor layers so as to form a semiconductor element on the second nitride semiconductor layer. The substrate may be made of a zinc-based compound, the first nitride semiconductor layer may be provided on, and in contact with, the substrate, and at least a substrate side of the first nitride semiconductor layer may be made of AlyGa1-yN (0.05?y?0.2). Additionally, the semiconductor element may be a light emitting layer in which case the mask layer may include a metal film provided on the first nitride semiconductor layer and an insulating film provided on the metal film.Type: GrantFiled: November 21, 2006Date of Patent: July 12, 2011Assignee: Rohm Co., Ltd.Inventor: Yukio Shakuda
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Publication number: 20110163308Abstract: An array of vertical light-emitting diodes includes a flexible substrate-free array of vertical light-emitting diodes having a flexible polymer film forming an insulating organic layer, and a plurality of nanowires embedded in the flexible polymer film. Each of the nanowires is formed by a first and second inorganic semiconductor material or by a first organic and the first inorganic semiconductor material disposed in a respective channel in the flexible polymer film so as to form a pn-hetero-junction.Type: ApplicationFiled: July 2, 2008Publication date: July 7, 2011Inventors: Jie Chen, Martha Christina Lux-Steiner, Christoph Aichele
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Publication number: 20110163324Abstract: A light emitting diode of one embodiment includes a light emitting device having a plurality of N-type semiconductor layers including a first N-type semiconductor layer and a second N-type semiconductor layer on the first N-type semiconductor layer, an active layer on an upper layer of the plurality of N-type semiconductor layers, and a P-type semiconductor layer on the active layer. The first N-type semiconductor layer includes a first Si doped Nitride layer and the second N-type semiconductor layer includes a second Si doped Nitride layer. The first and second N-type semiconductor layers have a Si impurity concentration different from each other.Type: ApplicationFiled: March 11, 2011Publication date: July 7, 2011Inventor: Tae Yun KIM
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Publication number: 20110158277Abstract: A III-nitride semiconductor laser device is provided with a laser structure and an electrode. The laser structure includes a support base which comprises a hexagonal III-nitride semiconductor and has a semipolar primary surface, and a semiconductor region provided on the semipolar primary surface. The electrode is provided on the semiconductor region. The semiconductor region includes a first cladding layer of a first conductivity type GaN-based semiconductor, a second cladding layer of a second conductivity type GaN-based semiconductor, and an active layer provided between the first cladding layer and the second cladding layer. The laser structure includes first and second fractured faces intersecting with an m-n plane defined by the m-axis of the hexagonal III-nitride semiconductor and an axis normal to the semipolar primary surface. A laser cavity of the III-nitride semiconductor laser device includes the first and second fractured faces.Type: ApplicationFiled: July 16, 2010Publication date: June 30, 2011Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Yusuke YOSHIZUMI, Yohei ENYA, Takashi KYONO, Takamichi SUMITOMO, Nobuhiro SAGA, Masahiro ADACHI, Kazuhide SUMIYOSHI, Shinji TOKUYAMA, Shimpei TAKAGI, Takatoshi IKEGAMI, Masaki UENO, Koji KATAYAMA
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Publication number: 20110156056Abstract: A material such as a phosphor is optically coupled to a semiconductor structure including a light emitting region disposed between an n-type region and a p-type region, in order to efficiently extract light from the light emitting region into the phosphor. The phosphor may be phosphor grains in direct contact with a surface of the semiconductor structure, or a ceramic phosphor bonded to the semiconductor structure, or to a thin nucleation structure on which the semiconductor structure may be grown. The phosphor is preferably highly absorbent and highly efficient. When the semiconductor structure emits light into such a highly efficient, highly absorbent phosphor, the phosphor may efficiently extract light from the structure, reducing the optical losses present in prior art devices.Type: ApplicationFiled: March 11, 2011Publication date: June 30, 2011Applicant: PHILIPS LUMILEDS LIGHTING COMPANY LLCInventors: Michael R. Krames, Gerd O. Mueller
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Publication number: 20110155999Abstract: A conventional semiconductor LED is modified to include a microlenslayer over its light-emitting surface. The LED may have an active layer including at least one quantum well layer of InGaN and GaN. The microlens layer includes a plurality of concave microstructures that cause light rays emanating from the LED to diffuse outwardly, leading to an increase in the light extraction efficiency of the LED. The concave microstructures may be arranged in a substantially uniform array, such as a close-packed hexagonal array. The microlens layer is preferably constructed of curable material, such as polydimethylsiloxane (PDMS), and is formed by soft-lithography imprinting by contacting fluid material of the microlens layer with a template bearing a monolayer of homogeneous microsphere crystals, to cause concave impressions, and then curing the material to fix the concave microstructures in the microlens layer and provide relatively uniform surface roughness.Type: ApplicationFiled: December 8, 2010Publication date: June 30, 2011Applicant: Lehigh UniversityInventors: Nelson Tansu, James F. Gilchrist, Yik-Khoon Ee, Pisist Kumnorkaew
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Publication number: 20110156049Abstract: A LED device includes a n-type first semiconductor layer, a p-type second semiconductor layer, an active layer between the first semiconductor layer and the second semiconductor layer, an electrode positioned on a surface of the second semiconductor layer away from the active layer, and an ohmic contacting layer positioned on a surface of the second semiconductor layer away from the active layer. The ohmic contacting layer includes a resistance region corresponding to the electrode and a conductive region surrounding the resistance region, in which the conductive region having less resistance than that of the resistance region.Type: ApplicationFiled: August 31, 2010Publication date: June 30, 2011Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: CHIH-CHEN LAI
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Patent number: 7968893Abstract: Disclosed are a semiconductor light emitting device, which can improve characteristics of the semiconductor light emitting device such as a forward voltage characteristic and a turn-on voltage characteristic, increase light emission efficiency by lowering an input voltage, and increase reliability of the semiconductor light emitting device by a low-voltage operation, and a method of manufacturing the same. The semiconductor light emitting device includes: an n-type GaN semiconductor layer; an active layer formed on a gallium face of the n-type GaN semiconductor layer; a p-type semiconductor layer formed on the active layer; and an n-type electrode formed on a nitrogen face of the n-type GaN semiconductor layer and including a lanthanum (La)-nickel (Ni) alloy.Type: GrantFiled: September 15, 2008Date of Patent: June 28, 2011Assignee: Samsung LED Co., Ltd.Inventors: Sang Yeob Song, Jin Hyun Lee, Yu Seung Kim, Kwang Ki Choi, Pun Jae Choi, Hyun Soo Kim, Sang Bum Lee
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Patent number: 7968898Abstract: Provided are a nitride semiconductor light emitting device including a coat film formed at a light emitting portion and including an aluminum nitride crystal or an aluminum oxynitride crystal, and a method of manufacturing the nitride semiconductor light emitting device. Also provided is a nitride semiconductor transistor device including a nitride semiconductor layer and a gate insulating film which is in contact with the nitride semiconductor layer and includes an aluminium nitride crystal or an aluminum oxynitride crystal.Type: GrantFiled: March 5, 2007Date of Patent: June 28, 2011Assignee: Sharp Kabushiki KaishaInventors: Takeshi Kamikawa, Yoshinobu Kawaguchi
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GALLIUM NITRIDE WAFER SUBSTRATE FOR SOLID STATE LIGHTING DEVICES, AND ASSOCIATED SYSTEMS AND METHODS
Publication number: 20110147772Abstract: Gallium nitride wafer substrate for solid state lighting devices, and associated systems and methods. A method for making an SSL device substrate in accordance with one embodiment of the disclosure includes forming multiple crystals carried by a support member, with the crystals having an orientation selected to facilitate formation of gallium nitride. The method can further include forming a volume of gallium nitride carried by the crystals, with the selected orientation of the crystals at least partially controlling a crystal orientation of the gallium nitride, and without bonding the gallium nitride, as a unit, to the support member. In other embodiments, the number of crystals can be increased by a process that includes annealing a region in which the crystals are present, etching the region to remove crystals having an orientation other than the selected orientation, and/or growing the crystals having the selected orientation.Type: ApplicationFiled: December 15, 2010Publication date: June 23, 2011Applicant: MICRON TECHNOLOGY, INC.Inventors: Anthony Lochtefeld, Hugues Marchand -
Publication number: 20110147763Abstract: According to the present invention, an AlN crystal film seed layer having high crystallinity is combined with selective/lateral growth, whereby a Group III nitride semiconductor multilayer structure more enhanced in crystallinity can be obtained. The Group III nitride semiconductor multilayer structure of the present invention is a Group III nitride semiconductor multilayer structure where an AlN crystal film having a crystal grain boundary interval of 200 nm or more is formed as a seed layer on a C-plane sapphire substrate surface by a sputtering method and an underlying layer, an n-type semiconductor layer, a light-emitting layer and a p-type semiconductor layer, each composed of a Group III nitride semiconductor, are further stacked, wherein regions in which the seed layer is present and is absent are formed on the C-plane sapphire substrate surface and/or regions capable of epitaxial growth and incapable of epitaxial growth are formed in the underlying layer.Type: ApplicationFiled: July 30, 2009Publication date: June 23, 2011Applicant: SHOWA DENKO K.K.Inventors: Kenzo Hanawa, Yasumasa Sasaki
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Publication number: 20110147702Abstract: A III-nitride based device provides improved current injection efficiency by reducing thermionic carrier escape at high current density. The device includes a quantum well active layer and a pair of multi-layer barrier layers arranged symmetrically about the active layer. Each multi-layer barrier layer includes an inner layer abutting the active layer; and an outer layer abutting the inner layer. The inner barrier layer has a bandgap greater than that of the outer barrier layer. Both the inner and the outer barrier layer have bandgaps greater than that of the active layer. InGaN may be employed in the active layer, AlInN, AlInGaN or AlGaN may be employed in the inner barrier layer, and GaN may be employed in the outer barrier layer. Preferably, the inner layer is thin relative to the other layers. In one embodiment the inner barrier and active layers are 15 ? and 24 ? thick, respectively.Type: ApplicationFiled: December 14, 2010Publication date: June 23, 2011Applicant: Lehigh UniversityInventors: Nelson Tansu, Hongping Zhao, Guangyu Liu, Ronald Arif
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Patent number: 7964425Abstract: A method for manufacturing a p-type gallium nitride-based (GaN) device is disclosed. In accordance with the method, an Mg in an MgNx layer disposed on p-type gallium nitride is diffused into the p-type gallium nitride by a heat treatment to dope the p-type gallium nitride with the Mg while activating the diffused Mg simultaneously, eliminating a need for an additional heat treatment for the activation and preventing a nitrogen in the p-type gallium nitride from being separated therefrom.Type: GrantFiled: November 24, 2006Date of Patent: June 21, 2011Assignee: Theleds Co., Ltd.Inventor: Jong Hee Lee
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Publication number: 20110140125Abstract: A light emitting diode comprising an epitaxial layer structure, a first electrode, and a second electrode. The first and second electrodes are disposed on one side of the epitaxial layer structure. The epitaxial layer structure includes a transparent ohmic contact layer having a root-means-square (RMS) roughness less than about 3 nm at a surface whereon the second electrode is formed. The epitaxial layer structure includes a p-type epitaxial layer and a n-type epitaxial layer, wherein the n-type epitaxial layer is coupled between the first electrode and the p-type epitaxial layer, and the p-type epitaxial layer is between the second electrode and the n-type epitaxial layer. The first electrode is located on the n-type epitaxial layer.Type: ApplicationFiled: February 23, 2011Publication date: June 16, 2011Applicant: BRIDGELUX INCInventors: CHAO-KUN LIN, HENG LIU
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Publication number: 20110140102Abstract: A semiconductor device according to the embodiment includes a growth substrate; a first buffer layer having a compositional formula of RexSiy (0?x?2, 0?y?2) over the growth substrate; and a group III nitride-based epitaxial semiconductor layer having a compositional formula of InxAlyGa1-x-yN (0?x, 0?y, x+y?1) over the first buffer layer.Type: ApplicationFiled: May 4, 2009Publication date: June 16, 2011Inventor: June O Song
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Publication number: 20110140137Abstract: An LED device includes a heat conductive base, and a red, a green, and a blue LED chips mounted on the base. The red LED chip includes a first n-type GaN layer, a first p-type GaN layer, and a first active layer sandwiched therebetween. The first active layer of the red LED chip is added with europium to generate red light. The green LED chip includes a second n-type GaN layer, a second p-type GaN layer, and a second active layer sandwiched therebetween. The second active layer of the green LED chip is added with indium to generate green light. The blue LED chip includes a third n-type GaN layer, a third p-type GaN layer, and a third active layer sandwiched therebetween. The third active layer of the blue LED chip is added with of indium to generate blue light.Type: ApplicationFiled: September 30, 2010Publication date: June 16, 2011Applicant: HON HAI PRECISION INDUSTRY CO., LTD.Inventor: CHIH-CHEN LAI
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Publication number: 20110140141Abstract: A method for micropatterning a radiation-emitting surface of a semiconductor layer sequence for a thin-film light-emitting diode chip, wherein the semiconductor layer sequence is grown on a substrate, a mirror layer is formed or applied on the semiconductor layer sequence, which reflects back into the semiconductor layer sequence at least part of a radiation that is generated in the semiconductor layer sequence during the operation thereof and is directed toward the mirror layer, the semiconductor layer sequence is separated from the substrate, and a separation surface of the semiconductor layer sequence, from which the substrate is separated, is etched by an etchant which predominantly etches at crystal defects and selectively etches different crystal facets at the separation surface.Type: ApplicationFiled: February 15, 2011Publication date: June 16, 2011Applicant: Osram Opto Semiconductor GmbHInventors: Berthold HAHN, Stephan Kaiser, Volker Härle
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Patent number: 7960746Abstract: A low resistance electrode and a compound semiconductor light emitting device including the same are provided. The low resistance electrode deposited on a p-type semiconductor layer of a compound semiconductor light emitting device including an n-type semiconductor layer, an active layer, and the p-type semiconductor layer, including: a reflective electrode which is disposed on the p-type semiconductor layer and reflects light being emitted from the active layer; and an agglomeration preventing electrode which is disposed on the reflective electrode layer in order to prevent an agglomeration of the reflective electrode layer during an annealing process.Type: GrantFiled: November 3, 2004Date of Patent: June 14, 2011Assignee: Samsung LED Co., Ltd.Inventors: Joon-seop Kwak, Tae-yeon Seong, Jae-hee Cho, June-o Song, Dong-seok Leem, Hyun-soo Kim
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Publication number: 20110133208Abstract: Light extraction efficiency of a semiconductor light-emitting element is improved. A buffer layer, an n-type GaN layer, an InGaN emission layer, and a p-type GaN layer are laminated on a sapphire substrate in a semiconductor light-emitting element. A ZnO layer functioning as a transparent electrode is provided on the p-type GaN layer and concave portions are formed on a surface of the ZnO layer at two-dimensional periodic intervals. If a wavelength of light from the InGaN emission layer in the air is ?, an index of refraction of the ZnO layer at the wavelength ? is nz?, and a total reflection angle at an interface between the ZnO layer and a medium in contact therewith is ?z, a periodic interval Lz between adjacent concave portions is set in a range of ?/nz??Lz??/(nz?×(1?sin ?z)).Type: ApplicationFiled: February 1, 2011Publication date: June 9, 2011Applicant: ROHM CO., LTD.Inventor: Ken Nakahara
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Publication number: 20110136280Abstract: A method of manufacturing an optoelectronic light emitting semiconductor device is provided where a Multi-quantum Well (MQW) subassembly is subjected to reduced temperature vapor deposition processing to form one or more of n-type or p-type layers over the MQW subassembly utilizing a plurality of precursors and an indium surfactant. The precursors and the indium surfactant are introduced into the vapor deposition process at respective flow rates with the aid of one or more carrier gases, at least one of which comprises H2. The indium surfactant comprises an amount of indium sufficient to improve crystal quality of the p-type layers formed during the reduced temperature vapor deposition processing and the respective precursor flow rates and the H2 content of the carrier gas are selected to maintain a mole fraction of indium from the indium surfactant to be less than approximately 1% in the n-type or p-type layers.Type: ApplicationFiled: December 8, 2009Publication date: June 9, 2011Inventor: Rajaram Bhat
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Publication number: 20110133157Abstract: A double-metallic deposition process is used whereby adjacent layers of different metals are deposited on a substrate. The surface plasmon frequency of a base layer of a first metal is tuned by the surface plasmon frequency of a second layer of a second metal formed thereon. The amount of tuning is dependent upon the thickness of the metallic layers, and thus tuning can be achieved by varying the thicknesses of one or both of the metallic layers. In a preferred embodiment directed to enhanced LED technology in the green spectrum regime, a double-metallic Au/Ag layer comprising a base layer of gold (Au) followed by a second layer of silver (Ag) formed thereon is deposited on top of InGaN/GaN quantum wells (QWs) on a sapphire/GaN substrate.Type: ApplicationFiled: December 8, 2010Publication date: June 9, 2011Applicant: Lehigh UniversityInventors: Nelson Tansu, Hongping Zhao, Jing Zhang, Guangyu Liu