Abstract: Method of collectively packaging a plurality of electronic components formed in a first substrate, wherein the electronic components are separated from one other by separation strips associated with a plurality of conducting tracks formed on a second substrate. The conducting tracks on the second substrate are associated with contact pads of the components in the first substrate. Each conducting track on the second substrate includes a connection strip arranged to coincide with associated depressions in the first substrate when the first and second substrates are mated. After mating, the components are separated into individualized electronic modules by forming proximal trenches in the first substrate and distal trenches in the second substrate. The proximal trenches are formed around the components in the first substrate to open up into the depressions in the first substrate.

Abstract: A method of processing a leadframe strip defining a first row of alignment holes and a second row of alignment holes. One embodiment of the method comprises allowing incremental advancement of said leadframe strip using said first row of alignment holes and refraining from using said second row of alignment holes to allow said advancement.

Abstract: The present invention is a chip scale package handling part and process manufacturing method that uses existing automated equipment to economically mass produce chip scale packages. The present invention includes a unitary substrate panel having a plurality of die attach areas thereon for forming chip scale packages. The substrate panel has indexing holes formed therein so that the substrate panel is capable of being indexed by lead frame handling equipment. The lead frame handling equipment indexes the substrate panel through chip scale package fabrication machinery, where the chip scale package fabrication machinery is compatible for indexing lead frames therethrough. Examples of the chip scale package fabrication machinery include die attach machinery and wire-bonders. Conductive contacts are attached to the bottom portion of the substrate panel and the substrate panel is singulated to form a plurality of separated chip scale packages. The chip scale packages are preferably encapsulated for protection.

Abstract: In a method for coupling a PCB sheet, if a defective PCB is found after the manufacture of continuously arranged circuit patterns, then the defective PCB sheet portion is removed to replace it with a new PCB sheet portion. That is, a defective circuit pattern sheet is removed from continuously arranged circuit patterns of a first PCB sheet. After removal of the defective circuit pattern sheet, the first PCB sheet is position-located by a position locator. Then, the space which is formed by removing, the defective circuit pattern sheet is filled with a second PCB sheet on which a good quality circuit pattern is printed. Then, the first PCB sheet and the second PCB sheet are coupled together by using an adhesive.

Abstract: A method for manufacturing a ceramic resonator is disclosed. The method comprises the steps of forming a ceramic piezoelectric device, a capacitor chip and a lead frame, assembling the piezoelectric device and the capacitor chip into the lead frame, and molding the assembled chip by using epoxy resin. A process for making the capacitor includes the steps of cutting a ceramic wafer into a plurality of sub-wafers, printing electrodes on one face of the sub-wafer in a dual-striped form, drying the sub-wafer thus printed, printing another electrode on a central part of another face of the sub-wafer so as to be overlapped with the electrodes of the one face of the sub-wafer, drying the sub-wafer thus printed, baking the sub-wafer thus dried; and cutting the sub-wafer thus baked into a plurality of capacitors.

Abstract: A mold for taped lead frame assemblies is provided. The mold has a mold cavity large enough to hold an entire lead frame assembly. A taped lead frame assembly is placed completely in the mold cavity. A cover is used to cover the mold cavity. The cover is spaced apart from the taped lead frame assembly. A riser may be used to provide the spacing between the cover and the taped lead frame assembly, so that the cover does not contact the taped lead frame assembly. An encapsulation material is placed in the mold cavity and then hardened. The encapsulated taped lead frame assembly is then removed from the mold and singulated.

Abstract: A test structure that is readily and inexpensively configurable to interface with dies having different bond pad configurations is achieved by providing a blank test membrane having a conductive coating or a matrix of conductive lines formed thereon. Once a die bond pad configuration is known, the test membrane can be configured for the die bond pads by using a laser under software control to define connection pads correlating to the die bond pads and also to define interconnecting conductive traces from the connecting pads to contact pads that can be connected to test equipment. In one embodiment, the laser operates to ablate a continuous conductive coating, so as to form conductive pads and traces. In another embodiment, the laser is used to cut various lines in a matrix of conductive lines, so as to define conductive paths from the bond pads to the contact pads for connection to the test equipment.

Abstract: A helical antenna element is made by stamping a helical antenna base shape from a sheet of metal and pressing a plurality of sub-elements within the helical antenna base shape to form a helical antenna element. The helical antenna base shape includes the plurality of sub-elements, a plurality of joining pieces and at least one carrier strip. The helical antenna element may be further made by molding an insulating resin around the helical antenna element. Moreover, prior to molding the insulating resin, a ceramic cylinder may be inserted within the helical antenna element to insure the integrity of the semi-circularly pressed sub-elements. The carrier strip(s) are then removed from the joint pieces, producing the helical antenna.

Abstract: A leadframe resistance structure comprises: at least a resistance foil; a plurality of leads, each of the plurality of leads respectively having a first lead surface and an opposite second lead surface, wherein the resistance foil is disposed on the first lead surface of the leads and connected to the leads; and an encapsulating material that encapsulates the resistance foil, and a portion of the first surface of the leads.

Abstract: A dense semiconductor flip-chip device assembly is provided with a heat sink/spreading/dissipating member which is formed as a paddle of a metallic paddle frame in a strip of paddle frames. Dice are bonded to the paddles by e.g. conventional die attach methods, enabling bump attachment and testing to be conducted before detachment from the paddle frame strip.

Abstract: A process for manufacturing electronic device packages includes a step of forming a metal sheet into a runner part and a plurality of spaced apart terminal parts. The runner part extends in a longitudinal direction. The terminal parts are connected to the runner part and are aligned in the longitudinal direction. Each of the terminal parts includes a pair of spaced apart connecting legs that have lower inserting sections connected to the runner part, and upper soldering sections which extend from the lower inserting sections and which are offset from each other in a transverse direction relative to the longitudinal direction so as to define an inserting gap therebetween. The process further includes the steps of positioning an electronic element in the gap in each terminal part, and respectively connecting the upper soldering sections to two opposite side faces of the electronic element.

Abstract: A connection component for making connections to a microelectronic element is made by providing leads on a surface of a polymeric layer and etching the polymeric layer to partially detach the leads from the polymeric layer, leaving a portion of each lead releasably connected to the polymeric layer by a small polymeric connecting element which can be broken or peeled away from the lead. Leads in a connecting element may be covered by an insulating jacket applied by a coating process, and the insulating jacket may in turn be covered by a conductive layer so that each lead becomes a miniature coaxial cable. This arrangement provides immunity to interference and facilitates operation at high speeds.

Abstract: In order to suppress defective lead forming and defective mounting, a semiconductor device comprises a sealing body which has a square planar shape, a semiconductor chip which lies within the sealing body, and a plurality of leads which are electrically connected with electrodes of the semiconductor chip, which extend inside and outside the sealing body and which are arrayed along latera of the sealing body, wherein an outer lead portion of each of the leads is such that a root part which protrudes out of the sealing body is formed at a lead width being equal to or greater than a lead thickness, and that a mounting part which joins to the root part through an intermediate part is formed at a lead width being less than the lead thickness.

Abstract: An electronic device has a plastic housing. The plastic housing has components of a height-structured metallic leadframe. The components are in a matrix form and contain contact islands and chip islands on the underside of the plastic housing. Furthermore, the electronic device has a first line structure containing height-structured interconnects on the underside of the plastic housing and a second line structure containing bonding connections which are disposed within the plastic housing.

Abstract: Techniques for improving the manufacture and structure of leadframe chip scale packages and land grid array packages are described. One aspect of the invention pertains to a method for patterning a conductive substrate, which is utilized to form a packaged semiconductor device, wherein a metallic barrier layer and a second metallic layer are utilized as an etching resist. A method, according to another aspect of the invention pertains to covering a metallic barrier layer and second metallic layer with a etch resistant cap such that the etch resistant cap is used as a etching resist. In another aspect of the present invention, a method for treating a conductive leadframe with a CZ treatment is disclosed. In yet another aspect of the present invention, techniques relating to locking grooves within the studs of a studded leadframe are disclosed.

Abstract: An integrated circuit leadframe has a pair of leadframe rails that are specially treated to adhere to injection mold compounds to a lesser or greater degree than portions of the leadframe rails outside of the treated areas. By adhering to mold compounds to a greater degree, mold compound not removed during a deflashing procedure does not flake off to form mold compound debris during a trimming and forming procedure. By adhering to mold compounds to a lesser degree, substantially all of the mold compound is removed during the deflashing procedure so there is no mold compound to flake off to form mold compound debris during the trimming and forming procedure. The leadframe rails may be treated by forming apertures in the rails, by increasing or decreasing the roughness of the leadframe rails, or by coating the leadframe rails with an adhesion promoting or reducing material.

Abstract: Apparatus and methods for substantial planarization of solder bumps. In one embodiment, an apparatus includes a planarization member engageable with at least some of the plurality of outer surfaces to apply a planarization action on one or more of the outer surfaces to substantially planarize the plurality of outer surfaces, and a securing element to securely position the bumped device during engagement with the planarization member. Through application of “additive” and/or “subtractive” processes, the solder balls are substantially planarized.

Abstract: A method of making microelectronic assemblies includes temporarily securing one or more microelectronic elements in place on one or more components using one or more temporary securements extending between the microelectronic elements and components and adhering to the elements and components. Conductive features of the elements are connected to conductive features of the components and the temporary securements are released.

Abstract: A semiconductor packaging part and a method of forming the part by applying a minute plating with a high positional accuracy to a semiconductor chip to be packaged. A pair of alignment holes 2, 3 are formed at a pitch equal to n-times (n=1, 2 . . .

Abstract: A hollow package includes a package body composed of an epoxy resin having a low thermal coefficient of linear expansion, wherein the package body includes a recess for receiving an electronic component, and leads, for extracting electrodes of the electronic component, extending from the inner surface of the recess, via the upper surface of the package body, to the peripheral surface, and a transparent sealing plate bonded onto the upper surface of the package body with an ultraviolet-curable resin.

Abstract: A method and device for providing a gate blocking material. Specifically, a method for molding a substrate having known good and bad sites thereon, by blocking the gate area of the bad sites during the molding process. A blocking material or an injection pin are used to interrupt the flow of molding compound through an injection molding system, and thereby prevent molding compound from flowing onto the known bad substrate sites.

Abstract: A device for electrically interconnecting and packaging electronic components and method for manufacturing the device. A non-conducting base member having a component recess and a plurality of specially shaped lead channels formed therein is provided. At least one electronic component is disposed within the recess, and the wire leads of the component are routed through the lead channels. A plurality of lead terminals, adapted to cooperate with the specially shaped lead channels, are received within the lead channels, thereby forming an electrical connection between the lead terminals and the wire leads of the electronic component(s). The special shaping of the lead channels and lead terminals restricts the movement of the lead terminals within the lead channels in multiple directions during package fabrication, thereby allowing for the manufacture of larger, more reliable devices.

Abstract: An integrated circuit device has a heat spreader attached to each of the major outer encapsulant surfaces. One or both of the heat spreaders has a pair of end posts configured for insertion into through-holes in a substrate to position and support the device during and following the outer lead solder reflow step at board assembly. The heat spreaders provide high heat dissipation and EMR shielding, and may be connected to the substrate ground to become ground planes.

Abstract: A process for manufacturing fuse devices includes the steps of preparing an elongated metal sheet; forming a plurality of openings in the metal sheet so as to form a plurality of frame units, each of which includes a frame and a pair of opposing ribs that extend from the frame and that have spaced apart free ends; electrically connecting the free ends of the ribs of each of the frame units using a conductive wire; forming a dielectric body in each of the frame units; and cutting the ribs of the frame units at positions that are exposed from the respective one of the dielectric bodies so as to form a plurality of semi-finished fuse products.

Abstract: A dense semiconductor flip-chip device assembly is provided with a heat sink/spreading/dissipating member which is formed as a paddle of a metallic paddle frame in a strip of paddle frames. Dice are bonded to the paddles by e.g. conventional die attach methods, enabling bump attachment and testing to be conducted before detachment from the paddle frame strip.

Abstract: A stacked semiconductor chip package includes: a substrate including a plurality of conductive pads; a first semiconductor chip mounted on the substrate; and electrically connected to the conductive pads; a plurality of electrical leads provided about the substrate; a first molding part for sealing the substrate and the first semiconductor chip; a second semiconductor chip mounted on an upper surface of the first molding part and electrically connected to the electrical leads; and a second molding part for sealing the second semiconductor chip, the second conductive wires and a portion of the leads.

Abstract: Two dice may be provided within a single package so that one pin and associated leadfinger may be coupled to bond pads on different dice. This may mean that two different bond pads on different dice are coupled, for example by wirebonding, to the same leadfinger. An adhesive tape may be secured so as to bridge the two dice. One or more conductive traces are formed on the upper side of the adhesive tape and adhesive is provided on the other side to secure the tape to the two dice. As a result, wire bonds may be made from a pad on one die to a trace and then from the opposite side of the trace to a leadfinger. At the same time, a wire bond may be made from a pad on the other die to the same leadfinger. In another embodiment, an adhesive tape with a conductive trace on it may be used as a wire bond bridge to join spaced bond pads on a single chip.

Abstract: Printed tape is used to form a leads on chip (LOC) ball grid array (BGA) semiconductor device. Leads for a plurality of devices may be applied simultaneously. Bond wires, glob top encapsulant, and the ball grid arrays for the devices may be formed in single process steps. A low temperature curing adhesive material may be used to reduce the effects of differential thermal expansion between the tape and surface of the wafer. In another embodiment of the invention, anisotropically conductive adhesive material is used to connect bond pads on a wafer to leads printed on a tape.

Abstract: The invention concerns an apparatus for mounting semiconductor chips on a substrate with which the substrate is forwarded in steps in a first direction to a bonding station for the presentation of a next substrate position. In order that curved substrates or substrates otherwise slightly shifted in their position at right angles to the transport direction can be presented with positional accuracy at the bonding location, it is suggested that the position of the longitudinal edge of the substrate is measured at right angles to the transport direction at the level of the bonding station and then to carry out a corrective movement with the substrate. An optical sensor with two light barriers arranged next to each other is suggested for the sensor.

Abstract: A lead frame for a high power semiconductor device die has three external lead conductors, the outer two of which are reentrantly bent outwardly from the center of the lead frame. When the lead frame is overmolded, the outer conductors are spaced from a central conductor by an increased creepage distance along the plastic surface of the housing. Further, the lead sequence of the exterior leads is gate, source, drain for a power MOSFET. The post area for wire bonding to the source post is enlarged to permit wire bonding with at least three bond wires. The external conductors can be downwardly bent to form a surface mount device. The cross-sectional area of the external conductors is substantially enlarged, although only a small enlargement of the circuit board hole is needed. The package outline has a long flat area centered over the main die area, with a tapered end surface which allows the package to pry open a mounting spring for surface mounting of the package.

Abstract: Packages for an integrated circuit die and methods and leadframes for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wires, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant.

Abstract: An apparatus and method for preventing damage to tape attachment semiconductor assemblies due to encapsulation filler particles causing damage to a semiconductor die active surface and/or to a corresponding semiconductor substrate surface by providing an adhesive tape which extends across areas of contact between the semiconductor die active surface and the semiconductor substrate. The present invention also includes extending the adhesive tape beyond the areas of contact between the semiconductor die active surface and the semiconductor substrate to provide a visible surface of visual inspection of proper adhesive tape placement.

Abstract: Methods for making packages and leadframes are enclosed. The package includes a die, a die pad, leads, bond wires, and an encapsulant. The lower surfaces of the die pad and leads are provided with a stepped profile by an etching step that etches partially through the thickness of a peripheral portion of the die pad, and also etches partially through the thickness of portions of the leads. Encapsulant material is applied by molding or liquid encapsulation techniques. The encapsulant material fills in beneath the recessed, substantially horizontal surfaces of the die pad and leads formed by the above-described partial etching step, and thereby prevents the die pad and leads from being pulled vertically from the package body. Other surface of the die pad and leads are not covered during the encapsulation step, but rather remain exposed at the lower surface of the package for connecting the package externally.

Abstract: Two dice may be provided within a single package so that one pin and associated leadfinger may be coupled to bond pads on different dice. This may mean that two different bond pads on different dice are coupled, for example by wirebonding, to the same leadfinger. An adhesive tape may be secured so as to bridge the two dice. One or more conductive traces are formed on the upper side of the adhesive tape and adhesive is provided on the other side to secure the tape to the two dice. As a result, wire bonds may be made from a pad on one die to a trace and then from the opposite side of the trace to a leadfinger. At the same time, a wire bond may be made from a pad on the other die to the same leadfinger. In another embodiment, an adhesive tape with a conductive trace on it may be used as a wire bond bridge to join spaced bond pads on a single chip.

Abstract: An object of the present invention is to provide a method of manufacturing a semiconductor device which enables a decrease in mounting area on a printed circuit board and an increase in space efficiency on the printed circuit board.

Abstract: A process for manufacturing a semiconductor device (70) using selective plating and etching to form the packaging for such device. A flat sheet (20) of conductive material is selectively plated with a conductive etch resistant material to form a plurality of die attach areas (22) on one side (23) of the sheet (20) and to define die contact (24) and lead contact (26) areas on the opposite side (27) of the sheet. Mold locks (34) which also serve as interconnect bonding areas are selectively plated on the side (23) of the sheet in association with each of the die attach areas (22). Semiconductor die (40) are attached to each of the die attach areas (22) and bonded (42) to the tops of the mold locks (34). A unitary molded resin housing (50) is formed overlying all of the semiconductor device die (40). The underside (27) of the conductive sheet (20) is selectively etched using the plated etch resistant material (24), (26) as an etch mask to form isolated die contact areas (60) and lead contact areas (62).

Abstract: A standard size smart card has a flat support with a slot in the support to define the boundary of a minicard attached to the support by lugs. Each lug has two types of grooves opposite each other so they provide sufficient resistance to bending and flexing. One of the grooves is configured so it starts to crack when the minicard is purposely subject to pressure.

Abstract: A semiconductor card includes a printed circuit substrate upon which is mounted a card circuit including one or more semiconductor components such as dice or packages. External contacts link the card circuit to the circuit of another apparatus by removable insertion therein. The substrate is defined by a peripheral opening in a surrounding frame, which may be part of a multiframe strip. The substrate is connected to the frame by connecting segments. The card includes a first plastic casting molded to the substrate and encapsulating the semiconductor components while leaving a peripheral portion of the substrate uncovered. A second plastic casting is molded to the peripheral portion to abut the first plastic casting and form the card periphery. A method for fabricating the semiconductor card is also included.

Abstract: A method for bonding conductors onto semiconductor components is disclosed, where an opening is provided in an insulation layer on a semiconductor component. At least one conductor extends across the opening, where the conductor is bonded onto the semiconductor component by a bonding tool, which bends the conductor in the region of the opening toward the semiconductor component. Prior to the bonding, the conductor is severed in the region of the opening.

Abstract: A method of manufacturing a rotation sensor is provided. In the method, an insert conductor having a predetermined shape and having at least a connector terminal and a conversion device terminal is provided. The insert conductor is insert-molded in a resin base such that at least the connector terminal and the conversion device terminal of the insert conductor remain exposed from the resin base. A resin connector part is molded such that the resin connector part encircles the connector terminal. Also, a magnetoelectric conversion device is connected to the conversion device terminal of the insert conductor, and positioning parts are provided at a tip of the resin base. In addition, the magnetoelectric conversion device is sandwiched between the positioning parts to securely hold the magnetoelectric conversion device, and a press fit part is formed at the tip of the resin base.

Abstract: A method is provided for processing a lead frame. Generally, a first surface of a lead frame base tape is placed on a first surface of the lead frame. A second surface of the lead frame base tape is placed on a first surface of a porous block. A vacuum is placed on a second surface of the porous block. A device for processing lead frames comprises a porous block with a first side and a second side, and a vacuum system connected to the first side of the porous block. The device may also include devices for attaching chips to the lead frame and wire bonding the chips to the lead frame.

Abstract: A chip card is described, preferably a contactless chip card, comprising a data-processing circuit for receiving, processing and/or transmitting data signals, and at least a capacitive switching element which can be activated by means of a user's touch, whose activation of the switching element triggers at least the transmission of data signals from the data-processing circuit and without whose activation at least the transmission of data signals from the data-processing circuit is prevented. This chip card is formed in such a way that an arrangement is obtained with little manufacturing effort, ensuring a reliable activation or deactivation of the chip card by the user.

Abstract: A surface mount resistor includes an elongated piece of resistive material having strips of conductive material attached to its opposite ends. The strips of conductive material are separated to create an exposed central portion of the resistive material therebetween. According to the method the resistive strip is attached to a single co extensive strip of conductive material and a central portion of the conductive material is removed to create the exposed central portion of the resistive strip.

Abstract: A non-leaded type semiconductor device comprising a tab, tab suspension leads, plural leads, the tab, the tab suspension leads and the plural leads being exposed to one surface of the seal member, a semiconductor element positioned within the seal member and fixed to a surface of the tab with an adhesive, electrically conductive wires for electrically connecting electrodes on the semiconductor element and the leads with each other, and electrically conductive wires for electrically connecting the electrodes on the semiconductor element and a tab surface portion deviated from the semiconductor element with each other, wherein the tab is formed larger than the semiconductor element so that outer peripheral edges of the tab are positioned outside outer peripheral edges of the semiconductor element, a groove is formed in the tab surface portion positioned between a semiconductor element fixing area to which the semiconductor element is fixed and wire connection areas to which the wires are connected, the groove b

Abstract: A method for moving a workpiece having a first plurality of alignment features and a second plurality of alignment features. The method comprises attaching the workpiece to a workpiece advancer using at least a portion of the first alignment features such that the workpiece can move incrementally relative to the workpiece advancer. The method also includes shifting the workpiece using the workpiece advancer.

Abstract: An integrated circuit package (50) may include an integrated circuit chip (22) having an integrated circuit (14). A lead frame (28) may be opposite the integrated circuit chip (22). The lead frame (28) may include at least one lead (30) electrically coupled to the integrated circuit (14) by a connector (42). The lead (30) may be within a periphery (32) of the integrated circuit chip (22). An encapsulant (44) may cover the integrated circuit (14), the connector (42) and a portion of the lead frame (28). A remaining portion of the lead frame (28) may be exposed from the encapsulant (44).

Abstract: A microbeam interconnection method is provided to connect integrated circuit bond pads to substrate contacts. Conductive leads (microbeams) are releasably formed, by a process such as electroplating or vacuum deposition, over a release layer deposited on a ceramic, glass or similar carrier. The microbeam material adheres only very weakly to the release layer. After the inner ends of the microbeams have been bonded to IC bond pads, such as by flip chip bump bonding, and the integrated circuit has been fully tested, the IC is lifted away from the carrier, causing the microbeams to peel away from the release layer. After straightening the microbeams against a flat surface, the outer ends of the microbeams may then be bonded to contacts on an MCM or other substrate. The method permits full electrical testing at speed and high speed bonding. The method significantly reduces mechanical stresses in interconnect bonds and thereby improves integrated circuit reliability.

Abstract: A method of processing a leadframe strip defining a first row of alignment holes and a second row of alignment holes. One embodiment of the method comprises allowing incremental advancement of said leadframe strip using said first row of alignment holes and refraining from using said second row of alignment holes to allow said advancement.

Abstract: To enable readily forming the etching stop layer of a lead frame with multilayer structure by plating without using a large-scale device, enhance adhesive strength between the etching stop layer and an adjacent metal layer and prevent peeling caused by deterioration caused by the invasion of a chemical between the etching stop layer and each adjacent metal layer from occurring, an etching stop layer is formed by nickel or a nickel alloy in a method of manufacturing a lead frame at least provided with an etching process for selectively etching metal layers using an etching stop layer as an etching stopper in a state in which a thick metal layer is formed on one side of the etching stop layer as an intermediate layer and a thin metal layer is formed on the other side and a process for etching the etching stop layer using the metal layers on both sides as a mask.

Abstract: A system includes a printed circuit board (PCB) having multiple bonding sites and a packaged integrated circuit (IC) having multiple conductive portions for electrically contacting respective bonding sites when the IC is mounted thereon. A portion of the package is formed of a magnetic material. The system also includes a magnet to controllably induce a magnetic field at the PCB having a strength sufficient to attract the magnetic material provided in the IC package and to hold the packaged IC onto the PCB. The system also includes a testing unit for evaluating the PCB and packaged IC while the packaged IC is held onto the PCB by the magnetic field induced by the magnet. The IC package comprises a semiconductor IC chip encapsulated within a casing and a lead frame electrically coupled to the semiconductor IC chip. The lead frame includes the magnetic material.