Assembling Formed Circuit To Base Patents (Class 29/831)
  • Patent number: 8418355
    Abstract: A method for forming transcriptional circuits and a method for manufacturing a circuit board are disclosed. A method of forming a transcriptional circuit, which includes forming an intaglio pattern corresponding to a circuit pattern by selectively forming a resist on a mold board, filling conductive material in the intaglio pattern, and transferring the conductive material onto a carrier by pressing the carrier onto the mold board such that the carrier faces the surface of the mold board having the conductive material filled in, makes it possible to form transcriptional circuits that can be transcribed into an insulation board using existing equipment, whereby costs can be reduced.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: April 16, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sang-Duck Kim, Jung-Hyun Park, Hoe-Ku Jung, Jong-Gyu Choi, Ji-Eun Kim, Jeong-Woo Park
  • Patent number: 8418359
    Abstract: A method for manufacturing a circuit pattern-provided substrate including forming a resist layer on a substrate, forming an opening corresponding to a circuit pattern and having an eaves cross-sectional shape in the resist layer, forming a thin film layer having a portion formed on the substrate in the opening and a portion formed on the resist layer, and removing the resist layer such that the resist layer and the portion of the thin film layer formed on the resist layer are removed from the substrate. The forming of the opening comprises exposing the resist layer with a mask device which changes an exposure amount of the resist layer such that the eaves cross-sectional shape has a space at a boundary between the resist layer and the substrate.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: April 16, 2013
    Assignee: Asahi Glass Company, Limited
    Inventors: Ryohei Satoh, Koji Nakagawa, Eiji Morinaga, Reo Usui, Kenji Tanaka, Satoru Takaki, Kenichi Ebata, Hiroshi Sakamoto
  • Patent number: 8413322
    Abstract: An object of the present invention is to provide a component a mounting apparatus capable of accurately determining minute mounting applied pressure. The component mounting head of the component mounting apparatus includes: a movable part having a suction bit section and a movable shaft, a weight compensation mechanism for engaging with the movable shaft to compensate for the gravitational force of the total weight of the movable part and a component suctioned to the suction bit section, on the basis of the total weight; a force determination unit for determining a force applied to the movable part in the vertical direction; and a drive unit for moving the force determination unit in the vertical direction. The control unit of the component mounting apparatus controls the drive unit in such a manner that the determination value of the force determination unit becomes a target value.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: April 9, 2013
    Assignee: Panasonic Corporation
    Inventors: Motohiro Higuchi, Ryoji Inutsuka
  • Patent number: 8413323
    Abstract: A method for RF matching of an RF plug connector includes a printed circuit board having contact points for RF contacts and contact points for insulation-displacement contacts, with one contact point for the RF contacts in each case being connected to a respective contact point for the insulation-displacement contacts, and with capacitive coupling which causes near-end crosstalk occurring between the RF contacts, with at least one first conductor track being arranged on the printed circuit board and, together with at least one second conductor track which is arranged on and/or in the printed circuit board, forming a capacitor, with at least one frequency-dependent parameter of the arrangement being measured and being compared with a nominal parameter, and the conductor track with which contact is made on one side being partially removed or cut through as a function of the difference.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: April 9, 2013
    Assignee: ADC GmbH
    Inventors: Peter Bresche, Ulrich Hetzer
  • Patent number: 8407890
    Abstract: An electronic device module as described herein includes an electronic device package having device contacts. The electronic device module can be manufactured by providing an electrically conductive ground plane having a device opening for an electronic device package, and having an antenna ground section. The manufacturing method continues by embedding the ground plane and the electronic device package in encapsulating material such that device contacts of the electronic device package and a first side of the ground plane reside at a device mounting surface. Thereafter, an antenna circuit structure is formed overlying the device mounting surface. The antenna circuit structure includes an antenna signal element that cooperates with the antenna ground section to form an integrated antenna for the electronic device module.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: April 2, 2013
    Assignee: Freescale Semiconductor Inc.
    Inventor: Jinbang Tang
  • Patent number: 8405229
    Abstract: An electronic package for interconnecting a high density pattern of conductors of an electronic device (e.g., semiconductor chip) of the package and a less dense pattern of conductors on a circuitized substrate (e.g., PCB), the package including in one embodiment but a single thin dielectric layer (e.g., Kapton) with a high density pattern of openings therein and a circuit pattern on an opposing surface which includes both a high density pattern of conductors and a less dense pattern of conductors. Conductive members are positioned in the openings to electrically interconnect conductors of the electronic device to conductors of the circuitized substrate when the package is positioned thereon. In another embodiment, the interposer includes a second dielectric layer bonded to the first, with conductive members extending through the second layer to connect to the less dense pattern of circuitized substrate conductors.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: March 26, 2013
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Timothy Antesberger, Frank D. Egitto, Voya R. Markovich, William E. Wilson
  • Patent number: 8400774
    Abstract: One embodiment of the present disclosure provides an apparatus comprising a flex circuit substrate having a core, a first solder mask and first traces disposed on the core on a first side of the flex circuit substrate, and a second solder mask and second traces disposed on the core on a second side of the flex circuit substrate. The first side is opposite to the second side. The apparatus further includes vias formed through the core to electrically couple the first traces to the second traces, and a stiffening structure coupled to the first side of the flex circuit substrate to increase structural rigidity of the flex circuit substrate. The stiffening structure provides structural, support to allow attachment of an integrated circuit die to the first side of the flex circuit substrate.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: March 19, 2013
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 8399986
    Abstract: A method of positioning at least 2 chips simultaneously on a substrate by parallel stochastic assembly in a first liquid is disclosed. In one aspect, the chips are directed to target sites on the substrate within the first liquid. The target sites are covered with a second liquid. The second liquid and the first liquid are immiscible. The chips are attracting the first liquid. A predetermined surface is chosen or treated on each chip such that it is selectively attracted by the second liquid and attracting the first liquid.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: March 19, 2013
    Assignees: IMEC, Katholieke Universiteit Leuven
    Inventors: Massimo Mastrangeli, Caroline Whelan, Wouter Ruythooren
  • Patent number: 8394458
    Abstract: In order to increase the probability that the component is disposed on the hydrophilic region, used is a substrate comprises a water-repellant region, a hydrophilic region, and a hydrophilic line, wherein the water-repellant region surrounds the hydrophilic region and the hydrophilic line, the hydrophilic region and the hydrophilic line are disposed along the +X direction in this order, the value of D1/D2 is not less than 0.1 and not more than 1.2, the value of D3 is not less than 5 micrometers, the value of D4 is less than the minimum length of the component.
    Type: Grant
    Filed: April 23, 2012
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventor: Hidekazu Arase
  • Patent number: 8393076
    Abstract: A component is electrically connected to an electrical circuit by a method that comprises forming an intermediate product in which the component (3) is disposed on one side of an electrically conducting sheet (1) so that at least one pair of contacts (4) of the component are electrically connected by the sheet and in which a patterned etch resist layer (2) is disposed on the other side of the sheet in registration with the component on said one side of the sheet, and then exposing the other side of the sheet to an etching agent and thereby removing areas of the sheet to leave the electrical circuit and also to remove the electrical interconnection between the contacts.
    Type: Grant
    Filed: March 17, 2008
    Date of Patent: March 12, 2013
    Assignee: Conductive Inkjet Technology Limited
    Inventor: Philip Gareth Bentley
  • Publication number: 20130057464
    Abstract: An electro-phoretic display device includes a first substrate, an active elements array, a driving circuit, a conductive flexible board, an electro-phoretic layer and a second substrate. The first substrate has a first surface defining a display area and a circuit area, and a second surface. The active elements array is disposed within the display area and the driving circuit is disposed within the circuit area and electrically connected to the active elements array. The conductive flexible board is partially disposed at the first substrate and electrically connected to the driving circuit. The electro-phoretic layer and the second substrate are sequentially disposed on the active elements array and the driving circuit. A fabricating method of electro-phoretic display device is also disclosed.
    Type: Application
    Filed: October 31, 2012
    Publication date: March 7, 2013
    Applicant: E INK HOLDINGS INC.
    Inventor: E INK HOLDINGS INC.
  • Patent number: 8387234
    Abstract: A multi-turn coil device comprising a flexible circuit board and a plurality of serially electrically coupled coils coupled to both sides of the flexible circuit board. The coils are formed such that when the circuit board is folded in an accordion manner, the coils are substantially aligned and have the same direction of current flow. The coils are serially coupled sequentially from front to back and back to front wherein the coupling of the coils is through a plated through hole in the flexible circuit board.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: March 5, 2013
    Assignee: Flextronics AP, LLC
    Inventor: Bruce D. Olson
  • Patent number: 8387239
    Abstract: An embedded circuit substrate comprising: a core structure having a first surface and a second surface opposite to each other; a first patterned conductive layer disposed on the first surface and embedded in the core structure; a second patterned conductive layer disposed on the second surface and embedded in the core structure; and a plurality of conductive blocks disposed in the core structure for conducting the first patterned conductive layer and the second patterned conductive layer is provided. Furthermore, a manufacturing method of an embedded circuit substrate is also provided.
    Type: Grant
    Filed: November 19, 2009
    Date of Patent: March 5, 2013
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Chien-Hao Wang, Ming-Chiang Lee
  • Patent number: 8381394
    Abstract: A circuit board has an embedded electronic component such as an integrated circuit chip with a wafer level chip size package. A via hole extends through the electronic component. Another via hole extends through the substrate or prepreg on which the electronic component is mounted inside the circuit board. Conductors in the via holes enable a terminal on the surface of the electronic component to be electrically connected to a wiring pattern or another electronic component on the opposite side of the substrate or prepreg. Routing the connection through the electronic component itself saves space and reduces the length of the connection.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: February 26, 2013
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Yoshinori Shizuno
  • Patent number: 8375575
    Abstract: A lightweight radio/CD player for vehicular application is virtually “fastenerless” and includes a fold-up case formed of polymer based material that is molded to provide details to accept audio devices such as playback mechanisms (if desired) and radio receivers, as well as the circuit boards required for electrical control and display. The case is of composite structure, including an insert molded electrically conductive wire mesh screen that has been pre-formed to contour with the molding operation. The wire mesh provides EMC, RFI, BCI and ESD shielding and grounding of the circuit boards via exposed wire mesh pads and adjacent ground clips. Side wall closure members are extruded of aluminum defining self-engaging attachment features for affixing to the case, providing electrical self-grounding with the wire screen and thermal grounding with internal power devices.
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: February 19, 2013
    Assignee: Delphi Technologies, Inc.
    Inventors: Chris R. Snider, Mark A. Jackson
  • Patent number: 8375572
    Abstract: The embodiments disclose a method for creating a silicone encased flexible cable using manufacturing machinery including automatically arranging plural individual conduits, into custom grouped arrangements including electrical wiring, pneumatic tubing and fluid tubing, inserting the custom grouped arrangements including connectors and flexible silicone junction devices into a shaped silicone encasement extrusion apparatus, depositing a mixture of silicone and additives to the custom grouped arrangements encasement using the extrusion apparatus, customizing the mixture of silicone and additives to create differing characteristics of the custom grouped arrangements, using the extrusion apparatus to create a singular encasement and to cure the singular encasement to a desired shape of the custom grouped arrangements and integrating one or more encased flexible junction box to the custom grouped arrangements, wherein the one or more flexible junction box contains at least one incoming and two outgoing conduit con
    Type: Grant
    Filed: December 2, 2009
    Date of Patent: February 19, 2013
    Inventors: Howard Lind, John Palahnuk
  • Patent number: 8371022
    Abstract: A method (100) for assembling a portable device configured with an energy storage device, is disclosed. The method (100) can include: providing (105) a portable device with a controller configured to control the operations of the portable device; configuring (110) the portable device with a multi-mode switch including a temporary active mode configured for simplified testing, a temporarily inactive mode configured for minimizing power drain, and a permanent active mode for normal user operation; and controlling (115) the multi-mode switch from outside the portable device. The method (100) can help to prolong the useful shelf life of the device and can help to simplify testing and calibrating before shipping.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: February 12, 2013
    Assignee: Motorola Mobility LLC
    Inventors: Ryan P Rye, William S Doolan
  • Patent number: 8359728
    Abstract: A method for manufacturing a corrosion sensor includes applying a first layer of non-conductive material to a substrate, writing a conductive material at discrete locations on the non-conductive material, and writing the conductive material at discrete locations on the previously written conductive material. The method further includes applying a second layer of non-conductive material over the conductive material and machining at least a portion of the second layer of non-conductive material to expose at least a portion of the conductive material.
    Type: Grant
    Filed: January 6, 2011
    Date of Patent: January 29, 2013
    Assignee: General Electric Company
    Inventors: Rebecca Evelyn Hefner, Paul Stephen DiMascio
  • Publication number: 20130020120
    Abstract: A wiring board has a laminated structure having a recessed portion on a first-surface side of the laminated structure and a solder resist layer on a second-surface side of the laminated structure on the opposite side of the first-surface side. The laminated structure has a first-surface side pad formed in the bottom of the recessed portion and a second-surface side pad formed on the second-surface side of the laminated structure, the solder resist layer has a first opening portion and a second opening portion formed in the solder resist layer, the first opening portion is exposing the second-surface side pad, the second opening portion is formed on a back face of the recessed portion, and the back face of the recessed portion does not include the second-surface side pad.
    Type: Application
    Filed: May 31, 2012
    Publication date: January 24, 2013
    Applicant: IBIDEN CO., LTD.
    Inventors: Teruyuki Ishihara, Hidetoshi Noguchi, Hirofumi Futamura
  • Publication number: 20130018251
    Abstract: A sensor device for monitoring bioelectric data from a human body includes a flexible dielectric substrate, a plurality of sensors (electrodes) distributed on the substrate for sensing the bioelectric data, and an electrically conductive network distributed on the substrate connecting the sensors to a terminal portion of the substrate. Integrated flexible joints permit a certain amount of elasticity in and allow relative movement between at least two of the sensors when the sensor device is placed onto the human body.
    Type: Application
    Filed: July 14, 2011
    Publication date: January 17, 2013
    Applicant: Verathon Inc.
    Inventors: Matthew Caprio, Vanessa Beasley, Gerald J. McMorrow, Andrew Clay, Jeffrey William Ladwig
  • Patent number: 8354596
    Abstract: A wiring board including a main substrate including a base material and having an opening portion, and a flex-rigid printed wiring board connected to the main substrate in the opening portion of the main substrate and including a rigid substrate and a flexible substrate, the rigid substrate including a non-flexible base material, the flexible substrate including a flexible base material.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: January 15, 2013
    Assignee: Ibiden Co., Ltd.
    Inventor: Michimasa Takahashi
  • Patent number: 8351215
    Abstract: The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The present invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: January 8, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hong Won Kim, Sung Yi, Tae Sung Jeong, Joon Seok Kang
  • Publication number: 20130003288
    Abstract: In one implementation, flash memory chips are provided with an operating power supply voltage to substantially match a power supply voltage expected at an edge connector of a dual inline memory module. The one or more of the flash memory chips and a memory support application integrated circuit (ASIC) may be mounted together into a multi-chip package for integrated circuits. The one or more flash memory chips and the memory support ASIC may be electrically coupled together by routing one or more conductors between each in the multi-chip package. The multi-chip package may be mounted onto a printed circuit board (PCB) of a flash memory DIMM to reduce the number of packages mounted thereto and reduce the height of the flash memory DIMM. The number of printed circuit board layers may also be reduced, such as by integrating address functions into the memory support ASIC.
    Type: Application
    Filed: April 26, 2012
    Publication date: January 3, 2013
    Inventors: Ruban Kanapathippillai, Kenneth A. Okin
  • Patent number: 8344261
    Abstract: Disclosed are a carrier substrate including an insulating base material with a copper foil layer formed on at least one surface thereof, a metal layer formed on the copper layer and having a length shorter than that of the copper foil layer, and an insulating layer formed on the metal layer, a fabrication method thereof, a printed circuit board (PCB) using the same, and a fabrication method thereof. Because there is no land at the via and core in the substrate, because a circuit pattern connected with the via can be formed to be finer, so the circuit pattern can be highly integrated and the substrate can become thinner. Thus, a printed circuit board (PCB) having a smaller size and reduced number of layers can be fabricated.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: January 1, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Won Lee, Keung Jin Sohn, Chang Gun Oh
  • Patent number: 8338714
    Abstract: Disclosed herein is a heat-radiating substrate. The heat-radiating substrate includes: a metal core layer; a first insulating layer that is formed on one side or both sides of the metal core layer, includes a bather layer contacting with the metal core layer, first and second pores having different diameters, and a porous layer connected with the bather layer; a first circuit layer that is embedded in the first insulating layer, filled in the second pores of the porous layer, and connected to the sides of the second pores; and a second insulating layer that is formed on the porous layer of the first insulating layer. Further, in the heat-radiating substrate of the present embodiment, the first circuit layer is partially filled in the second pores and the second insulating layer is filled in the second pores to make a plane the first insulating layer. In addition, disclosed is a method of manufacturing the heat-radiating substrate.
    Type: Grant
    Filed: August 6, 2010
    Date of Patent: December 25, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jung Eun Kang, Hye Sook Shin, Ki Ho Seo
  • Publication number: 20120317801
    Abstract: A reusable electronic circuit assembling system facilitates assembly and testing of electronic circuits. The system has at least one baseboard and one or more assembling blocks magnetically or mechanically attached to the baseboard. Each assembling block has at least two electrically connected conductive clips located separately in the opening holes of the assembly block. Discrete electronic components are connected by selectively inserting the electrodes of the to-be-connected electronic components into the clips of the assembling blocks. A complete circuit is constructed by attaching the above block-component assemblies on the baseboard and connecting them in accordance with the desired circuit diagram.
    Type: Application
    Filed: May 29, 2012
    Publication date: December 20, 2012
    Inventor: Erli Chen
  • Publication number: 20120318563
    Abstract: A differential transmission path composed of a pair of transmission lines is formed on an upper surface of a base insulating layer. A ground conductor layer is formed on a lower surface of the base insulating layer. The ground conductor layer is opposite to the differential transmission path with the base insulating layer sandwiched therebetween. A spacing between the transmission lines at a part of the differential transmission path is smaller than a spacing between the transmission lines at another part of the differential transmission path. A thickness of a part of the ground conductor layer overlapping the part of the differential transmission path is smaller than the thickness of another part of the ground conductor layer overlapping the another part of the differential transmission path.
    Type: Application
    Filed: May 30, 2012
    Publication date: December 20, 2012
    Applicant: NITTO DENKO CORPORATION
    Inventor: Tadao OOKAWA
  • Patent number: 8333005
    Abstract: A method is disclosed for the fabrication of a tunable radio frequency (RF) power output filter that includes fabricating a core body and then forming a plastically deformable metallic shell over the exterior surface of the core body.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: December 18, 2012
    Inventors: James Thomas LaGrotta, Richard T. LaGrotta
  • Patent number: 8327534
    Abstract: Disclosed herein is a method for fabricating a printed circuit board assembly by adhering an element to a printed circuit board without using any solder. The printed circuit board may be fabricated by sequentially applying a conductor-containing first ink and an insulator-containing second ink onto a base substrate by ink-jet printing to form a printed circuit board, mounting an element on the printed circuit board such that an electrode of the element contacts a conductive layer and curing the conductive layer at a high temperature.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: December 11, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Min Young Park, Young Jun Moon, Hyun Joo Han, Gyun Heo, Kyung Woon Jang, Sang il Hong, Dong Seok Baek
  • Patent number: 8327525
    Abstract: A step portion for mounting a row bar is provided at a table stepping down from the face of the table, and by lowering a pair of hooks crossing over the step portion in its width direction, a row bar held by the hooks is mounted on the step portion. While interposing the row bar mounted on the step portion between a pair of hooks and a side face of the step portion, the side in longitudinal direction of the row bar and the bottom face thereof are butted to the bottom face and the standing up side face of the step portion to position two axes of the row bar among XYZ directions, successively, positioning of the row bar in one remaining direction along longitudinal direction of the row bar mounted on the step portion is performed by moving the table in the one remaining axial direction.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: December 11, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Teruaki Tokutomi, Yoshinori Kitano
  • Patent number: 8322034
    Abstract: An apparatus for the insertion and withdrawal of a plug-in module with front panel into and out of a module carrier includes a lever arm (2) pivotable about an axis (3) with a handle portion (2a) for the rotation of the lever arm as well as a bolt (5) to lock the lever arm and an operating element (5a) connected to the bolt with which the lever arm can be unlocked. The operating element (5a) is arranged spaced from the lever arm (2), and the handle portion (2a) is designed such that it contacts the front panel (10) of the plug-in module in the inwardly pivoted position.
    Type: Grant
    Filed: September 3, 2008
    Date of Patent: December 4, 2012
    Assignee: Elma Electronics AG
    Inventor: Kari Oila
  • Patent number: 8322029
    Abstract: A composite interface and methods of fabrication are provided for coupling a cooling assembly to an electronic device. The interface includes a plurality of thermally conductive wires formed of a first material having a first thermal conductivity, and a thermal interface material at least partially surrounding the wires. The interface material, which thermally interfaces the cooling assembly to a surface to be cooled of the electronic device, is a second material having a second thermal conductivity, wherein the first thermal conductivity is greater than the second thermal conductivity. At least some wires reside partially over a first region of higher heat flux and extend partially over a second region of lower heat flux, wherein the first and second regions are different regions of the surface to he cooled. These wires function as thermal spreaders facilitating heat transfer from the surface to be cooled to the cooling assembly.
    Type: Grant
    Filed: April 15, 2011
    Date of Patent: December 4, 2012
    Assignee: International Business Machines Corporation
    Inventors: Levi A. Campbell, Richard C. Chu, Michael J. Ellsworth, Jr., Keith F. Fogel, Madhusudan K. Iyengar, Roger R. Schmidt, Robert E. Simons
  • Patent number: 8322028
    Abstract: A single layer micromachined thermal and mechanical isolator may be bonded between a microelectromechanical system (MEMS) die and package. Small bond pads of the isolator are attached to the periphery of the die. The isolator material may be chosen to match that of the die, reducing CTE mismatch. Long thin isolation beams can be used to provide thermal isolation against external temperature changes, which may be conducted through the package. Weak and flexible beams can be used to tolerate large displacements with very little resistance. Thus, excessive stress or distortion to the package, from either CTE mismatch or external stress, may be absorbed by the isolator and will not be transmitted to the MEMS die. Beam rigidity may be designed to attenuate vibration of particular frequency range. The isolator can be readily inserted into an existing disc resonator gyroscope package in one thermal compression bond step.
    Type: Grant
    Filed: April 1, 2009
    Date of Patent: December 4, 2012
    Assignee: The Boeing Company
    Inventors: Howard H. Ge, A. Dorian Challoner
  • Patent number: 8316532
    Abstract: A producing method of a wired circuit board includes the steps of preparing the wired circuit board, placing the wired circuit board on a support table, and applying light from above the wired circuit board toward the wired circuit board, and sensing pattern reflected light, table reflected light and foreign-matter reflected light to inspect the conductive pattern and the foreign matter based on a contrast therebetween. In the step of inspecting the conductive pattern and the foreign matter, a reflectance of the table reflected light is in a range of 25 to 55%, and a reflectance of the foreign-matter reflected light is in a range of not more than 10%.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: November 27, 2012
    Assignee: Nitto Denko Corporation
    Inventors: Yoshihiro Toyoda, Terukazu Ihara
  • Patent number: 8310835
    Abstract: This relates to systems and methods for providing one or more vias through a module of an electrical system. For example, in some embodiments, the module can include one or more passive and/or active elements of the electrical system around which a packaging has been plastic molded. The module can be stacked under another component of the electrical system. Vias can then be provided that extend through the module. The vias can include, for example, electrically conductive pathways. In this manner, the vias can provide electrical pathways for coupling the component stacked on top of the module to other entities of an electronic device including the electrical system. For example, the component can be coupled to other entities such as other components, other modules, printed circuit boards, other electrical systems, or to any other suitable entity.
    Type: Grant
    Filed: April 28, 2010
    Date of Patent: November 13, 2012
    Assignee: Apple Inc.
    Inventors: Gloria Lin, Bryson Gardner, Jr., Joseph Fisher, Jr., Dennis Pyper, Amir Salehi
  • Publication number: 20120283808
    Abstract: In one embodiment, a paddle-style lead for implantation in the epidural space through an insertion tool, the paddle-style lead comprises: a paddle structure that comprises: (i) a frame of rigid material, the frame comprising a spring member adapted to bias the frame to assume a first width and a first length, the frame being adapted to elongate to assume a second width and a second length under application of a compressive force; and (ii) elastic material disposed across an interior surface area defined the frame, wherein a plurality of electrodes and a plurality of electrical traces are provided on the elastic material, wherein the plurality of electrical traces are electrically coupled to a plurality of lead conductors and the plurality of electrodes; wherein the plurality of electrical traces comprises a plurality of alternating curves that elongate when the elastic material is stretched.
    Type: Application
    Filed: July 18, 2012
    Publication date: November 8, 2012
    Inventor: John Swanson
  • Patent number: 8302297
    Abstract: Provided are a circuit board structure and a fabrication method thereof, including the steps of: forming a first circuit layer in a first dielectric layer and exposing the first circuit layer therefrom; forming a second dielectric layer on the first dielectric layer and the first circuit layer, and forming a second circuit layer on the second dielectric layer; forming a plurality of first conductive vias in the second dielectric layer for electrically connecting to the first circuit layer to thereby dispense with a core board and electroplated holes and thus facilitate miniaturization. Further, the first dielectric layer is liquid before being hardened and is formed on the first dielectric layer that enhances the bonding between layers of the circuit board and the structure.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: November 6, 2012
    Assignee: Unimicron Technology Corporation
    Inventor: Kun-Chen Tsai
  • Patent number: 8296943
    Abstract: The present invention relates to surveillance and/or identification devices having capacitors connected in parallel or in series, and methods of making and using such devices. Devices with capacitors connected in parallel, where one capacitor is fabricated with a relatively thick capacitor dielectric and another is fabricated with a relatively thin capacitor dielectric achieve both a high-precision capacitance and a low breakdown voltage for relatively easy surveillance tag deactivation. Devices with capacitors connected in series result in increased lateral dimensions of a small capacitor. This makes the capacitor easier to fabricate using techniques that may have relatively limited resolution capabilities.
    Type: Grant
    Filed: May 15, 2009
    Date of Patent: October 30, 2012
    Assignee: Kovio, Inc.
    Inventors: Patrick Smith, Criswell Choi, James Montague Cleeves, Vivek Subramanian, Arvind Kamath, Steven Molesa
  • Patent number: 8296942
    Abstract: The invention provides a process for preparing a heatsink system for a heat generating electronic device, comprising the steps of: (a) providing a heat conducting substrate; (b) applying an insulating layer on the heat conducting substrate; and (c) applying a printed circuit on the isolating layer by means of a hot embossing system. The invention further provides a heatsink system obtainable by said process, comprising a heat conducting substrate, an insulating layer that is applied on the heat conducting substrate, and a printed circuit that is applied on the insulating layer, wherein the thickness of the part of the insulating layer which is arranged between the heat conducting substrate and the printed circuit is between 1 and 100 micron.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: October 30, 2012
    Assignee: Nederlandse Organisatie Voor Toegepast-Natuurwetenschappelijk Onderzoek TNO
    Inventors: Frits Kornelis Feenstra, Jürgen Hackert
  • Patent number: 8294031
    Abstract: A solder resist coating for a rigid-flex circuit board contains one or more conductor tracks and at least one flex area. The solder resist coating has one or more movement gaps in the flex area of the circuit board. In addition, an electronic module is formed having at least one rigid-flex circuit board with a solder resist coating.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: October 23, 2012
    Assignee: Continental Automotive GmbH
    Inventors: Detlev Bagung, Michael Decker, Gregory Drew, Thomas Riepl, Bernd Roller
  • Patent number: 8291581
    Abstract: A plurality of reference holes are formed in the surface of a first substrate made of a first material, and a plurality of columnar members are each fitted in the reference holes in such a manner that at least a part of each of the columnar members projects from the surface of the first substrate. Subsequently, an electrode surface layer made of a second material is formed on the surface of the first substrate in such a manner that an end portion of each of the columnar members are exposed at the surface and then the columnar members are removed. Thus obtained is a substrate-like electrode including at least an electrode surface layer provided with through holes having a cross section matching a sectional shape of the projecting portion of the columnar members.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: October 23, 2012
    Assignees: Mitsui Engineering & Shipbuilding Co., Ltd., ADMAP, Inc.
    Inventor: Fimitomo Kawahara
  • Patent number: 8286350
    Abstract: An object of the invention is to provide a method of manufacturing a liquid discharge head in which a distance between a discharge opening and an energy generating element is uniform, simply and with good precision.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: October 16, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tsuyoshi Takahashi, Shuji Koyama, Masaki Ohsumi, Masahisa Watanabe
  • Patent number: 8286340
    Abstract: A printed circuit board for mounting an electronic part includes a mounting surface configured so that the electronic part is mounted. A warpage correcting metal pattern is provided on a back surface of the printed circuit board opposite to the mounting surface. The warpage correcting metal pattern may be formed of a metal film or a metal layer joinable with a thermally meltable joining material.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: October 16, 2012
    Assignee: Fujitsu Limited
    Inventor: Yukihiko Ohashi
  • Publication number: 20120246926
    Abstract: A method for manufacturing a printed circuit board is disclosed, which comprises the following steps. A basic board having an upper surface and a bottom surface opposite to the upper surface is provided. A plurality of the electronic components temporarily disposed on the basic board is provided. At least one locating pin temporarily disposed on a place of the basic board is provided, in which the electronic components are not temporarily disposed on the place. Surface mount technology is used simultaneously to joint at least one locating pin and the electronic components on the basic board.
    Type: Application
    Filed: June 15, 2012
    Publication date: October 4, 2012
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Wen-Hsin Lin, Ching-Kun Lai, Chien-Hung Chen
  • Publication number: 20120248091
    Abstract: An electrical heating includes a plurality of electrical heating elements which are held by a housing and which abut heat conducting surfaces over which a medium to be heated flows. The electrical heating elements comprise contact lugs, arranged essentially at the same height, that are connected through a plate element. The plate element includes conductive paths and contact lug receptacles for the contact lugs. The plate element may include a carrier plate of non-conducting material and a stamped out metal plate that are joined together to form one unit. A method of manufacturing a plate element includes manufacturing the carrier plate by injection moulding and subjecting a metal plate to stamping operations to form area elements which are joined together by connecting ridges and in which the contact lug receptacles are located. The carrier plate and the metal plate are then joined, and the connecting ridges are then parted.
    Type: Application
    Filed: March 29, 2012
    Publication date: October 4, 2012
    Applicant: Eberspacher catem GmbH & Co. KG
    Inventors: Franz Bohlender, Kurt Walz, Robert Götzelmann, Michael Niederer, Dieter Emanuel
  • Publication number: 20120250265
    Abstract: A method of manufacturing a plurality of circuit modules includes cutting a mother board including a plurality of electronic components mounted on at least a single surface thereof, and cutting out a plurality of circuit boards from the mother board. A plurality of terminal electrode boards, each of which is arranged so as to straddle at least the circuit boards that are adjacent to each other, are mounted onto one surface of the mother board. The mother board including the terminal electrode boards mounted on the one surface, and the electronic components, mounted on the at least single surface, is diced at positions where the circuit boards are to be cut out.
    Type: Application
    Filed: June 18, 2012
    Publication date: October 4, 2012
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Toshiya KAWATE
  • Patent number: 8276270
    Abstract: The present invention is directed to a method for manufacturing a printed circuit board in which a plurality of conductive layers forming a wiring pattern are laminated in the state where they are put between insulating layers, and a printed circuit board formed thereby. The printed circuit board manufacturing method for the present invention includes a step of forming a via fill (17) to allow electroless plating liquid to be in contact with the surface of the wiring pattern exposed to a bottom part of a via hole (14) formed at a insulating layer to laminate plating metallic film from the bottom part to a opening part of the via hole (14), to form the via fill (17), and a step of forming a wiring pattern to form electroless plating metallic film (20) serving as the wiring pattern onto a substrate where the via fill (17) is formed.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: October 2, 2012
    Assignee: C. Uyemura & Co., Ltd.
    Inventors: Teruyuki Hotta, Shushi Morimoto, Takahiro Ishizaki, Hisamitsu Yamamoto
  • Patent number: 8276269
    Abstract: A microelectronic device mounting substrate includes a bond pad with a side wall and an upper surface. A dielectric first layer is disposed on the mounting substrate and a solder mask second layer is disposed on the dielectric first layer. A uniform recess is disposed through the solder mask second layer and the dielectric first layer that exposes the portion of the bond pad upper surface.
    Type: Grant
    Filed: June 20, 2008
    Date of Patent: October 2, 2012
    Assignee: Intel Corporation
    Inventors: Houssam Jomaa, Omar J. Bchir
  • Patent number: 8272125
    Abstract: Provided are methods of manufacturing a plurality of electrochemical sensors. The methods include forming a plurality of working electrodes on a first electrode region of a substrate, forming a plurality of counter electrodes on a second electrode region of the substrate, disposing a spacer layer on one of the first and second electrode regions, folding the substrate with the spacer layer between the first electrode region and the second electrode region to form a layered structure, and separating or cutting the layered structure to form individual electrochemical sensors.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: September 25, 2012
    Assignee: Abbott Diabetes Care Inc.
    Inventors: Benjamin J. Feldman, Adam Heller, Ephraim Heller, Fei Mao, Joseph A. Vivolo, Jeffery V. Funderburk, Fredric C. Colman, Rajesh Krishnan
  • Patent number: 8272126
    Abstract: An object of an aspect of the present invention is to provide a method of producing a circuit board that allows highly accurate preservation of the circuit profile and gives a circuit having a desired depth in preparation of a fine circuit by additive process.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: September 25, 2012
    Assignee: Panasonic Corporation
    Inventors: Shingo Yoshioka, Hiroaki Fujiwara