By Using Wire As Conductive Path Patents (Class 29/850)
  • Patent number: 5471737
    Abstract: A radiant electric heater is manufactured by a method which involves providing a base of microporous thermal and electrical insulation material having a substantially continuous surface, and providing a heating element in the form of an elongate electrically conductive strip. The strip is urged edgewise into the continuous surface of the base of microporous thermal and electrical insulation material so as to embed and support the strip edgewise in the insulation material along substantially the entire length of the strip to a depth corresponding to at least part of the height of the strip.
    Type: Grant
    Filed: February 8, 1994
    Date of Patent: December 5, 1995
    Assignee: Ceramaspeed Limited
    Inventor: Joseph A. McWilliams
  • Patent number: 5446961
    Abstract: The present invention relates generally to a new structure and a method for repairing semiconductor substrates, and more particularly, the invention encompasses a structure and a method for repairing Printed Circuit Boards or other electronic substrates by providing electrical lines on the defective board. On a substrate that has an open or an electrical discontinuity, after the discontinuity has been established, a portion of the electrical line across from the electrical discontinuity are exposed and one or more trenches or grooves are made between the two or more exposed portions of the electrical line. The two exposed portions of the exposed electrical line is then joined by either an electrical wire that is routed through the trench or using a standard deposition process one or more metals or material are deposited in the open trench to provide or restore electrical continuity and the excess deposition material is removed.
    Type: Grant
    Filed: October 15, 1993
    Date of Patent: September 5, 1995
    Assignee: International Business Machines Corporation
    Inventors: James M. Levite, Michael Berger, Richard L. Chartrand, Mary A. Emmett, Raymond A. Jackson, James J. Petrone, Richard F. Shortt, Roger A. Stinemire
  • Patent number: 5440802
    Abstract: A method of manufacturing a chip fuse includes the steps of depositing a plurality of columns of electrically conductive metal film on a green, unfired ceramic substrate, and disposing a plurality of wire elements on the substrate over the film columns and perpendicular to the film columns. A cover of green, unfired ceramic is bonded to the substrate over the wire elements and film columns to form a laminate. The laminate is then die cut into individual fuses, which are then fired to cure the ceramic and form an intermetallic bond between the wire elements and the metal film. End termination coatings are then applied to the fuses to facilitate connecting the fuses in an electrical circuit. The invention relates to a chip fuse manufactured according to the method.
    Type: Grant
    Filed: September 12, 1994
    Date of Patent: August 15, 1995
    Assignee: Cooper Industries
    Inventors: Stephen Whitney, Vernon Spaunhorst, Joan Winnett, Varinder Kalra
  • Patent number: 5438020
    Abstract: A flip-chip process in which the chip is positioned with its contacts facing a substrate. Small gold balls, obtained by the melting of the end of a gold wire, are soldered to the contacts of the chip and a segment of the gold wire is left attached to the ball. The mounting on the substrate is under heat, for example by means of a heating table, by positioning the chip on the substrate and by making use, for this purpose, of wire segments that are suitably arranged during an intermediate operation which consists of folding them in a predetermined way. A solder paste, deposited beforehand by means of a stencil, provides for the soldering between the balls and the facing parts of the conductors of the substrate.
    Type: Grant
    Filed: September 17, 1993
    Date of Patent: August 1, 1995
    Assignee: Thomson-CSF
    Inventors: Alain Grancher, Ludovic Michel
  • Patent number: 5421930
    Abstract: A winding tool (14) is provided on a manipulator (18) of a type used to route the optical fiber. A hook (22) extends from the winding tool to capture optical fiber (10) extending from a device (11), and the hook is retracted to secure the fiber. A routing wheel (17) is positioned between the device (11 ) to which the optical fiber is connected and the reel such that the wheel can press the optical fiber (10) against an adhesive-coated substrate. The winding tool then winds the optical fiber around a reel (16). The optical fiber next feeds from the reel (16) to the routing wheel (17) as the manipulator (18) is moved to route the optical fiber on the coated substrate. Preferably, prior to the winding and wheel positioning step, the optical fiber between the reel and the routing wheel is engaged with an alignment tool (27).
    Type: Grant
    Filed: November 1, 1993
    Date of Patent: June 6, 1995
    Assignee: American Telephone and Telegraph Company
    Inventor: William R. Holland
  • Patent number: 5412861
    Abstract: An apparatus for laying a wire in a junction box comprises means for performing the steps of: setting (S1) a covered wire E on a wiring plate along a wiring pattern arranged on said wiring plate by causing a relative movement between a wire feeder which successively feeds a single wire and the wiring plate along guide means formed on the wiring plate; cutting off (S2) portions unnecessary for conductive circuits from the wiring set on the wiring plate; and forming (S3) the conductive circuits in the junction box by inserting the wire remaining on the wiring plate into the wire-coupling portions of connecting terminals secured to a base and by removing the junction box from the wiring plate. Thus, it is possible to speed up the wire-laying work in a junction box having many conductive circuits.
    Type: Grant
    Filed: May 23, 1994
    Date of Patent: May 9, 1995
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Eiji Fudoo, Takayuki Yamada, Yuuji Saka
  • Patent number: 5400503
    Abstract: A wiring apparatus includes a preprocessing unit for splitting a starting portion of splitting coated parallel twin wires composed of two coated single wires joined together in parallel form and fed from a wire rounding member into the two coated single wires and removing a part of a coating of each of the coated single wires split, and a bonding unit for separately bonding portions of the two coated single wires from which coatings have been removed to two terminals provided on a body on which the coated parallel twin wires are to be arranged.
    Type: Grant
    Filed: July 13, 1993
    Date of Patent: March 28, 1995
    Assignee: Fujitsu Limited
    Inventors: Hitoshi Komoriya, Akihiko Yabuki, Kouichi Oikawa
  • Patent number: 5381306
    Abstract: Disclosed is an apparatus and method for delivering power utilizing a multiplane power via matrix wherein the vias are each interconnected on each of the planes through which they pass such that a current flowing along any particular via, or via group, is free to either continue along its current path, or to move across any of the planes as a function of least resistance. The invention provides a system of vias for transferring power from any particular first plane to any desired second plane.
    Type: Grant
    Filed: August 20, 1993
    Date of Patent: January 10, 1995
    Assignee: Convex Computer Corporation
    Inventors: Richard A. Schumacher, James R. Day
  • Patent number: 5374285
    Abstract: The electrode catheter comprises a flexible spiral wound element accommodated coaxially within and extending the entire length of a first sheath such a way as to provide a core ensuring rigidity, for the purposes of the initial implantation, and flexibility to allow subsequent adaptation of the catheter to the subcutaneous cavity ultimately occupied. The spiral wound element carries a set of wires, each bared at the distal end, which break out of respective holes in the sheath to connect with relative terminals or sensors; each bared end is flattened against a corresponding first ring crimped coaxially to the sheath alongside the relative hole, and sandwiched between this same ring and a second ring of electrically conductive and biocompatible material by which the sensor or electrode is fully encapsulated.
    Type: Grant
    Filed: July 30, 1993
    Date of Patent: December 20, 1994
    Assignee: Aries S.R.L.
    Inventors: Paolo Vaiani, Claudio Gibelli, Enzo Borghi
  • Patent number: 5373628
    Abstract: An automatic wiring method includes a first step of finding locations at which diagonal wiring is required at the time of wiring processing, a second step of approximating the shapes of part pins associated with these locations by rectangular shapes and reducing and changing these approximated shapes into shapes capable of being wired by 90.degree. turns, a third step of executing automatic wiring processing for 90.degree. turns, a fourth step of finding a location at which a clearance between a wiring pattern obtained by the wiring processing for 90.degree. turns and an actual part pin becomes less than a stipulated value and a clearance error is generated, and a fifth step of shaping a 90.degree.-turn wiring pattern at this location into a diagonal wiring pattern so as to satisfy the clearance.
    Type: Grant
    Filed: September 24, 1992
    Date of Patent: December 20, 1994
    Assignee: Fujitsu Limited
    Inventors: Akihiko Suehiro, Tsuneo Oka
  • Patent number: 5369874
    Abstract: A radiant electric heater is manufactured by a method which involves providing a base of microporous thermal and electrical insulation material having at least one groove formed in a surface thereof, and providing an elongate electrically conductive strip to serve as a heating element. The elongate electrically conductive strip is located edgewise into the groove and surface pressure is applied to the base of microporous insulation material in a region adjacent to the strip to deform the base and to urge microporous material of the base into contact with the strip so as to secure the strip in the groove.
    Type: Grant
    Filed: February 8, 1994
    Date of Patent: December 6, 1994
    Assignee: Ceramaspeed Limited
    Inventor: Joseph A. McWilliams
  • Patent number: 5365657
    Abstract: An improved cutting apparatus and method used in a wire scribing device, said cutting apparatus having a cutter blade attached to a wiring head, and having a z-axis actuator for precisely controlling the movement of the cutter blade in the z-direction. A gauge height finder, attached to the wiring head determines a distance between the wiring head and the substrate, wherein the determined distance is used to control the z-axis actuator for lowering the cutter blade so as to precisely cut the conductor on the surface of the substrate. Furthermore, the cutting apparatus may include a cutter bracket attached to the wiring head, having a preloaded spring fixed thereto. Wherein this spring is preloaded to a preset force and wherein the spring is positioned above the cutter blade so that an upward force on the cutter blade is transmitted to the spring.
    Type: Grant
    Filed: February 1, 1993
    Date of Patent: November 22, 1994
    Assignee: Advanced Interconnection Technology
    Inventors: Jerald L. Brown, Vaironis Berzins
  • Patent number: 5323534
    Abstract: A coaxial conductor interconnection wiring board characterized by having at least one inner wall metallized conductive hole for connecting a conductive shield of coaxial conductor to a ground layer, or having connection metal layers for connecting ground layers or connecting the conductive shield to a ground layer, and an inner wall metallized conductive hole for connecting a central signal conductor of coaxial conductor to other circuits, is excellent in preventing crosstalk noise and shielding effect.
    Type: Grant
    Filed: March 8, 1993
    Date of Patent: June 28, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yorio Iwasaki, Toshiro Okamura, Shigeharu Arike, Yasushi Shimada, Hiroharu Kamiyama, Eisaku Namai, Fujio Kojima
  • Patent number: 5310353
    Abstract: A flexibly configurable power distribution center in which an electrical signal or power is routed by implementing an electrical interconnection at any point along a path of a conductor. Insulative portions or boards within an electrical power distribution center are fabricated having a plurality of recesses for receiving electrical conductors therein. The electrical conductors are in the form of flexibly configurable strips of metal such as steel, copper, brass or the like, which are disposed within the recesses in the insulating portions. The strips of metal are dimensioned and disposed within the recesses forming an exposed conductive ridge which is mechanically and electrically engageable by interface terminals along substantially the entire length of the conductor. The interface terminals have at least one female mating portion for mechanically mating with the conductive ridge to establish electrical continuity therewith.
    Type: Grant
    Filed: May 25, 1993
    Date of Patent: May 10, 1994
    Assignee: Augat Inc.
    Inventors: Steven R. Parrish, David E. Champlin
  • Patent number: 5289633
    Abstract: An electrical interconnection assembly which prevents a slack of insulated wire pieces interconnecting wire receiving terminals and is high in reliability in electric connection between them and suitable for high density wiring. The assembly comprises an insulating support body, a plurality of wire receiving terminals mounted on the insulating support body and each having a wire receiving slot formed at an end portion thereof, each of the wire receiving terminals having a terminal portion at the other end thereof, an insulated wire selectively received in the slots of the wire receiving terminals and cut into a plurality of wire pieces in such a manner as to form a predetermined wiring pattern, and a plurality of wire holding bosses provided on the insulating support body for holding intermediate portions of the wire pieces extending between the wire receiving terminals to retain the insulated wire in the predetermined wiring pattern.
    Type: Grant
    Filed: July 30, 1992
    Date of Patent: March 1, 1994
    Assignee: Yazaki Corporation
    Inventors: Osamu Okafuji, Akiyoshi Sato, Yamaguchi, Akio
  • Patent number: 5272596
    Abstract: A personal data card (10) is fabricated from a polymer thick-film circuit (12) formed of a polymer sheet (14) having a plurality of pads (16 and 17) and interconnecting paths (18) printed thereon with a copper-filled polymer ink. Each of a selected set of the pads (16) has a layer of nickel (22) applied to it, and then a layer of gold (24) applied above the nickel, to facilitate wire bonding of each of a plurality of aluminum leads (21), associated with a semiconductor die (19), to a corresponding pad. Use of such a polymer thick-film circuit (12) in the fabrication of the data card (10) reduces the cost of the card.
    Type: Grant
    Filed: June 24, 1991
    Date of Patent: December 21, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: Jack P. Honore, Fred W. Verdi
  • Patent number: 5265324
    Abstract: The present invention includes a sensing edge for controlling movement of a door by actuation of a device upon force being applied to the sensing edge. The sensing edge includes a base member for being secured to the leading edge of a door and a sheath having a plurality of internal cavities extending therethrough for receiving electrical contacts and wiring. A method of making the sensing edge includes coextrusion of the base member and sheath. During the coextrusion process, electrical contacts are positioned within and bonded to the sheath. Electrical wiring may also be positioned within one or more cavities within the sheath during the coextrusion process.
    Type: Grant
    Filed: February 8, 1993
    Date of Patent: November 30, 1993
    Assignee: Miller Edge, Inc.
    Inventors: Bearge D. Miller, Vernon P. King
  • Patent number: 5264061
    Abstract: A three-dimensional printed circuit assembly is formed by first making a substrate (20). A substrate (20) is first formed from a photoactive polymer (14) that is capable of altering its physical state when exposed to a radiant beam (30). At this point, the substrate is only partially cured. A conductive circuit pattern (50) is then formed on the partially cured substrate. The substrate is then molded to create a three-dimensional structure, and then further cured to cause the photoactive polymer to harden.
    Type: Grant
    Filed: October 22, 1992
    Date of Patent: November 23, 1993
    Assignee: Motorola, Inc.
    Inventors: Frank J. Juskey, Anthony B. Suppelsa, Dale W. Dorinski
  • Patent number: 5259051
    Abstract: Apparatus for routing optical fiber comprises an elongated manipulator (20, FIG. 2) having a vertical axis which can be controlled to move in an X-Y plane and in the .theta. direction around its vertical axis. A rotatable wheel (21) is mounted on a free end of the manipulator, and a reel (19) containing optical fiber (17) is mounted on one side of the manipulator. The fiber is threaded over a peripheral portion of the wheel and the wheel presses the fiber against an adhesive-coated surface of a substrate (18) to cause it to adhere to the coated surface. The manipulator is then moved in a direction parallel to the flat surface at an appropriate speed and direction to cause the wheel to rotate and to exert tension on the optical fiber. The tension causes additional optical fiber to unwind from the reel and to be fed to the wheel for adherence to the coated surface, thereby to form a continuous optical fiber portion extending along, and adhered to, the coated surface.
    Type: Grant
    Filed: August 28, 1992
    Date of Patent: November 2, 1993
    Assignee: AT&T Bell Laboratories
    Inventors: John J. Burack, William R. Holland, Robert P. Stawicki
  • Patent number: 5225633
    Abstract: A bridge chip interconnect system is used for electrically interconnecting first and second semiconductor chip devices. The first and second semiconductor chip devices each are mounted adjacent to each other with a space therebetween and respectively have first and second row of ohmic contact pads on their top surfaces. The bridge chip interconnect system includes a rigid bridge base which has a top surface and which is placed in the space between the first and second semiconductor chip devices; and a plurality of conducting beams which are fixed to the top surface of the rigid bridge base and which have dimensions to enable each of them to make contact with one of the ohmic contact pads form each of the first and second row of ohmic contact pads.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: July 6, 1993
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventor: Stewart C. Wigginton
  • Patent number: 5220726
    Abstract: An electrically connectable module is manufactured from a substrate of an electrically insulating polymer matrix doped with an electrically insulating fibrous filler capable of heat conversion to an electrically conductive fibrous filler to form a fiber-doped substrate. One end of an electrical connector is embedded in the fiber-doped substrate to locate the one end adjacent the surface of the substrate while exposing an opposite end of the electrical connector. The surface of the fiber-doped substrate is locally heated preferably with a laser to form a conductive trace by the in-situ heat conversion of the electrically insulating fibrous filler, the localized heating including the one end of the electrical connector to electrically connect the electrical connector to the conductive trace. In another embodiment, a conductive material is electrodeposited on the conductive trace by applying a voltage to the opposite end of the electrical connector.
    Type: Grant
    Filed: June 26, 1991
    Date of Patent: June 22, 1993
    Assignee: Xerox Corporation
    Inventor: David A. Mantell
  • Patent number: 5198009
    Abstract: Alkali metal-containing glass beads for use as sources in thermionic detectors for gas chromatography are manufactured by a method which produces reproducible beads of preselected sizes. A glass tube of the desired composition is reduced to capillary size. A section having the volume of the desired bead is cut from the capillary tube and threaded onto a support wire. It is then melted and caused to coalesce onto the support wire. The resultant bead and a portion of the support wire are then incorporated into the detector.
    Type: Grant
    Filed: November 22, 1991
    Date of Patent: March 30, 1993
    Assignee: The Perkin Elmer Corporation
    Inventors: John E. Purcell, Richard Dang
  • Patent number: 5172461
    Abstract: By means of this invention electrical resonant circuits, specifically resonance labels having a capacitor and a coil on a dielectric are produced for reliable deactivation by means of an electrical discharge between the capacitor surfaces. Heretofore aluminum threads produced from the material of the capacitor surfaces is not supported in place so that it can break with handling and vibration and cause reactivated of the resonant circuit leading to a false alarm in the safety system. According to this method a plurality of conductive bodies of a size in the micron range, e.g. copper dust is introduced in the dielectric so that a spark from discharge of a capacitor will cause an electrically conducting connection between the capacitor surfaces, which is embedded in a thread like shape in the dielectric. By using copper dust, an alloy is formed with the aluminum which evaporates during the spark discharge such that the thread produced has a substantially larger ductility than pure aluminum.
    Type: Grant
    Filed: August 12, 1991
    Date of Patent: December 22, 1992
    Inventor: Fritz Pichl
  • Patent number: 5165166
    Abstract: A customizable circuit using a programmable interconnect and a compatible TAB chip bonding design. The programmable interconnect comprises layers of wire segments forming programmable junctions rather than continuous wires. This segmentation is performed with an offset from line to line in each layer such that the ends of the segments in each layer form along diagonal lines having a pitch determined by the basic wire segment length. The terminal ends of each of these segments are positioned in a plane such that the segments may be connected by short lengths to form the desired interconnect. The links which join the line segments represent the customization of the otherwise undedicated interconnect. The TAB chip bonding design uses a carrier tape to bond the integrated circuit chips to the programmable interconnect. Also disclosed are methods for forming the interconnect and the TAB chip bonding design.
    Type: Grant
    Filed: September 9, 1991
    Date of Patent: November 24, 1992
    Assignee: Microelectronics and Computer Technology Corporation
    Inventor: David H. Carey
  • Patent number: 5060371
    Abstract: A method and apparatus for inspecting integrated circuit probe cards in which the probe points of the probe card are scanned across a checkplate having a conductivity transition border. The impedances between the probe points and the checkplate as they cross the conductivity transition border are measured to determine when the probe points cross the border. The positions of the probe card when each of the probe points crosses the border are measured to determine the positions of the probe points relative to each other. In one embodiment, the checkplate is formed by a square conductive plate having three quadrants of insulated material and a single quadrant of conductive material mounted on its upper surface. These conductive strips connected to the conductive plate are positioned between the quadrants of insulative material to form the conductivity transition border. In other embodiments, multiple parallel strips or a single dot of conductive material are surrounded by insulative material.
    Type: Grant
    Filed: March 1, 1990
    Date of Patent: October 29, 1991
    Assignee: Applied Precision, Inc.
    Inventors: John P. Stewart, Ronald C. Seubert, Donald B. Snow
  • Patent number: 5060369
    Abstract: A method of fabricating a printed wiring substrate board to have integral contacts over the thickness of a defined connector edge in order to allow for perpendicular mating to exposed conductors on the surface of a second substrate.
    Type: Grant
    Filed: January 31, 1990
    Date of Patent: October 29, 1991
    Assignee: Ford Motor Company
    Inventor: Parshuram G. Date
  • Patent number: 5054194
    Abstract: A method for controlling the wire loop height of wires installed during the manufacture of an electronic module with a wire bond machine provides for making adjustments based on the wire loop height adjustment resolution of the wire bond machine itself, rather than on an electrical performance specification tolerance for the module.
    Type: Grant
    Filed: January 30, 1991
    Date of Patent: October 8, 1991
    Assignee: Motorola, Inc.
    Inventor: Randy Pollock
  • Patent number: 5042146
    Abstract: Insulated hookup wire is processed to provide point-to-point interconnections on a circuit board, including helical terminals formed integrally from stripped portions of the hookup wire and set into circuit board holes; the helical terminals serve as receptacles for contact pins of components such as DIP ICs, leads of components such as resistors or capacitors, or even for stripped ends of additional hookup wire, for example in interboard wiring. Regular dip or wave soldering may be performed subsequently. For special purposes, the wiring system of this invention may be utilized throughout a circuit board, or else it may be utilized strategically to supplement regular printed circuitry. In a three piece machine tool set, a shaped mandrel rotates to wind a portion of stripped wire into a dual interleaved helix and then press the helix into place as a helical terminal/receptacle in a circuit board hole, with one or two insulated hookup wires integrally attached for interconnection.
    Type: Grant
    Filed: February 6, 1990
    Date of Patent: August 27, 1991
    Inventor: Troy M. Watson
  • Patent number: 5032737
    Abstract: The ignition switch for a vehicle such as a lawn and garden tractor is connected directly to a printed circuit board which also includes interlock systems components. The circuit board with the switch and other components is wave soldered in an automated process to make good electrical connections for reduced voltage drops, thereby reducing the number of relays required. Wiring harnesses are also soldered directly to the board during the soldering step. In the preferred embodiment, the ignition switch is fixed to the board and supports the board from the console of the vehicle. However, if the switch or another component on the circuit board needs to be remotely located with respect to the remainder of the board, the switch or component is mounted on a break-away section of the board, and the wires connecting the board sections are soldered with the remainder of the components during the automated process.
    Type: Grant
    Filed: July 24, 1990
    Date of Patent: July 16, 1991
    Assignee: Deere & Company
    Inventors: David R. Holm, Rudolph A. Peterson, Jr.
  • Patent number: 5017145
    Abstract: A matrix switching device includes a matrix board and a connecting pin. X-conductor patterns are arranged in parallel with each other on one surface of the matrix board, and Y-conductor patterns are arranged in parallel with each other on the other surface. Both the patterns are arranged in a matrix form. At each crossing point of the both patterns, a through hole having conductive portions respectively connected to the X- and Y-conductor patterns and an intermediate isolation portion for interrupting conduction between the conductive portions is formed in the matrix board. The connecting pin includes conductive portions respectively electrically connected to the X- and Y-conductor patterns through the conductive portions of the through hole upon insertion of the connecting pin into the through hole.
    Type: Grant
    Filed: April 24, 1989
    Date of Patent: May 21, 1991
    Assignee: Nippon Telegraph & Telephone Corporation
    Inventors: Tsuneo Kanai, Shigefumi Hosokawa, Yasuo Kumakura, Shigeru Umemura, Shuichiro Inagaki
  • Patent number: 5012391
    Abstract: A circuit panel subassembly suitable for use in an electromechanical apparatus includes a plurality of wires formed within an electrically conductive grid imbedded within a reaction injection molded panel which forms a part of the housing of the electromechanical apparatus. Wires are deployed in a pattern by using a wire organizing frame and the electrically conductive grid and the frame are subsequently imbedded in a reaction injection molded panel. Terminals attached to the ends of the wires remain exposed at spaced apart locations where components are to be mounted. Separate connector housings can be attached to the panel over the exposed terminals and other components or matable connectors can be attached thereto. The entire apparatus can be constructed robotically.
    Type: Grant
    Filed: August 17, 1989
    Date of Patent: April 30, 1991
    Assignee: AMP Incorporated
    Inventors: Albert N. Schultz, Jr., Paul D. Zakary
  • Patent number: 4987678
    Abstract: A robotically controlled wiring apparatus for stripping, cutting and installing clad wire in a waffleline plate supported on an X-Y table comprises a wire feed, stripping and cutting unit, which is displaceable toward and away from the waffleline plate. The wire installation unit includes a clamp foot that is controlled by a cam unit to engage the wire and urge a first end of the wire into a channel of the waffleline plate. After the clamp foot has been retracted away from an inserted end of wire and the installation wheel is positioned against the wire, the X-Y table is translated, causing the wheel to rotate, drawing wire from a supply spool and effectively press-fitting the wire along the channel of the waffleline plate. After a prescribed length of wire has been installed, the wire is stripped and cut. For this purpose, the wire is clamped in the channel and placed in tension.
    Type: Grant
    Filed: March 21, 1989
    Date of Patent: January 29, 1991
    Assignee: Harris Corporation
    Inventors: Nathaniel J. Satterfield, James D. Struttmann
  • Patent number: 4972050
    Abstract: The invention concerns an interconnection board for connecting electronic, electro-optical and/or optical devices and methods of manufacturing such boards. The interconnections are formed by scribing electrially or optically conductive filaments to form a signal conductor layer. The interconnection board comprises a base as a support member, a signal conductor layer laminated to the base and a surface conductor layer laminated to the signal conductor layer. The interlayer connections between the signal conductor layer and the surface conductor layer are formed by segments of the conductive filaments of the signal conductor layer displaced from the signal conductor layer to the vicinity of surface of the interconnection board to form part of or connect with the surface conductive pattern.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: November 20, 1990
    Assignee: Kollmorgen Corporation
    Inventors: Joseph Hammond, John Branigan
  • Patent number: 4956749
    Abstract: A semiconductor integrated device support structure having a transmission line interconnect structure in a metal block on which the devices are mounted. The metal block is formed photolithographically from layers which define X,Y sections of the block. A plurality of stacked layers contains the complete wireline interconnect network. Each wire is a true coaxial transmission line having an inner conductor, a surrounding dielectric material and an outer conductor. By appropriate choice of radii of the inner conductor and the surrounding dielectric material, favorable impedances may be selected.
    Type: Grant
    Filed: November 20, 1987
    Date of Patent: September 11, 1990
    Assignee: Hewlett-Packard Company
    Inventor: Cheng-Cheng Chang
  • Patent number: 4940426
    Abstract: A high density electrical connector assembly, and method of manufacturing same. More particularly, the invention covers an essentially flat, woven screen formed of a plurality of substantially parallel, electrically conductive wires forming the warp wires thereof, where such wires may be as small as 2 mils in diameter. Arranged essentially perpendicular thereto are plural, spaced apart, insulative woof filaments. To one major face of said flat, woven screen is applied a hot laminating film to encapsulate said wires, while to such other major face a comparable film is applied. However, for such other face, the encapsulating film is not coextensive with the screen length, but rather is spaced from the ends thereof so as to provide for connector contacts on each such wire. If desirable, the contacts may be plated.The invention also contemplates means for electrically interconnecting the assembly hereof to a high density circuit pattern, such as found on a PC board.
    Type: Grant
    Filed: August 8, 1989
    Date of Patent: July 10, 1990
    Assignee: AMP Incorporated
    Inventors: John P. Redmond, Ray N. Shaak
  • Patent number: 4934044
    Abstract: A method for wiring an electronic device including a plurality of electronic components and a plurality of connector elements for interconnecting the plurality of electronic components, the connector elements being arranged on the same plane in spaced relation to each other so as to define passages includes a number of steps. A first discrete line is connected to a surface of a first connector element such that the first discrete line extends on a first passage extending along the first connector element. Two pins are positioned along the first passage, substantially perpendicular thereto. The first discrete line is bent along the two pins, a distance between the at least two pins is then reduced, and the at least two pins are then moved away from the first passage. Similar, steps can be used to provide multiple discrete line between two connector elements or along the same passage between different connector elements.
    Type: Grant
    Filed: December 12, 1988
    Date of Patent: June 19, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Hasegawa, Toshiyuki Amimoto, Mitsukiyo Tani
  • Patent number: 4918260
    Abstract: Wire for repairing or changing circuit elements such as printed circuits, has heat-resistant insulation surrounded by a hot-melt adhesive. The wire is attached to the surface of printed circuit boards easily by applying a hot iron to the adhesive layer on the wire and melting the adhesive which then adheres to the board surface. The coating is applied by passing insulated wire vertically through a length of molten adhesive and then through a die. Printed circuit board modifications can be made quickly and easily and at a relatively low cost.
    Type: Grant
    Filed: September 12, 1988
    Date of Patent: April 17, 1990
    Assignee: Preleg, Inc.
    Inventors: Louis E. Griffith, Peter R. Ebner
  • Patent number: 4908939
    Abstract: In making coaxial interconnection boards according to this invention coaxial conductors are scribed onto a circuit board substrate. The coaxial conductors are preformed and affixed in a predetermined pattern on the substrate using an adhesive. A conductive layer forming a ground plane covers the surface of the substrate interconnecting the shields of the coaxial conductors. The conductive material other than the coaxial signal conductors is eliminated around the termination points of the coaxial conductors thereby creating clearance areas. The clearance areas permit connection of the signal conductors to surface terminal pads without shorting to the shield conductors or ground planes.
    Type: Grant
    Filed: January 5, 1988
    Date of Patent: March 20, 1990
    Assignee: Kollmorgen Corporation
    Inventors: Leonard Shieber, J. Philip Plonski, Michael Vignola, Benjamin G. Chin
  • Patent number: 4882298
    Abstract: In a method for encapsulating microelectronic semiconductor and thin film devices, a reliable hermetically sealed encapsulation of the circuit components is achieved, even under long exposure to extreme environmental conditions of moisture and corrosive gases. A direct soldered connection and sealing of a metal foil capsule is achieved which is more reliable than glued capsules, and more economical than welded capsules.
    Type: Grant
    Filed: July 29, 1988
    Date of Patent: November 21, 1989
    Assignee: Messerschmitt-Boelkow-Blohm GmbH
    Inventors: Werner Moeller, Andreas Ulmann
  • Patent number: 4878293
    Abstract: Conductors of a flexible printed circuit routed through a hollow two axis articulated hinge allow a calculator with rotating case halves to possess a keyboard portion in each half of the case. The conductors routed through the hollow articulated hinge are generally centered about one axis of hinge rotation for approximately half the length of the axis, whereupon they transition by either a U-turn or jog to continue as centered about the other axis of hinge rotation. The conductors may be an integral part of a flexible membrane keyboard assembly having portions located in both halves of the calculator's case. Strain reliefs at the locations where the conductors traverse the case halves, and two in the hinge, at about the center thereof, limit and apportion the torsional flexing experieced by the conductors. The torsional flexing experienced by the flexible conductors increases the number of cycles of rotation they can undergo without breaking, as compared to conventional bending.
    Type: Grant
    Filed: August 31, 1988
    Date of Patent: November 7, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Ralph W. Kinser, Jr., David L. Shriver, Judith A. Layman
  • Patent number: 4868980
    Abstract: A printed circuit board for mounting and connecting a plurality of semiconductor devices is disclosed and includes a planar insulating substrate having multiple conductive layers disposed in overlying relationship within the planar substrate. A plurality of parallel rows of apertures for wire-wrap, quick-connect or stitch-wire contacts are provided for mounting integrated circuits. One side of the printed circuit board includes a plurality of power and ground connections disposed between each pair of parallel rows of apertures so that filter capacitors may be mounted under each integrated circuit, thereby conserving printed circuit board space. In a preferred mode of the present invention, alternate ones of the conductive layers are coupled to a source of electrical power while all remaining conductive layers are grounded. At least two adjacent conductive layers are then utilized to minimize parasitic capacitance by completely surrounding each aperture with a portion of conductive material.
    Type: Grant
    Filed: July 12, 1988
    Date of Patent: September 26, 1989
    Assignee: LTV Aerospace & Defense Company
    Inventor: Grady A. Miller, Jr.
  • Patent number: 4864723
    Abstract: Wire for repairing or changing circuit elements such as printed circuits has heat-resistant insulation surrounded by a hot-melt adhesive. The wire is attached to the surfaces of printed circuit boards easily by applying a hot iron to the adhesive layer on the wire and melting the adhesive which then adheres to the board surface. The hot iron has a tip with a groove in it so that when the iron tip is pressed onto the wire, the tip embraces the wire to melt the adhesive quickly and to make the bond relatively quickly. The coating is applied by passing insulated wire vertically through a length of molten adhesive and then through a die. A cleaner/holder device is used for cleaning the tip of a hot iron used for melting adhesive, or a soldering iron, and for holding the hot iron when it is not in use. The preferred cleaner is anti-combustion treated absorbent cotton string wound on a spool which is mounted in the holder, or adhesive tape with a soft clutch backing.
    Type: Grant
    Filed: May 19, 1988
    Date of Patent: September 12, 1989
    Assignee: Preleg, Inc.
    Inventors: Louis E. Griffith, Peter R. Ebner
  • Patent number: 4860433
    Abstract: An inductance element comprises conductive paths of copper and a spool member arranged on a substrate, and insulated winding formed by a fine copper wire whose surface is coated with an insulating film of urethane etc. is wound around the spool member so that both end portions thereof are subjected to ultrasonic vibration by an ultrasonic bonding apparatus to be connected to the conductive paths by ultrasonic bonding. Thus, the end portions of the winding can be processed by local heating with application of ultrasonic vibration, whereby the coil needs not be entirely heated and an inductance element can be readily implemented directly on the substrate.
    Type: Grant
    Filed: August 11, 1987
    Date of Patent: August 29, 1989
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Norio Miura
  • Patent number: 4859807
    Abstract: This invention relates to interconnection circuit boards and processes for making and modifying interconnection circuit boards wherein adhesive is applied to a wire used in scribing a conductor pattern. The adhesive is activated to a tacky state during the wire scribing operation which forms the conductor pattern, and can thereafter be cured to permanently bond the conductors to the board surface.
    Type: Grant
    Filed: October 1, 1987
    Date of Patent: August 22, 1989
    Assignee: Kollmorgen Technologies Corporation
    Inventors: Brian E. Swiggett, Ronald Morino, Raymond J. Keogh, Jonathan C. Crowell, George Szenczy, Andrew J. Schoenberg, Marju L. Friedrich
  • Patent number: 4843191
    Abstract: In accordance with one embodiment of the invention, a process for interconnecting the circuitry of two substrates comprises the step of terminating the circuitry on bonding pads that are arranged in parallel rows with the first row of each substrate being nearest an edge of the substrate. The bonding pads of the two first rows of the two substrates are joined by conductors of a dielectric tape that bridges the two substrates. The conductors overlap the edges of the dielectric tape and are organized to permit them to be bonded to corresponding bonding pads of the two substrates, for example, by soldering. The two second rows of bonding pads are joined by conductors on a second dielectric tape which is wide enough to cover two first rows of bonding pads and thereby provide electrical insulation.
    Type: Grant
    Filed: November 27, 1987
    Date of Patent: June 27, 1989
    Assignee: American Telephone and Telegraph Company, AT&T Bell Laboratories
    Inventor: Donald A. Thomas
  • Patent number: 4831725
    Abstract: A method for interconnecting nodes in each of a number of nets. This invention involves generating initial zones for all nets and determining cumulative demand for path spaces needed by these initial zones. The demand is then compared with the supply, and scores are determined for the paths of the initial zones. Redundant paths with the worst scores are then gradually deleted until there are no redundant paths. If however, demand for path spaces still exceeds supply, expanded zones are generated in areas where demand exceeds supply and redundant paths are gradually deleted until there are no redundant paths. The paths remaining after deletion from the expanded zones are then used to interconnect the nodes of the nets. The nodes are then interconnected using the remaining paths.
    Type: Grant
    Filed: June 10, 1988
    Date of Patent: May 23, 1989
    Assignee: International Business Machines Corporation
    Inventors: Bradford Dunham, Jerome B. Hickson, Jr., Hirsh Lewitan
  • Patent number: 4818322
    Abstract: This invention relates to a method of using laser energy for bonding and stripping conductors during the scribing operation. The method provides and directs discrete laser beam pulses of substantially the same energy content at a rate which continuously varies as the conductor feed rate continuously varies to provide a constant number of discrete pulses for each incremental length of conductor being scribed.
    Type: Grant
    Filed: September 14, 1987
    Date of Patent: April 4, 1989
    Assignee: Kollmorgen Technologies Corporation
    Inventors: Ronald Morino, Brian E. Swiggett, Raymond J. Keogh, Jonathan C. Crowell
  • Patent number: 4802277
    Abstract: A method of making a chip carrier array including the steps of providing a ceramic substrate and forming elongated slots in the substrate which define the edges thereof and which form one severable interconnecting bridge at each edge of each chip carrier, which bridges maintain the individual chip carriers in the array. A plurality of edge interconnect conductors are formed along each edge portion of each chip carrier on either side of the interconnecting bridges.
    Type: Grant
    Filed: November 23, 1987
    Date of Patent: February 7, 1989
    Assignee: Hughes Aircraft Company
    Inventor: Randolph E. Root
  • Patent number: 4791722
    Abstract: A printed circuit for mounting and connecting a plurality of semiconductor devices is disclosed and includes a planar insulating substrate having multiple conductive layers disposed in overlying relationship within the planar substrate. A plurality of parallel rows of apertures for wire wrap, quick connect or stitch wire contacts are provided for mounting integrated circuit. One side of the printed circuit board includes a plurality of power and ground connections disposed between each pair of parallel rows of apertures so that filter capacitors may be mounted under each integrated circuit, thereby conserving printed circuit board space. In a preferred mode of the present invention, alternate ones of the conductive layers are coupled to a source of electrical power while all remaining conductive layers are gounded. At least two adjacent conductive layers are then utilized to minimize parasitic capacitance by completely surrounding each aperture with a portion of conductive material.
    Type: Grant
    Filed: December 23, 1986
    Date of Patent: December 20, 1988
    Assignee: LTV Aerospace and Defense Co.
    Inventor: Grady A. Miller, Jr.
  • Patent number: 4791075
    Abstract: A process for making hermetic, low cost pin grid array (PGA) semiconductor die packages. The process involves die bonding a semiconductor die or integrated circuit chip to a substrate having an interconnect or metallization pattern thereon. The die is electrically connected to the pattern and then the die and the inner bonds are hermetically sealed inside a cap that is smaller than the substrate so that the ends of the metallization pattern are exposed. The leads are then electrically connected, such as by solder or other technique to the exposed ends of the pattern.
    Type: Grant
    Filed: October 5, 1987
    Date of Patent: December 13, 1988
    Assignee: Motorola, Inc.
    Inventor: Paul T. Lin