With Sintering Of Base Patents (Class 29/851)
  • Patent number: 11355408
    Abstract: What is provided is a method of manufacturing an insulating circuit board with a heatsink including an insulating circuit board and a heatsink, the heatsink being bonded to the metal layer side of the insulating circuit board, the metal layer being formed of aluminum, and a bonding surface of the heatsink with the insulating circuit board being formed of an aluminum alloy having a solidus temperature of 650° C. or lower. This method includes a high alloy element concentration portion forming step (S02) of forming a high alloy element concentration portion and a heatsink bonding step (S03) of bonding the heatsink, in which a ratio tb/ta of a thickness tb of the brazing material layer to a thickness to of the core material in the clad material is in a range of 0.1 to 0.3.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: June 7, 2022
    Assignee: MITSUBISHI MATERIALS CORPORATION
    Inventors: Takeshi Kitahara, Yoshiyuki Nagatomo
  • Patent number: 11141786
    Abstract: The present application provides a method for manufacturing a metal foam. The present application can provide a method for manufacturing a metal foam, which is capable of forming a metal foam comprising uniformly formed pores and having excellent mechanical properties as well as the desired porosity, and a metal foam having the above characteristics. In addition, the present application can provide a method capable of forming a metal foam in which the above-mentioned physical properties are ensured, while being in the form of a thin film or sheet, within a fast process time, and such a metal foam.
    Type: Grant
    Filed: April 3, 2017
    Date of Patent: October 12, 2021
    Inventors: Dong Woo Yoo, Jin Kyu Lee
  • Patent number: 9773989
    Abstract: The metal thin film production method of the present invention includes, in the following order, the steps of: preparing a substrate (1) having thereon an underlayer (2) formed of an insulating resin; subjecting a surface of the underlayer (2) to a physical surface treatment for breaking bonds of organic molecules constituting the insulating resin; subjecting the substrate (1) to a heat treatment at a temperature of 200° C. or lower; applying a metal nanoparticle ink to the underlayer (2); and sintering metal nanoparticles contained in the metal nanoparticle ink at a temperature equal to or higher than a glass transition temperature of the underlayer (2). A fused layer (4) having a thickness of 100 nm or less is formed between the underlayer (2) and a metal thin film (3) formed by sintering the metal nanoparticles.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: September 26, 2017
    Assignee: NATIONAL UNIVERSITY CORPORATION YAMAGATA UNIVERSITY
    Inventors: Daisuke Kumaki, Tomohito Sekine, Shizuo Tokito, Kenjiro Fukuda
  • Patent number: 9032614
    Abstract: One aspect relates to an electrical bushing for use in a housing of an implantable medical device. The electrical bushing includes at least one electrically insulating base body and at least one electrical conducting element. The electrical bushing includes a holding element to hold the electrical bushing in or on the housing. The conducting element is set-up to establish, through the base body, at least one electrically conductive connection between an internal space of the housing and an external space. The conducting element is hermetically sealed with respect to the base body. The at least one conducting element includes at least one cermet. The holding element is made, to at least 80% by weight with respect to the holding element, from a material selected from the group consisting of a metal from any of the subgroups IV, V, VI, VIII, IX, and X of the periodic system.
    Type: Grant
    Filed: January 30, 2012
    Date of Patent: May 19, 2015
    Assignee: Heraeus Precious Metals GmbH & Co. KG
    Inventor: Heiko Specht
  • Patent number: 9024200
    Abstract: There is provided an array type multilayer ceramic electronic component including a ceramic body having a plurality of dielectric layers stacked in a length direction, a first capacitor part including a plurality of first and second internal electrodes alternately exposed through both side surfaces of the ceramic body, a second capacitor part disposed to be spaced apart from the first capacitor part and including a plurality of third and fourth internal electrodes, a first external electrode formed on one side surface, a second external electrode disposed to be spaced apart from the first external electrode, formed on one side surface of the ceramic body, and a third external electrode formed on the other side surface of the ceramic body.
    Type: Grant
    Filed: October 22, 2013
    Date of Patent: May 5, 2015
    Assignee: Sansum Electro-Mechanics Co., Ltd.
    Inventor: Chang Ho Lee
  • Publication number: 20150114696
    Abstract: Disclosed herein are a core substrate and a method for manufacturing the same. According to a preferred embodiment of the present invention, a core substrate includes: a porous scaffold formed with a void; an insulating material formed to fill a void of the porous scaffold; and an electronic device embedded into the porous scaffold and the insulating material and having external electrodes formed on both surfaces thereof.
    Type: Application
    Filed: October 27, 2014
    Publication date: April 30, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Ho Hong, Keun Yong Lee, Sung Han Kim, Sa Yong Lee, Sang Hyun Shin
  • Patent number: 9009958
    Abstract: A mountable device includes a bio-compatible structure embedded in a polymer that defines at least one mounting surface. The bio-compatible structure includes an electronic component having electrical contacts, sensor electrodes, and electrical interconnects between the sensor electrodes and the electrical contacts. The bio-compatible structure is fabricated such that it is fully encapsulated by a bio-compatible material, except for the sensor electrodes. In the fabrication, the electronic component is positioned on a first layer of bio-compatible material and a second layer of bio-compatible material is formed over the first layer of bio-compatible material and the electronic component. The electrical contacts are exposed by removing a portion of the second layer, a conductive pattern is formed to define the sensor electrodes and electrical interconnects, and a third layer of bio-compatible material is formed over the conductive pattern.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: April 21, 2015
    Assignee: Google Inc.
    Inventor: James Etzkorn
  • Patent number: 9003653
    Abstract: A method for producing a ceramic multilayer circuit system, and a corresponding multilayer circuit system are provided. An embodiment of the method includes sequential deposition of a plurality of circuit layers of the multilayer circuit system on a substrate using a powder spray method; pressing of the deposited plurality of circuit layers; and thermal sintering of the pressed plurality of circuit layers. The individual circuit layers have electrically conductive areas made of at least one conductive material and electrically insulating areas made of at least one ceramic material.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: April 14, 2015
    Assignee: Robert Bosch GmbH
    Inventors: Juergen Egerter, Walter Roethlingshoefer, Markus Werner
  • Patent number: 8997342
    Abstract: A method of fabricating a multilayer electronic support structure comprising electroplating copper substructures, laying a dielectric pre-preg comprising a polymer resin over the copper substructures, and pressing to pressures of 200 to 600 PSI against a release film having a higher hardness than the resin of the prepreg but a lower hardness than the cured resin, and heating through a curing cycle while maintaining pressure.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: April 7, 2015
    Assignee: Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd.
    Inventors: Dror Hurwitz, Alex Huang
  • Patent number: 8981237
    Abstract: A wiring board for an electronic parts inspecting device that can be designed and produced relatively quickly, inexpensively, and with a few number of jigs is provided. In certain embodiments the wiring board comprises a board main body having a front surface, a probe pad area having probe pads located in a central portion of the front surface, an outer connecting terminal area having outer connecting terminals located in a peripheral portion of the front surface, and wherein probe pads are connected to outer connecting terminals by front surface wirings formed between the probe pad area and the outer connecting terminal area. While certain embodiments further comprise inner wirings and first via conductors to connect the probe pads and outer connecting terminals, it is preferable to have no or a minimal amount of such inner wirings. Lastly, a method of manufacturing the same is provided.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: March 17, 2015
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Tomoyoshi Ono, Kazushige Akita, Toshihisa Nomura
  • Publication number: 20150068598
    Abstract: A conductive paste composition contains a source of an electrically conductive metal, an alkaline-earth-metal boron tellurium oxide, and an organic vehicle. An article such as a high-efficiency photovoltaic cell is formed by a process of deposition of the paste composition on a semiconductor device substrate (e.g., by screen printing) and firing the paste to remove the organic vehicle and sinter the metal and establish electrical contact between it and the device.
    Type: Application
    Filed: November 19, 2014
    Publication date: March 12, 2015
    Inventors: ZHIGANG RICK LI, Kurt Richard Mikeska, David Herbert Roach, Carmine Torardi, Paul Douglas Vernooy
  • Publication number: 20150033557
    Abstract: A method of producing a conductive path on a substrate including depositing on the substrate a layer of material having a thickness in the range of 0.1 to 5 microns, including metal particles having a diameter in the range of 10 to 100 nanometers, employing a patterning laser beam to selectably sinter regions of the layer of material, thereby causing the metal particles to together define a conductor at sintered regions and employing an ablating laser beam, below a threshold at which the sintered regions would be ablated, to ablate portions of the layer of material other than at the sintered regions.
    Type: Application
    Filed: August 2, 2013
    Publication date: February 5, 2015
    Applicant: Orbotech Ltd.
    Inventors: Zvi KOTLER, Michael ZENOU
  • Publication number: 20150021071
    Abstract: In a conductive film formed by photo sintering of a film composed of copper particulates, adhesiveness to a base material of the conductive film is improved. A circuit board includes a circuit including a conductive film, and a substrate. The circuit board further includes a resin layer between the substrate and the conductive film. The substrate is made of a non-thermoplastic base material. The resin layer contains a thermoplastic resin. The conductive film is formed by photo sintering of a film composed of copper particulates, and thus improving adhesiveness of the conductive film to the base material through the resin layer.
    Type: Application
    Filed: February 28, 2013
    Publication date: January 22, 2015
    Applicant: ISHIHARA CHEMICAL CO., LTD.
    Inventors: Yuichi Kawato, Tomohiro Mita, Yusuke Maeda, Tomio Kudo
  • Patent number: 8875363
    Abstract: Disclosed are methods of making a dielectric on a metal foil, and a method of making a large area capacitor that includes a dielectric on a metal foil. A first dielectric layer is formed over the metal foil by physical vapor deposition, and a dielectric precursor layer is formed over the first dielectric layer by chemical solution deposition. The metal foil, first dielectric layer and dielectric precursor layer are prefired at a prefiring temperature in the range of 350 to 650° C. The prefired dielectric precursor layer, the first dielectric layer and the base metal foil are subsequently fired at a firing temperature in the range of 700 to 1200° C.
    Type: Grant
    Filed: September 25, 2008
    Date of Patent: November 4, 2014
    Assignee: CDA Processing Limited Liability Company
    Inventors: Seigi Suh, Esther Kim, William J. Borland, Christopher Allen Gross, Omega N. Mack, Timothy R. Overcash
  • Patent number: 8756804
    Abstract: Disclosed is a printed circuit board, including a base member, an insulating layer formed on each of both surfaces of the base member so that the surfaces of the base member are flattened, a circuit layer formed on the insulating layer, and a via for connecting the circuit layer formed on one surface of the base member with the circuit layer formed on the other surface of the base member. A method of manufacturing the printed circuit board is also provided.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: June 24, 2014
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyung Jin Jeon, Young Do Kweon, Seung Wook Park, Seon Hee Moon
  • Patent number: 8720050
    Abstract: A multilayer substrate having a built-in chip-type electronic component includes a ceramic laminate having a plurality of ceramic layers, a chip-type electronic component disposed in the ceramic laminate and having an external terminal electrode, and a via conductor disposed in the ceramic layers in the lamination direction. The external terminal electrode of the chip-type electronic component is connected to the via conductor, and a connection step is provided in at least one of the upper and lower end surfaces of the via conductor.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: May 13, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Osamu Chikagawa, Norio Sakai
  • Patent number: 8720052
    Abstract: A method of applying a conductive pattern of metal onto a web of indefinite length material. This method includes applying a metal containing composition onto the web in a predefined pattern, providing a roll having a very low thermal mass, and conveying the patterned web around the roll while simultaneously applying heat energy to the metal containing composition thereby converting the metal to a conductive pattern. This allows for flexible circuitry to be fabricated in an inexpensive roll-to-roll process.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: May 13, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Daniel J. Theis, Brian K. Nelson, James N. Dobbs, Samuel Kidane, Ronald P. Swanson, Daniel H. Carlson, Grant F. Tiefenbruck, Karl K. Stensvad
  • Patent number: 8695208
    Abstract: A method for manufacturing a monolithic inductive component is provided. The method may include providing a green body comprising a green sheet composite for forming a multilayer ceramic body with an integrated winding and a shaped body of ferritic core material, the green sheet composite being combined with an encapsulation so as to create a cavity with a cavity opening between the encapsulation and the green sheet composite, and the cavity being filled with the ferritic core material through the cavity opening; and heat-treating the green body, a multilayer ceramic body with an integrated winding being created from the green sheet composite and a magnetic core comprising the ferritic core material being created from the green sheet composite.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: April 15, 2014
    Assignee: Siemens Aktiengesellschaft
    Inventor: Richard Matz
  • Patent number: 8671563
    Abstract: The invention concerns a method for forming an electrically conductive pattern on an insulating substrate. In the method, particle-type electrically conductive matter is transferred onto a surface of the substrate and the particle-type electrically conductive matter is at least partially sintered at elevated temperature and pressure in order to convert the particle-type electrically conductive matter into a continuously electrically conductive pattern affixed to the substrate. According to the invention, the electrically conductive matter is transferred in the form of a predefined pattern, and the sintering is carried out by using a nip comprising two opposing nip members between which the substrate is fed. The method provides an efficient way of making high-resolution conductor structures at low temperatures.
    Type: Grant
    Filed: July 6, 2007
    Date of Patent: March 18, 2014
    Assignee: Oy Keskuslaboratorio-Centrallaboratorium AB
    Inventors: Juha Maijala, Juha Merta, Sanna Lehti
  • Patent number: 8646169
    Abstract: A simplified and less costly manufacture process of a print head can be effective in preventing the peeling-off between a substrate and a flow passage forming member. In the print head, a protective layer is formed between the flow passage forming member and a heat generating portion. The protective layer contains a noble metal. On a side of the flow passage forming member, the surface of the protective layer is made of an oxide of a noble metal, except in a portion corresponding to the heat generating portion, while in the portion corresponding to the heat generating portion on the flow passage forming member side, the surface thereof is made of the noble metal.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: February 11, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yuzuru Ishida, Takahiro Matsui, Ichiro Saito
  • Patent number: 8549737
    Abstract: The present invention relates to a compliant leaded interposer for resiliently attaching and electrically connecting a ball grid array package to a circuit board. The interposer may include a substrate, a plurality of pads, and a plurality of pins. The plurality of pads may be positioned substantially on the top surface of the substrate and arranged in a predetermined pattern substantially corresponding to the solder ball pattern on the ball grid array package. The plurality of pins may be positioned substantially perpendicular to the substrate and may extend through the substrate and the plurality of pads. The interposer may be configured to attach the ball grid array package to the circuit board such that each of the solder balls on the ball grid array package contacts at least a portion the plurality of pins and at least a portion of the plurality of pads and such that the each of the plurality of pins also connects to a contact on the circuit board.
    Type: Grant
    Filed: March 22, 2010
    Date of Patent: October 8, 2013
    Assignee: General Dynamics Advanced Information Systems, Inc.
    Inventor: Deepak K. Pai
  • Patent number: 8528201
    Abstract: One aspect relates to a method for producing an electrical bushing for an implantable device, an electrical bushing, and an implantable device. The method according to one embodiment includes forming a base body from a ceramic slurry and introducing a bushing conductor made of a metal powder, metal slurry, cermet powder and/or cermet slurry into the base body. The metal fraction in the bushing conductor is provided to decrease towards the base body. It includes sintering the green blank that includes the base body and the bushing conductor.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: September 10, 2013
    Assignee: W. C. Heraeus GmbH
    Inventors: Jens Troetzschel, Goran Pavlovic, Harald Manhardt, Nicole Guebler
  • Patent number: 8528195
    Abstract: A layout method for electronic components of a double-sided surface mount circuit board is presented, which includes the following steps. At least one first electronic component is fixed on a first side surface of a circuit board through a reflow soldering process. At least one second electronic component is inserted on the first side surface of the circuit board. The other first electronic component is placed on a second side surface of the circuit board, and the other second electronic component is inserted on the second side surface of the circuit board. Finally, a reflow soldering process is performed on the circuit board disposed with the first electronic components and the second electronic components, thereby completing a layout process for the electronic components on the two side surfaces of the circuit board at the same time.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: September 10, 2013
    Assignee: Inventec Corporation
    Inventors: Chung-Yang Wu, Hung-Tao Wong
  • Patent number: 8468693
    Abstract: A dielectric device has a first conductor and a dielectric disposed thereon. An intermediate region is formed between the first conductor and dielectric. In the intermediate region, an additive different from the first conductor and dielectric and the dielectric are mixed with each other. The additive contains at least one element of Si, Al, P, Mg, Mn, Y, V, Mo, Co, Nb, Fe, and Cr.
    Type: Grant
    Filed: August 25, 2010
    Date of Patent: June 25, 2013
    Assignee: TDK Corporation
    Inventors: Tomohiko Katoh, Kenji Horino, Yuko Saya
  • Patent number: 8418355
    Abstract: A method for forming transcriptional circuits and a method for manufacturing a circuit board are disclosed. A method of forming a transcriptional circuit, which includes forming an intaglio pattern corresponding to a circuit pattern by selectively forming a resist on a mold board, filling conductive material in the intaglio pattern, and transferring the conductive material onto a carrier by pressing the carrier onto the mold board such that the carrier faces the surface of the mold board having the conductive material filled in, makes it possible to form transcriptional circuits that can be transcribed into an insulation board using existing equipment, whereby costs can be reduced.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: April 16, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Sang-Duck Kim, Jung-Hyun Park, Hoe-Ku Jung, Jong-Gyu Choi, Ji-Eun Kim, Jeong-Woo Park
  • Patent number: 8375538
    Abstract: There is provided a method for manufacturing a piezoelectric actuator where the planar shape is adjusted by subjecting the piezoelectric body layer located on one of the outer surfaces in the two or more piezoelectric body layers to a polarization treatment to control remnant polarization of the piezoelectric body layer. The piezoelectric actuator is used as a drive portion of a piezoelectric drive type variable capacitor. The variable capacitor has high mechanical strength and excellent reliability for a long period of time. The relation between the displacement amount of the piezoelectric actuator and the capacity of the capacitor is stable, and the variable capacity is wide.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: February 19, 2013
    Assignee: NGK Insulators, Ltd.
    Inventors: Hideki Shimizu, Takao Ohnishi, Takashi Ebigase, Naoki Goto
  • Patent number: 8341815
    Abstract: A laminate is prepared in which adjacent internal electrodes are electrically insulated from each other at an end surface at which the internal electrodes are exposed, a space between the adjacent internal electrodes, which is measured in the thickness direction of insulating layers, is about 10 ?m or less when a withdrawn distance of the adjacent internal electrodes from the end surface is about 1 ?m or less, and is about 20 ?m or less when a protruding length of the adjacent internal electrodes from the end surface is at least about 0.1 ?m. In an electroplating step, electroplating deposits deposited on the ends of the adjacent internal electrodes are grown so as to be connected to each other.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: January 1, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tatsuo Kunishi, Yoshihiko Takano, Shigeyuki Kuroda, Akihiro Motoki, Hideyuki Kashio, Takashi Noji
  • Patent number: 8316519
    Abstract: A method for manufacturing a piezoelectric element that includes a piezoelectric ceramic body containing an internal electrode. The piezoelectric ceramic body is mainly made of a perovskite complex oxide containing an alkali metal niobate-based compound containing at least one element selected from among K, Li, and Na. The internal electrode is made of a base metal material, such as Ni or Cu. The piezoelectric element is produced by co-sintering the internal electrode and the piezoelectric ceramic body in a reducing atmosphere.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: November 27, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masahiko Kimura, Kosuke Shiratsuyu, Toshikazu Takeda, Nobuyuki Wada
  • Patent number: 8312628
    Abstract: A method for manufacturing a liquid discharge head includes heating the surface portion of power line that is to be in contact with a member made of resin, thereby forming, from a precious metal layer and a nickel layer, an adhesion layer made of an alloy containing precious metal and nickel as major components.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: November 20, 2012
    Assignee: Canon Kabushiki Kaisha
    Inventors: Sadayoshi Sakuma, Hirokazu Komuro, Takuya Hatsui, Yuzuru Ishida
  • Patent number: 8304661
    Abstract: A high-reliability ceramic composite multilayer substrate that has excellent flatness and few remaining pores, can be produced at a low cost while simplifying the manufacturing process, and can eliminate layer separation or separation from a mother board. The ceramic composite multilayer substrate includes a laminate containing a first ceramic layer and a second ceramic layer that is disposed so as to contact the first ceramic layer and suppresses firing shrinkage in the plane direction of the first ceramic layer. The laminate includes a resin/ceramic composite layer in which porous ceramic is impregnated with a resin formed on at least one principal surface of the laminate.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: November 6, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Masato Nomiya
  • Patent number: 8291558
    Abstract: A method for manufacturing a piezoelectric/electrostrictive element includes a step of subjecting the piezoelectric/electrostrictive film to a heat treatment and a polarization treatment after the film is allowed to stand until the value of an electric constant has converged after the heat treatment. The piezoelectric/electrostrictive element manufactured in this method has small stress remaining in the piezoelectric/electrostrictive film, and predetermined performance regarding, for example, a displacement amount, a displacement-generating force, and an electric power efficiency (consumed electric power) as a piezoelectric/electrostrictive element (piezoelectric/electrostrictive film) is never spoiled.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: October 23, 2012
    Assignee: NGK Insulators, Ltd.
    Inventors: Takao Ohnishi, Takashi Wada, Tomohiro Yamada, Makoto Tani
  • Publication number: 20120229160
    Abstract: A wiring board for an electronic parts inspecting device that can be designed and produced relatively quickly, inexpensively, and with few jigs is provided. In certain embodiments the wiring board includes a base board made of an insulating material having a front surface and a back surface, the base board including a plurality of first via conductors as well as first terminals on the front surface and outer terminals on the back surface that are connected to the ends of the first via conductors, and a mounting board on the front surface of the base board having a front side that includes, a plurality of probe pads, a plurality of second terminals that are electrically connected to the first terminals of the base board, and front surface wirings that connect the probe pads to the second terminals. Lastly, a method of manufacturing the same is provided.
    Type: Application
    Filed: March 7, 2012
    Publication date: September 13, 2012
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Tomoyoshi ONO, Kazushige AKITA, Toshihisa NOMURA
  • Patent number: 8250748
    Abstract: An LTCC substrate structure with at least one contact element for connecting a wire conductor, which has a first metallization (20) arranged on and/or in the ceramic substrate for electrical connection to the wire conductor, wherein the first metallization (20) preferably contains silver or a silver alloy. To avoid via posting or a plating process, a diffusion barrier layer covering the first metallization or metal layer, which diffusion barrier layer (22) covering the first metallization (20), which diffusion barrier layer is produced with a locally acting application method, and a second metal layer (24) arranged on the diffusion barrier layer (22) are provided, wherein the second metal layer (24) preferably contains gold and/or platinum and/or an alloy that has at least one of these elements. The invention also discloses a production method for an LTCC substrate structure of this type.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: August 28, 2012
    Assignee: Biotronik CRM Patent AG
    Inventors: Dieter Schwanke, Christian Zeilmann, Michael Krenkel
  • Patent number: 8245394
    Abstract: A method for producing a rigid magnetic circuit component for an electromagnetically operable valve includes: a) providing a base element made of a magnetic or a magnetizable material, b) complete first heat treatment of the base element, c) a local second heat treatment of the base element so as to form a subregion having a microstructure of martensite and residual austenite in the otherwise martensitic base element, and d) installing the finished processed base element as the magnetic circuit component in a magnetic circuit.
    Type: Grant
    Filed: September 25, 2007
    Date of Patent: August 21, 2012
    Assignee: Robert Bosch GmbH
    Inventors: Max Seitter, Stefan Oetinger
  • Patent number: 8230593
    Abstract: In assembly of probe arrays for electrical test, a problem can arise where a bonding agent undesirably wicks between probes. According to embodiments of the invention, this wicking problem is alleviated by disposing an anti-wicking agent on a surface of the probe assembly such that wicking of the bonding agent along the probes toward the probe tips is hindered. The anti-wicking agent can be a solid powder, a liquid, or a gel. Once probe assembly fabrication is complete, the anti-wicking agent is removed. In preferred embodiments, a template plate is employed to hold the probe tips in proper position during fabrication. In this manner, undesirable bending of probes caused by introduction or removal of the anti-wicking agent can be reduced or eliminated.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: July 31, 2012
    Assignee: MicroProbe, Inc.
    Inventor: January Kister
  • Patent number: 8209849
    Abstract: A method of A production method including interdiffusion of a Ni component in a magnetic layer and a Zn component in a nonmagnetic sheet to form an interdiffusion layer in a region of the nonmagnetic sheet inside a conductive pattern. This method allows the interdiffusion layer to be formed without need for complicated processing of the nonmagnetic sheet. Furthermore, there is no boundary region between the magnetic layer and the nonmagnetic sheet around it. The nonmagnetic layer is located between turns of a coiled conductor to suppress degradation of dc bias characteristics and a magnetic body penetrates in a region inside the coiled conductor to suppress reduction in inductance due to provision of the nonmagnetic layer between turns of the coiled conductor.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: July 3, 2012
    Assignee: TDK Corporation
    Inventors: Hidekazu Sato, Masazumi Arata, Kunio Oda, Yoshimitsu Satoh
  • Patent number: 8186027
    Abstract: Piezoelectric vibrators may be fabricated by forming a piezoelectric body of piezoelectric sheets, of which thickness is controlled, and simultaneously sintering the sheets along with cover layers, on which grooves are formed, and may be fabricated by laminating the piezoelectric sheets, of which the thickness is controlled, providing internal electrodes between the sheets, and forming external electrodes insulated from the internal electrodes.
    Type: Grant
    Filed: August 14, 2008
    Date of Patent: May 29, 2012
    Assignee: Innochips Technology
    Inventors: In Kil Park, Duk Hee Kim
  • Patent number: 8161634
    Abstract: A method of fabricating a printed circuit, which involves forming a bump on a first metal layer; laminating an insulating layer on the bump so that the bumps passes through the insulating layer; placing a second metal layer on the insulating layer and then conducting heating and pressing, thus laminating the second metal layer on the insulating layer; etching the first metal layer and the second metal layer, thus forming circuit patterns on both surfaces of the insulating layer; and heating and pressing both surfaces of the insulating layer, thus embedding the circuit patterns in the insulating layer, such that the circuit pattern is embedded in an insulating layer to decrease the thickness of a printed circuit board, and the time and cost required for the process of fabricating a printed circuit board are decreased.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: April 24, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jee Soo Mok, Jun Heyoung Park
  • Patent number: 8132304
    Abstract: A method for producing a piezoelectric actuator has the following steps: providing a plurality of piezoelectric material layers (2) which can be assembled into a stack; applying electrode layers (3) each having a recess (4, 4?) to the plurality of piezoelectric material layers, such that an alternating sequence of piezoelectric material layers and electrode layers is formed in the stack, wherein electrode layers with a recess (4) in a first recess zone and electrode layers with a recess (4?) in a second recess zone which differs from the first recess zone are alternatingly formed in the stack; and providing a stress-relieving material (5) in the first and second recesses, the stress-relieving material exhibiting electrically insulating properties after the stack is sintered, and preventing the individual material layers from adhering to one another.
    Type: Grant
    Filed: November 24, 2010
    Date of Patent: March 13, 2012
    Assignee: Continental Automotive GmbH
    Inventors: Martin Schröder, Manfred Weigl
  • Patent number: 8112881
    Abstract: A process for manufacturing a multilayer wiring board including the steps of forming an insulating layer on a base provided with a bump for interlayer connection, bonding a copper foil onto the insulating layer by a thermocompression bonding by sandwiching the copper foil between stainless steel plates, and patterning the copper foil, in which a metal foil is interposed at least between each of the stainless plates and the copper foil at the time of the thermocompression bonding. At this time, a mold release layer is formed on a surface of the metal foil to be imposed. Thus, such a multilayer wiring board can be manufactured that prevents sticking of a product after molding (cementing of the copper foil) and excels in dimensional stability without occurrence of wrinkling and ruggedness.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: February 14, 2012
    Assignees: Tessera Interconnect Materials, Inc., Sony Chemical & Information Device Corporation
    Inventors: Kazuhiro Shimizu, Masanobu Yagi, Kenichiro Hanamura, Mitsuyuki Takayasu, Kiyoe Nagai, Tomoo Iijima
  • Patent number: 8112885
    Abstract: A method for forming a copper interconnection structure includes the steps of forming an opening in an insulating layer, forming a copper alloy layer including a metal element on an inner surface of the opening, and conducting a heat treatment on the copper alloy layer so as to form a barrier layer. An enthalpy of oxide formation for the metal element is lower than the enthalpy of oxide formation for copper. The heat treatment is conducted at temperatures ranging from 327° C. to 427° C. and for a time period ranging from 1 minute to 80 minutes.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: February 14, 2012
    Assignee: Advanced Interconnect Materials, LLC
    Inventors: Junichi Koike, Akihiro Shibatomi
  • Patent number: 8015701
    Abstract: A flexible printed circuit assembly with a fluorocarbon dielectric layer and an adhesive layer with reduced thickness. The flexible printed circuit assembly includes a first dielectric layer and a signal trace disposed on the first dielectric layer. An adhesive layer with a thickness smaller than a height of the signal trace is disposed on the first dielectric layer, so that only a portion of a side surface of the signal trace is covered. A second dielectric layer made of fluorocarbon is disposed on the adhesive layer, covering a remaining portion of the side surface of the signal trace and a top surface of the signal trace.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: September 13, 2011
    Assignee: International Business Machines Corporation
    Inventors: Paul V. Abrahamson, John Richard Dangler, Daniel Lee Dawiedczyk, Matthew Stephen Doyle
  • Patent number: 8006377
    Abstract: The present invention has for its object to provide a multilayer printed circuit board which is very satisfactory in facture toughness, dielectric constant, adhesion and processability, among other characteristics. The present invention is directed to a multilayer printed circuit board comprising a substrate board, a resin insulating layer formed on said board and a conductor circuit constructed on said resin insulating layer, wherein said resin insulating layer comprises a polyolefin resin.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: August 30, 2011
    Assignee: Ibiden Co., Ltd.
    Inventors: Honchin En, Masayuki Hayashi, Dongdong Wang, Kenichi Shimada, Motoo Asai, Koji Sekine, Tohru Nakai, Shinichiro Ichikawa, Yukihiko Toyoda
  • Patent number: 8001666
    Abstract: A method is provided that includes providing a mold on a temporary substrate, e.g., a sapphire substrate. Next, a material such as PZT paste is deposited into the mold. Then, the mold is removed to obtain elements formed by the mold. The formed elements will then be sintered. After sintering, electrode deposition is optionally performed. The sintered elements are then bonded to a final target substrate and released from the temporary substrate through laser liftoff. Further, electrodes may also be optionally deposited at this point.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: August 23, 2011
    Assignee: Palo Alto Research Center Incorporated
    Inventors: Baomin Xu, Stephen D. White, Steven A. Buhler
  • Patent number: 7992297
    Abstract: One embodiment of the invention comprises an improved method for making a via structure for use in a printed circuit board (PCB). The via allows for the passage of a signal from one signal plane to another in the (PCB), and in so doing transgresses the power and ground planes between the signal plane. To minimize EM disturbance between the power and ground planes, signal loss due to signal return current, and via-to-via coupling, the via is shielded within two concentric cylinders, each coupled to one of the power and ground planes.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: August 9, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Shiyou Zhao, Houfei Chen, Hao Wang
  • Patent number: 7987587
    Abstract: A method is described by which an electrical path is created between layers on a printed circuit board (PCB) without the use of plated through holes (PTH). Through the use of a liquid solder or conductive epoxy injection fixture, a conductive path is created in pre-drilled holes forming an electrical connection between internal PCB metal layers and surface mounted components without the creation of parasitic stubs on the signal nets.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: August 2, 2011
    Assignee: International Business Machines Corporation
    Inventors: Wiren Dale Becker, Michael Ford McAllister, Alan Daniel Stigliani, John G. Torok
  • Patent number: 7937835
    Abstract: A composite ceramic substrate for receiving an ejection head chip for a micro-fluid ejection head and a method for making the composite ceramic substrate. The substrate includes a high temperature previously fired ceramic base having a substantially planarized first surface and at least one fluid supply slot therethrough. A low temperature co-fired ceramic (LTCC) tape layer bundle having at least two LTCC tape layers is attached to the ceramic base at an interface between the LTCC tape layer bundle and the first surface of the ceramic base. The LTTC tape layer bundle has at least one chip pocket therein and at least one of the LTCC tape layers includes a plurality of conductors.
    Type: Grant
    Filed: February 1, 2010
    Date of Patent: May 10, 2011
    Assignee: Lexmark International, Inc.
    Inventors: Frank Edward Anderson, Michael John Dixon, Eric Spencer Hall, Elios Klemo, Bryan Dale McKinley, Jeanne Marie Saldanha Singh
  • Patent number: 7930822
    Abstract: A conductive member for a non-contact type data carrier such as a wireless tag is simply and cheaply manufactured. A method for manufacturing a conductive member for a non-contact type data carrier comprises: a printing process during which, while a base material (4) is run, a bonding agent layer (5) is printed in a predetermined pattern on the surface thereof, and is dried; a bonding process during which a conductive layer (6) is laminated on the surface of the bonding agent layer (5) for heating and bonding; a punching process during which the conductive layer (6) is punched in the above-described pattern on the base material (4); and a separating process during which an unnecessary portion (6b) of the conductive layer (6) is separated from the base material (4). Accordingly, a conventional multilayered laminated sheet is not required to realize reduction in the material.
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: April 26, 2011
    Assignee: Dai Nippon Printing Co., Ltd.
    Inventors: Yuki Nakanishi, Hideto Sakata, Akihiko Igarashi
  • Patent number: 7918015
    Abstract: A process for making a fluid ejector head for a micro-fluid ejection device. In one embodiment, the process comprises depositing a thin film resistive layer on a substrate to provide a plurality of thin film heaters. The thin film resistive layer comprises a tantalum-aluminum-nitride material consisting essentially of AlN, TaN, and TaAl alloys, and containing from about 30 to about 70 atomic % tantalum, from about 10 to about 40 atomic % aluminum and from about 5 to about 30 atomic % nitrogen.
    Type: Grant
    Filed: December 17, 2008
    Date of Patent: April 5, 2011
    Assignee: Lexmark International, Inc.
    Inventors: Byron V. Bell, Robert W. Cornell, Yimin Guan, George K. Parish
  • Patent number: RE44629
    Abstract: The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: December 10, 2013
    Assignee: Intel Corporation
    Inventors: Suresh Ramalingam, Nagesh Vodrahalli, Michael J. Costello, Mun Leong Loke, Ravi V. Mahajan