With Sintering Of Base Patents (Class 29/851)
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Patent number: 7065846Abstract: The invention relates to a method for the manufacture of piezoelectric multilayer actuator in which thin layers of a piezoceramic material, called “green leaves” on which at least one internal electrode is applied, are stacked to form a block such that the internal electrodes are guided in alternation to oppositely lying surfaces of the actuator, where they become bound together by an external electrode, the actuator compact being sintered and subjected to abrasive shaping, and then the base metallization is applied for the external electrode.Type: GrantFiled: July 8, 2003Date of Patent: June 27, 2006Assignee: Ceramtec AG Innovative Ceramic EngineeringInventors: Hans-Jurgen Schreiner, Reiner Bindig, Jurgen Schmieder
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Patent number: 7059028Abstract: Methods of making certain piezoelectric films are disclosed. For example, a certain method of making piezoelectric films consistent with certain embodiments of the invention can include the steps of obtaining a piezoelectric material, reducing said piezoelectric material to particles, contacting said particles with a flexible matrix material, and applying said matrix material to one or more surfaces of a member.Type: GrantFiled: October 6, 2003Date of Patent: June 13, 2006Assignee: Head Sport AGInventor: Herfried J. Lammer
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Patent number: 7022251Abstract: Disclosed is a method for forming a conductor on a dielectric. The method commences with the deposition of a conductive thickfilm on the dielectric, followed by a “subsintering” of the conductive thickfilm. Either before or after the subsintering, the conductive thickfilm is patterned to define at least one conductor. After subsintering, the conductive thickfilm is etched to expose the conductor(s), and the conductor(s) are then fired. A brief chemical etch may be used after the final firing step if improved wire-bondability is required.Type: GrantFiled: June 19, 2003Date of Patent: April 4, 2006Assignee: Agilent Technologies, Inc.Inventors: John F. Casey, Lewis R. Dove, Ling Liu, James R. Drehle, R. Frederick Rau, Jr., Rosemary O. Johnson
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Patent number: 7018494Abstract: A method of producing a composite sheet in which a through hole formed in a predetermined portion of the first ceramic sheet is buried with a different kind of sheet having substantially the same thickness as the first ceramic sheet, such as a resin sheet a metal sheet or a ceramic sheet of a material different from that of the first ceramic sheet. A first method comprises a step of preparing a first ceramic sheet from a ceramic powder, and a different kind of sheet; a step of forming a through hole in a predetermined portion of the first ceramic sheet; a step of laminating the different kind of sheet on the ceramic sheet in which the through hole is formed; and a step of preparing a composite sheet by pressing the portion of the first ceramic sheet where the through hole is formed from the side of the different kind of sheet, such that the first ceramic sheet and the different kind of sheet are integrated together.Type: GrantFiled: August 28, 2003Date of Patent: March 28, 2006Assignee: Kyocera CorporationInventors: Shinichi Suzuki, Koichi Nagata, Takayuki Ikeuchi, Yuji Tanaka, Yasuhiro Sasaki, Shigeki Yamada, Yasuhiko Yoshihara, Masamitsu Onitani
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Patent number: 7004984Abstract: After a resistor and/or a capacitor are simultaneously fired on a fired ceramic core substrate to be fired, the fired resistor and/or the fired capacitor is trimmed so that the resistance and the capacitance are adjusted. Thereafter, an after-lamination green sheet is laminated onto the ceramic core substrate and the produced after-lamination substrate is fired at a temperature which is lower than the sintering temperature of the resistor and the dielectric. Thus, the sintered resistor and dielectric can be prevented from being softened and melted when the after-lamination substrate is fired. Moreover, the resistance and the capacitance accurately adjusted by trimming before the after-lamination substrate is fired are not changed by the firing.Type: GrantFiled: January 9, 2004Date of Patent: February 28, 2006Assignee: Murata Manufacturing Co., Ltd.Inventors: Junzo Fukuta, Satoru Adachi
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Patent number: 6954971Abstract: A fetal heart monitoring system preferably comprising a backing plate having a generally concave front surface and a generally convex back surface, and at least one sensor element attached to the concave front surface for acquiring acoustic fetal heart signals produced by a fetus within a body. The sensor element has a shape that conforms to the generally concave back surface of the backing plate. In one embodiment, the at least one sensor element comprises an inner sensor, and a plurality of outer sensors surrounding the inner sensor. The fetal heart monitoring system can further comprise a web belt, and a web belt guide movably attached to the web belt. The web belt guide being is to the convex back surface of the backing plate.Type: GrantFiled: September 30, 2002Date of Patent: October 18, 2005Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventors: Timothy D. Bryant, Mark W. Wynkoop, Nancy M. H. Holloway, Allan J. Zuckerwar
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Patent number: 6941625Abstract: A method of producing a piezoelectric/electrostrictive device in which a piezoelectric/electrostrictive element including a substantially trapezoidal laminate having narrower and wider surfaces lying substantially in parallel to each other and first and second surfaces opposed to each other between the narrower and wider surfaces. The first and second surfaces are inclined at given angles to one of the narrower and wider surfaces. The laminate includes piezoelectric/electrostrictive layers and interposed internal electrodes, the internal electrodes being broken up into a first and a second group, each of the first group internal electrodes lying over one of the second group internal electrodes through one of the piezoelectric/electrostrictive layers. A first external electrode is formed on the first surface of the laminate and is coupled to the first group internal electrodes. A second external electrode is formed on the second surface of the laminate and is coupled to the second group internal electrodes.Type: GrantFiled: September 27, 2004Date of Patent: September 13, 2005Assignee: NGK Insulators, Ltd.Inventors: Masahiko Namerikawa, Kazuyoshi Shibata, Masaki Iwamoto
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Patent number: 6938336Abstract: A resin filled board is manufactured by forming roughened surfaces on a conductive layer in a throughhole before it is filled with a resin, forming smooth surfaces on conductive layers on the top and bottom of the board, printing the resin using a mask having an opening at a position corresponding to the throughhole to selectively fill the resin in the throughhole, and curing the resin. In this way, the surface of the conductive layer around the throughhole is smoothed, so that hardly any of the resin remains on the surfaces near the throughhole when the surfaces of the board is mechanically polished after the resin is cured. Also, the filling resin will not fall down into the throughhole.Type: GrantFiled: October 18, 2002Date of Patent: September 6, 2005Assignee: NEC Toppan Circuit Solutions, Inc.Inventors: Toshihide Ito, Satoshi Nakamura
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Patent number: 6938332Abstract: A method for manufacturing multilayer ceramic substrates in accordance with a multiple formation method using a non-shrinkage process allows the multilayer ceramic substrates to be smoothly formed by dividing a sintered multilayer mother substrate, and in addition, external terminal electrodes in a preferable state can be efficiently formed. When a green composite laminate comprising shrinkage suppression layers and a green multilayer mother substrate provided therebetween is formed, through-holes are provided on dividing lines so as to divide conductors, and in addition, cut-in grooves are provided along the dividing lines. After the shrinkage suppression layers are removed from the fired composite laminate, the multilayer ceramic substrates are obtained by dividing the multilayer mother substrate along the through-holes and the cut-in grooves.Type: GrantFiled: June 28, 2002Date of Patent: September 6, 2005Assignee: Murata Manufacturing Co., Ltd.Inventors: Hideyuki Harada, Hiromichi Kawakami
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Patent number: 6925703Abstract: A method for producing an insulated wire having a cross section of a desired shape, in which a conductor having a cross section of a desired shape is coated with an insulating film, which method comprises: supplying a raw conductor while passing through a rolling unit composed of at least one pair of rolling rolls that are capable of freely rotating without a drive mechanism and that have a desired shape, thereby forming a conductor having a cross section of a desired shape; and coating the conductor with an insulating film.Type: GrantFiled: October 1, 2001Date of Patent: August 9, 2005Assignee: The Furukawa Electric Co., Ltd.Inventors: Toshinobu Harada, Masaki Sugiura, Satoshi Saitou
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Patent number: 6889426Abstract: A method for manufacturing wired circuit board that enables a wired circuit board of high quality to be manufactured without changing in dimension of the wired circuit board substantially. In this method, the wired circuit board is wound in layers in the winding process in such a manner that after an uncured thermosetting resin layer is formed on the wired circuit board in the resin layer forming process, a right-side spacer and a left-side spacer are disposed on the already wound wired circuit board at both widthwise ends thereof and also an upper spacer is disposed on the right-side spacer and the left-side spacer so as to cover a widthwise area of the wired circuit board, so that the right-side spacer, the left-side spacer and the upper spacer are positioned between the layers of the wired circuit board when wound. Thereafter, the wired circuit board wound in the rolled state is heated as it is, to cure the uncured thermosetting resin layer in the curing process.Type: GrantFiled: July 19, 2002Date of Patent: May 10, 2005Assignee: Nitto Denko CorporationInventors: Hirofumi Fujii, Shunichi Hayashi
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Patent number: 6880244Abstract: Method of manufacturing a circuit board and semiconductor device wherein the circuit board has a plurality of wiring patterns and protrusions located on the wiring patterns, the method including simultaneously and unitarily forming the wiring patterns and protrusions, and alternatively coupling electrically the protrusions with electrodes on a semiconductor chip component when present.Type: GrantFiled: January 5, 2001Date of Patent: April 19, 2005Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Yuji Yagi, Takeo Yasuho
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Patent number: 6871388Abstract: A method of forming an electronic component includes laminating ceramic green sheets on a support film to obtain a ceramic green sheet laminate, forming through holes through the ceramic green sheet laminate at positions where via hole electrodes are to be located, applying conductive material into the through holes so as to fill the through holes and so as to be located on the upper surface of the ceramic green sheet laminate to form via hole electrodes, and sintering the ceramic green sheet laminate to form a substrate and so as to form protruding portions of the via hole electrodes which protrude upward from the upper surface of the substrate.Type: GrantFiled: November 25, 2002Date of Patent: March 29, 2005Assignee: Murata Manufacturing Co., Ltd.Inventors: Satoshi Ishino, Kenji Kubota, Tsuyoshi Saito, Michinobu Maesaka, Mamoru Ogawa, Jiro Inoue, Hiroaki Kaida
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Patent number: 6871400Abstract: A liquid jetting head of the invention includes a flowing-path plate through which a flowing-path space is formed as a flowing-path for a liquid. A nozzle plate is provided on one side surface of the flowing-path plate, said nozzle plate having a nozzle that is communicated with the flowing-path space. A sealing plate is provided on the other side surface of the flowing-path plate for sealing the flowing-path space. A portion of the other side of the flowing-path space forms a pressure-chamber space. A portion of the other side of the flowing-path plate including at least a portion of the pressure-chamber space is formed by electrocasting. A pressure-generating unit is provided at a portion of the other side of the sealing plate corresponding to the pressure-chamber space for changing a pressure of the liquid in the pressure-chamber space.Type: GrantFiled: August 6, 2003Date of Patent: March 29, 2005Assignee: Seiko Epson CorporationInventor: Tsuyoshi Kitahara
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Patent number: 6860006Abstract: A monolithic electronic component includes a composite body having a plurality of stacked ceramic layers. The ceramic layers include interconnecting conductors provided in each of the ceramic layers, including first terminals, arranged on a first end surface in the stacking direction of the composite body, for defining connections with an interconnection substrate, and second terminals, arranged on a second end surface opposite of the first end surface of the composite, for defining connections with a mounted component. The first terminals are defined by conductor layers provided on the first end surface and the second terminals are defined by exposed end surfaces of terminal via-hole conductors which extend from the inner portion of the composite to the second end surface. The exposed end surfaces of the terminal via-hole conductors are flat and are on substantially the same plane as the second end surface.Type: GrantFiled: September 13, 2002Date of Patent: March 1, 2005Assignee: Murata Manufacturing CO, Ltd.Inventors: Norio Sakai, Isao Kato, Kazuhiro Isebo
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Patent number: 6857172Abstract: According to the present invention, a method of manufacturing a ferroelectric capacitor using a ferroelectric thin film, includes steps of: forming a lower conductive layer on a semiconductor substrate; coating solution of ferroelectric coking including organic solvent and organometallic complex on the lower conductive layer; performing a heating process for coated solution at temperature, to decompose said organometallic complex in solution of ferroelectric coking, or more and ferroelectric crystallization temperature or below to form said metal compound thin film; forming an upper conductive layer on said metal compound thin film; and performing a heating process for said metal compound thin film at ferroelectric crystallization temperature or more to form said ferroelectric thin film.Type: GrantFiled: December 13, 2001Date of Patent: February 22, 2005Assignee: Oki Electric Industry Co., Ltd.Inventor: Daisuke Inomata
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Patent number: 6839955Abstract: In the multilayer inductor, the substrate thereof is composed of a constituent belonging to spinel ferrite, and is furnished with internal conductors of a main constituent being silver at the interior of the substrate. The internal conductors are drawn outside of the substrate, and the drawn portions are provided with external electrodes. The internal conductors contain manganese and bismuth, and the manganese and bismuth contents at an interface between the internal conductors and the substrate are more than those of other ranges. MnO2 of 0.02 to 0.1 wt % and Bi2O3 of 0.5 to 1.2 wt % are added to a paste of the main constituent being silver to be used to the internal conductors, and the paste is baked together with spinel ferrite material.Type: GrantFiled: May 20, 2002Date of Patent: January 11, 2005Assignee: TDK CorporationInventors: Fumio Uchikoba, Noriyuki Kojima
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Patent number: 6823585Abstract: A method and structure to form surface plating metallization on a substrate. Two layers of tape are applied to the surface of the substrate. A first path is cut through both layers of tape exposing the substrate surface. The first path connects at least one conductive via on the top surface of the substrate. A second path is cut through the second layer of tape exposing the first layer of tape. The second path is routed from the first path to an edge of the substrate A seed layer is deposited over the surface of the second layer of tape thereby creating a seeded plating path in the first path and a sacrificial seeded conduction path in the second path. Connecting the sacrificial seeded conduction path to a plating potential at the edge of the substrate creates a plated path on the surface of the substrate. The sacrificial path is removed when the tape is removed.Type: GrantFiled: March 28, 2003Date of Patent: November 30, 2004Assignee: International Business Machines CorporationInventors: Mark J. LaPlante, Jon A. Casey, Thomas A. Wassick, David C. Long, Krystyna W. Semkow, Patrick E. Spencer, Robert A. Rita, Richard F. Indyk, Kathleen M. Wiley, Brian R. Sundlof, James Balz, Lori A. Maiorino, Donald R. Wall, Glenn A. Pomerantz
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Patent number: 6823584Abstract: A process for manufacturing a membrane electrode assembly for an electrochemical cell comprises: feeding a sheet of ion exchange membrane material through a double belt press; feeding at least one electrode substrate through the double belt press; and applying heat and pressure to bond a portion of the membrane material and the electrode substrate within a process zone of the double belt press. An apparatus for manufacturing membrane electrode assemblies for an electrochemical cell comprises a double belt press. The present process can further comprise cutting a membrane electrode assembly, such as by longitudinal slitting to obtain strips of the desired width and/or cross-cutting of the strips to obtain a membrane electrode assembly of the desired length.Type: GrantFiled: April 30, 2002Date of Patent: November 30, 2004Assignee: Ballard Power Systems Inc.Inventors: Joachim R. Schaefer, Martin Schroer
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Patent number: 6817092Abstract: A method allowing for the inexpensive automated construction of interconnections between circuit boards is provided. According to the present invention, printed circuit pins are inserted in a circuit board from the top (component side). Provided the heads of the pins are thin enough to lie beneath a solder stencil, the pins may be pre-installed on the circuit board and solder applied to the pins at the same time solder is applied to other regions of the board. Thus, known surface mount techniques may be employed to form solder connections between the pins and conductive traces on the circuit board, which facilitates the automation of the previously manual operation of soldering the printed circuit pins separately.Type: GrantFiled: October 4, 2001Date of Patent: November 16, 2004Assignee: Powerwave Technologies, Inc.Inventors: James Keith Custer, James Hiram Roberson, William Kerr Veitschegger
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Patent number: 6813815Abstract: A piezoelectric/electrostrictive element including a substantially trapezoidal laminate having narrower and wider surfaces lying substantially in parallel to each other and first and second surfaces opposed to each other between the narrower and wider surfaces. The first and second surfaces are inclined at given angles to one of the narrower and wider surfaces. The laminate includes piezoelectric/electrostrictive layers and interposed internal electrodes, the internal electrodes being broken up into a first and a second group, each of the first group internal electrodes lying over one of the second group internal electrodes through one of the piezoelectric/electrostrictive layers. A first external electrode is formed on the first surface of the laminate and is coupled to the first group internal electrodes. A second external electrode is formed on the second surface of the laminate and is coupled to the second group internal electrodes.Type: GrantFiled: July 31, 2003Date of Patent: November 9, 2004Assignee: NGK Insulators, Ltd.Inventors: Masahiko Namerikawa, Kazuyoshi Shibata, Masaki Iwamoto
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Patent number: 6810577Abstract: The present invention provides a method of efficiently manufacturing a dielectric waveguide with high reliability and precision. In the method, a resist material is formed on the outer surface of a green compact provided with a removal inhibiting layer, and predetermined portion of the green compact defined by the resist material is removed by the sand blasting method using the resist material as a mask, until the removal inhibiting layer is exposed to obtain a shaped green compact structure. The thus-obtained structure is fired to obtain a sintered body which comprises a dielectric strip and a wing.Type: GrantFiled: February 25, 2003Date of Patent: November 2, 2004Assignee: Murata Manufacturing Co. Ltd.Inventor: Toshikazu Takeda
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Patent number: 6807729Abstract: The present invention provides a method of manufacturing a metal foil laminated product including the steps of forming a bonding layer containing a thermosetting resin on a lower wiring layer, a metal layer or an insulating layer, provisionally bonding a porous layer having a releasing film attached thereto onto a surface of the bonding layer, peeling the releasing film from the porous layer, laminating a metal foil on the porous layer obtained after the peeling, and heating and pressurizing the laminated product to transfer the bonding layer to the metal foil and thereby integrating them. Furthermore, the present invention provides a method of manufacturing a wiring board comprising the steps of manufacturing a metal foil laminated product by the above manufacturing methods, and providing a pattern on the metal foil of the metal foil laminated product, thereby forming a wiring layer.Type: GrantFiled: June 11, 2002Date of Patent: October 26, 2004Assignee: Nitto Denko CorporationInventors: Toshiyuki Kawashima, Nobuharu Tahara, Kenichi Ikeda
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Patent number: 6772512Abstract: A method of fabricating a FCBGA (Flip-Chip Ball-Grid-Array) package without causing mold flash is proposed, which is characterized by the forming of a dummy pad over the back surface of the substrate to allow the portion of the solder mask formed over a vent hole in the substrate to be substantially raised to an elevated flat surface where a groove is then formed to surround the exit of the vent hole. During a molding process, when the encapsulation material infiltrates to the exit of the vent hole, it can be confined within the groove in the elevated flat surface over the dummy pad, thereby preventing it from flashing to nearby solder-ball pads.Type: GrantFiled: January 13, 2001Date of Patent: August 10, 2004Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Ying-Chou Tsai, Jen-Yi Tsai
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Patent number: 6757963Abstract: A surface of a first ceramic component is joined to a surface of a second ceramic component using a silver-based composition. The silver-based composition is a mixture of silver metal and a metal oxide and the metal in the metal oxide is a metal other than silver. The silver-based composition is applied to the surface of the first ceramic component and to the surface of the second ceramic component. The silver-based composition applied to the first ceramic component is contacted to the silver-based composition applied to the second ceramic component. The surfaces of the first and second ceramic components are heated to melt the applied silver-based compositions. The surfaces of the first and second ceramic components are cooled to form a bond between the first and second ceramic components.Type: GrantFiled: January 23, 2002Date of Patent: July 6, 2004Assignee: McGraw-Edison CompanyInventors: Alan M. Meier, David R. Miller, Kevin R. Dickson, Roger S. Perkins, Michael M. Ramarge
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Patent number: 6739047Abstract: A package for an electronic component includes a metal support substrate having a pattern of openings therethrough and a body of an insulating material, such as glass or ceramic, on and bonded to the surface of the support substrate. The body is formed from a plurality of layers of an insulating material, and conductive vias extending through the plurality of layers to the support substrate; said insulating body having an opening therein, an electronic component directly mounted in said opening to the patterned base plate. The base plate can be cut into one or more modules and directly soldered to a motherboard having additional devices mounted thereon.Type: GrantFiled: October 30, 2002Date of Patent: May 25, 2004Assignee: Lamina Ceramics, Inc.Inventors: Mark Stuart Hammond, Ellen Schwartz Tormey, Barry Jay Thaler, Leszek Hozer, Hung-tse Daniel Chen, Bernard Dov Geller, Gerard Frederickson
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Patent number: 6725526Abstract: Embodiments include a method for forming a head suspension assembly. A spacer layer is formed in or on a silicon wafer. A transfer film including an opening defining the shape of a slider support membrane is provided, and the opening is filled with a resin material. The transfer film with the resin material therein is positioned over the silicon wafer so that at least a portion of the resin material is positioned adjacent to the spacer layer. The resin material is baked to form a glassy carbon material. The spacer layer is etched to form a trench in the silicon wafer adjacent to the glassy carbon material, and a slider is positioned on the glassy carbon material over the trench.Type: GrantFiled: January 14, 2002Date of Patent: April 27, 2004Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventor: Jeffrey S. Lille
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Patent number: 6715192Abstract: A fabricating method of a piezoelectric/electrostrictive device including a driving portion having thin plates facing each other and a film-like piezoelectric/electrostrictive element formed on the surface of at least one thin plate of the thin plates, and a fixing portion and a movable portion in rectangular solid form. The thin plates are spanned so that the side faces of the movable portion and the fixing portion are continuous. The fabricating method includes steps of preparing a laminated body of green sheets comprising at least one green sheet to constitute the thin plate, and at least one green sheet with at least one hole formed thereon, sintering a green-sheet laminated body, and forming a piezoelectric/electrostrictive element on an outer surface of the thin plates of the sintered body obtained.Type: GrantFiled: October 3, 2001Date of Patent: April 6, 2004Assignee: NGK Insulators, Ltd.Inventors: Yukihisa Takeuchi, Tsutomu Nanataki, Toshikazu Hirota, Koji Kimura
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Patent number: 6698072Abstract: A method of manufacturing a plurality of piezoelectric actuators (1) includes the following operations: manufacturing of sheets (10) from a piezoelectric ceramic material, coating at least one surface of the sheets (10) with electrodes (3), stacking and pressing the sheets (10) to form a stack, sintering the stacked sheets (10), and separating the stack to form individual actuators (1). At least one cutout (11) for each actuator (1) is made in the sheets (10) prior to stacking and sintering, the cutouts (11) of the sheets (10) being arranged exactly flush one above the other in stacking.Type: GrantFiled: October 23, 2000Date of Patent: March 2, 2004Assignee: Robert Bosch GmbHInventors: Hubert Stier, Guenther Hohl, Friedrich Boecking
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Patent number: 6694203Abstract: Method for manufacturing a wiring harness or a substrate for wiring wherein the wiring diagram applied to the substrate is based on the wiring harness information. Entities representing connectors, binding parts, and wiring length information of wirings are input. The wiring arrangement diagram includes lines that correspond to the wirings and do not have a length corresponding to actual length of the wirings. The wiring harness is made using the information including total length of wiring between each of the connectors, harness information generated based on the entities, and the length information of the desired wiring arrangement. Alternatively, the wiring harness information is used to draw a wiring diagram for fixing on the substrate.Type: GrantFiled: April 2, 2002Date of Patent: February 17, 2004Assignee: J.S.T. Mfg. Co., Ltd.Inventors: Akio Wada, Kaneyoshi Shimizu
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Publication number: 20040025336Abstract: A component removal and replacement system heat control mainly used in reworking surface mount components such as BGA's that uses electronic circuits to bring the component to reflow without using a profile. By monitoring the actual temperatures of the printed circuit board and the component to control the amount of heat provided to their surfaces while using the added circuitry to compensate for different boards and components it allows reworking with out the need for profiles either manually or automatically generated.Type: ApplicationFiled: June 9, 2003Publication date: February 12, 2004Inventor: Robert Hugh Patrick
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Patent number: 6676784Abstract: A process for the manufacture of a multilayer ceramic substrate includes fabricating the multilayer ceramic substrate from a monolith fabricated from universal layers and a monolith fabricated from custom layers. The universal layer monolith and the custom layer monolith are then joined to form the complete structure of the MLC substrate.Type: GrantFiled: July 17, 2001Date of Patent: January 13, 2004Assignee: International Business Machines CorporationInventors: Christopher D. Setzer, Harsaran S. Bahatia, Raymond M. Bryant, Michael S. Cranmer, Suresh Kadakia, Richard O. Seeger, Satyapal Singh Bhatia
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Patent number: 6658733Abstract: A via interconnection of a glass-ceramic wiring board is made by blending a copper powder to a vehicle including a cellulose derivative, adding a metal oxide powder having a mean particle diameter of from at least 1 &mgr;m to at most 4 &mgr;m to the vehicle and blending them, adjusting the viscosity of the vehicle by adding the cellulose derivative and filling them to a via; and sintering the via at a temperature of at least 900° C. to at most 1060° C., and forming the via interconnection.Type: GrantFiled: April 17, 2001Date of Patent: December 9, 2003Assignee: Hitachi, ltd.Inventors: Norihiro Ami, Masahide Okamoto, Shosaku Ishihara, Minoru Tanaka, Mutsumi Horikoshi, Akihiro Yasuda
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Patent number: 6602370Abstract: A method of manufacturing a ceramic electronic component including: a first step of providing a plurality of ceramic sheets containing ceramic powder and polyethylene and having a porosity of 30% or more, and a conductor layer containing metal powder, plasticizer and resin on a base film; a second step of laminating and pressurizing the conductor layer together with the base film on one of the ceramic sheets, and peeling off the base film to form a ceramic sheet with the conductor layer; a third step of disposing another ceramic sheet on top of the conductor layer; a fourth step of laminating and pressurizing another conductor layer on top of the another ceramic sheet; a fifth step of repeating the third and the fourth steps to form a laminated body having a desired number of layers; and a sixth step of sintering the laminated body.Type: GrantFiled: May 17, 2001Date of Patent: August 5, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideki Kuramitsu, Atsuo Nagai, Yoshiya Sakaguchi, Yoshiyuki Miura
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Patent number: 6594892Abstract: A process for the production of a composite ceramic printed wiring board, comprising (1) making a penetration hole having a diameter of 0.1 to 0.8 mm in a ceramic board having an open porosity of at least 5% and a thickness of 0.1 to 10 mm, (2) fixing metal (M) to the penetration hole such that the metal (M) penetrates through the penetration hole, (3) impregnating a heat-resistant resin precursor (R) under vacuum, polymerizing the heat-resistant resin precursor (R) and polishing both surfaces of the resultant board to produce a resin composite ceramic substrate (MRA) having a conductive portion for conduction between both surfaces in a predetermined portion, and (4) forming printed wiring networks on one or both surfaces of the resin composite ceramic substrate (MRA).Type: GrantFiled: August 3, 2001Date of Patent: July 22, 2003Assignee: Mitsubishi Gas Chemical Co., Inc.Inventors: Kazuyuki Ohya, Norio Sayama, Takeshi Nobukuni
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Patent number: 6588099Abstract: A molded circuit board is formed by a process comprising the steps of: molding liquid crystal polymer of plating grade into a primary molded member which outline corresponds to the dimensions of the molded circuit board; roughening the surface of the primary molded member; molding a secondary molded member by coating the primary molded member with oxyalkylene-containing poly(vinyl alcohol) resin over the surface thereof except for a portion thereof on which a circuit is to be formed; heating the first and secondary molded members; applying catalyst to the portion of the surface of the primary molded member not covered by the secondary molded member; heating the first and secondary molded members in hot water to elute the secondary molded member; and chemically plating the catalyst-applied-portion to form the circuit thereon, by which the size of the molded circuit board is minimized with simple procedures and production cost reduced.Type: GrantFiled: January 22, 2001Date of Patent: July 8, 2003Assignee: Sankyo Kasei Kabushiki KaishaInventor: Tetsuo Yumoto
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Patent number: 6568067Abstract: The present invention provides a method of efficiently manufacturing a dielectric waveguide with high reliability and precision. In the method, a resist material is formed on the outer surface of a green compact provided with a removal inhibiting layer, and predetermined portion of the green compact defined by the resist material is removed by the sand blasting method using the resist material as a mask, until the removal inhibiting layer is exposed to obtain a shaped green compact structure. The thus-obtained structure is fired to obtain a sintered body which comprises a dielectric strip and a wing.Type: GrantFiled: February 9, 2001Date of Patent: May 27, 2003Assignee: Murata Manufacturing Co., Ltd.Inventor: Toshikazu Takeda
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Patent number: 6539626Abstract: A curved multilayer ceramic moulded part, particularly curved in directions perpendicular to one another, is limited by two virtually parallel surfaces and an edge. Electrically conductive path(s) parallel to the surface are provided internally. The molded part may be produced by deforming a dish-shaped green moulding, formed from a composite of a self-supporting ceramic film having at least one electrically conductive path and at least one additional ceramic film, with or without electrically conductive path(s), to pressure from all sides. The deformed part is subjected to burning out and sintering. The moulded articles are virtually free of defects. Absolute deviation from the average shrinking of less than 2% may be obtained.Type: GrantFiled: December 5, 2000Date of Patent: April 1, 2003Assignee: DSM N.V.Inventors: Johannes W. H. Kolnaar, Johannes L. M. Op Den Kamp, Jolanda I. M. Colnot, Hans H. H. Hornman
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Patent number: 6488795Abstract: A method of producing a multilayered ceramic substrate in which wiring conductors can be provided on both main surfaces and the density of the wiring conductors can be increased by a non-shrinkage process. In the producing method, a green composite laminated product in which metallic foils are arranged to cover both main surfaces of a green laminated structure comprising a plurality of ceramic green sheets on which conductive paste is coated for forming internal wiring conductors is burned. In this burning step, shrinkage of the ceramic green sheets is suppressed by the metallic foils in the direction of the main surfaces thereof. After burning, the metallic foils are patterned by etching based on photolithographic technology to form external conductor films.Type: GrantFiled: September 5, 2000Date of Patent: December 3, 2002Assignee: Murata Manufacturing Co. LtdInventor: Norio Sakai
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Patent number: 6432239Abstract: There is disclosed a method of producing a ceramic multilayer substrate by laminating a plurality of glass-ceramic green sheets made of a glass-ceramic containing an organic binder and a plasticizer to form a laminate; and firing the laminate; further comprising: applying to or overlaying on the surfaces of the glass-ceramic green sheets inorganic compositions, the sintering temperature of the inorganic compositions being higher than that of the glass-ceramic green sheets; laminating a plurality of the glass-ceramic green sheets having the inorganic compositions applied to or overlaid on the surfaces of the glass-ceramic green sheets respectively, to form a part of the laminate; and laminating a plurality of the glass-ceramic green sheets to form the other part of the laminate.Type: GrantFiled: February 16, 2000Date of Patent: August 13, 2002Assignee: Murata Manufacturing Co., Ltd.Inventors: Harufumi Mandai, Norio Sakai, Isao Kato, Atsushi Kumano
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Patent number: 6412168Abstract: A multi-layer electronic circuit board design 10 having selectively formed apertures or cavities 26.Type: GrantFiled: September 6, 2000Date of Patent: July 2, 2002Assignee: Visteon Global Tech, Inc.Inventors: Andrew Z. Glovatsky, Jay D. Baker
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Patent number: 6413340Abstract: In the method for the preparation of a laminated ferrite inductor device comprising the steps of: laminating a ferrite green sheet lined with and supported by a substrate film of, for example, polyethylene terephthalate provided with a penetrating through-hole and a coil pattern to a second ferrite green sheet followed by removal of the substrate film by peeling to form a laminate of ferrite green sheets to be subjected to sintering, peelability of the substrate film from the ferrite green sheet can be improved to prevent the ferrite green sheet from occurrence of defects such as breaking, crease formation and stretching by providing a snap groove of an adequate incision depth having a rectangular profile of a frame and, along the outer periphery of the snap groove, a peel-facilitating reinforcement pattern by printing with a printing paste to have a specified line width and printing thickness.Type: GrantFiled: October 20, 1999Date of Patent: July 2, 2002Assignee: TDK CorporationInventors: Toshiyuki Anbo, Fumio Uchikoba, Toshihiro Abe, Akihiro Sasaki
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Patent number: 6402866Abstract: A method and apparatus are provided for forming metal circuit patterns and other designs on greensheets and other substrates. The method and apparatus utilize a metal containing transfer sheet whereby selected portions of the metal containing transfer sheet are transferred to the greensheet forming the desired circuit pattern and then the transfer sheet removed. The metal containing transfer sheet may contain a release layer. Transfer methods include stamping, hot rolling, laser beam, heat, etc. and combinations thereof The transfer sheet may also have a stratified or graded vertical profile so that different conductivities or other circuit properties (transfer sheet adhesion, etc.) may be obtained in the formed pattern on the substrate.Type: GrantFiled: September 30, 1999Date of Patent: June 11, 2002Assignee: International Business Machines CorporationInventors: Jon A. Casey, John U. Knickerbocker, David C. Long, Brenda L. Peterson
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Patent number: 6350334Abstract: A method of manufacturing a multi-layered ceramic substrate which does not require dies for making cavities, or aligning the green sheets. The method includes the steps of providing a plurality of green sheets having pre-fabricated via holes and wiring patterns therein; forming a layer for preventing sintering of adjacent green sheets at an area to become the bottom of the cavity; laminating and sintering the green sheets to create a multi-layered sintered body; and making a cut along the inner wall of the cavity all the way to the bottom of the cavity and removing the inside sintered portion leaving the formed cavity. This method eliminates the need for expensive dies, thus providing a simple, stable, and inexpensive manufacturing method for a multi-layered ceramic substrate.Type: GrantFiled: July 19, 2000Date of Patent: February 26, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Jun Shigemi, Shigetoshi Segawa
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Patent number: 6319343Abstract: Ceramic green sheets of controlled microporosity and method of making same have been provided. Controlled microporosity is achieved by including certain ionic species in the ceramic composition, particularly boron, phosphorus and copper oxide.Type: GrantFiled: September 11, 1996Date of Patent: November 20, 2001Assignee: International Business Machines CorporationInventors: Cynthia N. Felisberto, Stephen A. Milkovich, Robert Wolff Nufer
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Publication number: 20010025415Abstract: A method of performing a printed circuit board including the steps of: (a) disposing a first release film on the surface of a substrate and a second release film on the back of the substrate; (b) forming a through-hole in the first release film, the second release film, and the substrate; (c) filling conductive paste into a through-hole; (d) removing the first release film and the second release film from the substrate with the through-hole filled with the conductive paste; (e) placing a first metallic member on the surface of the substrate with the release films removed and placing a second metallic member on the back of the substrate; (f) compressing under heat the substrate with the first metallic member and the second metallic member disposed thereon; and (g) forming a desired circuit pattern on the first metallic member and the second metallic member.Type: ApplicationFiled: March 7, 2001Publication date: October 4, 2001Inventors: Eiji Kawamoto, Shigeru Yamane, Toshiaki Takenaka
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Patent number: 6284080Abstract: The present invention relates to multi-layer ceramic packaging of hybrid micro-electronic devices, including those for implantable medical devices. The invention permits size reduction and design simplification in such packaging by eliminating the need for electrolytic or electroless plating, and by eliminating or substantially eliminating the shrinkage variation typically associated with surface metallization techniques.Type: GrantFiled: July 26, 2000Date of Patent: September 4, 2001Assignee: Medtronic, Inc.Inventors: Samuel F. Haq, Patrick F. Malone, Donald P. Varner
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Patent number: 6260248Abstract: A method for manufacturing a monolithic piezoelectric actuator of multilayer design and having a high aspect ratio of more than two built up from a plurality of smaller stacks in a multilayer design, includes alternately layering green piezoceramic films and electrode material, compressing the layers while elevating the temperature to remove the binder and thereby form a composite, stacking several of the composites on one another, and sintering the stack so as to form the monolithic piezoelectric actuator which exhibits an improved mechanical strength with good piezoelectric properties.Type: GrantFiled: October 19, 1998Date of Patent: July 17, 2001Assignee: Siemens AktiengesellschaftInventors: Dieter Cramer, Hans Hellebrand, Karl Lubitz
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Patent number: 6249962Abstract: A circuit board is manufactured having a structure which includes a plurality of supporting layers each of different materials. The supporting layers support electrically conducting patterns. Each of the materials has a different melting point. The material for the first supporting layer has the highest melting point of the different materials for supporting layers. Beginning from the first supporting layer, new supporting layers are arranged successively. Each new supporting layer has a lower melting point than that of the material of the supporting layer which is closest in the direction of the first supporting layer. Each new supporting layer is attached to the structure by exposing the structure to a temperature which exceeds the melting point of the new supporting layer but is lower than the melting point for that supporting layer which is the closest in the direction of the first supporting layer.Type: GrantFiled: September 17, 1998Date of Patent: June 26, 2001Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventor: Leif Bergstedt
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Patent number: 6242075Abstract: A multilayer ceramic device has top and bottom green ceramic layers machined and fired. Intermediate green ceramic layers are machined, have conductors laid down in the machined areas, are laminated, and are fired to form an enclosure layer. The areas of the layers which will be in contact with each other are coated with a bonding agent. The layers are aligned and bonded to form a structure having arbitrarily shaped, interior channels adjacent to the top and bottom layers which are not subject to detrimental nonplanarities.Type: GrantFiled: November 20, 1998Date of Patent: June 5, 2001Assignee: Hewlett-Packard CompanyInventors: Clinton C. Chao, Daniel J. Miller, Hubert A. VanderPlas