Abstract: The invention relates to a current source for the delivery of a first current and a second current, wherein the first current is biased opposite to the second current. The current source provides a first transistor, wherein the first transistor is connected with a control terminal to a first control voltage. The current source provides a second transistor, wherein the second transistor is connected with a control terminal to a second control voltage. The source terminal of the first transistor is connected in an electrically conducting manner to the source terminal of the second transistor. The first current is delivered at the drain terminal of the first transistor, and the second current is delivered at the drain terminal of the second transistor. Furthermore, a circuit arrangement with a current source according to the invention is provided according to the invention.

Abstract: Disclosed are apparatuses and methods for implementing CMOS-based, process insensitive current reference circuit(s). An apparatus includes a constant transconductance circuitry including a first and second current mirrors and respectively generating constant currents across one or more process corners, a resistive transistor in the constant transconductance circuitry having a resistance, and a feedback circuitry coupled with the resistive transistor and the constant transconductance circuitry to form a constant current source. The apparatus may optionally include a data processing module as well as another constant transconductance circuitry, another resistive transistor, and another feedback circuitry that form another constant current source.

Abstract: A temperature dependent correction circuit includes a first supply source, a second supply source, a rectifying circuit, and a reference. The first supply source is configured to supply a first signal that varies with temperature along a first constant or continuously variable slope. The second supply source is configured to supply a second signal that varies with temperature along a second constant or continuously variable slope. The rectifying circuit is configured to receive the first and second signal, rectify the first signal to produce a first rectified signal, and add the first rectified signal to the second signal to produce a correction signal. The reference is configured to receive the correction signal.

Abstract: A reference voltage generation circuit includes (a) a native MOS transistor coupled to between a power supply voltage source, and the output terminal of the reference voltage generation circuit; (b) an enhancement mode MOS transistor coupled between the output terminal and ground; and (c) a filter circuit that are coupled to the gate terminals of both the native MOS transistor, the enhancement mode transistor and the output terminal of the reference voltage generation circuit, in which the filter circuit has a transfer function including one or more zeroes at predetermined noise frequencies.

Abstract: A circuit includes a first resistive element having a first terminal coupled to an input node to receive a negative voltage, a second resistive element having a first terminal coupled to a first power supply terminal, and a third resistive element having a first terminal coupled to the first power supply terminal. A first current mirror includes a first transistor coupled to a second terminal of the second resistive element and a second transistor coupled to a second terminal of the third resistive element and the first transistor, wherein the output node corresponds to the second terminal of the third resistive element. A second current mirror includes a third transistor coupled to the first transistor and a fourth transistor coupled to the second transistor, third transistor, and a second terminal of the first resistive element. The circuit converts the negative voltage to the positive proportion voltage.

Abstract: A current reference circuit includes a reference current supply unit configured to generate a reference current having a target current level, a current-frequency converter configured to receive a first temporary reference current corresponding to the reference current from the reference current supply unit and to generate a first comparison clock signal in response to the first temporary reference current, and a first current compensation unit configured to generate a first current compensation signal used for the first temporary reference current to reach the target current level in response to a frequency of a reference clock signal and a frequency of the first comparison clock signal.

Abstract: According to one embodiment, a circuit is described including a circuit component configured to switch from a first state into a second state including a node whose potential changes by a predetermined voltage when the circuit component switches from the first state into the second state, a line coupled with the node wherein the switching of the circuit component from the first state into the second state draws or injects a predetermined charge from or into the line, a capacitor coupled to the line and a compensation circuit configured to generate a predetermined multiple of the predetermined voltage and to compensate the charge drawn from or injected into the line by driving the capacitor with the multiple of the predetermined voltage.

Abstract: To provide a high accuracy temperature detection device, a D/A conversion circuit includes a ladder network, constant current circuits and switch circuits. A temperature sensing circuit such as a diode is kept at a threshold temperature of a protecting operation against overheating and the switch circuits are switched according to a predetermined adjustment data value such that a temperature detection voltage is in a prescribed range. Since each of the switch circuits connects between corresponding one of the constant current circuits and a common terminal while disconnecting between the corresponding one of the constant current circuits and corresponding one of current terminals, an electric current flowing to the temperature sensing circuit is constant regardless of the adjustment data value and a correction resolution of the temperature detection voltage is constant.

Abstract: A voltage regulator is described. It includes an amplification stage to control a voltage level of a first gain node and of a second gain node in response to an input voltage, to activate a first and a second output stage, respectively. It further includes the first output stage to source a current at an output node of the voltage regulator from a first potential. The voltage regulator includes the second output stage to sink a current at the output node to a second potential. The voltage regulator includes a first operating point control circuit to set the voltage level of the first gain node such that a first maintenance current is sourced by the first output stage; and/or a second operating point control circuit to set the voltage level of the second gain node such that a second maintenance current is sunk by the second output stage.

Abstract: Each of a plurality of reference voltage sources having different temperature characteristics has a reference voltage generation unit which generates a predetermined reference voltage having intrinsic temperature characteristics showing a peak voltage at different temperatures, an amplification circuit which compares the reference voltage and a feedback voltage to control an output transistor, the output transistor which generates a reference output voltage at an output terminal, and a voltage regulation unit which is able to regulate an output voltage so as to become the reference output voltage and generates the feedback voltage. A maximum reference output voltage which is the maximum of the reference output voltages is output through the output terminal.

Abstract: To provide a low-pass filter circuit which is high in noise elimination capability and starts its output stably and at high speed, and a power supply device. A low-pass filter circuit is provided which is equipped with a capacitance element connected to an output terminal, and a resistance circuit connected between an input terminal and the output terminal, and in which the resistance circuit is equipped with a first MOS transistor connected between the input terminal and the output terminal, and an amplifier which has a first input terminal to which the input terminal is connected, a second input terminal to which the output terminal is connected, and an output terminal to which a gate of the first MOS transistor is connected, and which controls a time constant of the low-pass filter circuit.

Abstract: Methods and circuits for adjusting the output parameter of a device wherein the output parameter is temperature dependent are disclosed herein. An example of a method includes: adjusting the output parameter to a target level at a first temperature; adjusting a linear temperature-dependent variable related to the output parameter to zero at the first temperature; adjusting a nonlinear temperature-dependent variable related to the output parameter to zero at the first temperature; adjusting the output parameter to the target level at a second temperature using the linear-dependent variable; adjusting the nonlinear temperature-dependent variable to zero at the second temperature; and adjusting the output parameter to the target level at a third temperature by adjusting the nonlinear variable.

Abstract: A reference current generation part receives an adjustment signal representing a target current and generates a reference current having a current value which is corresponding to the adjustment signal. A detection current generation part generates a detection current having a current value which is m (where the m denotes 1 or more) times as large as a current value of the reference current. A detection voltage generation part with a first resistor generates a detection voltage having a voltage value corresponding to a voltage drop across the first resistor in response to a supply of the detection current.

Abstract: A method and apparatus for current sensing and measurement employs two cascaded MOSFET current mirrors, wherein the mirrored current leaving the first current mirror is fed to the input of the second current mirror. Each current mirror contains a high current MOSFET and a low current MOSFET, connected source-to-source and gate-to-gate. The MOSFETs are matched so that drain-to-source current flowing in the high current MOSFET is proportional to the drain-to-source current flowing in the low current MOSFET. The ratio of high current to low current for each current mirror is M, where M is 100 or less. Voltage biasing networks are employed to maintain constant drain-to-source voltages for both MOSFETs in each current mirror.

Abstract: Embodiments of power source circuits and methods for operating a power source circuit are described. In one embodiment, a method for operating a power source circuit involves receiving at the power source circuit at least one digital signal from a feedback loop and increasing or decreasing an output power signal of the power source circuit in response to the at least one digital signal. Other embodiments are also described.

Abstract: Provided is a reference voltage circuit capable of outputting, with a low voltage and low current consumption, a voltage that is less liable to change due to a temperature change, and has a low GND terminal reference voltage. The reference voltage circuit includes a first NMOS transistor and a second NMOS transistor connected by a current mirror circuit, the first NMOS transistor having a gate and a drain connected to each other via a first resistor, the second NMOS transistor having a gate connected to the drain of the first NMOS transistor, and a source connected to a GND terminal via a second resistor, the second NMOS transistor having a threshold voltage lower than a threshold voltage of the first NMOS transistor, in which a reference voltage is output from the source of the second NMOS transistor.

Abstract: Circuitry having a reference current generator and a reference current governor is disclosed. The reference current governor includes field effect transistors (FETs) that are sized such that a governor current governs a reference current flowing through the first FET to maintain the reference current within a desired reference current range.

Abstract: A low-dropout voltage regulator comprises an output terminal for providing an output voltage regulated as a function of a reference voltage, and for providing an output current, and additionally comprising an output current limiting unit. The current limiting unit comprises a replicator for replicating the output current to provide a mirror current of the output current, a comparator circuit for comparing the mirror current with a reference current, and a feedback circuit for supplying feedback to the regulator in order to limit the output current when the mirror current is greater than the reference current. The mirror current is injected into the output terminal.

Abstract: A circuit includes: a cascode current source comprising: a current mirror transistor; and a cascode transistor; and a bias circuit coupled to the cascode current source, the bias circuit comprising: a current source; a first transistor coupled in series to the current source to form a first current path through the current source and the first transistor; a second transistor coupled in series to the current source; and a third transistor coupled in series to the second transistor and the current source to form a second current path through the current source and the second and third transistors, wherein the third transistor has a channel size greater than a channel size of the second transistor by a multiple determined according to a design factor of the bias circuit.

Abstract: An overcurrent detector that includes a sense transistor connected to a sense resistor, a second transistor matched to the sense transistor and connected in parallel to a second resistor, and a voltage comparator coupled to the sense transistor and second resistor. The sense transistor is configured to connect in a same gate and source connection with a driver output transistor. The second transistor and second resistor are configured to receive a current reference and generate a voltage reference. The voltage comparator is configured to compare the voltage reference with a voltage drop across the sense resistor.

Abstract: A LIN receiver includes a single, low power structure for both sleep and silent modes, with a single comparator for detecting LIN signaling during both sleep and silent modes as well as during active mode. In some embodiments, full receiving capability is implemented with a current as low as 5 microamps. In particular, dominant and recessive levels for the wakeup bloc are identical to those of standard LIN levels, fixed at about 3.5 V. Consequently, full LIN receiving capability is available during sleep mode.

Abstract: A bandgap reference circuit includes a ?Vbe/R circuit portion and an amplification circuit portion. The ?Vbe/R circuit portion has a first and second current path from first and second terminals through first and second bipolar transistors, respectively. The first and second bipolar transistors have different emitter areas and the second path has a resistor. The amplification circuit portion provides a current to each of the first and second terminals of the ?Vbe/R circuit portion and changes the current in response to a voltage difference between the first and second terminals of the ?Vbe/R circuit portion. The ?Vbe/R circuit portion also has first and second base resistors connected to bases of the first and second bipolar transistors, respectively.

Abstract: A circuit for generating an output voltage and method for setting an output voltage of a low dropout regulator are provided. A current source is configured to generate a reference current, and an error amplifier has a first input, a second input, and a single-ended output. The first input is connected to a reference voltage, and the second input is connected to an output node of the circuit via a feedback resistor. A pass transistor includes a control electrode connected to the single-ended output of the error amplifier, a first electrode connected to a power supply voltage, and a second electrode connected to the output node of the circuit. A first branch of a current mirror is connected to the current source, and a second branch of the current mirror is connected to the second terminal of the feedback resistor. The output node provides an output voltage of the circuit.

Abstract: A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.

Abstract: According to one embodiment, a regulator is provided which comprises a reference voltage generating circuit that generates a reference voltage, a first voltage dividing circuit that divides a regulator output in voltage, an error amplifier that compares a first divided voltage obtained by dividing the regulator output and the reference voltage, and an output transistor that generates the regulator output based on the output of the error amplifier. The reference voltage generating circuit comprises a diode-connected first transistor. The reference voltage is generated based on a diode voltage generated by the first transistor.

Abstract: Amplifiers, notably multi-stage amplifiers, such as linear regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients are presented. An amplifier is described, which comprises a first amplification stage configured to provide an intermediate voltage, based on an outer feedback voltage and based on a reference voltage. Furthermore, the amplifier comprises an output stage configured to provide a load current at an output voltage based on the intermediate voltage. In addition, the amplifier comprises an outer feedback circuit configured to derive the outer feedback voltage from the output voltage. The output stage comprises a buffer configured to provide a drive voltage based on the intermediate voltage and based on an inner feedback voltage derived from the output voltage. The buffer comprises a pass device which is configured to provide the load current at the output voltage based on the drive voltage.

Abstract: A voltage measurement circuit including a current mirror having an input branch in series with a first resistive element between first and second nodes of application of said voltage, and having an output branch providing a current representative of said voltage.

Abstract: A microcontroller system includes a higher power reference voltage circuit and a lower power reference voltage circuit configured to draw less power than the higher power reference voltage circuit when enabled. The system includes a power state logic controller configured to enable the lower power reference voltage circuit to provide a first regulated voltage during a power saving mode, and, on exiting the power saving mode, enable the higher power reference voltage circuit to provide a second regulated voltage.

Abstract: Multi-stage amplifiers, such as linear regulators, provide a constant output voltage subject to load transients. The multi-stage amplifier includes a first amplification stage which activates or deactivates a first output stage in response to an input voltage at an input node. The first output stage sources a current at an output node of the multi-stage amplifier from a high potential, when activated. Furthermore, the multi-stage amplifier has a second amplification stage to activate or to deactivate a second output stage in response to the input voltage at the input node. The second output stage sinks a current at the output node of the multi-stage amplifier to a low potential, when activated. The first amplification stage and the second amplification stage activate the first output stage and the second output stage in a mutually exclusive manner.

Abstract: A switching regulator switches a current from input direct current (DC) power to generate target DC power. The switching regulator includes: a direct current (DC)-DC converter and a ripple injection circuit. The DC-DC converter is configured to: generate an output voltage at an output terminal based on an input voltage applied to an input terminal, and according to a switching cycle that selectively forms a voltage-down current path or a voltage-up current path based on a comparison between a reference voltage and a voltage sensed at a feedback node; and apply a feedback current from the output terminal to the feedback node. The ripple injection circuit is configured to: generate a pulse current synchronized with the switching cycle; and apply the pulse current to the feedback node.

Abstract: A temperature insensitive sub-nA current reference is presented with pA-range power overhead. The main concept is to linearly reduce the gate voltage of a sub-threshold-biased MOSFET as temperature increases, in order to compensate for exponential dependence of drain current on temperature. For example, a MOSFET-only, 20 pA, 780 ppm/° C. current reference that consumes 23 pW is disclosed, marking the lowest reported power among current references. The circuit exploits sub-threshold-biased MOSFETs and a complementary-to-absolute temperature (CTAT) gate voltage to compensate for temperature dependency. The design shows high immunity to supply voltage of 0.58%/V and a load sensitivity of 0.25%/V.

Abstract: An internal power supply circuit supplies a power supply voltage to an internal circuit of a semiconductor device via an internal power supply line. The internal power supply circuit includes a reference potential generating circuit that is configured to generate a plurality of reference potentials having different temperature dependencies from each other, an internal voltage generating circuit that generates the power supply voltage with reference to a reference potential generated by the reference potential generating circuit, and a control circuit that selects a reference potential to be generated by the reference potential generating circuit.

Abstract: Apparatus and methods for power amplifier bias circuits are disclosed herein. In certain implementations, a power amplifier bias circuit includes a current source configured to generate a reference current, a plurality of reference bipolar transistors, a selection circuit configured to select one or more selected reference bipolar transistors from the plurality of reference bipolar transistors, and a transimpedance amplifier. The one or more selected reference bipolar transistors have a current therethrough that changes in relation to a power amplifier stage bias voltage, and the transimpedance amplifier is configured to control the power amplifier stage bias voltage based on an error current corresponding to a difference between the reference current and the current through the one or more selected reference bipolar transistors.

Abstract: An integrated circuit with precision current source includes a first MOSFET, a second MOSFET, an op-amp and a resistor formed on a common semiconductor substrate. The first MOSFET is characterized by a first multiplier (×M1) and the second MOSFET is characterized by a second multiplier (×M2) where a ratio of ×M2 to ×M1 is greater than one. An inverting input of the op-amp is coupled to a drain of the first MOSFET and an output of the op-amp is coupled to a gate of the first MOSFET. A negative feedback circuit limits a rise in output current under low output voltage conditions.

Abstract: The invention relates generally to downhole measurement tools having a regulated voltage power supply and methods of use thereof. The downhole measurement tools are associated with electrical submersible pumps for providing a stabilization technique for a five (5) volt power supply over a wide temperature range. A voltage regulator circuit for the downhole measurement tools has a temperature dependent resistance to adjust the feedback of the regulated voltage to compensate for the temperature coefficient effects of the other components in the regulator circuit.

Abstract: A band-gap reference circuit includes a proportioned current generating circuit, a startup circuit, a current mirror circuit, a high-order temperature compensation generating circuit and a reference generating circuit. The proportioned current generating circuit is configured to generate a current in direct proportion to the absolute temperature. The startup circuit is configured to start up the proportioned current generating circuit when the startup circuit is power on. The current mirror circuit is configured to reproduce a current which is the same as the current in direct proportion to the absolute temperature. The high-order temperature compensation generating circuit is configured to generate a compensation current of high-order temperature coefficient.

Abstract: A switching regulator includes a DC-DC converter and a dynamic voltage positioning circuit. The DC-DC converter includes an inductor connected between an input port and an output port. The dynamic voltage positioning circuit includes a sensing circuit and a mirroring circuit. The sensing circuit is configured to sense an inductor current flowing through the inductor, and to convert a voltage applied to a direct current resistance (DCR) of the inductor into a droop current using a variable resistor. The mirroring circuit is configured to cause a voltage drop at the output port of the DC-DC converter based on a current corresponding to a difference between a bias current and the droop current.

Abstract: A bandgap reference voltage generator includes a bipolar assembly having a first resistor, a first branch and a second branch that is in parallel with the first branch. The first branch includes a first bipolar transistor with a base coupled to a fixed voltage. The second branch includes a second bipolar transistor with a base coupled to the fixed voltage and a second resistor coupled in series with the second bipolar transistor. A differential module is coupled to the first and second bipolar transistors and configured to balance the currents in the first and the second branches. The bandgap reference voltage is output at a node to which the first resistor is connected.

Abstract: In a reference signal distribution system, a first subsystem is configured to distribute a reference signal to a second subsystem. The first subsystem includes multiple diode-connected devices biased by a reference current and configured to establish a differential voltage between a first node and a second node. The second subsystem includes multiple diode-connected devices driven by the differential voltage and configured to generate a copy current associated with the reference current.

Abstract: A voltage generating circuit, in which the influence of offset of an amplifier on an output voltage is reduced, has first and second bipolar transistors (Q1, Q2) having emitter terminals at the same electric potential. A base terminal of Q1 is disposed on a collector side of Q2. A first resistance element connects the collector side of Q2 with the base side of Q2; and a second resistance element (R1) connects a collector side of Q1 to R2. A third resistance element (R3) connects a base terminal of Q2 with the electric potential of the emitter terminals. An amplifier (A1) outputs a voltage based on a voltage difference between the collector sides of Q1 and Q2; and a voltage-current converting section (MP1, MP2) converts amplifier output into a current supplied to the connection node of R1 and R2. A voltage is then output on the basis of the generated current.

Abstract: Circuitry includes a floating-body main field-effect transistor (FET) device, a body-contacted cascode FET device, and biasing circuitry coupled to the floating-body main FET device and the body-contacted cascode FET device. The floating-body main FET device includes a gate contact, a drain contact, and a source contact. The body-contacted cascode FET device includes a gate contact, a drain contact coupled to a supply voltage, and a source contact coupled to the drain contact of the floating-body main FET device and to a body region of the body-contacted cascode FET device. The biasing circuitry is coupled to the gate contact of the floating-body main FET device and the gate contact of the body-contacted cascode FET device and configured to provide biasing signals to the floating-body main FET device and the body-contacted cascode FET device such that a majority of the supply voltage is provided across the body-contacted cascode FET device.

Abstract: A drive circuit includes a gate drive node, a power source node, and an output transistor connected between the gate drive node and the power source node that flows a current into the gate drive node. The drive circuit further includes an input transistor smaller than the output transistor that forms a current mirror with the output transistor. The drive circuit further includes an operational amplifier that outputs a control voltage depending on a potential difference between a voltage of the gate drive node and a constant voltage lower than a voltage of the power source node. The drive circuit further includes a control transistor including a control electrode receiving an output of the operational amplifier that is connected in series with the input transistor. The drive circuit further includes a constant current source connected in series with the control transistor.

Abstract: A semiconductor device includes a control section, a first arm, and a second arm; and has an H-bridge circuit to supply an input current supplied from a power source to an output terminal as a reversible electric current on the basis of a control signal outputted from the control section and a reverse-connection-time backflow prevention circuit to prevent an electric current in a direction opposite to the direction of the input current from being supplied to the H-bridge circuit. The first arm is formed over a first island. The second arm is formed over a second island. The control section and the reverse-connection-time backflow prevention circuit are formed over a third island.

Abstract: An LDO circuit with a current sink stage reduces significantly overshooting of the output voltage due to sudden changes of output current. The activation of the current sink stage is independent of the overshoot percentage of the regulated output voltage. The disclosure doesn't require large output capacitors to avoid the possibility of brownouts of chips supplied by the LDO.

Abstract: A switching current source circuit is provided. A current source drains a bias current from a power supply via a first mirror transistor. A second mirror transistor has a source coupled to the power supply, a gate coupled to the gate of the first mirror transistor, and a drain for providing an output current. A switch is coupled between the gates of the first and second mirror transistors, and has a control terminal for receiving a control signal. A first capacitor is coupled between the gate of the second mirror transistor and the voltage generating unit. A second capacitor is coupled between the gate of the second mirror transistor and a ground. The voltage generating unit selectively provides a first voltage or a second voltage different from the first voltage to the first capacitor according to the control signal.

Abstract: Techniques to perform bandgap circuit trimming that maximize the operating range and minimize the trimming time at which the bandgap will be accurate. A bandgap circuit output voltage may be trimmed by heating the circuit, supplying increasing input power to the bandgap circuit, and adjusting operational parameters of the bandgap circuit to generate a constant bandgap circuit output voltage. When the bandgap circuit output voltage may remain constant, a constant input power may be applied to the bandgap circuit and its output voltage may be adjusted to a predetermined voltage level.

Abstract: A slip ring includes an exterior, a plurality of brushes, a plurality of rings, a brush fixing member that causes the plurality of brushes to contact the plurality of rings and supports the plurality of brushes, and a rotating shaft inserted into the plurality of rings and supports the plurality of rings. The slip ring also includes a reference signal generation unit configured to generate a reference signal, and a detection unit configured to detect a signal, wherein a circuit is formed by the reference signal generation unit, a first brush, which is at least one of the plurality of brushes, a first ring that contacts the first brush, and the detection unit, and wherein a state of contact of the first brush and the first ring is detected based on the signal detected by the detection unit.

Abstract: A bias circuit is adapted for biasing a to-be-biased transconductance cell such that the to-be-biased transconductance cell has a constant transconductance, and includes a converter and a controller. The converter receives first and second current signals, and generates, based on the first and second current signals, a first voltage signal, a second voltage signal and a bias voltage that is for biasing the to-be-biased transconductance cell. The controller receives the first and second voltage signals from the converter, generates the first and second current signals for the converter based on the first and second voltage signals so as to make a magnitude of the first voltage signal equal a magnitude of the second voltage signal.

Abstract: A semiconductor memory device includes multiple voltage generators. The memory device includes a first voltage generator for generating a first internal voltage based on a first power supply voltage, and a second voltage generator for generating a second internal voltage based on a second power supply voltage that is lower than the first power supply voltage. The first internal voltage is used as a driving voltage of a bit line sense amplifier in a core block including a memory cell array. The second internal voltage that is lower than the first internal voltage is used as a driving voltage of a peripheral circuit block other than the core block.

Abstract: A charge pump circuit generates a charge pump voltage that powers a bias circuit. The bias circuit generates a reference current and generates switch currents from the reference current. Gate-source voltages are generated from the switch currents and applied to switching components of switch circuits to connect two nodes. The gate-source voltages can be generated in the bias circuit and provided to the switch circuits. The gate-source voltages can also be generated in the switch circuits.