Abstract: A driver circuit for outputting an output signal corresponding to an input signal given to the driver circuit, includes a voltage generating unit for outputting a basic output voltage corresponding to the input signal, a first buffer circuit for outputting an output voltage corresponding to the basic output voltage outputted by the voltage generating unit, a second buffer circuit, of which power consumption is larger than the first buffer circuit, for generating and outputting a voltage corresponding to the output voltage as the output signal, a simulating circuit including a simulating buffer circuit for generating a simulated voltage corresponding to the basic output voltage outputted by the voltage generating unit, the simulating buffer circuit having substantially the same characteristic as that of the first buffer circuit, and a controlling unit for controlling the basic output voltage outputted by the voltage generating unit based on the simulated voltage.

Abstract: A threshold voltage control circuit includes a first voltage supplying unit for supplying a first power supply voltage, in response to an enable signal which is activated when a bank is enabled, as a back bias voltage of a first MOS transistor, wherein the first MOS transistor drives an internal voltage, and a second voltage supplying unit for supplying a second power supply voltage, in response to the enable signal, as the back bias voltage of the first MOS transistor.

Abstract: A circuit of generation of a reference voltage by a first MOS transistor connected to a first terminal of application of a supply voltage, the first transistor being in series with a second MOS transistor controlled by an input stage of a transconductance amplifier and their junction point defining an output terminal providing the reference voltage, a first current source connecting the first supply terminal to a gate of the first transistor, a second current source connecting the second transistor to a second terminal of application of the supply voltage, at least one third MOS transistor connecting the two current sources, and a capacitive element directly connecting the output terminal to a conduction terminal of the third transistor to vary the conduction of this third transistor in case of a variation in output voltage.

Abstract: The present invention relates to automatic fire alarm signaling, and more particularly to the activation of fire alarm signaling by an analysis of a monitored fire factor (smoke level, temperature, etc.) and makes it possible to reduce the cost of the signal transmission process, as well as to provide compatibility of the fire alarm unit with inexpensive receiving-monitoring instruments having analog signaling loops. The essence of the method of the invention consists in processing digital information directly in the alarm unit and in transmitting the results of sophisticated digital processing of information to the receiving-monitoring instrument with the aid of simple analog signals.

Abstract: A method of distributing an electric quantity through an electronic circuit for local exploitation by at least one circuit block of the electronic circuit that includes providing in the electronic circuit first and second conductive lines, the first conductive line distributing a first electric potential and the second conductive line carrying a second electric potential that is a dedicated reference electric potential for the first electric potential, the first and second electric potentials corresponding to the distributed electric quantity, and locally exploiting the distributed electric quantity by at least one circuit block of the electronic circuit, by locally reconstructing the distributed electric quantity from the first and second electric potentials without perturbing them, particularly without either sinking or injecting any significant current from or into the first and second conductive lines.

Abstract: In a power supply apparatus for performing constant current driving of a light emitting diode which is a load circuit, a constant current circuit is disposed on a path for driving the load circuit. A charge pump circuit which is a voltage generating circuit outputs a driving voltage to the light emitting diode. A monitoring circuit monitors the voltage across the two ends of the constant current circuit. This monitoring circuit includes a voltage source which generates a threshold voltage that follows the fluctuation of the voltage at which the constant current circuit can operate stably, compares the voltage across the two ends of the constant current circuit and the threshold voltage generated by the voltage source, and outputs a comparison result Vs to a control unit. The control unit controls the charge pump circuit on the basis of the output of the monitoring circuit.

Abstract: A power-down biasing circuit includes a current source connected to a drain of a first NMOS transistor through a first switch. A gate of the first NMOS transistor is connected to the current source, and a source of the first NMOS transistor is connected to ground. A first pre-chargeable capacitor is connected between the gate of the first NMOS transistor and ground. A plurality of NMOS transistors form a current multiplier and have gates connected to the current reference. A plurality of current mirrors are connected to drains of the plurality of NMOS transistors and to output switches.

Abstract: A method and apparatus for power supply rejection in a reference voltage circuit using a variable resistance circuit.

Abstract: A new system including circuit and methods are given to realize a dynamic matching of current sources, which are arranged as arrays of sets of current sources with added piecewise switchable trim bit transistors. The matching is achieved during an programmed calibration and trimming step by switching ON/OFF certain trim bit transistors until a required accuracy compared to a master reference is reached. The accuracy of the current source trimming is purely a function of the LSB size, and the trim range a function of the number of trim bits. Applying these new principles the drawbacks with regard to chip space and cost of prior art solutions can be overcome. Making use of modern chip manufacturing technologies allows for a very flexible and adaptive production of large arrays of current sources, as e.g. used in driver ICs for OLED displays.

Abstract: An internal voltage generating circuit is provided. The internal voltage generating circuit of a semiconductor device includes a control signal generating circuit for generating a control signal according to a number of data bits, a comparator for comparing a reference voltage to an internal voltage to generate a driving signal when the control signal is inactivated, a driving signal control circuit for inactivating the driving signal when the control signal is activated, and an internal voltage driving circuit for receiving an external power voltage and generating the internal voltage in response to the driving signal. Therefore, an internal voltage can be turned to a reference voltage level or to an external power voltage level according to the number of data input and/or output bits of a semiconductor device, and even when the number of data input and/or output bits is increased, a data access speed can be improved.

Abstract: A biasing circuit includes a reference current source, a first transistor, a second transistor, and a voltage buffer. The first transistor includes a first connection end coupled to the reference current source, a control end, and a second connection end coupled to a system grounding end. The second transistor includes a control end coupled to the control end of the first transistor, a first connection end coupled to a system power supply end, and a second connection end coupled to the system grounding end. The voltage buffer includes an input end coupled to an output end of the reference current source and the first connection end of the first transistor, and an output end coupled to the control ends of the first transistor and the second transistor. The first transistor and the second transistor constitute a current mirror.

Abstract: A negative output regulator circuit (24) is provided with clamp circuits CLP (X1, X2, Q1, Q2), which detect a current generated when the output of a negative voltage (VM) is stopped and fixing the voltage of an output end (T2) at a prescribed value. Generation of a positive voltage at an output terminal is suppressed without increasing chip size nor making the sequence complicated.

Abstract: A ripple current reduction circuit includes a supply node coupled to the output of a high ripple voltage source such as a charge pump. A first current mirror is referred to the supply node and mirrors a current I1 to a second node, the mirrored current (I3) including a ripple current induced by the ripple voltage. A second current mirror is referred to the second node and mirrors a current I2 to an output node, which provides a current ILOAD to a load. The mirrors are sized such that the current provided at the second node is greater than the current required by the second mirror to provide ILOAD. The excess current, at least a portion of which includes a ripple component induced by the ripple voltage, is shunted to ground. As such, the magnitude of the ripple component in ILOAD is less than that present in I3.

Abstract: Disclosed is a reference voltage circuit including control means for performing control so that the voltage of a first current-to-voltage conversion circuit becomes equal to the voltage of a second current-to-voltage conversion circuit; a first current mirror circuit for outputting a current proportionate to the value of a current supplied to the first current-to-voltage conversion circuit or the second current-to-voltage conversion circuit; and a third current-to-voltage conversion circuit for converting the output current from the first current mirror circuit to a voltage, wherein each of the first to third current-to-voltage conversion circuits is configured as follows: a first diode (or a diode-connected first bipolar transistor) is connected in series with a first resistor, and a second resistor is further connected in parallel with the first diode and the first resistor.

Abstract: An integrated circuit comprises a gain stage circuit coupled to a compensation circuit. Both the gain stage circuit and the compensation circuit respectively comprise a first current source and a second current source that are subject to the same process variations. A negative feedback circuit is used to generate a corrective current in relation to the second current source, indicative of a current that needs to flow through a load in addition to a current flowing through the second current source in order for a variable voltage to be substantially equal to a reference voltage used to drive the first and second current sources. A compensating current corresponding to the corrective current generated for the second current source is applied to the first current source to compensate for process variation in the gain stage circuit in respect to the first current source.

Abstract: A power supply circuit includes a voltage booster circuit that generates a boosted voltage by boosting a second voltage with respect to a first voltage, and a limiter circuit that limits a potential of the boosted voltage. The limiter circuit discharges a charge to or charges a charge from a power supply line so that the boosted voltage becomes a given target voltage, the second voltage being supplied to the power supply line. The voltage booster circuit changes a boost capability corresponding to an output load of the power supply circuit.

Abstract: In a current reference generator device, a voltage reference generator stage generates a reference voltage (Vref) and an active element output stage receives the reference voltage (Vref) and outputs a reference current (Iref) as a function of the reference voltage (Vref). A control stage is operatively coupled to the voltage reference generator stage and to the active element output stage and controls a first trimmable parameter (m) associated to the voltage reference generator stage and a second trimmable parameter associated to the active element output stage, so as to compensate for changes in a value of the reference current (Iref) due to manufacturing process deviations.

Abstract: A level shifter and a charge pump circuit are added, among cascade-connected unit frequency dividing circuits forming a frequency dividing circuit, to the unit frequency dividing circuit in the first stage. The charge pump circuit boosts an input voltage based on a dot clock signal, and supplies the booster voltage to the unit frequency dividing circuit in the first stage. The unit frequency dividing circuit in the first stage, which is driven by the booster voltage, attains an improved current driving capability. The improved current driving capability of the unit frequency dividing circuit in the first stage to which the dot clock signal of high frequency is input leads to a widened operating margin of the frequency dividing circuit.

Abstract: A bias circuit and a voltage-controlled oscillator (VCO) thereof suitable for improving the stability of the bias circuit are provided. The bias circuit includes: an error amplifier circuit, having an inverting input terminal connected to a reference voltage; a voltage-controlled current source, having a voltage control terminal connected to a voltage output terminal of the error amplifier circuit, in which a current generated by the current source is controlled by a voltage at the voltage output terminal of the error amplifier circuit; a delay control circuit, having a current input terminal connected to the voltage-controlled current source, an output terminal connected to a non-inverting input terminal of the error amplifier circuit, and a voltage input terminal connected to a supply terminal of the control voltage, and the delay control circuit is adapted to adjust an output voltage of the delay control circuit according to a control voltage.

Abstract: Core voltage generator including a comparison unit configured to compare a reference voltage with a feedback core voltage to output a difference between the reference voltage and the feedback core voltage, an amplification unit configured to output a core voltage by amplifying an external power supply voltage according to an output signal of the comparison unit and a mute unit configured to maintain a voltage level of an output terminal of the amplification unit at a ground voltage level when the output of the core voltage is interrupted.

Abstract: An amplitude setting circuit for setting an amplitude level of its output signal corresponding to an input signal. By setting a current flowing through a first diode-connected transistor (Q5) and a current flowing through a first drive transistor (Q1) to be in a predetermined relationship, variation with temperature in potential at a first connection point of the first drive transistor (Q1) and a first conductivity-type transistor (M1) is removed, and by setting a current flowing through a second diode-connected transistor (Q6) and a current flowing through a second drive transistor (Q4) to be in a predetermined relationship, variation with temperature in potential at a second connection point of a second conductivity-type transistor (M2) and the second drive transistor (Q4) is removed.

Abstract: A body-biased enhanced current mirror circuit is disclosed wherein the body voltage of a current mirror device is adjusted to compensate for the effect of changes in the output voltage on the output current, increasing the output impedance. For each instance of the current mirror, this approach has the advantage of requiring no additional margin in operating voltage and of consuming no more circuit area than prior art current mirror designs. In addition, the body-biased enhanced current mirror circuit provides a stable reference current to output current ratio over a wide operating range. An auxiliary MOSFET current mirror device with the body connected to ground may be added in parallel with the body-biased current mirror device to eliminate a non-monotonicity of the current output.

Abstract: A word line boost circuit includes a first pump circuit, a first transistor, a voltage detection circuit and a second pump circuit. The first pump circuit provides a gate boosted signal according to an address transfer detection (ATD) signal. The first transistor has a control terminal for receiving the gate boosted signal and a second terminal coupled to a target word line. The voltage detection circuit is for detecting a voltage level of the gate boosted signal and accordingly outputting a detection signal. The second pump circuit is for outputting a boost signal to a first terminal of the first transistor according to a voltage level of the detection signal. The boost signal boosts the target word line via the turned-on first transistor.

Abstract: A semiconductor memory device includes a voltage detector configured to detect a voltage level of an external power supply voltage, a first core voltage generation driver configured to operate when the external power supply voltage is in a high level region and a second core voltage generation driver configured to operate when the external power supply voltage is in a low level region.

Abstract: A core voltage generation circuit includes a comparator configured to perform a differential comparison of a reference voltage and a feedback core voltage. An amplifier is configured to amplify the external power supply voltage in response to an output signal of the comparator to generate the core voltage. A control switch is configured to form a current path of the comparator using different switch units according to a voltage level of an external power supply voltage input to the core voltage generation circuit.

Abstract: A current mirror circuit includes a pair of first and second transistors having bases connected together and emitters connected to a power line, a resistor connected between the bases of the first and second transistors and the power line, a third transistor for providing base currents of the first and second transistors and a resistor current flowing through the resistor, and a current compensation circuit that adds a compensation current to an input current to the first transistor. The amount of the compensation current is approximately equal to that of the resistor current divided by a current gain of the third transistor. Thus, the compensation current compensates the difference between a collector current of the first transistor and the input current.

Abstract: In a network device, a power potential rectifier is adapted to conductively couple a network connector to an integrated circuit that rectifies and passes a power signal and data signal received from the network connector. The power potential rectifier regulates a received power and/or data signal to ensure proper signal polarity is applied to the integrated circuit.

Abstract: An apparatus and method is provided for optimizing LED driver efficiency. The present invention offers low cost solutions for powering LEDs while minimizing overall power dissipation in devices powered by a depletable power source. Low system cost is attained using a charge pump to increase LED drive voltage level and implementing combinations of drive techniques to overcome the inefficiency of the charge pump. A switch bypasses the charge pump when depletable power source output voltage is sufficient to directly drive an LED load. At certain output voltage levels, the switch can be opened causing the charge pump to boost drive voltage. The output voltage may also be PWM modulated to drive the LED load and, at some voltages, the depletable power source may drive the LED load directly. Efficiency levels of 90-97% are attainable.

Abstract: An apparatus, includes a plurality of circuits each of which operates with a reference voltage, a constant current generator which generates a substantially constant current, and distributes the substantially constant current to each of the circuits, and a plurality of converters, each of the converters respectively corresponding to each of the circuits, each of which converts the substantially constant current to the reference voltage and respectively provides the reference voltage to each of the circuits.

Abstract: An internal voltage compensation circuit is provided which includes a power up signal generator configured to generate a power up signal, a select signal generator configured to compare a level of a first external voltage with a level of a second external voltage to generate first and second select signals, wherein the second select signal is generated in response to the power up signal, and a voltage compensation unit configured to electrically connect an internal voltage to the first external voltage or the second external voltage in response to the first and second select signals.

Abstract: A voltage-insensitive circuit includes a second circuit, and a biasing means for providing a constant bias current to the second circuit, the bias current being insensitive to power fluctuations of the voltage-insensitive circuit.

Abstract: In a reference voltage generation circuit, a bandgap reference circuit (BGR circuit) 1 includes diode element D1 and D2 having different current densities, three resistive elements R1, R2 and R3, a P-type first transistor Tr1 for supplying a current to a reference voltage output terminal O, a P-type second transistor Tr2 for determining a drain current flowing through the first transistor Tr1 by a current mirror structure, and a feedback type control circuit 11. The BGR circuit 1 is connected to a pull-down circuit 2. The pull-down circuit 2 includes a resistive element R4 and a P-type transistor Tr4 which are connected in series. The resistive element R4 is connected to a drain terminal of the second P-type transistor Tr2. The P-type transistor Tr4 has a gate terminal connected to the reference voltage output terminal O and a grounded drain terminal.

Abstract: A current biasing circuit is provided, which is designed to suppress reference current drift caused by temperature variation with a low overall temperature coefficient of a constant-voltage circuit and at least one resistor. The constant-voltage circuit comprises a diode and/or a diode-connected transistor. This current biasing circuit is based on a current mirror architecture, is easy to implement, and is a relatively temperature-independent current source.

Abstract: A low supply voltage band-gap reference circuit is provided, which includes a positive temperature coefficient current generation unit and a negative temperature coefficient current generation unit, and it is implemented by way of current summing. Through the current-mode temperature compensation technique, the present invention is able to reduce the voltage headroom and the number of operational amplifiers required by the conventional voltage-summing method, as well as the influence to the output voltage due to the offset voltage, thereby providing a stable and low voltage band-gap reference voltage level. In addition, by reducing the number of operational amplifiers and resistors of high resistance, the circuit area is reduced, and chip cost is saved.

Abstract: A circuit arrangement including a voltage supply device, which has an output, and that provides a variable supply voltage, a supply-voltage-controlled clock generator, which is coupled to the output of the voltage supply device, and that provides a system clock signal having a variable effective system clock frequency, a circuit section having a supply terminal, which is coupled to the output of the voltage supply device, and a clock input, which receives the system clock signal, and a regulating device that determines a supply-voltage-dependent supply current value and detects the extent to which the supply current value lies within a predetermined current value range, and which is coupled to the voltage supply device such that the supply voltage is regulated based on whether the supply current value lies within the predetermined current value range.

Abstract: A circuit for generating a reference current comprises: a first current mirror configured to current-mirror based on a second current, so as to generate a first current that is substantially in inverse proportion to a variation of a power supply voltage; a current compensation unit configured to remove a variation of the first current corresponding to the variation of the power supply voltage to form a compensated first current; a second current mirror configured to generate the second current based on the compensated first current, and configured to provide the second current to the first current mirror; and a current output unit configured to output the second current as the reference current.

Abstract: A semiconductor circuit including a bias circuit (1) generating a signal reflecting a current driving capability of a transistor; an analog/digital converter circuit (2) converting the signal from an analog format into a digital format; and a signal processing circuit (3) partially controlled in an operating state or a non-operating state according to the signal converted by the analog/digital converter circuit as a control signal, is provided.

Abstract: Analog voltage drain with reduced current drain is achieved by a new capacitive-divided feedback architecture. During the operational phase an op amp monitors a capacitively-divided fraction of the output voltage, and drives a current sink or source accordingly; during an initial phase the output is forced to the correct value by a different circuit, while the opamp is connected to self-tune itself in a way which removes DC offset effects.

Abstract: A voltage reference generating method, source, memory device and substrate containing the same include a voltage reference generator comprised of a bandgap voltage reference circuit including a first complementary-to-absolute-temperature (CTAT) signal and a second complementary-to-absolute-temperature (CTAT) signal. The voltage reference generator further includes a differential sensing device for generating a reference signal substantially insensitive to temperature variations over an operating temperature range by differentially sensing the first and second CTAT signals. The method includes generating first and second complementary-to-absolute-temperature (CTAT) signals and generating a reference signal that is substantially insensitive to temperature variations over an operating temperature range.

Abstract: A bias control system for the radio frequency power amplifiers that includes a current source, a mirror current, and a bias voltage.

Abstract: A bias correction device to be used on a power supply which has a high voltage output end and a low voltage output end bridges the high voltage output end and the low voltage output end. When the output voltage at the low voltage output end is too low the bias correction device makes the high voltage output end to output a voltage to compensate the low voltage output end so that the voltage at the low voltage output end is raised to be maintained a preset output voltage level.

Abstract: The internal voltage generator of a semiconductor integrated circuit includes at least one variable reference voltage generating unit that generates a base reference voltage increased or decreased according to the variation in temperature, at least one level shifting unit that transforms the base reference voltage outputted by the at least one variable reference voltage generating unit into at least one prescribed reference voltage for generating internal voltage and outputs the transformed reference voltage, and at least one internal voltage generating unit that generates an internal voltage by using the at least one reference voltage for generating internal voltage outputted by the at least one level shifting unit.

Abstract: A detection circuit includes a current source with no temperature coefficient; a current generation circuit that generates a VBE proportional reference current from the current source with no temperature coefficient; a current mirror circuit that returns an output current of the current generation circuit; a reference voltage generation circuit that generates a VBE proportional voltage with a negative temperature coefficient on the basis of the current returned by the current mirror circuit so that the VBE proportional voltage is used as a reference voltage of a comparator; and a full-wave rectifying means, having a differential pair and a rectifier circuit, using the current source with no temperature coefficient, having an alternating current signal supplied as an input signal, for generating a direct current voltage with a negative coefficient on the basis of a voltage obtained by full-wave rectifying the alternating current signal, and for using the generated voltage as a comparative voltage of the compar

Abstract: A high voltage generator includes a charge pump configured to output a pumping voltage in accordance with a first clock signal and a second clock signal having a level opposed to a level of the first clock signal; a first regulator configured to stabilize the pumping voltage to a voltage having constant level, thereby outputting a first regulation voltage; and a second regulator configured to convert the first regulation voltage into a voltage having constant level, thereby outputting a second regulation voltage. Here, the first regulator increases the pumping voltage by n number so that the first regulation voltage reaches a first level, and the second regulator increases the first regulation voltage by m number so the second regulation voltage reaches a second level smaller than the first level.

Abstract: A circuit provides a bandgap reference voltage that is substantially insensitive to temperature variations of an operating reference circuit.

Abstract: A temperature-sensitive current source includes a first MOS transistor having a source coupled to a first voltage; a second MOS transistor having a source coupled to the first voltage, and a gate coupled to a gate of the first MOS transistor, such that a current output at a drain of the second MOS transistor mirrors a current passing across the first MOS transistor; and a resistor coupled between the source and a drain of the first MOS transistor in parallel, such that the current passing across the first MOS transistor is substantially larger than a current passing through the resistor, wherein the first and second MOS transistors operate in a saturation mode, such that the output current at the drain of the second MOS transistor is responsive to a change of temperature.

Abstract: Techniques pertaining to a circuit architecture capable of controlling a current source to a predefined precision are disclosed. According to one aspect of the present invention, an automatic trimming circuit is proposed to automatically trim a current generated from a current generator or circuit in accordance with a reference current. The automatic trimming circuit includes a comparator, an ADC and a register. The comparator that may be implemented as a subtractor finds a difference between a generated current and a reference current. The difference is then digitized to an n-bit precision. A digital representation of the difference is then kept in a register and used subsequently correct or modify the generated current to produce a precisely controlled current.

Abstract: A voltage bandgap circuit comprises a first transistor and a second transistor connected in a voltage bandgap circuit arrangement, the area of the first transistor is selected to be a predetermined multiple of the area of the second transistor; a differential input amplifier has a first input coupled to the first transistor and a second input coupled to the second transistor; the amplifier has its output coupled to an output node. A first trimmable resistance network is coupled to say the bandgap circuit and is trimmed to adjust the output voltage of the bandgap circuit based upon a single temperature voltage measurement made across two of the terminals of each transistor.

Abstract: A reference voltage circuit having a high power supply rejection ratio, and can operate at low voltage is provided. The reference voltage circuit includes a bias circuit constructed such that a depletion type transistor (3) is connected in series to a power supply voltage supply terminal of a load circuit, an enhancement type MOS transistor (4) for detecting current through the load circuit to operate as a current source is connected to the load circuit, a depletion type MOS transistor (5) is connected in series to the transistor (4), and a gate terminal of the transistor (5) is connected to a source terminal of the transistor (5), in which the gate terminal of the depletion type transistor (3) is connected to the source terminal of the depletion type transistor (5).

Abstract: A current driving device includes a reference current source, a first MISFET connected to the reference current source, a plurality of current distribution MISFETs which constitutes a current mirror together with the first MISFET and distributes a reference current, a current input MISFET connected to the current distribution MISFETs, and a plurality of current supply sections each of which includes MISFETs constituting a current mirror circuit together with the current input MISFET and supplies a driving current for a pixel circuit. With the plurality of current distribution MISFETs provided, change in gate the potential of MISFETs in the current supply section can be suppressed, so that the generation of a crosstalk in a display device can be suppressed.