With Voltage Source Regulating Patents (Class 327/540)
  • Publication number: 20100020598
    Abstract: The present invention is a semiconductor device including: a resistor R11 (first resistor part) and an FET 15 (second resistor part) connected in series between a power supply Vcc (first power supply) and ground (second power supply); an output node N11 provided between the resistor R11 and FET 15 and used for outputting a reference voltage; a feedback node N12 provided between the power supply Vcc and the ground; and a voltage control circuit (19) that maintains a voltage of the feedback node N12 at a constant level by using the reference voltage of the output node N11 and the voltage of the feedback node N12. The present invention can provide a semiconductor device having a reference voltage generating circuit capable of generating the reference voltage that does not greatly depend on a power supply voltage and its control method.
    Type: Application
    Filed: October 6, 2009
    Publication date: January 28, 2010
    Inventors: Hiroaki WADA, Kazuhiro KURIHARA
  • Patent number: 7652524
    Abstract: An electronic circuit. The electronic circuit includes a first circuit leg coupled to a first supply voltage node and a second supply voltage node. The first circuit leg includes a first reference current circuit configured to produce a first reference current and a second reference current circuit configured to produce a second reference current. The electronic circuit further includes a second circuit leg coupled in parallel with the first circuit leg. The second circuit leg includes a first transistor coupled to form a current mirror with the first reference current circuit and a second transistor coupled to form a current mirror with the second reference current circuit. The source terminals of each of the first and second transistors are coupled together to form a third supply voltage node.
    Type: Grant
    Filed: January 23, 2008
    Date of Patent: January 26, 2010
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Dimitry Patent, Ravinder Rachala, Shawn Searles, Lena Ahlen, Matthew Cooke
  • Publication number: 20100013550
    Abstract: A first power supply voltage input section can input a first power supply voltage, a second power supply voltage input section can input a second power supply voltage, a regulator circuit generates a back bias voltage on the basis of the second power supply voltage, and an output section can output the back bias voltage generated by the regulator circuit as an output voltage. A substrate bias can be generated with low power consumption, and the circuit scale can be reduced.
    Type: Application
    Filed: September 28, 2009
    Publication date: January 21, 2010
    Applicant: Fujitsu Limited
    Inventor: Motoyuki TANAKA
  • Patent number: 7639065
    Abstract: A semiconductor integrated circuit includes a first circuit block which operates at a first internal voltage, a second circuit block which operates at a second internal voltage, is connected to an output stage of the first circuit block, and receives a signal from the first circuit block, and a voltage controller which supplies the first internal voltage to the first circuit block by using a first high-potential power, supplies the second internal voltage to the second circuit block by using a second high-potential power, and performs control such that the second internal voltage does not exceed the first internal voltage.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: December 29, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takayuki Miyazaki
  • Patent number: 7633335
    Abstract: A current source circuit includes a voltage output section which outputs a voltage signal; a current source section and a conversion section. The current source section has at least one current source block comprising a plurality of current sources, each of which outputs an output current. The conversion section is provided between the voltage output section and the current source section and outputs a reference current to the plurality of current sources of the at least one current source block based on the voltage signal such that the output current from each of the plurality of current sources is set based on the reference current.
    Type: Grant
    Filed: April 30, 2008
    Date of Patent: December 15, 2009
    Assignees: NEC Electronics Corporation, NEC Corporation
    Inventors: Katsuyuki Fujikura, Katsumi Abe, Masamichi Shimoda
  • Patent number: 7633321
    Abstract: A driver circuit includes an output, at least one transistor including a load section coupled between the output and a supply voltage, and a circuit coupled to a control terminal of the at least one transistor to apply a control voltage to the control terminal in at least one operation mode of the driver circuit. The control voltage is within a predetermined voltage range de-pending on a first predetermined voltage below a nominal voltage range of the output.
    Type: Grant
    Filed: July 24, 2007
    Date of Patent: December 15, 2009
    Assignee: Infineon Technologies AG
    Inventor: Andreas Hebenstreit
  • Publication number: 20090305747
    Abstract: Apparatus (40) comprising a voltage input (49) for applying an unfiltered voltage (V_unfil) and a current input (48) for receiving a bias current (Ib) from a current source. The apparatus (40) further comprises a differential filtering resistive circuit with a first current mirror (44) and a second current mirror (43), being situated between a common output node (50) and said voltage input (49). A first mirror circuit (42) for mirroring the bias current (Ib) to said first current mirror (44), and a second mirror circuit (41) for mirroring a current (Ix) to said second current mirror (43) are employed. A filter capacitor (51) situated at the output side of the apparatus (40), said filter capacitor (51) being connected on one side to said common output node (50) and on the other side to ground. The apparatus (40) provides a filtered output voltage (V_fil) at said common output node (50).
    Type: Application
    Filed: November 10, 2005
    Publication date: December 10, 2009
    Applicant: ST Wireless SA
    Inventor: Willem Hendrik Groeneweg
  • Patent number: 7629834
    Abstract: A limiter circuit includes a differential amplifier circuit having a non-inverting and an inverting inputs, the inverting input fed with an input signal to the limiter circuit, a driving circuit fed with an output of the differential amplifier, a MOS transistor having a source, a drain and a gate, one of the source and the drain of the MOS transistor connected to an output of the driving circuit, the other of the source and the drain of the MOS transistor connected to the non-inverting input of the differential amplifier, the gate of the MOS transistor applied with a predetermined voltage, and a load circuit connected to the other of the source and the drain of the MOS transistor.
    Type: Grant
    Filed: March 16, 2007
    Date of Patent: December 8, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Hayato Ogawa
  • Patent number: 7626448
    Abstract: An internal voltage generator includes: an internal voltage driving unit for supplying an internal voltage corresponding to a reference voltage maintaining a predetermined voltage level regardless of a temperature variation; and a temperature compensation current sinking unit for sinking a current generated by an internal voltage in response to a voltage level inversely proportional to a temperature.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: December 1, 2009
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Sang-Jin Byeon, Jae-Hyuk Im
  • Patent number: 7619450
    Abstract: A startup circuit for providing a startup voltage from a high voltage DC bus voltage to an application circuit, the startup circuit comprising an integrated circuit package for at least a control circuit for driving at least one power switch of the application circuit having a low voltage terminal; a dropping resistor in the integrated circuit package having a first terminal for coupling to the high voltage DC bus and a second terminal, the dropping resistor dropping the high voltage DC bus voltage to a reduced voltage and providing the reduced voltage at the second terminal; further comprising a low voltage regulator coupled to the second terminal for using the reduced voltage for enabling generation of a regulated startup low voltage DC output at a preset level at the low voltage terminal for powering at least one part of the application circuit during startup of the application circuit, wherein the high voltage DC bus voltage is the only voltage source provided externally to the integrated circuit package.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: November 17, 2009
    Assignee: International Rectifier Corporation
    Inventors: Massimo Grasso, Sergio Morini
  • Patent number: 7619464
    Abstract: An electronic data storage system uses current comparison to generate a voltage bias. In at least one embodiment, a voltage bias generator, that includes a current differential amplifier, generates a current that charges a load to a predetermined voltage bias level. The current comparison results in the comparison between two currents, Iref and Isaref. The current Isaref can be generated using components that match components in the load and memory circuits in the system. In one embodiment, multiple sense amplifiers represent the load. By using matched components, as physical characteristics of the load and memory circuits change, the current Isaref also changes. Thus, the voltage bias changes to match the changing characteristics of the load and memory circuits. The voltage bias generator can include a current booster that decreases the initial charging time of a reactive load.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: November 17, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jon S. Choy, Yanzhuo Wang
  • Publication number: 20090278592
    Abstract: An internal voltage discharge circuit includes a differential comparator for differentially comparing a reference voltage with a feedback voltage to generate a discharge control voltage, a level detector for detecting a level of external power supply voltage and a discharge unit for adjusting an amount of discharge of an internal voltage based on the level signal detected by the level detector and the discharge control voltage from the differential comparator.
    Type: Application
    Filed: November 25, 2008
    Publication date: November 12, 2009
    Applicant: HYNIX SEMICONDUCTOR, INC.
    Inventor: Seung-Min OH
  • Patent number: 7616493
    Abstract: When a voltage level detector detects that a supply voltage reaches a recovery voltage level that requires a recovery operation, a signal generator generates a recovery operation instructing signal for instructing the recovery operation. The recovery operation instructing signal is invalidated if a certain operation mode is executed and validated in other cases.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: November 10, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Katsuaki Isobe, Masatsugu Kojima
  • Publication number: 20090267684
    Abstract: An internal voltage generating circuit of a semiconductor device includes a first voltage driver configured to pull up an internal voltage terminal during a period where a level of the internal voltage terminal is lower than a target level, and a second voltage driver configured to pull up the internal voltage terminal during a predefined time in each period corresponding to a frequency of an external clock.
    Type: Application
    Filed: June 30, 2008
    Publication date: October 29, 2009
    Applicant: HYNIX SEMICONDUCTOR, INC.
    Inventor: Chang-Ho DO
  • Publication number: 20090267685
    Abstract: A circuit for controlling an internal voltage is provided. The A circuit for controlling an internal voltage, comprising: a level detector configured to detect a voltage level of a core voltage to generate a core voltage level detection signal; a release controller configured to generate a release control signal according to the core voltage level detection signal; and a core voltage release driver configured to release the core voltage according to the release control signal.
    Type: Application
    Filed: June 30, 2008
    Publication date: October 29, 2009
    Inventor: Ju-Young Seo
  • Publication number: 20090267686
    Abstract: A semiconductor integrated circuit device enhanced in design efficiency while achieving multi-functionalization and power saving is to be provided. The semiconductor integrated circuit device has first through third circuit blocks, and is placed in a first power supply state in which the operation of internal circuits in the first circuit block is guaranteed in accordance with an instruction from the third circuit block or a second power supply state in which the operation of the internal circuits is not guaranteed.
    Type: Application
    Filed: July 6, 2009
    Publication date: October 29, 2009
    Inventors: Yuri Azuma, Yoshihiko Yasu, Yasuto Igarashi, Takashi Kuraishi, Kazumasa Yanagisawa
  • Patent number: 7609113
    Abstract: A constant current bias circuit and associated method is disclosed. The constant current bias circuit comprises an output stage for amplifying a radio frequency (RF) signal, wherein the output stage is operably coupled with a voltage. The constant current bias circuit further comprises a bias circuit operably coupled with the output stage for generating a substantially constant current bias to the output stage. The constant current bias circuit still further comprises a plurality of bias transistors operably coupled with the voltage and the output stage.
    Type: Grant
    Filed: November 15, 2006
    Date of Patent: October 27, 2009
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: William H. Davenport
  • Patent number: 7606085
    Abstract: The present invention is a semiconductor device including: a resistor R11 (first resistor part) and an FET 15 (second resistor part) connected in series between a power supply Vcc (first power supply) and ground (second power supply); an output node N11 provided between the resistor R11 and FET 15 and used for outputting a reference voltage; a feedback node N12 provided between the power supply Vcc and the ground; and a voltage control circuit (19) that maintains a voltage of the feedback node N12 at a constant level by using the reference voltage of the output node N11 and the voltage of the feedback node N12. The present invention can provide a semiconductor device having a reference voltage generating circuit capable of generating the reference voltage that does not greatly depend on a power supply voltage and its control method.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: October 20, 2009
    Assignee: Spansion LLC
    Inventors: Hiroaki Wada, Kazuhiro Kurihara
  • Patent number: 7605643
    Abstract: A voltage generation circuit may include a static current circuit and/or a current mirror. The static current circuit may include a first resistor. The current mirror may include a second resistor, a third resistor, and/or an output terminal.
    Type: Grant
    Filed: June 21, 2007
    Date of Patent: October 20, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Masao Kuriyama
  • Patent number: 7603572
    Abstract: A digital circuit unit includes at least one circuit block, a voltage source for supplying the circuit block, a detection unit, which monitors the change of current drain by the at least one circuit block, an additional power consumption unit, which upon activation consumes power in addition to the at least one circuit block, and a control unit, which controls the power consumption unit in such a way that upon a change in the power consumption of the circuit block the power consumption unit is activated and drains current.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: October 13, 2009
    Assignee: Infineon Technologies AG
    Inventors: Jörg Berthold, Stephan Henzler
  • Patent number: 7602230
    Abstract: An integrated control circuit for a charge pump includes a first device for regulating the output voltage of the charge pump and a second device for increasing the output voltage from the charge pump with a set ramp. The integrated circuit includes means for activating said first device and providing it with a first value of a supply signal in a first period of time and for activating the second device and providing it with a second value of the supply signal that is greater than the first value in a second period of time after the first in such a way that the output voltage of the charge pump ascends a ramp from a first value to a second value that is greater than the first value, the second value being fixed by reactivation of the first device.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: October 13, 2009
    Assignee: STMicroelectronics S.R.L.
    Inventors: Enrico Castaldo, Antonino Conte, Gianbattista Lo Giudice
  • Patent number: 7598800
    Abstract: The present invention uses two transistors instead of a sensing resistor to provide a constant current source for a load such as an array of light emitting diodes (“LEDs”). In the present invention, a bias current is applied to a branch of the circuit. The drain-to-source voltages of two transistors are matched. The voltage at the gate of both transistors is controlled based on the bias current and the drain-to-source current of the first of the two transistors. The second of the two transistors is sized such that source current of the second transistor is a multiple of the source current of the first transistor for a given gate voltage. By the techniques of this invention, the load current in a circuit is efficiently kept constant at a multiple of the input bias current.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: October 6, 2009
    Assignee: mSilica Inc
    Inventors: Gurjit S. Thandi, Dilip S, Hendrik Santo, Kien Vi
  • Publication number: 20090243710
    Abstract: In an integrated circuit (IC) may have several functional blocks adapted to be inactivated independently from each other. At least one firewall cell may be embedded independently of other firewall cells in the vicinity of one functional block. The firewall cell may be electrically isolated from the functional block and may be powered by a constantly supplied voltage source in the IC. Firewall cells may be embedded in free locations on the IC in the functional block domain according to a design that may be free of constraints such as firewall cells array of firewall cells mini-island.
    Type: Application
    Filed: March 27, 2008
    Publication date: October 1, 2009
    Inventors: Rabiul Islam, Michael C. Phillips
  • Patent number: 7595686
    Abstract: A voltage controller (150), the controller comprising: a voltage comparator (700) operative to provide a digital error signal (152); a compensator (300) operative to determine a digital control signal (154) based on said provided error signal; and a modulator (400) operative to provide a power control signal (156) based on said determined digital control signal, wherein said comparator, said compensator, and said modulator are implemented entirely with digital logic gates.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: September 29, 2009
    Assignee: The Regents of the University of Colorado
    Inventors: Dragan Maksimovic, Benjamin James Patella, Aleksandar Prodic, Sandeep Chaman Dhar
  • Publication number: 20090237152
    Abstract: An internal voltage generator includes a pull-up driver to pull-up drive a supply terminal of an internal voltage, a pull-down driver to pull-down drive the supply terminal of the internal voltage, a pull-up driving control unit to turn on the pull-up driver when a first feedback voltage corresponding to the internal voltage becomes lower than a reference voltage, and a pull-down driving control unit to turn on the pull-down driver when a second feedback voltage becomes higher than the reference voltage, the second feedback voltage having a voltage level corresponding to that of the internal voltage and lower than that of the first feedback voltage.
    Type: Application
    Filed: June 5, 2009
    Publication date: September 24, 2009
    Inventor: Chang-Ho Do
  • Patent number: 7592860
    Abstract: Compensation is provided for signal drop in bond wires of an integrated circuit (IC) while minimizing the number of external terminals in the IC package. A functional circuit provides an output signal (e.g., voltage) on a pad of the IC, which is connected to an external terminal on the package via a bond wire. A second circuit contained in the IC determines the signal drop in the bond wire by examining a parameter (e.g., current) proportional to a strength of the output signal at or before the pad in a transmission path of the signal. Thus, additional external terminals to sense the signal strength at a point external to the IC to provide compensation for the drop may not be required.
    Type: Grant
    Filed: September 14, 2007
    Date of Patent: September 22, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Ravindra Karnad, Venkataraman Srinivasan
  • Patent number: 7592854
    Abstract: A temperature-sensing circuit includes a first circuit block outputting an output voltage having negative or positive temperature coefficients and a second circuit block amplifying the output voltage of the first circuit block to a predetermined amplitude and outputting the amplified output voltage. It further includes a third circuit block producing a voltage having temperature coefficients of a polarity opposite to that of the first circuit block and adding the produced voltage to the output voltage of the second circuit block to cancel out components of second order temperature coefficients contained in the output voltages of the first and second circuit blocks.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: September 22, 2009
    Assignee: Ricoh Company, Ltd.
    Inventor: Hirofumi Watanabe
  • Publication number: 20090231024
    Abstract: An integrated circuit assembly includes a voltage level generator, a level shifter, a bandgap reference generator and a voltage regulator. The voltage level generator generates output voltage level signals in response to a supply voltage. The level shifter receives the output voltage level signals from the voltage level generator and generates first and second sets of control signals. The bandgap reference generator receives a reference voltage input and generates a bandgap reference signal. The voltage regulator receives a supply voltage, the bandgap reference signal the first and second sets of control signals from the level shifter and generates a constant output voltage under varying circuit conditions.
    Type: Application
    Filed: May 26, 2009
    Publication date: September 17, 2009
    Inventors: Chang-Hyeon Lee, Joshua Cho, Pete Good
  • Patent number: 7589578
    Abstract: A level shift circuit for sustaining the activation and inactivation response of a transistor with respect to an input signal in a preferable manner. The level shift circuit includes a shift circuit for converting an input signal having a first voltage to an output signal having a second voltage that is higher than the first voltage. The voltage generation circuit includes a control voltage generation circuit, for generating control voltage having a generally constant voltage level irrespective of the level of a power supply voltage, and a bias generation circuit. The bias generation circuit generates bias voltage so that the node voltage of the shift circuit is substantially equalized with the control voltage.
    Type: Grant
    Filed: January 24, 2006
    Date of Patent: September 15, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Yoshiaki Shimizu, Hisao Suzuki
  • Publication number: 20090219083
    Abstract: An electric circuit device includes: a power supply line; a load circuit; a current supply controller which compares a voltage of the power supply line with a certain voltage; and a current supply circuit which supplies a electric current from the power supply line to the load circuit and changes the electric current during a supply of the electric current.
    Type: Application
    Filed: March 3, 2009
    Publication date: September 3, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Kenichi KAWASAKI
  • Publication number: 20090212853
    Abstract: An apparatus for supplying power in a semiconductor integrated circuit includes a plurality of power lines, each supplying external power to an interior of the semiconductor integrated circuit, and at least one decoupling capacitor set connected to the plurality of power lines and having a resistance value configured to be variable according to a bias voltage.
    Type: Application
    Filed: December 31, 2008
    Publication date: August 27, 2009
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventors: Hyung-Soo Kim, Yong Ju Kim, Sung Woo Han, Hee Woong Song, Jae Min Jang, Ji Wang Lee, Chang Kun Park, Ic Su Oh, Hae Rang Choi, Tae Jin Hwang
  • Patent number: 7579904
    Abstract: Disclosed herein is an internal voltage generation circuit of a semiconductor memory device which is capable of supplying voltages of different levels to a column path & control logic and data path & control logic in the memory device according to different operation modes of the memory device. The column path & control logic and data path & control logic are applied with a normal operating voltage when they are involved in the current operation mode of the memory device, whereas with a lower voltage when they are not involved. Therefore, the present invention has the effect of efficiently managing internal voltages of the semiconductor memory device and reducing current leakage of the memory device and, in turn, unnecessary power consumption thereof.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: August 25, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jae-Hyuk Im, Jae-Jin Lee
  • Publication number: 20090206920
    Abstract: A soft-start device including a current source, a first transistor, and a second transistor is described. The first transistor is coupled to the current source, and an amount of current conducted by the first transistor is determined according to a voltage. The second transistor is also coupled to the current source, and an amount of current conducted by the second transistor is determined according to a fixed bias. An initial voltage value of the voltage is smaller than a voltage value of the fixed bias. However, after a soft start, the voltage value of the first voltage is increased gradually to be larger than the voltage value of the fixed bias, such that the soft start may be implemented smoothly.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 20, 2009
    Inventors: Chao-Cheng Lee, Wei-Chou Wang
  • Patent number: 7576596
    Abstract: Embodiments of the present invention are directed to provide an internal voltage generator of a semiconductor memory device for generating a predetermined stable level of an internal voltage. The semiconductor memory device includes a control signal generator, an internal voltage generator and an internal voltage compensator. The control signal generator generates a reference signal and a compensating signal which are corresponding to voltage level of the reference signal. The internal voltage generator generates an internal voltage in response to the reference signal. The internal voltage compensator compensates the internal voltage in response to the compensating signal.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: August 18, 2009
    Assignee: Hynix Semiconductor, Inc.
    Inventors: Kang-Seol Lee, Ji-Eun Jang
  • Patent number: 7573323
    Abstract: A reference current is generated by a current mirror circuit. An operational amplifier of a feedback circuit generates a control voltage for control of the feedback circuit transistor. The size of the feedback circuit transistor is trimmed, and the current through the feedback circuit transistor remains relatively constant via operation of the feedback circuit. The feedback circuit transistor is scaled in size relative to the size of current reference transistor(s) (e.g., current sources or sinks), which are tied to the same control voltage. The reference current of the current reference transistors thus varies with the size of the feedback circuit transistor. Further advantageously, transistors providing reference currents for resistor ladders can also be tied to the same control voltage, but scaled proportionally with changes in size to the feedback circuit transistor, thereby maintaining relatively constant voltage from taps of the resistor ladder, even when the feedback circuit transistor is trimmed.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: August 11, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: Jørgen Moholt, Per Olaf Pahr, Tore Martinussen
  • Patent number: 7573324
    Abstract: A reference voltage generator according to an embodiment of the present invention includes: a voltage setting circuit generating a first voltage having a predetermined voltage difference from an output voltage; a voltage buffer receiving the first voltage and outputting a first power supply substantially equal to the first voltage; a voltage clamp circuit operating based on a second power supply and a third power supply; and a band-gap circuit generating the output voltage, the band-gap circuit operating based on the second power supply and the first power supply output from the voltage clamp circuit.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: August 11, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Takeshi Kuwano
  • Patent number: 7573318
    Abstract: An internal voltage generating circuit includes a first detector that compares an internal voltage and a first reference voltage to output a first detection signal. A second detector compares a supply voltage and a second reference voltage to output a second detection signal. A loop selection oscillator performs an oscillation operation in response to the first detection signal, selects a first loop or a second loop for performing the oscillation operation in response to the second detection signal, and outputs an oscillation signal. A charge pump performs a pumping operation according to the output of the loop selection oscillator and generates the internal voltage.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: August 11, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventor: Myung-Jin Kim
  • Patent number: 7573322
    Abstract: Aspects of a method and system for a linear regulator with high bandwidth, PSRR, and a wide range of output current are provided. A method for isolating voltages in a circuit may comprise applying a reference voltage to an isolation resistor based on a supply voltage. An internal voltage at a reference point may be determined based on the applied reference voltage, and a maximum and/or minimum voltage may be determined based on the internal voltage. A plurality of output transistor devices may be controlled based on either the maximum voltage or minimum voltage. The reference voltage may be modified based on controlling the plurality of output transistor devices. By turning ON and OFF the output transistor devices, a much wider operating range is facilitated.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: August 11, 2009
    Assignee: Broadcom Corporation
    Inventors: Francesco Gatta, Karapet Khanoyan
  • Patent number: 7570108
    Abstract: An apparatus for regulating voltage for at least one differential transistor pair having a voltage follower buffer, the voltage follower section having a first voltage-temperature response, includes: (a) a differential amplifier having two input loci and an output locus, a first input locus of the two input loci receiving a reference voltage; (b) a temperature responsive unit coupled between the output locus and ground; and (c) a feedback line coupled between the temperature responsive unit and a second input locus of the two input loci. The temperature responsive unit has a second voltage-temperature response similar to the first voltage-temperature response.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: August 4, 2009
    Assignee: Texas Instruments Incorporated
    Inventors: Mark W. Morgan, Yanli Fan, Hector Torres
  • Patent number: 7570107
    Abstract: A band-gap reference voltage generator is provided that is capable of being used at low voltage simultaneously with adjusting a reference voltage.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: August 4, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventors: Se Jun Kim, Chun Seok Jeong
  • Publication number: 20090189682
    Abstract: A method is disclosed to add functionality to a terminal of a high voltage integrated circuit without the penalty of additional high voltage circuitry. The benefit is that alternative modes of operation can be selected for testing, trimming parameters of the integrated circuit, or any other purpose without the cost of an additional terminal. In one embodiment, ordinary low voltage circuitry monitors the voltage on the terminal that normally is exposed to high voltage. The configuration of a simple voltage detector and an ordinary latch allows easy entry into the test and trimming mode when the integrated circuit is not in the intended application, but prohibits entry into the test and trimming mode when the integrated circuit operates in the intended application.
    Type: Application
    Filed: March 30, 2009
    Publication date: July 30, 2009
    Applicant: POWER INTEGRATIONS, INC.
    Inventors: Alex B. Djenguerian, William B. Smith, Kent Wong, Zhao-Jun Wang
  • Publication number: 20090187773
    Abstract: A microcontroller unit includes a processor for generating a first control signal to start a comatose mode of operation for the microcontroller unit. Control logic responsive to the first control signal generates an enable signal at a first level and the control logic is further responsive to a second control signal for generating the enable signal at a second level. A voltage regulator generates regulated voltage from an input voltage. The voltage regulator shuts down to provide a zero volt regulated voltage responsive to the enable signal at the first level and powers up to provide a regulated voltage at an operating level responsive to the enable signal at the second level.
    Type: Application
    Filed: October 21, 2008
    Publication date: July 23, 2009
    Applicant: SILICON LABORATORIES INC.
    Inventors: DOUGLAS F. PASTORELLO, DOUGLAS HOLBERG, WILLIAM GENE DURBIN, BIRANCHINATH SAHU, GOLAM R. CHOWDHURY
  • Patent number: 7564299
    Abstract: In some embodiments, regulator circuits are provided.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: July 21, 2009
    Assignee: Intel Corporation
    Inventors: Joseph Shor, Eyal Fayneh
  • Patent number: 7564300
    Abstract: A high voltage generator includes a charge pump configured to output a pumping voltage in accordance with a first clock signal and a second clock signal having a level opposed to a level of the first clock signal; a first regulator configured to stabilize the pumping voltage to a voltage having constant level, thereby outputting a first regulation voltage; and a second regulator configured to convert the first regulation voltage into a voltage having constant level, thereby outputting a second regulation voltage. Here, the first regulator increases the pumping voltage by n number so that the first regulation voltage reaches a first level, and the second regulator increases the first regulation voltage by m number so the second regulation voltage reaches a second level smaller than the first level.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: July 21, 2009
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seok-Joo Lee
  • Patent number: 7560981
    Abstract: A controlling apparatus for controlling a plurality of LED strings and related light modules is disclosed, wherein each of the plurality of LED strings has a first terminal being electrically connected to an operating voltage. The controlling apparatus includes: a plurality of transistors, each having a control terminal, a first terminal, and a second terminal, wherein the first terminal of each transistor is electrically connected to a second terminal of a corresponding string of the plurality of LED strings, and the second terminals of the plurality of transistors are respectively grounded through a plurality of impedance elements; and a transistor controller, electrically connected to the control terminals of the plurality of transistors, for controlling a current of the first terminal of each transistor by adjusting an input signal of the control terminal of the transistor according to a voltage at the second terminal of the transistor.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: July 14, 2009
    Assignee: Chunghwa Picture Tubes, Ltd.
    Inventors: Han-Yu Chao, Bi-Hsien Chen, Shin-Chang Lin
  • Patent number: 7560980
    Abstract: A constant voltage generating circuit according to the present invention includes a reference voltage generation source 1, a differential amplifier 2 that receives an output voltage (REF1) of the reference voltage generation source 1 at one terminal and receives a potential (VREF2), generated by adding a predetermined potential difference to a regulator voltage (VREG), at another terminal, and switching means 6 that controls the current amount of an output terminal 10 of the reference voltage generation source 1 so that the current amount increases for a fixed period of time immediately after the power is turned on. The switching means 6, which is turned on/off based on VREF2, stabilizes the output voltage (REF1) of the reference voltage generation source 1 quickly after the power is turned on and then stabilizes the regulator voltage (VREG).
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: July 14, 2009
    Assignee: Citizen Holdings Co., Ltd.
    Inventors: Masahiko Hitomi, Masashi Shimozuru
  • Patent number: 7561130
    Abstract: A control circuit for regulating current supplied from a power source to at least one load. The control circuit has a current mirror circuit electrically coupled between the power source and the at least one load, and being capable of regulating current supplied from the power source to the at least one load at different levels; a real-time clock (RTC) circuit adapted for recording real time; and a micro control unit (MCU) electrically coupled between the RTC circuit and the current mirror circuit, and configured such that when the real time changes from a first time period to a second time period, the MCU generates control signals to trigger the current mirror circuit to regulate current supplied from the power source to the at least one load from a first level corresponding to the first time period to a second level corresponding to the second time period.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: July 14, 2009
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Chia-Hung Wang
  • Patent number: 7557587
    Abstract: An excluding unit is controlled by a control signal received from a control unit, and based on the control signal a determination is made for each of circuit blocks as to whether either a voltage signal at a position of its corresponding circuit block or a signal indicating a voltage is outputted to a selection unit. From a circuit block which is not in operation, the voltage, but not a voltage signal at a position of the circuit block, is outputted to the selection unit. By this, the circuit block which is not in operation cannot be judged to have voltage drop, and accordingly, a high supply voltage cannot be supplied. Consequently, a malfunction caused by supply voltages to other circuit blocks being too high does not occur.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: July 7, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventor: Yasushige Ogawa
  • Publication number: 20090167585
    Abstract: An analog reference voltage generator for generating a monotonously increasing or decreasing analog reference voltage includes a plurality of dump cells in front of an operational amplifier and controls the dump cells using a plurality of clock signals, respectively, which do not overlap each other in time, thereby increasing a ramping speed. The analog reference voltage generator including the plurality of dump cells controls the generation of an analog reference voltage using the plurality of clock signals obtained by dividing a master clock signal, thereby preventing the voltage level of the reference signal from decreasing due to an increase of the load.
    Type: Application
    Filed: July 30, 2008
    Publication date: July 2, 2009
    Inventor: Hyun Soo Yeom
  • Patent number: 7554312
    Abstract: According to an embodiment of the invention, a method and apparatus for DC voltage conversion are described. According to one embodiment, a voltage converter comprises a current mirror, the current mirror being coupled with a power source; a first transistor device coupled with a bias generator to receive a bias voltage; a second transistor device coupled between the current mirror and the first transistor device; and an output transistor device, a gate of the output transistor device being coupled with a gate of the second transistor device and to the current mirror.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: June 30, 2009
    Assignee: Intel Corporation
    Inventors: Robert Fulton, Andrew Volk, Chinnugounder Senthilkumar