Abstract: Methods and apparatuses provide voltage regulation for a processor. Control or configuration parameters for a voltage regulator (VR) are provided digitally over a configuration bus to a VR controller. The parameters may be provided directly from a storage element, or via a processing element or processor core. Based in whole or in part on the parameters, the VR controller provides an output control signal to affect a power output from a power converter to the processing element. In one embodiment, the VR controller is integrated onto the same IC as the processing element.

Abstract: Provided are a voltage divider circuit with high detection precision, a small circuit area, and a reduced chip size, and a semiconductor device including the voltage divider circuit. The voltage divider circuit includes: a first resistor circuit formed to have a resistance that is weighted according to a binary code; a second resistor circuit formed to have a resistance that is weighted according to the same binary code; and a third resistor circuit including a third resistor having a resistance that is weighted according to the same binary code to have a maximum weighted bit count, in which both ends of the third resistor are alternatively connected to an output terminal by two transmission gates.

Abstract: The semiconductor circuit device includes a power line receiving first voltage; each of internal circuits being provided with different operating voltages by the operation mode; a power supply circuit connected with one of internal circuits and the power line to provide second voltage lower than the first voltage to the one of internal circuits; and a control circuit controlling the power supply circuit in accordance with each of the operation modes, wherein when a change of a operation mode is performed, if a operating voltage after the change of a operation mode is higher than a operating voltage before the change of a operation mode, firstly the control circuit controls the power supply circuit to supply a second voltage higher than the operating voltage and secondly the control circuit controls the power supply circuit to supply the operation voltage after the change of a operation mode to the internal circuit.

Abstract: An electronic circuit power supply device configured to selectively apply at least one first voltage or one second voltage to a power supply terminal of the electronic circuit that includes elements for applying to the power supply terminal a voltage variable from a value equal to the first voltage to a value equal to the second voltage and elements designed for selecting application of the second voltage to the power supply terminal when the variable voltage reaches the second voltage.

Abstract: Embodiments are provided that include a memory die, memory devices, and methods, such as those comprising a voltage generator, including an output voltage and an adjustment circuit configured to cause adjustment of the output voltage based on a latch signal. Further one such method includes applying an input voltage to an input of a voltage generator, adjusting the input voltage to an adjusted voltage, comparing the adjusted voltage to a reference voltage, generating trim data based on the comparison and storing the trim data.

Abstract: A compensation device that can include a bias-able device, a bias circuit that provides the bias-able device with a bias current, a signal conditioner selectively coupled to the bias-able device, and an emulator. The signal conditioner and emulator can divert current from the bias-able device in an operational and calibration mode, respectively. In calibration mode, the emulator generates a compensation current that is combined with a sense current so that the sense current equals the bias current.

Abstract: A microcontroller unit includes a processor for generating a first control signal to start a comatose mode of operation for the microcontroller unit. Control logic responsive to the first control signal generates an enable signal at a first level and the control logic is further responsive to a second control signal for generating the enable signal at a second level. A voltage regulator generates regulated voltage from an input voltage. The voltage regulator shuts down to provide a zero volt regulated voltage responsive to the enable signal at the first level and powers up to provide a regulated voltage at an operating level responsive to the enable signal at the second level.

Abstract: High-accuracy overcurrent detection is performed, while a loss resulting from the current detection is significantly reduced. A switch section outputs the voltage between the both terminals of a current detection resistor using an AND signal between an output signal from a hysteresis comparator and an output signal from a pre-driver. The voltage is filtered by an electrostatic capacitor element and a resistor, and inputted to a comparator. The comparator makes a comparison between the signals inputted to the two input terminals thereof, and outputs the result of the comparison to a digital filter. When an overcurrent begins to flow in a power supply unit, the levels of the voltages inputted to the two input terminals of the comparator are inverted so that the comparator outputs an inversion signal to the digital filter. The digital filter outputs a detection signal to an overcurrent detection circuit when an arbitrary time has elapsed.

Abstract: A control circuit controls a power-source-voltage feed circuit, and controls a power source voltage fed to a target circuit. A reference-speed monitor monitors whether or not a delay time of a critical path in the target circuit is satisfies a required operational speed. A voltage-difference monitor monitors a difference between the power source voltage of the target circuit and a threshold voltage of the target circuit, to output the voltage difference information. The control circuit determines whether to increase or decrease the power source voltage based on a result of monitoring by the reference-speed monitor. The control circuit determines the change rate of the power source voltage so that the control rate of the power source voltage is proportional to the voltage difference information output from the voltage-difference monitor.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: A technique reduces effects of power supply noise on a signal output by an integrated circuit output driver circuit powered at least partially by an external power supply. An integrated circuit includes a first circuit that provides a first version of a signal to be output referenced between a first regulated voltage and a first power supply voltage of an external power supply. A second circuit provides a second version of the signal to be output referenced between a second regulated voltage and a second power supply voltage of the external power supply. A third circuit provides a third version of the signal to be output referenced between the first power supply voltage and the second power supply voltage and based on the first and second versions of the signal to be output and power received from the external power supply.

Abstract: A voltage supply apparatus includes a power noise sensing unit, a voltage selecting unit, a first power voltage supply unit and a second power voltage supply unit. The power noise sensing unit senses noise from first and second powers and outputs a power noise sensing signal. The voltage selecting unit outputs first and second driving signals in response to a voltage-supply-enable-signal and the power noise sensing signal. The first power voltage supply unit applies a voltage of the first power in response to the first and second driving signals. The second power voltage supply unit applies a voltage of the second power in response to the first and second driving signals.

Abstract: A semiconductor integrated circuit is capable of accurately detecting the characteristics of a chip. The semiconductor integrated circuit includes a monitor circuit and a control circuit. The control circuit generates a clock pulse signal having M successive pulses (M is 2 or a greater integer), and outputs the clock pulse signal to the monitor circuit. The monitor circuit includes a frequency divider and a ring oscillator. The frequency divider frequency divides the clock pulse signal by M and generates the resulting signal as an enable signal. The ring oscillator generates an oscillation signal as a monitor output value during a period defined in accordance with the enable signal.

Abstract: Provided is a band gap reference voltage circuit having an improved power supply rejection ratio. Owing to a voltage supply circuit (51), a power supply voltage (V5) does not depend on variation of a power supply voltage (Vdd). A voltage (V3?V2) which is generated across a resistor (41) and has a positive temperature coefficient is determined based not on the power supply voltage (Vdd) but on the power supply voltage (V5), and hence the voltage (V3?V2) does not depend on the variation of the power supply voltage (Vdd). As a result, the power supply rejection ratio of the band gap reference voltage circuit is improved.

Abstract: Embodiments of the present invention are directed to provide an internal voltage generator of a semiconductor memory device for generating a predetermined stable level of an internal voltage. The semiconductor memory device includes a control signal generator, an internal voltage generator and an internal voltage compensator. The control signal generator generates a reference signal and a compensating signal which are corresponding to voltage level of the reference signal. The internal voltage generator generates an internal voltage in response to the reference signal. The internal voltage compensator compensates the internal voltage in response to the compensating signal.

Abstract: This disclosure relates to monitoring and controlling a voltage characteristic of a Drain Extended Metal Oxide Semiconductor (DeMOS) transistor.

Abstract: A voltage stabilization circuit of a semiconductor memory apparatus includes an operation speed detecting unit configured to detect an operation speed of the semiconductor memory apparatus to generate a detection signal, and a voltage line controlling unit configured to interconnect a first voltage line and a second voltage line in response to the detection signal.

Abstract: There is provided a semiconductor package configured for externally controlled power management. Instead of integrating voltage regulation on-chip as done conventionally, power regulation is moved externally to the PCB level, providing numerous package advantages including size, simplicity, power efficiency, integration flexibility, and thermal dissipation. In particular, the use of flip-chip package configurations provides ready access to power supply bumps, which also allows the use of a universal receiving PCB and power supply through simple reconfiguring of voltage traces. As a result, flexible power management can be implemented, and portions of semiconductor packages may be managed for performance or thermal considerations, which may be of particular use for applications such as multi-core processors.

Abstract: A combined bandgap generator and temperature sensor for an integrated circuit is disclosed. Embodiments of the invention recognize that bandgap generators typically contain at least one temperature-sensitive element for the purpose of cancelling temperature sensitivity out of the reference voltage the bandgap generator produces. Accordingly, this same temperature-sensitive element is used in accordance with the invention as the means for indicating the temperature of the integrated circuit, without the need to fabricate a temperature sensor separate and apart from the bandgap generator. Specifically, in one embodiment, a voltage across a temperature-sensitive junction from a bandgap generator is assessed in a temperature conversion stage portion of the combined bandgap generator and temperature sensor circuit. Assessment of this voltage can be used to produce a voltage- or current-based output indicative of the temperature of the integrated circuit, which output can be binary or analog in nature.

Abstract: Integrated circuit memory devices include multiple voltage regulators configured to generate respective boosted voltages, which are provided to a memory cell block. A first voltage regulator is configured to increase a well voltage (Vwell) from a first level to an elevated second level during a pull-up time interval when a boosted well voltage level is required within a memory cell block. The increase in the level of the well voltage occurs in response to a transition of a trim signal (Trim) received at an input of the first voltage regulator. A second voltage regulator is also provided. The second voltage regulator is configured to increase a word line voltage (Vwl) from a third level to an elevated fourth level during the pull-up time interval, in response to the transition of the trim signal and in response to the well voltage. A memory cell block is provided, which is configured to receive the well voltage and the word line voltage during the pull-up time interval.

Abstract: An automation technology, autarkic, field device, which is connected via two connecting terminals to an I/O module. The I/O module is embodied as a 4-20 mA/HART I/O module. The I/O module is associated with a controllable energy source via which the field device is supplied with energy. An electrical current measuring unit is provided which ascertains the electrical current supplied by the energy source. In the I/O module, internal resistors are provided, across which occurs in each case a voltage drop dependent on the flowing electrical current. A control unit is provided, which operates the energy source in such a way that a predetermined terminal voltage is supplied on the connecting terminals for powering the field device.

Abstract: A compensation circuit for reducing power consumption in at least one digital circuit includes a first sample circuit connected to a first supply voltage, a second sample circuit connected to a second supply voltage, and a controller connected to the first and second sample circuits. The first and second sample circuits are substantially functionally equivalent to one another but optimized for different regions of operation within a specified range of PVT conditions. The controller is operative to receive respective output signals from the first and second sample circuits, to monitor a functionality of the second sample circuit relative to the first sample circuit, and to adjust a level of the second supply voltage to ensure correct operation of the second sample circuit throughout the specified range of PVT conditions. The digital circuit is operative from the second supply voltage.

Abstract: Provided is an intermediate potential generation circuit with a lower power supply potential. The intermediate potential generation circuit includes: a current mirror circuit including a first transistor and a second transistor each having a source input with a power supply potential; a current source circuit including a third transistor having a drain connected to a drain of the first transistor; a grounded source amplifier circuit including a fourth transistor having a gate input with the intermediate potential, and a drain connected to a drain of the second transistor; a parallel connection circuit including a fifth transistor connected in parallel with the first transistor, and a sixth transistor connected in parallel with the second transistor; and a source follower circuit including a seventh transistor and an eighth transistor having gates that are connected in common to each other, and connected with the drains of the second transistor and the sixth transistor.

Abstract: An integrated circuit die includes a microprocessor and a control circuit to control elements of a voltage regulator to supply power to the microprocessor.

Abstract: A semiconductor apparatus includes a constant voltage circuit that converts an input voltage and outputs a prescribed constant voltage. The constant voltage circuit includes an output transistor that receives an input of a control signal and outputs a current (from an input terminal to an output terminal) in accordance with the control signal. Also included is an error amplifier circuit that controls the output transistor to create a voltage in proportion to an output voltage outputted from the output terminal becomes a prescribed reference level. A direct current power source supplies direct current power to the constant voltage circuit. A voltage creating circuit creates and outputs a voltage higher than that of the direct current power.

Abstract: A device that includes a voltage supply unit and an integrated circuit, the device is characterized by including a voltage sampling circuit adapted to sample voltage levels at multiple sampling points within the integrated circuit, to provide multiple sampled voltages, wherein the multiple sampled voltages reflect the voltage drops; and wherein the voltage supply unit is adapted to adjust a supply voltage provided to the integrated circuit in response to at least one sampled voltage. A method for voltage drop compensation; the method includes providing a supply voltage to an integrated circuit; the method is characterized by sampling voltage levels at multiple sampling points within the integrated circuit, to provide multiple sampled voltages, wherein the multiple sampled voltages reflect the voltage drops; and adjusting a supply voltage provided to the integrated circuit in response to at least one sampled voltage.

Abstract: A semiconductor memory device includes an enable signal generating unit for generating an enable signal in response to an active signal and an internal voltage driving unit driven by the active signal and the enable signal, wherein the internal voltage driving unit drives an internal voltage by comparing the internal voltage and a reference voltage and then generating first and second driving signals, and wherein the enable signal generating unit receives the second driving signal and then determines enablement of the enable signal.

Abstract: A circuit having a substrate, a generator with a field effect transistor (FET) portion and a heterojunction bipolar transistor (HBT) portion integrated in the substrate, a voltage-to-voltage conveyor integrated in the substrate, a bias circuit, and a power amplifier is disclosed.

Abstract: The semiconductor integrated circuit is provided, in which an external temperature control or temperature monitoring is possible, with little influence by the noise of a system board which mounts the semiconductor integrated circuit. The semiconductor integrated circuit includes the temperature detection circuit which detects the chip temperature, and the functional module which flows a large operating current. An external terminal which supplies operating voltage, and an external terminal which supplies ground voltage are coupled to the functional module. The temperature detection circuit generates a temperature detection signal and a reference signal. The reference signal and the temperature detection signal are led out to the exterior of the semiconductor integrated circuit via a first external output terminal and a second external output terminal, respectively, and are supplied to an external temperature control/monitoring circuit which has a circuitry type of a differential amplifier circuit.

Abstract: A current driving circuit includes: a reference input terminal to which a first reference current is given; a current mirror circuit for receiving the first reference current and outputting a first internal current corresponding to the first reference current; a bias voltage generation section for receiving the first internal current and generating a bias voltage corresponding to the first internal current; an output reference current generation section for receiving the bias voltage and generating a second reference current corresponding to the bias voltage; a reference current output terminal for outputting the second reference current; an internal current generation transistor for receiving at a gate thereof the bias voltage and generating a second internal current corresponding to the bias voltage; and an output current generation section for receiving the second internal current and generating n output currents corresponding to the second internal current.

Abstract: In an embodiment, a circuit includes a regulated power supply terminal, a processing circuit coupled to the regulated power supply terminal, and a low frequency responsive circuit having a first transistor adapted to be coupled to a power source and having first circuitry configured to control current flow from the power source through the first transistor to supply a low frequency current to the regulated power supply terminal. The circuit device further includes a high frequency responsive circuit having a second transistor coupled to the regulated power supply terminal and having second circuitry configured to control the second transistor to selectively modulate high frequency current components at the regulated power supply terminal to reduce voltage variations on the regulated power supply.

Abstract: A system and circuit for virtual power grid is disclosed. In one embodiment, a switch system for a virtual power grid includes a first transistor for connecting a power supply to a node of a virtual power grid for an isolated region of circuitry via the first transistor upon a receipt of a first control signal to turn on the first transistor. The switch system further includes a second transistor for connecting the power supply to the isolated region of circuitry via the second transistor upon a receipt of a second control signal to turn on the second transistor. In addition, the switch system includes a self-timed enable module for generating and forwarding the second control signal when a voltage level at the node of the virtual power grid which is charged by the power supply via the first transistor reaches a threshold voltage.

Abstract: A method and a device for supplying power to one or more microelectronic chips. The method comprises the steps of reading a process characteristic parameter associated with the chip from a non-volatile storage, wherein the process characteristic parameter represents a manufacturing process characteristics of the chip; determining a minimal voltage (VDD_min) based on the parameter; and supplying electric power to the chip (10) with the minimal voltage (VDD_min). The device includes a hardware portion, and a firmware portion wherein the firmware portion includes a unit for determining a minimal voltage (VDD_min) based on a process characteristic parameter of the one or more chips.

Abstract: An integrated circuit 2 includes logic circuitry 4 connected to virtual power rails 6, 8. These virtual power rails are connected via power control transistors 10, 16 to a power supply 14. A power controller 20 produces control signals which determines a number of the power control transistors 10, 16 which are in a conductive state and accordingly controls the virtual power rails to have an intermediate voltage level. The intermediate voltage level may be selected to hold the logic circuitry in a retention mode in which state is retained in the logic circuitry 4, but processing operations are not performed. When the functional mode is re-entered, all of the header and footer transistors 10, 16 may be switched to the conductive state.

Abstract: An internal power generating system for a semiconductor device is disclosed. The device may include a plurality of channels. The system comprises a reference voltage generator configured to generate a reference voltage. The system further comprises a plurality of internal power generators that are allocated to the plurality of channels in one-to-one correspondence and that are configured to commonly use the reference voltage generated by the reference voltage generator. Each internal power generator may be configured to receive a fed back internal power voltage, to compare the fed back internal power voltage to the reference voltage, and to generate an internal power voltage based on the comparison. The system further comprises a plurality of channel state detectors that are allocated to the plurality of channels in one-to-one correspondence, and that are configured to respectively detect operation states of the plurality of channels based on separate respective sets of command signals for each channel.

Abstract: To provide an inverter including first and second transistors connected in series between first and second power supply lines, a source transistor that is provided between the first power supply line and the first transistor and is conductive based on a control signal, and a load transistor that serves as a load circuit provided between the second power supply line and the second transistor. According to the present invention, because a difference between a load between the first power supply line and the first transistor and a load between the second power supply line and the second transistor is reduced, a difference between a signal propagation rate at which an input signal supplied to the inverter changes from a low level to a high level and a signal propagation rate at which the input signal changes from the high level to the low level is reduced.

Abstract: A voltage stabilizer circuit for alternately or simultaneously stabilizing first and second generated voltages includes shared capacitor connected between the first and second generated voltages. The voltage stabilizer circuit may further include first and second switches for alternately connecting the first and second electrode of the shared capacitor to a ground. The alternation of the stabilized first and second voltages output by the voltage stabilizer circuit can be synchronized with a pixel polarity inversion mode signal output by the internal driver circuit of an LCD display.

Abstract: A voltage generation system that can dynamically calibrate a time period for enabling the system includes: a voltage generation circuit, for providing an output voltage; an oscillator, coupled to the voltage generation circuit, for driving the voltage generation circuit to generate the output voltage at a specific frequency according to an enable signal; a limiter, coupled to the oscillator and the output voltage fed back from the voltage generation circuit, for generating the enable signal to the oscillator according to the output voltage; and an enable controller, coupled to the limiter, the oscillator, the voltage generation circuit and the enable signal generated by the limiter, for enabling the limiter, the oscillator and the voltage generation circuit according to an estimated time between enable signals, wherein the estimated time is dynamically calibrated.

Abstract: A method of switching a low dropout regulator includes determining an actual active time of a power request from an electronic device; enabling the low dropout regulator in response to said power request at a time corresponding to a start of the actual active time of the power request for an active enabled time having a duration at least the same as the actual active time and long enough to sufficiently settle the output voltage of the low dropout regulator; and disabling the low dropout regulator. In embodiments, the active enabled time is prolonged beyond the actual active time of the power request for all or at least some power requests. An electronic device includes circuits for controlling the switching of a low dropout in the described manner.

Abstract: A test apparatus that tests a device under test, comprising a signal input section that supplies a test signal to a device under test and a judging section that judges acceptability of the device under test based on a response signal output by the device under test in response to the test signal. The signal input section includes an operation circuit that operates to generate the test signal and a power supply stabilizing circuit provided in the same chip to stabilize power supply voltage supplied to the operation circuit. The power supply stabilizing circuit includes a high-speed compensating section compensating for a change in the power supply voltage supplied to the operation circuit, at a predetermined compensation speed, and a low-speed compensating section compensating for the change in the power supply voltage supplied to the operation circuit, at a predetermined compensation speed lower than that of the high-speed compensating section.

Abstract: A semiconductor device includes: a power supply voltage generating circuit generating a power supply voltage corresponding to delay information; and an integrated circuit to which the power supply voltage is supplied from the power supply voltage generating circuit, wherein the integrated circuit includes at least one delay information monitor monitoring delay information at the time of operation when the power supply voltage is supplied from the power supply voltage generating circuit and a delay information manager managing delay information acquired by the delay information monitor, the power supply voltage generating circuit includes a delay information register which can hold delay information relating to delay information by the delay information monitor and a voltage control circuit generating the power supply voltage corresponding to delay information stored in the delay information register and supplies the voltage to the integrated circuit.

Abstract: High-accuracy overcurrent detection is performed, while a loss resulting from the current detection is significantly reduced. A switch section outputs the voltage between the both terminals of a current detection resistor using an AND signal between an output signal from a hysteresis comparator and an output signal from a pre-driver. The voltage is filtered by an electrostatic capacitor element and a resistor, and inputted to a comparator. The comparator makes a comparison between the signals inputted to the two input terminals thereof, and outputs the result of the comparison to a digital filter. When an overcurrent begins to flow in a power supply unit, the levels of the voltages inputted to the two input terminals of the comparator are inverted so that the comparator outputs an inversion signal to the digital filter. The digital filter outputs a detection signal to an overcurrent detection circuit when an arbitrary time has elapsed.

Abstract: An electronic circuit may comprise an input stage powered by a supply voltage and configured to receive a reference signal. The circuit may further comprise an output stage powered by the supply voltage and coupled to the input stage, and configured to generate an error signal based on: the reference signal, and a feedback signal based on an output signal. The circuit may also include a pass transistor powered by the supply voltage and configured to generate the output signal based on the error signal. A capacitor coupled between the supply voltage and the output stage may increase the current flowing in the output stage, resulting in the output stage conducting current even during a rising edge of the supply voltage, preventing the output signal from reaching the level of the supply voltage during the rising edge of the supply voltage.

Abstract: A circuit adapting pin output levels to a reference level in which a digital comparator compares an output voltage from an output pin of a device to a reference voltage level. The comparator, relying on the polarity of the comparator output as well as the registered polarity of the comparator output on the previous clock cycle, signals a state machine, which sends a clocked signal to a sense circuit and voltage regulator. The sense circuit may modify a resistance in a switched resistor network, such that the output level is incrementally stepped at clocked intervals towards the reference voltage until the polarity of the error signal reverses. When the output voltage crosses the reference voltage threshold, the comparator flips states and continues to regulate output pin voltage to the reference voltage level.

Abstract: A light-emitting device driving circuit capable of reliably performing emission control on a light-emitting device of a low emission threshold (about 10 mA or less) and capable of correcting a distortion due to the Early effect of a transistor in the drive current supplied to the light emitting device. The light limiting device driving circuit includes a current control unit (101) which controls the value of a main current based on a control voltage, a bias current source (CC1) for subtracting a bias current from the main current, and a switching unit (103) which controls emission of light from the light-emitting device by switching, based on the drive signal, a current obtained by subtracting the bias current from the main current or a current based on the current obtained by the subtraction.

Abstract: Disclosed is a bias circuit with a first resistor connected between the supply voltage and a feedback node. Resistors are connected in series between the feedback node and the reference supply voltage. The connections between the resistors define at least one bias voltage. A second resistor is connected between the feedback node and a first drain node. A first field-effect transistor has a first gate node, the first drain node, and a first source node. The gate node is connected to the first supply voltage. A second field-effect transistor has a second gate node, a second drain node, and a second source node. The second drain node is connected to the first source node. The second gate node is connected to the bias voltage. The second source node is connected to an output signal node. The output signal node capable of experiencing an overshoot voltage.

Abstract: In order to prevent interference of signals in a plurality of outputs from a current mirror circuit, the current mirror circuit comprises a current mirror input transistor Q1 through which a constant current flows and a plurality of current mirror output transistors Q7 and Q8 which have control ends commonly connected to a control end of the current mirror input transistor Q1. The constant current is supplied from the plurality of current mirror output transistors Q7 and Q8 to a plurality of operating circuits. Further, at least one of the plurality of current mirror output transistors Q7 and Q8 is equipped with a low pass filter for removing a high-frequency component contained in a current output from the at least one of the plurality of current mirror output transistors Q7 and Q8.

Abstract: A boosted voltage generator for increasing boosting efficiency according to the amount of load and display apparatus including the same are provided. The boosted voltage generator includes an input voltage generator configured to generate a first input voltage or a second input voltage based on a reference voltage, compare the reference voltage with a feedback boosted voltage fed back based on the amount of load at an output terminal, and output a comparison result; and a booster configured to boost the first or second input voltage using at least one external capacitor based on the comparison result and output a boosting result as a boosted voltage to the output terminal. The boosted voltage generator and the display apparatus including the same can increase the boosting efficiency according to the amount of load.

Abstract: A semiconductor packaging system has a packaging substrate into which inductors and/or capacitors are partially or completely embedded. An active portion of a voltage regulator is mounted on the packaging substrate and supplies regulated voltage to a die also mounted on the packaging substrate. Alternatively, the active portion of the voltage regulator is integrated into the die the voltage regulator supplies voltage to. The voltage regulator cooperates with the inductors and/or capacitors to supply voltage to the die. The inductors may be through vias in the packaging substrate. For additional inductance, through vias in a printed circuit board on which the packaging substrate is mounted may couple to the through vias in the packaging substrate.

Abstract: The present invention is a semiconductor device including: a resistor R11 (first resistor part) and an FET 15 (second resistor part) connected in series between a power supply Vcc (first power supply) and ground (second power supply); an output node N11 provided between the resistor R11 and FET 15 and used for outputting a reference voltage; a feedback node N12 provided between the power supply Vcc and the ground; and a voltage control circuit (19) that maintains a voltage of the feedback node N12 at a constant level by using the reference voltage of the output node N11 and the voltage of the feedback node N12. The present invention can provide a semiconductor device having a reference voltage generating circuit capable of generating the reference voltage that does not greatly depend on a power supply voltage and its control method.