Having Current Mirror Amplifier Patents (Class 330/257)
  • Publication number: 20130069724
    Abstract: A supply-independent biasing source includes an upper current mirror including first and second PMOS transistors and a lower current mirror coupled to the upper current mirror including first and second NMOS transistors. The first NMOS and first PMOS transistors have drain terminals coupled together and form a first stack of transistors and the second NMOS and second PMOS transistors have drain terminals coupled together and form a second stack of transistors. A first resistive load is connected to one of the first and second stacks, wherein the resistive load comprises a first MOSFET transistor biased at triode region.
    Type: Application
    Filed: September 20, 2011
    Publication date: March 21, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Yuwen Swei
  • Patent number: 8400219
    Abstract: Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.
    Type: Grant
    Filed: March 24, 2011
    Date of Patent: March 19, 2013
    Assignee: Suvolta, Inc.
    Inventors: Lawrence T. Clark, Scott E. Thompson
  • Patent number: 8400218
    Abstract: A current mode power amplifier includes a current steering stage configured to steer a scaled current based on differential voltage inputs, a filtered current mirror connected to the current steering stage to receive the scaled current and produce a filtered output current, and a resonant load configured to receive the output current and generate an output voltage signal for transmission.
    Type: Grant
    Filed: November 15, 2010
    Date of Patent: March 19, 2013
    Assignee: QUALCOMM, Incorporated
    Inventors: Cheol-Woong Lee, Sunghyun Park, Jonghoon Choi
  • Patent number: 8390379
    Abstract: Various apparatuses, methods and systems for boosting an amplifier slew rate are disclosed herein. For example, some embodiments of the present invention provide an apparatus including a pair of inputs connected to a pair of differential input devices in an amplifier, a current source, a first current path connected to the current source, a second current path connected to the current source and to the pair of differential input devices, a switch in the first current path, and a voltage difference signal connected between the pair of inputs and the switch. The voltage difference signal represents the voltage difference between the pair of inputs. The conductance of the switch is inversely proportional to the voltage difference signal.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: March 5, 2013
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Martijn Fridus Snoeij, Margarita Alenina
  • Publication number: 20130043877
    Abstract: An operational amplifier with different power supply voltages includes an input stage and an output stage. The input stage includes a current source for providing a bias current, and a differential input circuit for receiving the bias current and differential input voltage signals, and converting the differential input voltage signal to differential input currents. The input stage is supplied by a first power supply voltage. The output stage includes a load circuit coupled to the differential input voltage signal and for receiving the differential input currents, and outputting a single ended output voltage signal. The output stage is supplied by a second power supply voltage. The second power supply voltage is lower than the first power supply voltage.
    Type: Application
    Filed: September 6, 2011
    Publication date: February 21, 2013
    Inventor: Xiaohu TANG
  • Publication number: 20130043949
    Abstract: In one embodiment, two transistors are coupled in a current mirror configuration to form a delta voltage, and an amplifier is configured to control a first current carrying electrode of each of the first and second transistors at a substantially constant voltage.
    Type: Application
    Filed: August 17, 2011
    Publication date: February 21, 2013
    Inventor: Pierre Andre Genest
  • Patent number: 8378747
    Abstract: A differential amplifier circuit includes a differential input stage comprising first and second transistors whose sources are connected with each other, a constant current source connected between the sources of the first and second transistors and a ground, a current mirror circuit comprising third and fourth transistors whose sources are connected with a power supply source, a fifth transistor of a same conductive type as that of the first transistor, connected at a drain to a drain of the third transistor, connected at a source to a drain of the first transistor and connected at a gate to a reference voltage source; and a sixth transistor of a same conductive type as that of the second transistor, connected at a drain to a drain of the fourth transistor, connected at a source to a drain of the second transistor, and connected at a gate to the reference voltage source.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: February 19, 2013
    Assignee: Ricoh Company, Ltd.
    Inventor: Katsuhiko Aisu
  • Patent number: 8378746
    Abstract: A voltage-mode line driving circuit is provided. The voltage-mode line driving circuit includes a driving circuit, the driving circuit receiving, as an input signal, a feedback signal, and outputting an output signal. The voltage-mode line driving signal also includes an adaptive tuning circuit coupled to the driving circuit, the adaptive tuning circuit receiving as input signals the feedback signal and the output signal and adaptively outputting a modifying signal to the driving circuit which modifies the feedback signal.
    Type: Grant
    Filed: July 11, 2008
    Date of Patent: February 19, 2013
    Assignee: Integrated Device Technology, inc
    Inventors: Xuexin Ding, Zhongyuan Chang
  • Publication number: 20130038394
    Abstract: The present invention relates to an operational amplifier comprising an input-stage circuit, a floating current mirror circuit, and an output-stage circuit. The input-stage circuit receives an input signal and produces a control signal. The floating current mirror circuit is coupled to the input-stage circuit, and produces a mirror current according to the control signal. The output-stage circuit is coupled to the floating current mirror circuit, and produces a driving signal according to the mirror current. When the operational amplifier is operating in the static mode, the output-stage circuit further produces a static current according to the mirror current. Thereby, by using the floating current mirror circuit, the purpose of low power consumption can be achieved while driving to the high-voltage mode or to the low-voltage mode.
    Type: Application
    Filed: August 6, 2012
    Publication date: February 14, 2013
    Applicant: SITRONIX TECHNOLOGY CORP.
    Inventor: PING LIN LIU
  • Publication number: 20130033323
    Abstract: An electronic system comprises a resistive sensor structure and an electronic circuit portion whose design is selected such that different resistive sensor structures may be combined within the same electronic circuit. To this end, the resistive sensor structure is used as a voltage/current converter that provides input currents to a current amplifier, which in turn provides an amplified output voltage on the basis of a difference of the input currents. The operating range of the current amplifier is adjusted on the basis of a programmable current source irrespective of the configuration of the resistive sensor structure.
    Type: Application
    Filed: August 1, 2012
    Publication date: February 7, 2013
    Applicant: STMicroelectronics S.r.l
    Inventor: Antonino Scuderi
  • Patent number: 8363045
    Abstract: In a class AB amplifier circuit, an input stage circuit includes a first differential pair configured to receive a differential signal and a first current mirror circuit connected with the first differential pair through a first node. A middle stage circuit includes a floating constant current source connected with the first node, a first transistor whose gate is applied with a bias voltage, and a first constant current source connected with the first node through the first transistor. A last stage circuit includes a first output stage transistor whose gate is connected with the first node and which controls a voltage of an output terminal. A first phase compensation capacitance has one end connected with a first connection node between the first constant current source and the first transistor and the other end connected with the output terminal.
    Type: Grant
    Filed: August 3, 2009
    Date of Patent: January 29, 2013
    Assignee: Renesas Electronics Corporation
    Inventor: Atsushi Shimatani
  • Publication number: 20130021101
    Abstract: A differential amplifier having a rail-to-rail input voltage range, includes a first differential input stage, which is connected to a first supply voltage rail via a first power source and a second complementary differential input stage, which is connected to the second supply voltage rail via a second power source. To this end, switching device are provided, which deactivate the first differential input stage and activate the second differential input stage when the voltage value of the input voltage signal exceeds a predetermined first voltage threshold in the event of rising input voltage, and which deactivate the second differential input stage and activate the first differential input sage when the voltage value of the input voltage signal falls below a predetermined second voltage threshold in the event of falling input voltage. A constant input slope can thus be achieved, having a high phase reserve, which makes the device particularly applicable in the field of biosensory technology.
    Type: Application
    Filed: March 25, 2011
    Publication date: January 24, 2013
    Inventor: Alexander Frey
  • Publication number: 20130002355
    Abstract: According to one embodiment, a differential amplifier includes a differential circuit, an output circuit, and a clipper circuit. The differential circuit generates a pair of differential currents in accordance with a difference in potential between a pair of input signals. The output circuit receives the pair of differential currents and generates an output voltage in accordance with the current difference. The clipper circuit suppresses the output voltage within a range to be able to convert to a low level or to a high level being higher than the low level.
    Type: Application
    Filed: March 15, 2012
    Publication date: January 3, 2013
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shuuji TODA, Mamoru MIWA
  • Patent number: 8339197
    Abstract: Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.
    Type: Grant
    Filed: December 2, 2010
    Date of Patent: December 25, 2012
    Assignee: National Semiconductor Corporation
    Inventors: Kwok-Fu Chiu, Yih-Chyi Chong, Michael E. Haslam
  • Patent number: 8339200
    Abstract: An apparatus includes a telescopic operational amplifier. The telescopic operational amplifier includes an input stage, a load, and a first cascode circuit. The first cascode circuit is coupled to a first differential node and an output node. The first differential node is coupled to one of the input stage and the load. The apparatus includes a first negative transconductance circuit coupled to the first differential node. In at least one embodiment, the first negative transconductance circuit is operable to provide a negative transconductance to compensate at least a first component of an output resistance of the telescopic operational amplifier. In at least one embodiment, the first negative transconductance circuit includes a pair of cross-coupled devices coupled to the first differential node and a current source.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: December 25, 2012
    Assignee: ATI Technologies ULC
    Inventor: Thomas Y. Wong
  • Patent number: 8330500
    Abstract: A comparator comprises a current mirror, a differential input pair, and a auxiliary circuit. The current mirror has a biasing end coupled to a power voltage, a first end, and a current outputting end coupled to an output node of the comparator. The differential input pair has a first and second input ends for respectively receiving a first voltage and a second voltage, a second and third ends, and a ground end, wherein the third end is coupled to the first end. The auxiliary circuit is coupled between the output node and the second end, and provides a minimum voltage of a comparison result output at the output node. The comparison result is the power voltage when the first voltage is larger than the second voltage, and the comparison result is the minimum voltage when the first voltage is less than the second voltage.
    Type: Grant
    Filed: November 25, 2010
    Date of Patent: December 11, 2012
    Assignee: Elite Semiconductor Memory Technology Inc.
    Inventor: Yi-Heng Liu
  • Patent number: 8319553
    Abstract: Apparatus and methods for biasing amplifiers are provided. In certain implementations, a bias circuit is provided for controlling the drain-source voltage of input transistors electrically connected to the inputs of a transconductance amplification circuit. For example, the bias circuit can maintain a relatively constant drain-source voltage in the input transistors by using a feedback loop that includes a feedback amplifier for adjusting the bias current of the input transistors based upon a difference between the drain and source voltages of the input transistors. In certain implementations, the feedback amplifier has an offset voltage equal to about the desired value of the drain-source voltage, and the feedback amplifier is configured to adjust the bias current until the difference between the inputs of the feedback amplifier is equal to about the offset voltage.
    Type: Grant
    Filed: August 2, 2011
    Date of Patent: November 27, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Evgueni Ivanov
  • Patent number: 8319552
    Abstract: An amplifier having an imbalance between pull-up and pull-down sections may include a counterpart section to balance the output sections and/or enable them to be driven by balanced drive signals. In one embodiment, a rail-to-rail output stage may include a current minor to drive one side of the circuit. The other side may be driven by a transistor having a counterpart transistor to balance the circuit. A drive section may include a balance point to facilitate balancing the drive signals.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: November 27, 2012
    Assignee: Analog Devices, Inc.
    Inventor: Barrie Gilbert
  • Publication number: 20120293260
    Abstract: A low-offset current-sense amplifier and an operating method thereof are disclosed. The low-offset current-sense amplifier includes a sense amplifier, a first current supply unit, a second current supply unit, and a processing unit. The first current supply unit is coupled to the sense amplifier, and includes a first transistor group and a first current output terminal. The second current supply unit is coupled to the sense amplifier, and includes a second transistor group and a second current output terminal. The processing unit controls the on/off of some transistors of the first transistor group and the second transistor group according to electric currents output from the first current output terminal and the second current output terminal, respectively.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Applicant: NATIONAL TSING HUA UNIVERSITY
    Inventors: Meng-Fan Chang, Yu-Fan Lin, Shin-Jang Shen, Yu-Der Chih
  • Patent number: 8310306
    Abstract: An operational amplifier includes a first amplifier to which an input signal is applied, and a second amplifier to which an output of the first amplifier is applied, wherein the second amplifier includes a first transistor including a gate to which the output of the first amplifier is applied, and a second transistor including a gate to which the output of the first amplifier is applied, and a drain coupled to a source of the first transistor.
    Type: Grant
    Filed: June 8, 2010
    Date of Patent: November 13, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shogo Itoh, Hisao Suzuki
  • Patent number: 8311785
    Abstract: Methods and apparatus to minimize saturation in a ground fault detection device are disclosed. An example method includes connecting a capacitor simulator to a node of the ground fault detector device to prevent saturation, and monitoring power-line conductors for ground fault conditions with the ground fault detector device. An example apparatus to simulate a saturation capacitance in a ground fault device includes a sense coil induced by power-line conductors, and at least one of an amplifier or a current detector including an input connected to the sense coil and an output connected to a ground fault detector. The example apparatus also includes a saturation capacitor simulator connected to a node of at least one of the amplifier or the current detector to prevent saturation.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: November 13, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Artur J. Lewinski, Ross Teggatz, Thomas Edward Cosby
  • Patent number: 8305144
    Abstract: A power amplifier provides relatively stable quiescent current while maintaining relatively high signal gains and peak to quiescent current ratios. The power amplifier has an input stage and a current mirror stage and incorporates a control transistor between these stages. The control transistor transitions to the triode mode for small inputs and offset voltages thereby reducing the amplifier circuit's gain. However, the control transistor transitions from the triode region to saturation as the input signal becomes larger thereby allowing the amplifier circuit to maintain a relatively high gain for large inputs. Accordingly, better quiescent current characteristics can be obtained without significantly sacrificing performance.
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: November 6, 2012
    Assignee: ADTRAN, Inc.
    Inventors: Paul Ferguson, Daniel M. Joffe
  • Patent number: 8299854
    Abstract: A circuit for power amplification of an input signal includes an input stage and an output stage, the said input stage including: a drive means incorporating a so-called main drive transistor, and a first so-called main input transistor able to receive the input signal, and mounted as a current mirror with the main drive transistor The first main input transistor is coupled to the output stage via a second so-called main input transistor incorporated into the input stage and controlled by the drive means, the first and second main input transistors being coupled together and with the earth according to a structure of Darlington type by way of a resonant circuit
    Type: Grant
    Filed: November 9, 2010
    Date of Patent: October 30, 2012
    Assignee: Thales
    Inventors: Vincent Frédéric François Petit, Bruno Louis, Rémi Luc Pierre Corbiere
  • Patent number: 8289302
    Abstract: An output buffer circuit with enhanced slew rate is disclosed. A first and a second slew-rate enhancing transistor are configured to enhance the slew rate of the source transistor and the sink transistor of an output stage. A first control circuit and a second control circuit turn off the first and the second slew-rate enhancing transistors during the static state, and turn on the first and the second slew-rate enhancing transistors during the transition.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: October 16, 2012
    Assignees: Himax Technologies Limited, National Taiwan University
    Inventors: Yi-Jan Emry Chen, Pang-Jung Liu, Jyun-Ping Jiang, Tsung-Yu Wu
  • Patent number: 8289078
    Abstract: An electronic device has a manipulation part which outputs a control signal including a first analog signal and a second analog signal obtained by inverting a phase of the first analog signal; and a display part which includes a semiconductor integrated circuit supplied at an input terminal thereof with the control signal to output a signal depending upon the control signal from an output terminal thereof, and which displays a predetermined image based on the signal output from the semiconductor integrated circuit.
    Type: Grant
    Filed: January 20, 2010
    Date of Patent: October 16, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Ryota Terauchi
  • Publication number: 20120242409
    Abstract: Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.
    Type: Application
    Filed: March 24, 2011
    Publication date: September 27, 2012
    Inventors: Lawrence T. Clark, Scott E. Thompson
  • Patent number: 8258868
    Abstract: Differential input pairs have been used in analog electronics with both CMOS and bipolar transistors for many years. Conventional designs for differential input pairs, though, may not be suitable for emerging technology transistors, such as graphene transistors, carbon nanotube (CNT) transistors, or other ambipolar transistors. Here, a differential input pair has been provided that uses ambipolar transistors, which accounts for the more unusual I-V (drain current to gate-source voltage) characteristics of ambipolar transistors.
    Type: Grant
    Filed: November 10, 2010
    Date of Patent: September 4, 2012
    Assignee: Texas Instruments Incorporated
    Inventor: Andrew Marshall
  • Publication number: 20120206203
    Abstract: An apparatus comprises an amplifier circuit and a detection circuit. The amplifier circuit includes a high voltage supply rail, a low voltage supply rail, and an output stage. The detection circuit is electrically coupled to the amplifier output stage and generates an indication when the output voltage at the output stage exceeds a specified output voltage threshold value. The amplifier circuit further includes a bias circuit configured to bias the amplifier circuit with a first bias current value when the output voltage is less than the specified output voltage threshold value, and bias the amplifier circuit with a second bias current value when the output voltage exceeds the specified output voltage threshold value.
    Type: Application
    Filed: February 16, 2011
    Publication date: August 16, 2012
    Inventor: Carmine Cozzolino
  • Patent number: 8242842
    Abstract: A circuit provides a first current corresponding to the differential input Inn and Inp, and a second current corresponding to the common mode input Vcm. The circuit then mirrors the differential current and the common mode current to a third current and a fourth current. Based on the difference between the mirrored differential current and the mirrored common mode current, the circuit pulls up or pulls down these currents to balance the corresponding difference between the differential input and the common mode input. In effect, the circuit adjusts the input common mode voltage to a desired level, without providing an opportunity for it to rise to an unwanted level.
    Type: Grant
    Filed: February 1, 2012
    Date of Patent: August 14, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Lin, Yung-Chow Peng
  • Publication number: 20120200358
    Abstract: A comparator includes: a wide-swing operation transconductance amplifier (OTA), having first and second differential input pairs for receiving first and second differential input signals respectively, the wide-swing OTA generating first and second intermediate output voltages in comparing the first with the second differential input signals; a current switch group; a current mirror group, wherein when an input common mode voltage of the first and the second differential input signal tends to one of a first and a second reference voltage, one of the first and the second differential input pair is turned off, and the current switch group and the current mirror group compensate a current flowing through the other of the first and the second differential input pair; and a decision circuit coupled to the wide-swing OTA, for enlarging a voltage difference between the first and the second intermediate output voltage to output a voltage comparison output signal.
    Type: Application
    Filed: January 20, 2012
    Publication date: August 9, 2012
    Applicant: RAYDIUM SEMICONDUCTOR CORPORATION
    Inventors: Yu Kuang, Shih-Tzung Chou
  • Patent number: 8232832
    Abstract: A voltage adder circuit includes an amplifier circuit having a first operational amplifier and into which a first voltage is input, a circuit that supplies an output current to the amplifier circuit, and a current providing section that detects the output current of the circuit and supplies an output current equal to the output current of the circuit in magnitude so that the output current of the circuit is prevented from inputting to or outputting from the first operational amplifier through an output terminal of the first operational amplifier. A second voltage is input into the circuit.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: July 31, 2012
    Assignee: Yamaha Corporation
    Inventors: Nobuaki Tsuji, Toshio Maejima
  • Publication number: 20120188015
    Abstract: An amplifier includes an output stage circuit, a current source, a PMOS input pair, an NMOS input pair and a current transferring circuit. The output stage circuit is electrically coupled to a supply voltage and a ground voltage. The current source has a node to provide a current. The PMOS input pair is coupled to the node and the ground voltage and controlled by an input voltage. The NMOS input pair coupled to the supply voltage is controlled by the input voltage. The current transferring circuit is coupled to the node and the NMOS input pair. When the input voltage is less than a specific value, the current flows into the PMOS input pair through the node. When the input voltage is larger than or equal to the specific value, the current flows into the NMOS input pair through the node and the current transferring circuit.
    Type: Application
    Filed: December 6, 2011
    Publication date: July 26, 2012
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Ju-Lin HUANG, Keko-Chun Liang, Po-Yu Tseng
  • Patent number: 8217721
    Abstract: A slew rate enhancing circuit is disclosed. A current mirror circuit generates a mirrored current according to a current source, and the mirrored current is adaptively provided for an amplifier. A switch circuit is electrically coupled with the current source and the current mirror circuit. The switch circuit includes a first branch and a second branch that are coupled in parallel, wherein passage of the first branch and passage of the second branch are respectively controlled by a first switch and a second switch according to the non-inverting input voltage and the inverting input voltage.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: July 10, 2012
    Assignee: Himax Technologies Limited
    Inventor: Zong-Fu Hsieh
  • Publication number: 20120169422
    Abstract: An amplifier with a non-linear current mirror comprises an amplification stage having an input terminal for an input signal as well as an output stage coupled to the amplification stage by a current mirror stage. The current mirror stage comprises at least one mirror transistor coupled to the amplification stage and at least one output transistor coupled to the output stage. The amplifier comprises two variable resistive elements, each of them connected in series to one of the mirror transistor and the output transistor. A tuning stage is adapted to tune the variable resistive elements in response to the input signal.
    Type: Application
    Filed: January 4, 2012
    Publication date: July 5, 2012
    Applicant: austriamicrosystems AG
    Inventor: Carlo FIOCCHI
  • Publication number: 20120169421
    Abstract: An amplifying circuit includes a first circuit component configured to receive and amplify first and second input voltages to generate an output voltage. The first circuit component is formed by a first amplifier and a second amplifier. A second circuit component is configured to provide a first offset current that is associated with a first input current of the first amplifier. The first offset current compensates for variation in the first input current. A third circuit component is configured to provide a second offset current that is associated with a second input current of the second amplifier. The second offset current compensates for variation in the second input current.
    Type: Application
    Filed: December 7, 2011
    Publication date: July 5, 2012
    Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.
    Inventors: GuoHua ZHONG, XiangSheng LI
  • Publication number: 20120161872
    Abstract: A comparator includes: a pre-amplification module, configured to generate two amplified differential signal reference currents according to an input voltage and a reference voltage; and a differential signal obtaining module, configured to obtain a differential signal according to the two amplified differential signal reference currents. The pre-amplification module includes a differential unit, an offset unit, and an amplification unit, where the differential unit is configured to generate two direct current bias currents according to the input voltage and the reference voltage; the offset unit is configured to generate an offset current of the two direct current bias currents according to the input voltage and the reference voltage, so as to reduce magnitude of the two direct current bias currents and obtain two differential signal reference currents; the amplification unit is configured to receive the two differential signal reference currents, and amplify the two differential signal reference currents.
    Type: Application
    Filed: December 27, 2011
    Publication date: June 28, 2012
    Applicant: Huawei Admintration Building
    Inventors: Shifu Pang, Ding Li
  • Patent number: 8207789
    Abstract: Provided is a differential amplifier circuit with a small circuit size. When a differential voltage (Vinp?Vinn) is higher than a predetermined voltage, a PMOS transistor (4) is turned ON. At this time, a current source (12) is connected in parallel to a current source (11), and the current source (12) supplies a drive current to a differential amplifier circuit (10). In other words, the current sources (11 and 12), rather than only the current source (11), supply a total current (I11+I12) to the differential amplifier circuit (10) as the drive current. Accordingly, a slew rate of an output voltage (Vout) is increased. Two PMOS transistors and the current source (12) are simply required for controlling the slew rate of the output voltage (Vout), and hence the differential amplifier circuit (10) is small in circuit size.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: June 26, 2012
    Assignee: Seiko Instruments Inc.
    Inventor: Toshiyuki Tsuzaki
  • Publication number: 20120146726
    Abstract: A transconductance amplifier mirror circuit is connected to an electrode for sensing the capacitance of the electrode with reference to ground, or the capacitance between the electrode and another electrode. A voltage level change is produced on the electrode connected to the transconductance amplifier mirror circuit to cause the transconductance amplifier mirror circuit to supply charges to or drain charges from a charge calculation circuit. The charge amount variation is converted to a signal for calculating the sensed capacitance.
    Type: Application
    Filed: December 9, 2011
    Publication date: June 14, 2012
    Applicant: Elan Microelectronics Corporation
    Inventors: Chun-Chung HUANG, I-Shu Lee, Shih-Yuan Hsu, Te-Sheng Chiu
  • Publication number: 20120139634
    Abstract: Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.
    Type: Application
    Filed: December 2, 2010
    Publication date: June 7, 2012
    Inventors: Kwok-Fu Chiu, Yih-Chyi Chong, Michael E. Haslam
  • Patent number: 8195104
    Abstract: The disclosure relates to an electronic differential amplification device integrated on a semiconductor chip. The device may include first and second transistors having respective source terminals connected to a first potential, and drain terminals to receive a first differential current signal. The device may include third and fourth transistors having respective source terminals connected to the first potential, and drain terminals to provide a second differential current signal to a load obtained by amplifying the first signal. The third and fourth transistors may have a respective gate terminal connected to the drain terminal of the first and the second transistors, respectively, in order to form current mirrors with the latter.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: June 5, 2012
    Assignee: STMicroelectronics S.R.L.
    Inventors: Ranieri Guerra, Giuseppe Palmisano
  • Publication number: 20120133688
    Abstract: An operational amplifier circuit includes: a first differential amplifier section containing a P-type differential pair of P-type transistors; a second differential amplifier section containing an N-type differential pair of N-type transistors; an intermediate stage connected with outputs of the first and second differential amplifier sections and containing a first current mirror circuit of P-type transistors, and a second current mirror circuit of N-type transistors; and an output stage configured to amplify an output of the intermediate stage in power. The first differential amplifier section includes a first current source and a first capacitance between sources of the P-type transistors of the P-type differential pair and a positive side power supply voltage. The second differential amplifier section includes a second current source and a second capacitance between sources of the N-type transistors of the N-type differential pair and a negative side power supply voltage.
    Type: Application
    Filed: November 28, 2011
    Publication date: May 31, 2012
    Inventor: Kenji SHIMOMAKI
  • Publication number: 20120133438
    Abstract: A differential amplifier has an interpolating function and has: first and second differential pairs including transistors of a first conductivity type; third and fourth differential pairs including transistors of a second conductivity type; first and second current sources providing operating currents to the first and second differential pairs; third and fourth current sources providing operating currents to the third and fourth differential pairs; a first control circuit which controls, in a first operating range where the amounts of currents flowing through the first and second differential pairs become smaller, respectively, a changing point at which the operating current of the first differential pair changes; and a second control circuit which controls, in a second operating range where the amounts of currents flowing through the third and fourth differential pairs become smaller, respectively, a changing point at which the operating current of the fourth differential pair changes.
    Type: Application
    Filed: November 16, 2011
    Publication date: May 31, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Hiroshi TSUCHI, Sensuke KIMURA
  • Patent number: 8188792
    Abstract: A circuit includes a current mirror circuit and first and second transistors coupled as a differential pair. A first input voltage is provided to a control input of the first transistor. A second input voltage is provided to a control input of the second transistor. The current mirror circuit includes a third transistor, a fourth transistor coupled to the third transistor, and a fifth transistor coupled in series with the fourth transistor. The third transistor provides a current through the differential pair that is proportional to a current through the fourth transistor. A control input of the fourth transistor is coupled between the fifth transistor and a source of current.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: May 29, 2012
    Assignee: Altera Corporation
    Inventors: Sriram Narayan, Sergey Shumarayev
  • Publication number: 20120127138
    Abstract: An output circuit includes a differential amplifier circuit, an output amplifier circuit, a control circuit, input and output terminals, and first to third supply terminals applied with first to third supply voltages, respectively. The third supply voltage is set a voltage between the first and second supply voltages. The differential amplifier circuit differentially receives signals of the input and output terminals. The output amplifier circuit includes first and second transistors of different conduction type each other coupled in series between the first and third supply terminals via the output terminal, and having control terminals coupled to first and second output nodes of the differential amplifier circuit, respectively. The control circuit includes a third transistor and a switch, and controls the third transistor being in a diode coupling mode between the first supply terminal and the control terminal of the first transistor for a given period of the output period.
    Type: Application
    Filed: October 31, 2011
    Publication date: May 24, 2012
    Applicant: Renesas Electronics Corporation
    Inventor: Hiroshi Tsuchi
  • Publication number: 20120119835
    Abstract: A current mode power amplifier includes a current steering stage configured to steer a scaled current based on differential voltage inputs, a filtered current mirror connected to the current steering stage to receive the scaled current and produce a filtered output current, and a resonant load configured to receive the output current and generate an output voltage signal for transmission.
    Type: Application
    Filed: November 15, 2010
    Publication date: May 17, 2012
    Applicant: QUALCOMM INCORPORATED
    Inventors: Cheol-Woong Lee, Sunghyun Park, Jonghoon Choi
  • Patent number: 8159302
    Abstract: A differential amplifier circuit includes: P-type and N-type differential input units outputting respectively first and second outputs in response to first and second input voltages; a P-type current mirror circuit driven by the second output; an N-type current mirror circuit driven by the first output; an output unit outputting an output voltage in response to control outputs from the P-type and N-type current mirror circuits; a first sub-current source including first and second P-type transistors connected in series; and a second sub-current source including first and second N-type transistors connected in series. Control ends of the second P-type and second N-type transistors receive the control outputs from the P-type and N-type current mirror circuits, respectively. Control ends of the first P-type and first N-type transistors are coupled to a common node between the first and second P-type transistors, and a common node between the first and second N-type transistors, respectively.
    Type: Grant
    Filed: December 22, 2010
    Date of Patent: April 17, 2012
    Assignee: ILI Technology Corporation
    Inventors: Sung-Yau Yeh, Kuo-Jen Hsu
  • Publication number: 20120086509
    Abstract: Various apparatuses, methods and systems for boosting an amplifier slew rate are disclosed herein. For example, some embodiments of the present invention provide an apparatus including a pair of inputs connected to a pair of differential input devices in an amplifier, a current source, a first current path connected to the current source, a second current path connected to the current source and to the pair of differential input devices, a switch in the first current path, and a voltage difference signal connected between the pair of inputs and the switch. The voltage difference signal represents the voltage difference between the pair of inputs. The conductance of the switch is inversely proportional to the voltage difference signal.
    Type: Application
    Filed: October 29, 2010
    Publication date: April 12, 2012
    Applicants: Texas Instruments Deutschland GMBH, Texas Instruments Incorporated
    Inventors: Martijn Fridus Snoeij, Sergey Alenin, Margarita Alenina
  • Publication number: 20120081180
    Abstract: A differential amplifier layout includes a current mirror having a first transistor, a second transistor, and a third transistor. The current mirror receives a first power supply through the first transistor. The second transistor is part of a reference current branch and the third transistor is part of a mirror current branch. The first transistor comprises a first group of fingers disposed adjacent one side of the second transistor and a second group of fingers disposed adjacent one side of the third transistor.
    Type: Application
    Filed: September 21, 2011
    Publication date: April 5, 2012
    Inventor: Young Geun LEE
  • Publication number: 20120081181
    Abstract: A digital output sensor includes a sensing structure that outputs a differential sensing signal and includes at least one sensing element. An integrated circuit includes a substrate including signal conditioning circuitry for conditioning the sensing signal that includes a differential amplifier coupled to receive the sensing signal and provide first and second differential outputs and a comparator having input transistors coupled to receive outputs from the differential amplifier. The comparator also includes first and second current-mirror loads that provide differential drive currents and are coupled to the input transistors in a cross coupled configuration to provide hysteresis. An output driver is coupled to receive the differential drive currents. An output stage includes at least one output transistor which is coupled to the output driver for providing a digital output for the sensor. A voltage regulator is coupled to receive a supply voltage and output at least one regulated supply voltage.
    Type: Application
    Filed: December 13, 2011
    Publication date: April 5, 2012
    Applicant: HONEYWELL INTERNATIONAL INC.
    Inventor: Wayne Kilian
  • Patent number: 8139792
    Abstract: An amplifier circuit (100) has an input stage (OP1) and an output stage (Q1, Q2) operating with different supply voltages and different quiescent voltages. The output stage has a feedback input connected to receive a feedback signal from the output of the output stage. A biasing circuit (602) applies a bias signal (Ioff) to said input stage at an operating level appropriate to establish a quiescent output voltage different from a ground reference level of the input stage.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: March 20, 2012
    Assignee: Wolfson Microelectronics plc
    Inventor: Anthony James Magrath