Abstract: An amplifier and a display driving circuit. The amplifier includes an input stage, a bias stage and an output stage. The input stage determines voltage levels of two nodes in correspondence to two input voltages received in response to a first bias voltage, and includes four path selecting switches, two input transistors and one bias transistor. The bias stage generates two class AB output voltages which correspond to the voltage levels of the two nodes, and includes current mirrors, ten path selecting switches, class AB bias circuits and two bias transistors. The output stage generates an output voltage VOUT that corresponds to the two class AB output voltages, and includes two coupling capacitors and two push-pull transistors. The plurality of path selecting switches operate by one signal of a first path selecting signal and a second path selecting signal that are exclusively enabled with respect to each other.

Abstract: An amplifier is provided. The amplifier includes a differential amplifier including a tail, a current mirror connected between output terminals of the differential amplifier and a power line receiving a supply voltage, and a first switching circuit for connecting and disconnecting one of the output terminals of the differential amplifier to and from the tail in response to a first switching signal.

Abstract: An amplifying circuit includes a first circuit component configured to receive and amplify first and second input voltages to generate an output voltage. The first circuit component is formed by a first amplifier and a second amplifier. A second circuit component is configured to provide a first offset current that is associated with a first input current of the first amplifier. The first offset current compensates for variation in the first input current. A third circuit component is configured to provide a second offset current that is associated with a second input current of the second amplifier. The second offset current compensates for variation in the second input current.

Abstract: A semiconductor integrated circuit device includes: a substrate which has a first conductivity type and in which a first amplifier area and a second amplifier area are defined; a first well which has a second conductivity type, a first pocket well which has the first conductivity type and is separated from the first well, and a first deep well which has the second conductivity type, surrounds the first pocket well, and is separated from the first well; and a second well which has the second conductivity type, a second pocket well which has the first conductivity type and is separated from the second well, and a second deep well which has the second conductivity type, surrounds the second pocket well, and is separated from the second well The first well, the first pocket well, and the first deep well are formed in the first amplifier area of the substrate, and the second well, the second pocket well, and the second deep well are formed in the second amplifier area of the substrate.

Abstract: A system and a method are disclosed for using driving capacitors to dynamically bias an amplifier in a stage of a pipeline analog-to-digital converter (ADC). The drain of the amplifier is connected to a sink transistor, and the driving capacitors are used to raise or lower the voltage at the gate of the sink transistor. The driving capacitors can be used in this manner to rapidly power the amplifier on and off to save power and/or to selectively boost the drain current of the amplifier to improve the response time of the pipeline ADC stage.

Abstract: There is described an amplification stage comprising: a current mirror circuit comprising a reference transistor arranged to receive a current associated with an input signal and an output transistor providing a current source for an output signal line; a current sink to the output signal line, under the control of the input signal; circuitry arranged to maintain equality between the drain/collector voltages on the transistors of the current mirror circuit.

Abstract: An amplifier circuit includes an input terminal and an output terminal. A current sinking transistor includes a first conduction terminal coupled to the output terminal and a second conduction terminal coupled to a reference supply node. A voltage sensing circuit has a first input coupled to the input terminal and a second input coupled to the output terminal. An output of the voltage sensing circuit is coupled to the control terminal of the current sinking transistor. The voltage sensing circuit functions to sense a rise in the voltage at the output terminal which exceeds the voltage at the input terminal, and respond thereto by activating the current sinking transistor.

Abstract: An amplifier includes an output stage circuit, a current source, a PMOS input pair, an NMOS input pair and a current transferring circuit. The output stage circuit is electrically coupled to a supply voltage and a ground voltage. The current source has a node to provide a current. The PMOS input pair is coupled to the node and the ground voltage and controlled by an input voltage. The NMOS input pair coupled to the supply voltage is controlled by the input voltage. The current transferring circuit is coupled to the node and the NMOS input pair. When the input voltage is less than a specific value, the current flows into the PMOS input pair through the node. When the input voltage is larger than or equal to the specific value, the current flows into the NMOS input pair through the node and the current transferring circuit.

Abstract: Disclosed herein is a differential amplifier circuit that includes: first and second transistors coupled to form a differential circuit; a first current mirror circuit generating first and second currents in response to a third current flowing through the first transistor; and a second current mirror circuit generating a fourth current in response to a fifth input current. A sum of the second and fourth currents flowing through the second transistor.

Abstract: A signal processing device includes a device package, processing circuitry and biasing circuitry. The processing circuitry is packaged in the device package and is operative to receive one or more Radio Frequency (RF) input signals from one or more antenna elements via one or more pre-amplifiers that are separate from the device, and to process the RF input signals so as to produce an RF output signal. The biasing circuitry is packaged in the device package and is operative to produce one or more biasing signals for biasing the pre-amplifiers.

Abstract: A near field RF communicator has an antenna circuit (120) to receive a modulated radio frequency signal by inductive coupling and demodulation circuitry (130 or 131) to extract the modulation from a received modulated radio frequency signal inductively coupled to the antenna circuit. The demodulation circuitry has a virtual earth input comprising a current mirror. The demodulation circuitry may be formed by an amplifier (115 or 116) and a demodulator (114) coupled to an output of the amplifier. The amplifier may be a single input amplifier (116) coupled to an output of the antenna circuit or may be a differential amplifier (115) having first and second inputs to receive the modulated radio frequency signal from first and second outputs of the antenna circuit, with each amplifier input providing a virtual earth input.

Abstract: A differential amplifier circuit includes: an NMOS transistor pair connected with a non-inversion input terminal and an inversion input terminal; a PMOS transistor pair connected with the non-inversion input terminal and the inversion input terminal; and an output circuit section. The PMOS transistor pair includes first and second PMOS transistors, and the NMOS transistor pair includes first and second non-doped type NMOS transistors as a depletion type of NMOS transistors in which a channel region is formed in a P-type substrate without a P well. The output circuit section includes a first current mirror of a folded cascode type connected with the first and second non-doped type NMOS transistors, and outputs an output voltage in response to a current from the first current mirror.

Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.

Abstract: A differential amplifier layout includes a current mirror having a first transistor, a second transistor, and a third transistor. The current mirror receives a first power supply through the first transistor. The second transistor is part of a reference current branch and the third transistor is part of a mirror current branch. The first transistor comprises a first group of fingers disposed adjacent one side of the second transistor and a second group of fingers disposed adjacent one side of the third transistor.

Abstract: A method including receiving an input signal; amplifying the input signal to generate an output signal using a cascade of a plurality of amplifier stages including a first amplifier stage and a last amplifier stage; generating a voltage signal by sensing the output signal in a noninvasive manner so that the sensing results in substantially no change to the output signal; generating a current signal from the voltage signal using a transconductance amplifier; and injecting the current signal into an output node of the first amplifier stage in a noninvasive manner so that the injecting results in substantially no change to an amplification function of the first amplifier stage.

Abstract: Embodiments and methods herein operate as two-stage voltage controlled current sources (i.e., dynamic current sources) operating in class AB mode. Phase-delayed current injection circuits are associated with first-stage bias, second-stage bias, or both. The current injection circuits operate to quickly re-charge inter-stage parasitic capacitance associated with the active side of the class AB dynamic current source shortly after that side becomes inactive. Doing so quickly dissipates an otherwise slowly-decaying residual drive signal to prevent the output stage from continuing to conduct after the associated side of the current source becomes inactive. Excessive current consumption and possible destructive operation of the output stage are mitigated as a result.

Abstract: An apparatus of common mode compensation for voltage controlled delay circuits and method are provided. In one implementation a method includes amplifying a differential input signal to generate a differential output signal using a differential pair of transistors biased by a tail current; changing the tail current by a first amount to change a circuit delay of the differential pair of transistors; generating a first compensation current and a second compensation current by using a current mirroring such that a sum of the first compensation current and the second compensation current is of a second amount that is substantially equal to the first amount; injecting the first compensation current into the first end of the differential output signal via a first coupling resistor; and injecting the second compensation current into the second end of the differential output signal via a second coupling resistor.

Abstract: A differential amplifier has an interpolating function and has: first and second differential pairs including transistors of a first conductivity type; third and fourth differential pairs including transistors of a second conductivity type; first and second current sources providing operating currents to the first and second differential pairs; third and fourth current sources providing operating currents to the third and fourth differential pairs; a first control circuit which controls, in a first operating range where the amounts of currents flowing through the first and second differential pairs become smaller, respectively, a changing point at which the operating current of the first differential pair changes; and a second control circuit which controls, in a second operating range where the amounts of currents flowing through the third and fourth differential pairs become smaller, respectively, a changing point at which the operating current of the fourth differential pair changes.

Abstract: Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.

Abstract: A fully differential amplifier with automatic offset voltage zeroing including first and second dynamically switched current mirrors and an output circuit. Each dynamically switched current mirror toggles operation between an autozeroing phase in which it mirrors a first current level indicative of a level of a first input terminal to provide a mirrored current, and an output phase in which it applies a difference current to a common output node. The difference current is a difference between the mirrored current and a second current level indicative of a level of a second input terminal. The first and second dynamically switched current mirrors operate out of phase with respect to each other during respective periods of each cycle of a clock signal. The output circuit develops first and second output signals on first and second output terminals at first and second polarities, respectively, based on a level of the common output node.

Abstract: A sense amplifier circuit according to some implementations includes a differential input stage to receive mirrored input currents and a transistor switch whose state is controlled by a signal applied to its gate. The sense amplifier circuit includes a pair of cross-coupled NMOS transistors and a pair of cross-coupled PMOS transistors to which the mirrored input currents are coupled and whose drain nodes are shorted when the transistor switch is in a conductive state. The sense amplifier is arranged to generate a digital output signal indicative of which of the input currents is larger.

Abstract: An apparatus of common mode compensation for voltage controlled delay circuits and method are provided. In one implementation a method includes amplifying a differential input signal to generate a differential output signal using a differential pair of transistors biased by a tail current; changing the tail current by a first amount to change a circuit delay of the differential pair of transistors; generating a first compensation current and a second compensation current by using a current mirroring such that a sum of the first compensation current and the second compensation current is of a second amount that is substantially equal to the first amount; injecting the first compensation current into the first end of the differential output signal via a first coupling resistor; and injecting the second compensation current into the second end of the differential output signal via a second coupling resistor.

Abstract: An amplifier circuit has an input stage, a current mirror stage, and an output stage. The output stage has a transistor for which a non-linear and/or linear Miller capacitance exists across the transistor. A capacitive element, referred to herein as a “negative Miller capacitor,” is coupled between an input node of the current mirror stage and the transistor's collector or drain causing the current flowing through the negative Miller capacitor to be inverted, supplying the current taken by the usual Miller capacitance of the output stage. Thus, the negative Miller capacitor cancels the usual Miller capacitance across the transistor of the output stage, and such cancellation occurs without significantly increasing the amplifier's input power and costs. In some embodiments, both linear and non-linear components of the usual Miller capacitor are cancelled.

Abstract: The invention relates to a current-sensing differential amplifier having a balanced input. A balanced-input current-sensing differential amplifier of the invention has a first signal input terminal, a second signal input terminal, a first signal output terminal and a second signal output terminal. The balanced-input current-sensing differential amplifier comprises a first current mirror, the input terminal of the first current mirror being coupled to the first signal input terminal, a second current mirror, the input terminal of the second current mirror being coupled to the second signal input terminal, a third current mirror, one of the output terminals of the third current mirror being coupled to the common terminal of the first current mirror and to the common terminal of the second current mirror, three current sources and an output circuit.

Abstract: A class AB operational amplifier includes an input stage, an output stage and a level shifter stage to control the quiescent current of the output stage and to transfer the signal from the input stage to the output stage, and a control circuit of the level shifter stage. The control circuit includes a transistor differential pair having a differential input terminals and the differential voltage at the differential terminals of the differential pair controls the level shifter stage.

Abstract: An output circuit is capable of supporting a high-speed operation, suppressing power consumption, and controlling its area. The output circuit has a differential input stage, an output amplification stage, and an amplification boost circuit, in which the amplification boost circuit has a differential pair of a second conductivity type and load element pair, and includes a first current source circuit for controlling current supply to an input node of a second current mirror circuit of the differential input stage and boost the charging operation of the output amplification stage according to a voltage difference between input and output voltages, and a second current source circuit for controlling current supply to an output node of a first current mirror circuit of the differential input stage and boost the discharging operation of the output amplification stage.

Abstract: The present invention includes: a temperature compensation circuit for generating a digital signal corresponding to a temperature of a transistor and outputting a compensation bias current obtained by adding a control current to a reference bias current or by subtracting the control signal from the reference bias current using the generated digital signal; a characteristics compensation circuit for detecting a characteristics error of a mirror transistor connected to the transistor in parallel and for outputting a compensation signal to compensate the characteristics error; and a bias compensation circuit for compensating a bias power applied to the transistor using the compensation bias current and the compensation signal to output the compensated bias power. The present invention is capable of improving the performance of the transistor.

Abstract: A limiting amplifier and method are provided. In one implementation an apparatus includes a plurality of amplifier stages including a first amplifier stage and a last amplifier stage configured in a cascade arrangement, and a transconductance amplifier, wherein the first amplifier stage is configured to receive an input signal; the last amplifier stage outputs an output signal; the transconductance amplifier is configured receive a voltage signal from the last amplifier stage via a first resistor; and the transconductance amplifier is configured to output a current signal to an output node of the first amplifier stage via a second resistor in a negative feedback manner.

Abstract: An operational amplifier circuit structure is provided. The operational amplifier circuit structure includes a first current mirror associated with a first current mirror ratio, a second current mirror coupled to the first current mirror and associated with a second current mirror ratio, an input portion coupled to the first current mirror and the second current mirror, an output portion coupled between the input portion and the first current mirror and the input portion and the second current mirror, and associated with a first output impedance and a second output impedance, respectively, and a current source coupled to the input portion.

Abstract: In one embodiment, the present invention includes a mixer having various stages, including a transconductance stage with a differential transistor pair, a bias circuit, and a feedback circuit. The transistor pair can include a first transistor having a first terminal to receive a first input radio frequency (RF) voltage and to output a first RF current via a second terminal of the first transistor, and a second transistor having a first terminal to receive a second input RF voltage and to output a second RF current via a second terminal of the second transistor. In turn, the bias circuit is coupled to the second terminals of the transistors to provide a bias current to these transistors. The feedback circuit is in turn coupled to the second terminals of the transistors to generate a feedback signal corresponding to a common mode voltage at the second terminals of the transistors.

Abstract: A folded cascode differential amplifier includes a high-voltage input stage and a low-voltage output stage. The input stage is formed from high-voltage MOS transistors, two of which constitute a differential pair. The output stage is formed from low-voltage MOS transistors, some of which constitute a current mirror circuit connected to the differential pair. The output stage also includes at least one transistor that amplifies a voltage produced in the current mirror circuit to generate an output voltage signal. The high-voltage MOS transistors have higher breakdown voltages than the low-voltage MOS transistors. Incorporation of both types of transistors into a single amplifier reduces the necessary number of transistors and the necessary number of bias voltages.

Abstract: A current mirror circuit provided in an emitter follower configuration achieves linearly output over a range of input currents by operating in response to a bias current that is a replica of the input current. The current mirror may include a pair of transistors and a pair of resistors, in which: a first resistor and a base of a first transistor are coupled to a first input terminal for a first input current, an emitter of the first transistor and a base of the second transistor are coupled to a second input terminal for a second input current, the first and second input currents being replicas of each other, an emitter of the second transistor being coupled to the second resistor, a collector of the second transistor being coupled to an output terminal of the current mirror, and a collector of the first transistor and the two resistors are coupled to a common node.

Abstract: A supply-independent biasing source includes an upper current mirror including first and second PMOS transistors and a lower current mirror coupled to the upper current mirror including first and second NMOS transistors. The first NMOS and first PMOS transistors have drain terminals coupled together and form a first stack of transistors and the second NMOS and second PMOS transistors have drain terminals coupled together and form a second stack of transistors. A first resistive load is connected to one of the first and second stacks, wherein the resistive load comprises a first MOSFET transistor biased at triode region.

Abstract: Circuits are disclosed that may include a plurality of transistors having controllable current paths coupled between at least a first and second node, the transistors configured to generate an analog electrical output signal in response to an analog input value; wherein at least one of the transistors has a deeply depleted channel formed below its gate that includes a substantially undoped channel region formed over a relatively highly doped screen layer formed over a doped body region.

Abstract: A current mode power amplifier includes a current steering stage configured to steer a scaled current based on differential voltage inputs, a filtered current mirror connected to the current steering stage to receive the scaled current and produce a filtered output current, and a resonant load configured to receive the output current and generate an output voltage signal for transmission.

Abstract: Various apparatuses, methods and systems for boosting an amplifier slew rate are disclosed herein. For example, some embodiments of the present invention provide an apparatus including a pair of inputs connected to a pair of differential input devices in an amplifier, a current source, a first current path connected to the current source, a second current path connected to the current source and to the pair of differential input devices, a switch in the first current path, and a voltage difference signal connected between the pair of inputs and the switch. The voltage difference signal represents the voltage difference between the pair of inputs. The conductance of the switch is inversely proportional to the voltage difference signal.

Abstract: In one embodiment, two transistors are coupled in a current mirror configuration to form a delta voltage, and an amplifier is configured to control a first current carrying electrode of each of the first and second transistors at a substantially constant voltage.

Abstract: An operational amplifier with different power supply voltages includes an input stage and an output stage. The input stage includes a current source for providing a bias current, and a differential input circuit for receiving the bias current and differential input voltage signals, and converting the differential input voltage signal to differential input currents. The input stage is supplied by a first power supply voltage. The output stage includes a load circuit coupled to the differential input voltage signal and for receiving the differential input currents, and outputting a single ended output voltage signal. The output stage is supplied by a second power supply voltage. The second power supply voltage is lower than the first power supply voltage.

Abstract: A voltage-mode line driving circuit is provided. The voltage-mode line driving circuit includes a driving circuit, the driving circuit receiving, as an input signal, a feedback signal, and outputting an output signal. The voltage-mode line driving signal also includes an adaptive tuning circuit coupled to the driving circuit, the adaptive tuning circuit receiving as input signals the feedback signal and the output signal and adaptively outputting a modifying signal to the driving circuit which modifies the feedback signal.

Abstract: A differential amplifier circuit includes a differential input stage comprising first and second transistors whose sources are connected with each other, a constant current source connected between the sources of the first and second transistors and a ground, a current mirror circuit comprising third and fourth transistors whose sources are connected with a power supply source, a fifth transistor of a same conductive type as that of the first transistor, connected at a drain to a drain of the third transistor, connected at a source to a drain of the first transistor and connected at a gate to a reference voltage source; and a sixth transistor of a same conductive type as that of the second transistor, connected at a drain to a drain of the fourth transistor, connected at a source to a drain of the second transistor, and connected at a gate to the reference voltage source.

Abstract: The present invention relates to an operational amplifier comprising an input-stage circuit, a floating current mirror circuit, and an output-stage circuit. The input-stage circuit receives an input signal and produces a control signal. The floating current mirror circuit is coupled to the input-stage circuit, and produces a mirror current according to the control signal. The output-stage circuit is coupled to the floating current mirror circuit, and produces a driving signal according to the mirror current. When the operational amplifier is operating in the static mode, the output-stage circuit further produces a static current according to the mirror current. Thereby, by using the floating current mirror circuit, the purpose of low power consumption can be achieved while driving to the high-voltage mode or to the low-voltage mode.

Abstract: An electronic system comprises a resistive sensor structure and an electronic circuit portion whose design is selected such that different resistive sensor structures may be combined within the same electronic circuit. To this end, the resistive sensor structure is used as a voltage/current converter that provides input currents to a current amplifier, which in turn provides an amplified output voltage on the basis of a difference of the input currents. The operating range of the current amplifier is adjusted on the basis of a programmable current source irrespective of the configuration of the resistive sensor structure.

Abstract: In a class AB amplifier circuit, an input stage circuit includes a first differential pair configured to receive a differential signal and a first current mirror circuit connected with the first differential pair through a first node. A middle stage circuit includes a floating constant current source connected with the first node, a first transistor whose gate is applied with a bias voltage, and a first constant current source connected with the first node through the first transistor. A last stage circuit includes a first output stage transistor whose gate is connected with the first node and which controls a voltage of an output terminal. A first phase compensation capacitance has one end connected with a first connection node between the first constant current source and the first transistor and the other end connected with the output terminal.

Abstract: A differential amplifier having a rail-to-rail input voltage range, includes a first differential input stage, which is connected to a first supply voltage rail via a first power source and a second complementary differential input stage, which is connected to the second supply voltage rail via a second power source. To this end, switching device are provided, which deactivate the first differential input stage and activate the second differential input stage when the voltage value of the input voltage signal exceeds a predetermined first voltage threshold in the event of rising input voltage, and which deactivate the second differential input stage and activate the first differential input sage when the voltage value of the input voltage signal falls below a predetermined second voltage threshold in the event of falling input voltage. A constant input slope can thus be achieved, having a high phase reserve, which makes the device particularly applicable in the field of biosensory technology.

Abstract: According to one embodiment, a differential amplifier includes a differential circuit, an output circuit, and a clipper circuit. The differential circuit generates a pair of differential currents in accordance with a difference in potential between a pair of input signals. The output circuit receives the pair of differential currents and generates an output voltage in accordance with the current difference. The clipper circuit suppresses the output voltage within a range to be able to convert to a low level or to a high level being higher than the low level.

Abstract: An apparatus includes a telescopic operational amplifier. The telescopic operational amplifier includes an input stage, a load, and a first cascode circuit. The first cascode circuit is coupled to a first differential node and an output node. The first differential node is coupled to one of the input stage and the load. The apparatus includes a first negative transconductance circuit coupled to the first differential node. In at least one embodiment, the first negative transconductance circuit is operable to provide a negative transconductance to compensate at least a first component of an output resistance of the telescopic operational amplifier. In at least one embodiment, the first negative transconductance circuit includes a pair of cross-coupled devices coupled to the first differential node and a current source.

Abstract: Matched bipolar transistor pairs for use in differential transistor pair circuitry, current mirror transistor pair circuitry and voltage reference transistor pair circuitry are disclosed. Each transistor in the pair includes a base, emitter and a collector region and a doped polysilicon emitter contact, a metal emitter contact and an metal emitter interconnect which makes an electrical connection to the emitter region by way of the metal emitter contact and the polysilicon emitter contact. The metal emitter interconnect is displaced latterly away from the emitter region so that no part of the metal emitter interconnect overlies any portion of the emitter region.

Abstract: A comparator comprises a current mirror, a differential input pair, and a auxiliary circuit. The current mirror has a biasing end coupled to a power voltage, a first end, and a current outputting end coupled to an output node of the comparator. The differential input pair has a first and second input ends for respectively receiving a first voltage and a second voltage, a second and third ends, and a ground end, wherein the third end is coupled to the first end. The auxiliary circuit is coupled between the output node and the second end, and provides a minimum voltage of a comparison result output at the output node. The comparison result is the power voltage when the first voltage is larger than the second voltage, and the comparison result is the minimum voltage when the first voltage is less than the second voltage.

Abstract: Apparatus and methods for biasing amplifiers are provided. In certain implementations, a bias circuit is provided for controlling the drain-source voltage of input transistors electrically connected to the inputs of a transconductance amplification circuit. For example, the bias circuit can maintain a relatively constant drain-source voltage in the input transistors by using a feedback loop that includes a feedback amplifier for adjusting the bias current of the input transistors based upon a difference between the drain and source voltages of the input transistors. In certain implementations, the feedback amplifier has an offset voltage equal to about the desired value of the drain-source voltage, and the feedback amplifier is configured to adjust the bias current until the difference between the inputs of the feedback amplifier is equal to about the offset voltage.

Abstract: An amplifier having an imbalance between pull-up and pull-down sections may include a counterpart section to balance the output sections and/or enable them to be driven by balanced drive signals. In one embodiment, a rail-to-rail output stage may include a current minor to drive one side of the circuit. The other side may be driven by a transistor having a counterpart transistor to balance the circuit. A drive section may include a balance point to facilitate balancing the drive signals.