Abstract: The present invention is directed to an oscillator circuit comprising an oscillator input for providing an input signal, a first integrator circuit comprising a first integrator capacitor and a first integrator output, a comparator, a discharge circuit for discharging said first integrator capacitor once per cycle of said oscillator circuit, and an oscillator output for providing an output signal, wherein said oscillator circuit further comprises a second integrator circuit comprising a second integrator capacitor and a second integrator output, and wherein said oscillator circuit is arranged for allowing said input signal to be subsequently integrated by said first and second integrator circuit in an alternating manner, and for providing said integrated output signal of said first and second integrator circuit subsequently to said comparator in said alternating manner.

Abstract: In an embodiment, a method includes: during a first portion of a cycle of a clock signal generated by an oscillator, pre-charging a first capacitor of a first switched capacitor stage until a first comparator determines that a first node voltage of the first switched capacitor stage is greater than a first reference voltage at a first reference voltage node; applying a second reference voltage to the first reference voltage node; and responsive to a first edge of the clock signal, charging the first capacitor until the first comparator determines that the first node voltage is greater than the second reference voltage at the first reference voltage node.

Abstract: Techniques and architectures corresponding to relaxation oscillators having output frequencies that are supply voltage independent are described. In a particular embodiment, an apparatus includes a relaxation oscillator having one or more capacitors and a compensation current circuit coupled to the relaxation oscillator. The compensation current circuit is configured to regulate current provided to the one or more capacitors of the relaxation oscillator in response to changes in a supply voltage provided to the compensation current circuit and to the relaxation oscillator.

Abstract: A reference circuit, an oscillator architecture that includes the reference circuit and a method for operating the reference circuit are described. In one embodiment, the reference circuit includes a voltage reference generator configured to generate a reference voltage and a current reference generator configured to generate a reference current based on the reference voltage. The current reference generator includes a level shifter circuit configured to generate intermediate voltages based on the reference voltage, a first current reference circuit configured to generate intermediate currents based on the intermediate voltages, where the intermediate currents are correlated to the reference voltage, and a second current reference circuit configured to combine the intermediate currents to generate the reference current. Other embodiments are also described.

Abstract: An oscillation circuit includes a threshold voltage extraction module, a positive temperature coefficient voltage generation module, an addition module, a common-source amplifier module, a charge and discharge module, and a clock output terminal. The common-source amplifier module includes a first field effect transistor (FET) and a second FET. The addition module includes a first operational amplifier, a second operational amplifier, a third FET, a fourth FET, a fifth FET, a sixth FET, a first resistor, a second resistor, and a third resistor. The charge and discharge module includes a seventh FET, an eighth FET, a charge and discharge FET, a first switch, a second switch, a first comparator, a second comparator, a first nor gate and a second nor gate. An oscillation system is further provided. The oscillation circuit and the oscillation system of the present invention have simple structures and are easy to implement.

Abstract: A semiconductor trimming circuit includes parallel coupled PMOS devices coupled in parallel with parallel coupled NMOS devices and an additional pair of dummy NMOS devices. The dummy NMOS devices are coupled in parallel with the NMOS devices. A trimming circuit for an internal clock source may be formed with an array of such switches for selecting one or more trimming capacitors of the trimming circuit. Such an array has a low leakage current and permits good trimming linearity.

Abstract: A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator.

Abstract: An oscillator includes a first capacitor electrically connected to a first charging switch and a first discharging switch, a second capacitor electrically connected to a second charging switch and a second discharging switch, a first chopping circuit having a first input electrically connected to the first capacitor and a second input electrically connected to a reference voltage, a second chopping circuit having a first input electrically connected to the second capacitor and a second input electrically connected to the reference voltage, a first comparator having a first input electrically connected to a first and second output of the first chopping circuit, a second comparator having a first input electrically connected to a first and second output of the second chopping circuit, and control circuitry having a first input electrically coupled to an output of the first comparator and a second input electrically connected to an output of the second comparator.

Abstract: In an embodiment of a converter, a first oscillator provides switching signals for switching between charging and discharging of a capacitor, and a second oscillator is configured to add an offset voltage or a feedback-current-dependent voltage to a sawtooth waveform generated by the second oscillator switched in synchronism with the first oscillator.

Abstract: An oscillator circuit includes a clock oscillator which outputs a main clock signal having an oscillating frequency switched between a high frequency and a low frequency in response to a frequency selection signal, and a frequency divider circuit which outputs a sub-clock signal having a divided frequency equivalent to a frequency division ratio of the oscillating frequency of the main clock signal, the frequency division ratio being switched in response to the frequency selection signal. The divided frequency of the sub-clock signal is predetermined for each of the high frequency and the low frequency to which the oscillating frequency is switched in response to the frequency selection signal.

Abstract: A technique and corresponding circuitry are presented for a process independent, self-calibrating relaxation based clock source. The technique and circuitry presented here can reduce the time and cost needed for calibration significantly. The relaxation based clock source produces a clock signal whose frequency is dependent upon a trim value. Starting from an initial trim value, the clock signal is generated, its frequency is compared with a reference clock frequency value, and the trim value is correspondingly adjusted up or down a bit at a time. After this process has continued for a while, min-max logic is used to determine the maximum and minimum trim values and, based on these, the final trim value for the clock is set. This calibration process can also be used to extract whether, and by how much, the implementation on silicon of a particular chip lies in the fast or slow process corners.

Abstract: A reference circuit for an oscillator module is provided. The reference circuit includes a reference voltage generation unit and a reference current generation unit. The reference voltage generation unit includes an electric element having a voltage proportional to absolute temperature (PTAT voltage) and provides a reference voltage based on the PTAT voltage. The reference current generation unit is coupled to the reference voltage generation unit and provides a reference current to the oscillator circuit to serve as an input current based on the PTAT voltage. The oscillator circuit generates a clock signal based on the reference voltage and the input current. The reference voltage and the input current are proportional to absolute temperature and have the same change trend relative to absolute temperature, such that the clock signal is a temperature insensitive signal. An oscillator module including an oscillator circuit and the foregoing reference circuit is also provided.

Abstract: A relaxation oscillator circuit with reduced sensitivity of oscillation frequency to comparator delay variation includes a first current source that generates charging current, a second current source coupled to the first current source to generate reference voltage, a resistor coupled to the second current source to enable generation of the reference voltage, a capacitor coupled to the first current source that is charged based on the charging current, a comparator responsive to voltage corresponding to the capacitor and the reference voltage to generate output voltage, a peak detector coupled to the capacitor to generate peak voltage, an error detector coupled to the peak detector and the second current source to generate an error based on the peak voltage and the reference voltage, and a controller coupled to the error detector to control one of the charging current, offset voltage input to the comparator, and capacitance of the capacitor.

Abstract: A relaxation oscillator has a comparator that includes first through third bias current transistors coupled to a first supply rail. First and second input transistors form a pair of parallel coupled transistors connected to the first bias current transistor. A first current mirror control transistor connects the first input transistor to a second supply rail. A first current mirror output transistor is coupled to the first current mirror control transistor, and connects the second bias current transistor to the second supply rail. A second current mirror control transistor connects the second input transistor to the second supply rail. A second current mirror output transistor is coupled to the second current mirror control transistor, and connects the third bias current transistor to the second supply rail. A transition time reduction transistor, coupled across the third bias current transistor, is coupled to the second bias current transistor, and provides a comparator output.

Abstract: An oscillator circuit includes a signal generator having a compensation frequency output node that provides a compensation frequency signal at the compensation frequency output node. A pulse generator having a pulsed signal output node and a pulse generator input node is coupled to the compensation frequency output node and converts the compensation frequency signal into a series of compensation binary pulses having a constant pulse duration regardless of variations in the duty cycle of the compensation binary pulses. An oscillator module having at least two capacitors, an oscillator output node and a pulsed signal input node is coupled to the pulsed signal output node, and provides an output signal that is at a frequency dependent on charging rates of the capacitors. Drift variations in the capacitors are offset by variations in a duty cycle of the compensation binary pulses supplied in order to maintain constant charging rates of the capacitors.

Abstract: A spread spectrum oscillator includes a high frequency oscillator circuit configured to oscillate at a first frequency, and a low frequency oscillator circuit configured to oscillate at a second frequency and resistively coupled to a current summing node of the high frequency oscillator circuit. The first frequency is higher than the second frequency.

Abstract: A method for generating an oscillator signal uses a multiphase oscillator having a plurality of input stages and a reference stage. Each input stage produces an input stage voltage that represents a phase for the oscillator. The input stage voltages produced by each of the input stages are compared to a reference voltage produced by the reference stage. An input stage having a maximum input stage voltage is selected and an output of the selected input stage having the maximum input stage voltage is changed. A current need of the oscillator is detected with a negative feedback loop coupled to the reference stage. An appropriate supply current is provided to each input stage with the negative feedback loop.

Abstract: A variable-capacitance device includes a first capacitance element coupled between a first power supply terminal and an output terminal, a capacitance selection switch that is turned on and off in accordance with a capacitance switching signal, a second capacitance element coupled in parallel to the first capacitance element and in series to the capacitance selection switch, and an error correction circuit configured to operate such that in a state in which the capacitance selection switch is in an OFF state, in response to a charge reset signal that causes a voltage at the output terminal to be reset to a reset voltage, the error correction circuit substantially eliminates a difference between the voltage at the output terminal and a voltage at a capacitance switching node at which the second capacitance element is coupled to the capacitance selection switch.

Abstract: An oscillator is provided and includes a resistance unit, a capacitance unit, a first inverter and a second inverter. The resistance unit is serially connected between a first reference point and a second reference point. The capacitance unit is coupled between the first reference point and an output point, and includes capacitors. One terminal of each of the capacitors is coupled to the output point, and the other terminal of each of the capacitors is coupled to the first reference point or a reference ground according to a control signal. The input terminal of the first inverter is coupled to the first reference point, and the output terminal of the first inverter is coupled to the second reference point. The input terminal of the second inverter is coupled to the output terminal of the first inverter, and the output terminal of the second inverter is coupled to the output point.

Abstract: An oscillator includes a positive power supply node for providing a positive power supply voltage; a capacitor; and a constant current source providing a first constant current and coupled to the positive power supply node. The first constant current is independent from the positive power supply node. The oscillator also includes a charging current source configured to provide a second constant current to charge the capacitor, wherein the second constant current mirrors the first constant current. The oscillator further includes a constant current source inverter having a third constant current mirroring the first constant current. The constant current source inverter is configured to control the oscillator to transition state at a constant state transition voltage.

Abstract: An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.

Abstract: A relaxation oscillator and a method for offset cancellation in a relaxation oscillator. The relaxation oscillator comprises two comparator units, each comparator unit comprising a comparator element and a memory element; and a switch control generator coupled to each of the comparator units; wherein each comparator unit, in a reset state, stores an input-offset voltage on the memory element under the control of the switch control generator such that, in a comparison state, the input-offset voltage is applied to both inputs of the comparator for implementing an offset-free threshold.

Abstract: A device includes an RC oscillator circuit and incorporates various features that individually and in combination can help improve the stability or accuracy of the oscillator output frequency. The oscillator circuit is operable to provide a tunable output frequency and includes a bias circuit switchable between first and second modes of operation. One of the modes has less drift in oscillator bias current relative to the other mode. The device also includes drift compensation circuitry that is operable to compensate for drift in the oscillator output frequency in a closed-loop mode of operation based on a comparison of the oscillator output frequency with a reference frequency. The device further includes a processor operable to compensate for temperature-based drift in the oscillator frequency in an open-loop mode of operation based on a measured temperature value in the vicinity of the oscillator circuit.

Abstract: A switched capacitor type D/A converter receives m-bit (m represents an integer) input data, and outputs an analog signal that corresponds to the input data value. Switch circuits are provided to respective bits of the input data, and are classified into two groups: a first group configured to turn on when the corresponding input data bit is 1, and to turn off when the corresponding input data bit is 0; and a second group configured to turn on when the corresponding input data bit is 0, and to turn off when the corresponding input data bit is 1. Each switch of the first and second switch groups is configured as a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The ground voltage 0 V is applied to the lower power supply terminal of each of the first and second inverters configured to supply a gate signal to each switch.

Abstract: An oscillating apparatus includes: a transfer gate including a P-channel transistor and a N-channel transistor; a first inverter for inverting an output signal of the transfer gate and outputting the inverted output signal of the transfer gate; a second inverter for inverting the output signal of the first inverter and outputting the inverted output signal of the first inverter; a third inverter for inverting the output signal of the first inverter and outputting the inverted output signal of the first inverter; a fourth inverter for inverting the output signal of the third inverter and outputting the inverted output signal of the third inverter to an input-terminal of the transfer gate; a first capacitor connected between an output-terminal of the transfer gate and an output-terminal of the second inverter; and a second capacitor connected between the output-terminal of the transfer gate and a reference potential node.

Abstract: Precision measurement of a period(s) of an embedded clock oscillator using a charge time measurement unit (CTMU) maintains a desired frequency accuracy of the embedded clock oscillator over a range of time, temperature and operating condition changes. The CTMU determines the free running frequency of the embedded clock oscillator and provides very accurate frequency (period) information for confirmation that a desired frequency, e.g., within 0.25 percent of the desired frequency, is running or an indication of how much and which direction to adjustment the frequency of the clock oscillator to maintain the frequency precision desired. Automatic frequency adjustment of the embedded clock oscillator may be implemented so as to maintain the desired precision frequency thereof. Temperature and voltage compensation profiles for maintaining the accuracy of the CTMU may be stored in a table, e.g., nonvolatile memory, for a further improvement in absolute frequency accuracy of the embedded clock oscillator.

Abstract: An oscillator circuit in accordance with an aspect of the present invention includes a filter capacitor that generates an oscillating frequency control voltage according to a charge amount accumulated based on an oscillating frequency setting current, an oscillator that changes a frequency of an oscillation signal to be output according to the oscillating frequency control voltage, a control circuit that generates a timing control signal, a frequency detection circuit that generates a frequency detection voltage based on the timing control signal, a voltage level of the frequency detection voltage being changed according to a length of the period of the oscillation signal, and a differential amplifier that continuously changes the oscillating frequency setting current according to a voltage difference between the frequency detection voltage and a reference voltage, and outputs the resultant oscillating frequency setting current to the filter capacitor.

Abstract: A first capacitor is arranged such that the electric potential at a first terminal is fixed. A first discharging circuit discharges the first capacitor at a timing that corresponds to a cyclic synchronization signal received from an external circuit. A first comparator compares the voltage at a second terminal of the first capacitor with a predetermined threshold voltage, and generate a judgment signal that corresponds to the comparison result. A charging circuit generates a charging current the current value of which is adjusted according to the level of the judgment signal at a timing that corresponds to the synchronization signal, and supplies the charging current thus generated to the first capacitor.

Abstract: A relaxation oscillator for generating oscillator signal includes a ramp voltage generating circuit, a reference voltage generating circuit, a reference voltage switching circuit, and a digital logic circuit. The reference voltage generating circuit generates one or more reference voltages and the ramp voltage generating circuit generates one or more ramp voltages. The ramp voltages are compared with each of the reference voltages by sequentially switching the reference voltages using a reference voltage switching signal generated by the reference voltage switching circuit. The oscillator signal is generated by the digital logic circuit based on the results of the comparisons.

Abstract: A power supply apparatus and method for an active matrix organic light emitting diode (AMOLED) is disclosed. The power supply apparatus supplies power to the AMOLED while using a switching frequency varied in accordance with a clock signal, and includes a load checker for comparing a load current of the AMOLED with a first reference voltage, and outputs a result of the comparison as a load check signal, and a frequency oscillator for generating the clock signal which has a variable frequency in response to the load check signal. The power supply apparatus is switched in accordance with a clock signal having a frequency modulated based on a load condition of the AMOLED, for example, a load current. Accordingly, it is possible to reduce switching power loss caused by unnecessary power consumption under the condition that a small load current is generated, thereby achieving an enhancement in efficiency.

Abstract: A relaxation oscillator circuit with reduced sensitivity of oscillation frequency to comparator delay variation includes a first current source that generates charging current, a second current source coupled to the first current source to generate reference voltage, a resistor coupled to the second current source to enable generation of the reference voltage, a capacitor coupled to the first current source that is charged based on the charging current, a comparator responsive to voltage corresponding to the capacitor and the reference voltage to generate output voltage, a peak detector coupled to the capacitor to generate peak voltage, an error detector coupled to the peak detector and the second current source to generate an error based on the peak voltage and the reference voltage, and a controller coupled to the error detector to control one of the charging current, offset voltage input to the comparator, and capacitance of the capacitor.

Abstract: A relaxation oscillator for generating oscillator signal includes a ramp voltage generating circuit, a reference voltage generating circuit, a reference voltage switching circuit, and a digital logic circuit. The reference voltage generating circuit generates one or more reference voltages and the ramp voltage generating circuit generates one or more ramp voltages. The ramp voltages are compared with each of the reference voltages by sequentially switching the reference voltages using a reference voltage switching signal generated by the reference voltage switching circuit. The oscillator signal is generated by the digital logic circuit based on the results of the comparisons.

Abstract: Disclosed is a method for generating an oscillating signal and an oscillator circuit.

Abstract: An oscillator synchronization system employs two oscillators, each of which includes an integrator which provides a ramping signal at its output, a comparator which receives the ramping signal and a reference signal at respective inputs and toggles an output when the ramping voltage crosses the reference signal, and a one-shot circuit that generates the integrator's reset signal when triggered. The system is preferably arranged such that the oscillators can be operated independently, in which case each oscillator's one-shot is triggered by its own comparator output, or synchronously, in which case each oscillator's one-shot is triggered by the other oscillator's comparator output—with the ramp signal of each oscillator operating to reset the integrator of the other oscillator. The oscillators are typically out-of-phase when synchronized, with the phase difference varying with the magnitude of the reference signals applied to the comparators.

Abstract: An example two-way integrator includes a first current source, a second current source, a first offset current source, a second offset current source, a capacitor, a switching reference and a comparator. The capacitor integrates a sum of a first input current and a first offset current by charging with both the first current source and the first offset current source. The capacitor subsequently integrates a sum of the second input current and the second offset current by discharging with both the second current source and the second offset current source. The switching reference outputs a first reference voltage and a second reference voltage responsive to pulses of a pulse signal. The comparator is coupled to compare the switching reference with a voltage on the capacitor.

Abstract: A relaxation oscillator includes a ramp wave generator configured to generate a ramp wave by complementary first capacitor module charged and discharged according to a first switching signal and second capacitor module charged and discharged according to a second switching signal, a negative feedback circuit unit configured to generate a compensation voltage for compensating an error between the ramp wave and a reference voltage through a feedback of the ramp wave, and a switching signal generator configured to generate the first switching signal and the second switching signal from the compensation voltage and the ramp wave, including a peak voltage storage unit configured to store a peak voltage of the ramp wave that is controlled to be equal to the reference voltage based on the compensation voltage and a peak voltage transfer unit configured to transfer the peak voltage of the ramp wave to the negative feedback unit.

Abstract: Preferred embodiments of the present invention provide systems and methods that automatically correct the desired on-time of switching elements as the resonant frequency changes, so as to maintain the correct proportional value.

Abstract: An oscillator is disclosed. The oscillator includes a first capacitor. The oscillator also includes a second capacitor. The oscillator further includes a first current source. The oscillator also includes a second current source. The oscillator further includes a comparator that has a first input and a second input. The oscillator also includes a reference node. The oscillator further includes a controller that is configured to selectively couple the first current source to the first capacitor and the second current source to the reference node during a first time period.

Abstract: An oscillator arrangement is specified, in which a relaxation oscillator is refined to the extent that the comparator (2) to be used for comparing the voltage across a charge storage device (1) with a switching threshold (VTH) is a current comparator with two current branches (5, 6). One of these two current branches is used in the present case for guiding a charging or discharging current of the charge storage device (1). In this way, a current branch is eliminated, so that the proposed principle is preferably suitable for so-called ultra low power applications.

Abstract: A low headroom oscillator operates at low supply voltages without the use of monostable circuits or flip flops. The oscillator operates in multiple states which allow for the charging and discharging of the capacitors alternately to enable the proper operating of the oscillator at low supply voltages without locking up.

Abstract: In one embodiment, an RC oscillator is provided. The oscillator includes a current generator circuit configured to generate a current. A capacitor is configured to be charged by the current. An inverter includes an input coupled to the capacitor. An output of the inverter goes high when a voltage across the capacitor reaches a threshold voltage of the inverter. A switch coupled to the output of the inverter and the capacitor is configured to close when the output of the inverter goes high. This discharges the capacitor. The output of the inverter goes low when the capacitor is discharged and the switch is opened. Clock generator logic is configured to receive the output of the inverter and generate a clock signal. The current is proportional to the threshold voltage of the inverter.

Abstract: An oscillator includes a first capacitor electrically connected to a first charging switch and a first discharging switch, a second capacitor electrically connected to a second charging switch and a second discharging switch, a first chopping circuit having a first input electrically connected to the first capacitor and a second input electrically connected to a reference voltage, a second chopping circuit having a first input electrically connected to the second capacitor and a second input electrically connected to the reference voltage, a first comparator having a first input electrically connected to a first and second output of the first chopping circuit, a second comparator having a first input electrically connected to a first and second output of the second chopping circuit, and control circuitry having a first input electrically coupled to an output of the first comparator and a second input electrically connected to an output of the second comparator.

Abstract: An oscillator circuit increases and reduces signal levels of first and second oscillation signals in a complementary manner in response to a transition of a signal level of a reference clock. An oscillation control circuit compares each of the signal levels of the first and second oscillation signals to a comparison voltage, and causes the signal level of the reference clock to transition according to results of the comparison. A reference control circuit increases or reduces the comparison voltage so that a difference between a signal level of an intermediate signal which is proportional to respective swings of the first and second oscillation signals and a reference voltage is reduced.

Abstract: A circuit may comprise an amplifier powered by a first supply voltage, with a first input of the amplifier coupled to a stable reference voltage, and the output voltage of the amplifier provided as a designated supply voltage to an oscillator configured to produce a periodic signal having a specified frequency. The circuit may further include a control circuit coupled to a second input of the amplifier, to the output of the amplifier, and to ground, and configured to control the rate of change of the output voltage of the amplifier with respect to temperature. This rate of change may be specified according to a characterization of the oscillator over supply voltage and temperature, and may result in stabilizing the specified frequency across temperature. The periodic signal may therefore be unaffected by variations in the first supply voltage, and the amplitude of the periodic signal may be proportional to the stable reference voltage.

Abstract: An oscillator circuit comprises a charging block with a first terminal for feeding a first charging current, to which terminal a first capacitor and a series circuit of a first and a second switch are connected, and with a second terminal for feeding a second charging current, to which terminal a second capacitor and a series circuit of a third and a fourth switch are connected, as well as a comparison circuit with a first and a second comparator. The comparators are configured to compare voltages at the first and second terminals to a reference voltage, wherein their output is connected to control terminals of the third or first switch. The oscillator circuit further comprises a flipflop that is coupled on the input side to the outputs of the first and second comparators, and on the output side, to control terminals of the second and fourth switches, as well as to an oscillator output.

Abstract: A relaxation oscillator and a method for offset cancellation in a relaxation oscillator. The relaxation oscillator comprises two comparator units, each comparator unit comprising a comparator element and a memory element; and a switch control generator coupled to each of the comparator units; wherein each comparator unit, in a reset state, stores an input-offset voltage on the memory element under the control of the switch control generator such that, in a comparison state, the input-offset voltage is applied to both inputs of the comparator for implementing an offset-free threshold.

Abstract: In at least one embodiment of the invention, an apparatus includes an integrated circuit, which includes a first oscillator terminal and an oscillator discrimination circuit. The oscillator discrimination circuit is operative to generate an indicator of a capacitance value of a load capacitance external to the integrated circuit and coupled to one of the first and second oscillator terminals. The indicator is generated according to a charge time of a reference node coupled to a reference capacitor and a charge time of a node coupled to the first oscillator terminal. The node and the reference node are charged using substantially matched currents.

Abstract: In order to decrease the temperature sensitivity of an oscillator output, and obtain a frequency of oscillation that remains stable over variations in temperature, two oscillators may be configured with identical comparators and logic circuitry, but having different oscillation frequencies. The different oscillation frequencies may be achieved by configuring each oscillator with a respective resistor divider circuit configured to adjust the reference voltage at the reference input of the respective comparator. The difference between the respective periods of oscillation of the two oscillators may therefore become independent of the comparator delay, and may only depend on temperature sensitivity of the resistor.

Abstract: Method and apparatus for adding jitter to an oscillator for reducing EMI are disclosed An oscillator circuit includes an oscillator configured to generate a first clock having a first frequency and a frequency jitter circuit including a charge pump configured to charge and discharge first and second capacitors repeatedly for obtaining a time-varying voltage having a second frequency. The time-varying voltage is coupled to the oscillator to vary the first frequency within a frequency range. The charge pump includes a first switch for coupling the first capacitor to a voltage source and a second switch for coupling the first capacitor to the second capacitor. A charge transfer between the first and second capacitors is configured to provide the time-varying voltage.

Abstract: A technique and corresponding circuitry are presented for a process independent, self-calibrating relaxation based clock source. The technique and circuitry presented here can reduce the time and cost needed for calibration significantly. The relaxation based clock source produces a clock signal whose frequency is dependent upon a trim value. Starting from an initial trim value, the clock signal is generated, its frequency is compared with a reference clock frequency value, and the trim value is correspondingly adjusted up or down a bit at a time. After this process has continued for a while, min-max logic is used to determine the maximum and minimum trim values and, based on these, the final trim value for the clock is set. This calibration process can also be used to extract whether, and by how much, the implementation on silicon of a particular chip lies in the fast or slow process corners.