Addressing Patents (Class 345/564)
  • Patent number: 6353438
    Abstract: The invention provides for cache organization of texture information and a method and apparatus for accessing cached texture information and an index for cached information. Texels are represented in two dimensions and stored in groups referred to as tiles. Cache is configured to contain multiple tiles of texture image data, each tile being stored as a line in the cache. A cache line can be multidimensional (e.g., two or three or more dimensions) and may be viewed as an identifiable storage element in the cache. Memory may consist of a plurality of cache lines. Direct mapped cache may be utilized wherein each DRAM location maps to a single cache line. A tag table contains the tag information for all tiles currently stored in cache. A portion of the texel information may be utilized as an index assigned to a specific cache line. Another portion of the tag information identifies the tile currently stored in cache.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: March 5, 2002
    Assignee: ArtX
    Inventors: Timothy Van Hook, Anthony P. DeLaurier
  • Patent number: 6348910
    Abstract: A display control apparatus and a display apparatus respectively include control units for controlling themselves. The display control apparatus reads or writes data in a memory that can be accessed by the control unit in the display apparatus. Accesses from the display control apparatus to the memory in the display apparatus are made via a bus arranged in addition to a display image data transfer bus.
    Type: Grant
    Filed: May 30, 1996
    Date of Patent: February 19, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takashi Yamamoto, Atsushi Mizutome, Akio Yoshida, Hideo Mori, Kazuhiko Murayama, Tomoyuki Ohno
  • Patent number: 6313850
    Abstract: In a display system having a predefined number, n, of pixel types, a display processor, such as a digital versatile disc (DVD) display processor, includes a color palette which can store more than n color/contrast values and a subpicture bitmap composed of subpicture pixel values, each of which corresponds to one of the n pixel types. In a DVD display system, for example, the DVD subpicture pixel types are: Background, Pattern, Emphasis 1, and Emphasis 2. Each subpicture pixel value is, in turn, related to a color/contrast combination by the color palette, with each pixel value corresponding to the address of a palette location. The corresponding palette location contains the color/contrast value for the related subpicture pixel type. To modify the color/contrast value of a selected group of the pixels having one of the four DVD subpicture pixel types, the display processor updates the color palette, associating new color/contrast values with previously “unused” palette locations.
    Type: Grant
    Filed: November 1, 1999
    Date of Patent: November 6, 2001
    Assignee: Oak Technology, Inc.
    Inventor: Brian M. Czako
  • Publication number: 20010028353
    Abstract: A method and a system for buffer management is provided. The system includes a central processing unit, a multimedia chip, a buffer, a beginning register, an ending register, and a pause register. The beginning register is employed to store a beginning address of the buffer, and the ending register is used to storing an ending address of the buffer or buffer length. Content of the pause register is a data address associated with a command data. In addition, the pause register includes a pause code. When the pause code is equal to a first value, after the multimedia chip reads command data associated with the content of the pause register, reading is stopped, and the command data next to the command data are to be read in the next reading. When the pause code is equal to a second value, after the multimedia chip reads the command data associated with the content of the pause register, the multimedia chip continues to reads command data associated with the beginning register.
    Type: Application
    Filed: April 5, 2001
    Publication date: October 11, 2001
    Inventor: Nai-Sheng Cheng
  • Patent number: 6262750
    Abstract: The memory (MM) is addressed, depending on the format, with address words (MDC) formed at least from the high-order bits of the identifier (ID) of each cue, and possibly padded out with check or selection words (MS) making it possible either to designate consecutive addresses or to select some of the latter from each memory cell (CM) depending on the low-order bits of the identifier. This allows continuous addressing of the memory irrespective of the format used, thereby optimizing the memory size and avoiding a structural or software modification of the addressing system with each change of format.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: July 17, 2001
    Assignee: STMicroelectronics S.A.
    Inventors: Christian Tournier, Laurent Lusinchi